1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2 /* 3 * platform.c - DesignWare HS OTG Controller platform driver 4 * 5 * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl> 6 */ 7 8 #include <linux/kernel.h> 9 #include <linux/module.h> 10 #include <linux/slab.h> 11 #include <linux/clk.h> 12 #include <linux/device.h> 13 #include <linux/dma-mapping.h> 14 #include <linux/of_device.h> 15 #include <linux/mutex.h> 16 #include <linux/platform_device.h> 17 #include <linux/phy/phy.h> 18 #include <linux/platform_data/s3c-hsotg.h> 19 #include <linux/reset.h> 20 21 #include <linux/usb/of.h> 22 23 #include "core.h" 24 #include "hcd.h" 25 #include "debug.h" 26 27 static const char dwc2_driver_name[] = "dwc2"; 28 29 /* 30 * Check the dr_mode against the module configuration and hardware 31 * capabilities. 32 * 33 * The hardware, module, and dr_mode, can each be set to host, device, 34 * or otg. Check that all these values are compatible and adjust the 35 * value of dr_mode if possible. 36 * 37 * actual 38 * HW MOD dr_mode dr_mode 39 * ------------------------------ 40 * HST HST any : HST 41 * HST DEV any : --- 42 * HST OTG any : HST 43 * 44 * DEV HST any : --- 45 * DEV DEV any : DEV 46 * DEV OTG any : DEV 47 * 48 * OTG HST any : HST 49 * OTG DEV any : DEV 50 * OTG OTG any : dr_mode 51 */ 52 static int dwc2_get_dr_mode(struct dwc2_hsotg *hsotg) 53 { 54 enum usb_dr_mode mode; 55 56 hsotg->dr_mode = usb_get_dr_mode(hsotg->dev); 57 if (hsotg->dr_mode == USB_DR_MODE_UNKNOWN) 58 hsotg->dr_mode = USB_DR_MODE_OTG; 59 60 mode = hsotg->dr_mode; 61 62 if (dwc2_hw_is_device(hsotg)) { 63 if (IS_ENABLED(CONFIG_USB_DWC2_HOST)) { 64 dev_err(hsotg->dev, 65 "Controller does not support host mode.\n"); 66 return -EINVAL; 67 } 68 mode = USB_DR_MODE_PERIPHERAL; 69 } else if (dwc2_hw_is_host(hsotg)) { 70 if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL)) { 71 dev_err(hsotg->dev, 72 "Controller does not support device mode.\n"); 73 return -EINVAL; 74 } 75 mode = USB_DR_MODE_HOST; 76 } else { 77 if (IS_ENABLED(CONFIG_USB_DWC2_HOST)) 78 mode = USB_DR_MODE_HOST; 79 else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL)) 80 mode = USB_DR_MODE_PERIPHERAL; 81 } 82 83 if (mode != hsotg->dr_mode) { 84 dev_warn(hsotg->dev, 85 "Configuration mismatch. dr_mode forced to %s\n", 86 mode == USB_DR_MODE_HOST ? "host" : "device"); 87 88 hsotg->dr_mode = mode; 89 } 90 91 return 0; 92 } 93 94 static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) 95 { 96 struct platform_device *pdev = to_platform_device(hsotg->dev); 97 int ret; 98 99 ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies), 100 hsotg->supplies); 101 if (ret) 102 return ret; 103 104 if (hsotg->utmi_clk) { 105 ret = clk_prepare_enable(hsotg->utmi_clk); 106 if (ret) 107 goto err_dis_reg; 108 } 109 110 if (hsotg->clk) { 111 ret = clk_prepare_enable(hsotg->clk); 112 if (ret) 113 goto err_dis_utmi_clk; 114 } 115 116 if (hsotg->uphy) { 117 ret = usb_phy_init(hsotg->uphy); 118 } else if (hsotg->plat && hsotg->plat->phy_init) { 119 ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type); 120 } else { 121 ret = phy_init(hsotg->phy); 122 if (ret == 0) { 123 ret = phy_power_on(hsotg->phy); 124 if (ret) 125 phy_exit(hsotg->phy); 126 } 127 } 128 129 if (ret) 130 goto err_dis_clk; 131 132 return 0; 133 134 err_dis_clk: 135 if (hsotg->clk) 136 clk_disable_unprepare(hsotg->clk); 137 138 err_dis_utmi_clk: 139 if (hsotg->utmi_clk) 140 clk_disable_unprepare(hsotg->utmi_clk); 141 142 err_dis_reg: 143 regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies); 144 145 return ret; 146 } 147 148 /** 149 * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources 150 * @hsotg: The driver state 151 * 152 * A wrapper for platform code responsible for controlling 153 * low-level USB platform resources (phy, clock, regulators) 154 */ 155 int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) 156 { 157 int ret = __dwc2_lowlevel_hw_enable(hsotg); 158 159 if (ret == 0) 160 hsotg->ll_hw_enabled = true; 161 return ret; 162 } 163 164 static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg) 165 { 166 struct platform_device *pdev = to_platform_device(hsotg->dev); 167 int ret = 0; 168 169 if (hsotg->uphy) { 170 usb_phy_shutdown(hsotg->uphy); 171 } else if (hsotg->plat && hsotg->plat->phy_exit) { 172 ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type); 173 } else { 174 ret = phy_power_off(hsotg->phy); 175 if (ret == 0) 176 ret = phy_exit(hsotg->phy); 177 } 178 if (ret) 179 return ret; 180 181 if (hsotg->clk) 182 clk_disable_unprepare(hsotg->clk); 183 184 if (hsotg->utmi_clk) 185 clk_disable_unprepare(hsotg->utmi_clk); 186 187 return regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies); 188 } 189 190 /** 191 * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources 192 * @hsotg: The driver state 193 * 194 * A wrapper for platform code responsible for controlling 195 * low-level USB platform resources (phy, clock, regulators) 196 */ 197 int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg) 198 { 199 int ret = __dwc2_lowlevel_hw_disable(hsotg); 200 201 if (ret == 0) 202 hsotg->ll_hw_enabled = false; 203 return ret; 204 } 205 206 static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg) 207 { 208 int i, ret; 209 210 hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2"); 211 if (IS_ERR(hsotg->reset)) 212 return dev_err_probe(hsotg->dev, PTR_ERR(hsotg->reset), 213 "error getting reset control\n"); 214 215 reset_control_deassert(hsotg->reset); 216 217 hsotg->reset_ecc = devm_reset_control_get_optional(hsotg->dev, "dwc2-ecc"); 218 if (IS_ERR(hsotg->reset_ecc)) 219 return dev_err_probe(hsotg->dev, PTR_ERR(hsotg->reset_ecc), 220 "error getting reset control for ecc\n"); 221 222 reset_control_deassert(hsotg->reset_ecc); 223 224 /* 225 * Attempt to find a generic PHY, then look for an old style 226 * USB PHY and then fall back to pdata 227 */ 228 hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy"); 229 if (IS_ERR(hsotg->phy)) { 230 ret = PTR_ERR(hsotg->phy); 231 switch (ret) { 232 case -ENODEV: 233 case -ENOSYS: 234 hsotg->phy = NULL; 235 break; 236 default: 237 return dev_err_probe(hsotg->dev, ret, "error getting phy\n"); 238 } 239 } 240 241 if (!hsotg->phy) { 242 hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2); 243 if (IS_ERR(hsotg->uphy)) { 244 ret = PTR_ERR(hsotg->uphy); 245 switch (ret) { 246 case -ENODEV: 247 case -ENXIO: 248 hsotg->uphy = NULL; 249 break; 250 default: 251 return dev_err_probe(hsotg->dev, ret, "error getting usb phy\n"); 252 } 253 } 254 } 255 256 hsotg->plat = dev_get_platdata(hsotg->dev); 257 258 /* Clock */ 259 hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg"); 260 if (IS_ERR(hsotg->clk)) 261 return dev_err_probe(hsotg->dev, PTR_ERR(hsotg->clk), "cannot get otg clock\n"); 262 263 hsotg->utmi_clk = devm_clk_get_optional(hsotg->dev, "utmi"); 264 if (IS_ERR(hsotg->utmi_clk)) 265 return dev_err_probe(hsotg->dev, PTR_ERR(hsotg->utmi_clk), 266 "cannot get utmi clock\n"); 267 268 /* Regulators */ 269 for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++) 270 hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i]; 271 272 ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies), 273 hsotg->supplies); 274 if (ret) 275 return dev_err_probe(hsotg->dev, ret, "failed to request supplies\n"); 276 277 return 0; 278 } 279 280 /** 281 * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the 282 * DWC_otg driver 283 * 284 * @dev: Platform device 285 * 286 * This routine is called, for example, when the rmmod command is executed. The 287 * device may or may not be electrically present. If it is present, the driver 288 * stops device processing. Any resources used on behalf of this device are 289 * freed. 290 */ 291 static int dwc2_driver_remove(struct platform_device *dev) 292 { 293 struct dwc2_hsotg *hsotg = platform_get_drvdata(dev); 294 struct dwc2_gregs_backup *gr; 295 int ret = 0; 296 297 gr = &hsotg->gr_backup; 298 299 /* Exit Hibernation when driver is removed. */ 300 if (hsotg->hibernated) { 301 if (gr->gotgctl & GOTGCTL_CURMODE_HOST) 302 ret = dwc2_exit_hibernation(hsotg, 0, 0, 1); 303 else 304 ret = dwc2_exit_hibernation(hsotg, 0, 0, 0); 305 306 if (ret) 307 dev_err(hsotg->dev, 308 "exit hibernation failed.\n"); 309 } 310 311 /* Exit Partial Power Down when driver is removed. */ 312 if (hsotg->in_ppd) { 313 ret = dwc2_exit_partial_power_down(hsotg, 0, true); 314 if (ret) 315 dev_err(hsotg->dev, 316 "exit partial_power_down failed\n"); 317 } 318 319 /* Exit clock gating when driver is removed. */ 320 if (hsotg->params.power_down == DWC2_POWER_DOWN_PARAM_NONE && 321 hsotg->bus_suspended) { 322 if (dwc2_is_device_mode(hsotg)) 323 dwc2_gadget_exit_clock_gating(hsotg, 0); 324 else 325 dwc2_host_exit_clock_gating(hsotg, 0); 326 } 327 328 dwc2_debugfs_exit(hsotg); 329 if (hsotg->hcd_enabled) 330 dwc2_hcd_remove(hsotg); 331 if (hsotg->gadget_enabled) 332 dwc2_hsotg_remove(hsotg); 333 334 dwc2_drd_exit(hsotg); 335 336 if (hsotg->params.activate_stm_id_vb_detection) 337 regulator_disable(hsotg->usb33d); 338 339 if (hsotg->ll_hw_enabled) 340 dwc2_lowlevel_hw_disable(hsotg); 341 342 reset_control_assert(hsotg->reset); 343 reset_control_assert(hsotg->reset_ecc); 344 345 return 0; 346 } 347 348 /** 349 * dwc2_driver_shutdown() - Called on device shutdown 350 * 351 * @dev: Platform device 352 * 353 * In specific conditions (involving usb hubs) dwc2 devices can create a 354 * lot of interrupts, even to the point of overwhelming devices running 355 * at low frequencies. Some devices need to do special clock handling 356 * at shutdown-time which may bring the system clock below the threshold 357 * of being able to handle the dwc2 interrupts. Disabling dwc2-irqs 358 * prevents reboots/poweroffs from getting stuck in such cases. 359 */ 360 static void dwc2_driver_shutdown(struct platform_device *dev) 361 { 362 struct dwc2_hsotg *hsotg = platform_get_drvdata(dev); 363 364 dwc2_disable_global_interrupts(hsotg); 365 synchronize_irq(hsotg->irq); 366 } 367 368 /** 369 * dwc2_check_core_endianness() - Returns true if core and AHB have 370 * opposite endianness. 371 * @hsotg: Programming view of the DWC_otg controller. 372 */ 373 static bool dwc2_check_core_endianness(struct dwc2_hsotg *hsotg) 374 { 375 u32 snpsid; 376 377 snpsid = ioread32(hsotg->regs + GSNPSID); 378 if ((snpsid & GSNPSID_ID_MASK) == DWC2_OTG_ID || 379 (snpsid & GSNPSID_ID_MASK) == DWC2_FS_IOT_ID || 380 (snpsid & GSNPSID_ID_MASK) == DWC2_HS_IOT_ID) 381 return false; 382 return true; 383 } 384 385 /** 386 * dwc2_check_core_version() - Check core version 387 * 388 * @hsotg: Programming view of the DWC_otg controller 389 * 390 */ 391 int dwc2_check_core_version(struct dwc2_hsotg *hsotg) 392 { 393 struct dwc2_hw_params *hw = &hsotg->hw_params; 394 395 /* 396 * Attempt to ensure this device is really a DWC_otg Controller. 397 * Read and verify the GSNPSID register contents. The value should be 398 * 0x45f4xxxx, 0x5531xxxx or 0x5532xxxx 399 */ 400 401 hw->snpsid = dwc2_readl(hsotg, GSNPSID); 402 if ((hw->snpsid & GSNPSID_ID_MASK) != DWC2_OTG_ID && 403 (hw->snpsid & GSNPSID_ID_MASK) != DWC2_FS_IOT_ID && 404 (hw->snpsid & GSNPSID_ID_MASK) != DWC2_HS_IOT_ID) { 405 dev_err(hsotg->dev, "Bad value for GSNPSID: 0x%08x\n", 406 hw->snpsid); 407 return -ENODEV; 408 } 409 410 dev_dbg(hsotg->dev, "Core Release: %1x.%1x%1x%1x (snpsid=%x)\n", 411 hw->snpsid >> 12 & 0xf, hw->snpsid >> 8 & 0xf, 412 hw->snpsid >> 4 & 0xf, hw->snpsid & 0xf, hw->snpsid); 413 return 0; 414 } 415 416 /** 417 * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg 418 * driver 419 * 420 * @dev: Platform device 421 * 422 * This routine creates the driver components required to control the device 423 * (core, HCD, and PCD) and initializes the device. The driver components are 424 * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved 425 * in the device private data. This allows the driver to access the dwc2_hsotg 426 * structure on subsequent calls to driver methods for this device. 427 */ 428 static int dwc2_driver_probe(struct platform_device *dev) 429 { 430 struct dwc2_hsotg *hsotg; 431 struct resource *res; 432 int retval; 433 434 hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL); 435 if (!hsotg) 436 return -ENOMEM; 437 438 hsotg->dev = &dev->dev; 439 440 /* 441 * Use reasonable defaults so platforms don't have to provide these. 442 */ 443 if (!dev->dev.dma_mask) 444 dev->dev.dma_mask = &dev->dev.coherent_dma_mask; 445 retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32)); 446 if (retval) { 447 dev_err(&dev->dev, "can't set coherent DMA mask: %d\n", retval); 448 return retval; 449 } 450 451 hsotg->regs = devm_platform_get_and_ioremap_resource(dev, 0, &res); 452 if (IS_ERR(hsotg->regs)) 453 return PTR_ERR(hsotg->regs); 454 455 dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n", 456 (unsigned long)res->start, hsotg->regs); 457 458 retval = dwc2_lowlevel_hw_init(hsotg); 459 if (retval) 460 return retval; 461 462 spin_lock_init(&hsotg->lock); 463 464 hsotg->irq = platform_get_irq(dev, 0); 465 if (hsotg->irq < 0) 466 return hsotg->irq; 467 468 dev_dbg(hsotg->dev, "registering common handler for irq%d\n", 469 hsotg->irq); 470 retval = devm_request_irq(hsotg->dev, hsotg->irq, 471 dwc2_handle_common_intr, IRQF_SHARED, 472 dev_name(hsotg->dev), hsotg); 473 if (retval) 474 return retval; 475 476 hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus"); 477 if (IS_ERR(hsotg->vbus_supply)) { 478 retval = PTR_ERR(hsotg->vbus_supply); 479 hsotg->vbus_supply = NULL; 480 if (retval != -ENODEV) 481 return retval; 482 } 483 484 retval = dwc2_lowlevel_hw_enable(hsotg); 485 if (retval) 486 return retval; 487 488 hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg); 489 490 retval = dwc2_get_dr_mode(hsotg); 491 if (retval) 492 goto error; 493 494 hsotg->need_phy_for_wake = 495 of_property_read_bool(dev->dev.of_node, 496 "snps,need-phy-for-wake"); 497 498 /* 499 * Before performing any core related operations 500 * check core version. 501 */ 502 retval = dwc2_check_core_version(hsotg); 503 if (retval) 504 goto error; 505 506 /* 507 * Reset before dwc2_get_hwparams() then it could get power-on real 508 * reset value form registers. 509 */ 510 retval = dwc2_core_reset(hsotg, false); 511 if (retval) 512 goto error; 513 514 /* Detect config values from hardware */ 515 retval = dwc2_get_hwparams(hsotg); 516 if (retval) 517 goto error; 518 519 /* 520 * For OTG cores, set the force mode bits to reflect the value 521 * of dr_mode. Force mode bits should not be touched at any 522 * other time after this. 523 */ 524 dwc2_force_dr_mode(hsotg); 525 526 retval = dwc2_init_params(hsotg); 527 if (retval) 528 goto error; 529 530 if (hsotg->params.activate_stm_id_vb_detection) { 531 u32 ggpio; 532 533 hsotg->usb33d = devm_regulator_get(hsotg->dev, "usb33d"); 534 if (IS_ERR(hsotg->usb33d)) { 535 retval = PTR_ERR(hsotg->usb33d); 536 dev_err_probe(hsotg->dev, retval, "failed to request usb33d supply\n"); 537 goto error; 538 } 539 retval = regulator_enable(hsotg->usb33d); 540 if (retval) { 541 dev_err_probe(hsotg->dev, retval, "failed to enable usb33d supply\n"); 542 goto error; 543 } 544 545 ggpio = dwc2_readl(hsotg, GGPIO); 546 ggpio |= GGPIO_STM32_OTG_GCCFG_IDEN; 547 ggpio |= GGPIO_STM32_OTG_GCCFG_VBDEN; 548 dwc2_writel(hsotg, ggpio, GGPIO); 549 550 /* ID/VBUS detection startup time */ 551 usleep_range(5000, 7000); 552 } 553 554 retval = dwc2_drd_init(hsotg); 555 if (retval) { 556 dev_err_probe(hsotg->dev, retval, "failed to initialize dual-role\n"); 557 goto error_init; 558 } 559 560 if (hsotg->dr_mode != USB_DR_MODE_HOST) { 561 retval = dwc2_gadget_init(hsotg); 562 if (retval) 563 goto error_drd; 564 hsotg->gadget_enabled = 1; 565 } 566 567 /* 568 * If we need PHY for wakeup we must be wakeup capable. 569 * When we have a device that can wake without the PHY we 570 * can adjust this condition. 571 */ 572 if (hsotg->need_phy_for_wake) 573 device_set_wakeup_capable(&dev->dev, true); 574 575 hsotg->reset_phy_on_wake = 576 of_property_read_bool(dev->dev.of_node, 577 "snps,reset-phy-on-wake"); 578 if (hsotg->reset_phy_on_wake && !hsotg->phy) { 579 dev_warn(hsotg->dev, 580 "Quirk reset-phy-on-wake only supports generic PHYs\n"); 581 hsotg->reset_phy_on_wake = false; 582 } 583 584 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) { 585 retval = dwc2_hcd_init(hsotg); 586 if (retval) { 587 if (hsotg->gadget_enabled) 588 dwc2_hsotg_remove(hsotg); 589 goto error_drd; 590 } 591 hsotg->hcd_enabled = 1; 592 } 593 594 platform_set_drvdata(dev, hsotg); 595 hsotg->hibernated = 0; 596 597 dwc2_debugfs_init(hsotg); 598 599 /* Gadget code manages lowlevel hw on its own */ 600 if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) 601 dwc2_lowlevel_hw_disable(hsotg); 602 603 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \ 604 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 605 /* Postponed adding a new gadget to the udc class driver list */ 606 if (hsotg->gadget_enabled) { 607 retval = usb_add_gadget_udc(hsotg->dev, &hsotg->gadget); 608 if (retval) { 609 hsotg->gadget.udc = NULL; 610 dwc2_hsotg_remove(hsotg); 611 goto error_debugfs; 612 } 613 } 614 #endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */ 615 return 0; 616 617 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \ 618 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 619 error_debugfs: 620 dwc2_debugfs_exit(hsotg); 621 if (hsotg->hcd_enabled) 622 dwc2_hcd_remove(hsotg); 623 #endif 624 error_drd: 625 dwc2_drd_exit(hsotg); 626 627 error_init: 628 if (hsotg->params.activate_stm_id_vb_detection) 629 regulator_disable(hsotg->usb33d); 630 error: 631 if (hsotg->ll_hw_enabled) 632 dwc2_lowlevel_hw_disable(hsotg); 633 return retval; 634 } 635 636 static int __maybe_unused dwc2_suspend(struct device *dev) 637 { 638 struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev); 639 bool is_device_mode = dwc2_is_device_mode(dwc2); 640 int ret = 0; 641 642 if (is_device_mode) 643 dwc2_hsotg_suspend(dwc2); 644 645 dwc2_drd_suspend(dwc2); 646 647 if (dwc2->params.activate_stm_id_vb_detection) { 648 unsigned long flags; 649 u32 ggpio, gotgctl; 650 651 /* 652 * Need to force the mode to the current mode to avoid Mode 653 * Mismatch Interrupt when ID detection will be disabled. 654 */ 655 dwc2_force_mode(dwc2, !is_device_mode); 656 657 spin_lock_irqsave(&dwc2->lock, flags); 658 gotgctl = dwc2_readl(dwc2, GOTGCTL); 659 /* bypass debounce filter, enable overrides */ 660 gotgctl |= GOTGCTL_DBNCE_FLTR_BYPASS; 661 gotgctl |= GOTGCTL_BVALOEN | GOTGCTL_AVALOEN; 662 /* Force A / B session if needed */ 663 if (gotgctl & GOTGCTL_ASESVLD) 664 gotgctl |= GOTGCTL_AVALOVAL; 665 if (gotgctl & GOTGCTL_BSESVLD) 666 gotgctl |= GOTGCTL_BVALOVAL; 667 dwc2_writel(dwc2, gotgctl, GOTGCTL); 668 spin_unlock_irqrestore(&dwc2->lock, flags); 669 670 ggpio = dwc2_readl(dwc2, GGPIO); 671 ggpio &= ~GGPIO_STM32_OTG_GCCFG_IDEN; 672 ggpio &= ~GGPIO_STM32_OTG_GCCFG_VBDEN; 673 dwc2_writel(dwc2, ggpio, GGPIO); 674 675 regulator_disable(dwc2->usb33d); 676 } 677 678 if (dwc2->ll_hw_enabled && 679 (is_device_mode || dwc2_host_can_poweroff_phy(dwc2))) { 680 ret = __dwc2_lowlevel_hw_disable(dwc2); 681 dwc2->phy_off_for_suspend = true; 682 } 683 684 return ret; 685 } 686 687 static int __maybe_unused dwc2_resume(struct device *dev) 688 { 689 struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev); 690 int ret = 0; 691 692 if (dwc2->phy_off_for_suspend && dwc2->ll_hw_enabled) { 693 ret = __dwc2_lowlevel_hw_enable(dwc2); 694 if (ret) 695 return ret; 696 } 697 dwc2->phy_off_for_suspend = false; 698 699 if (dwc2->params.activate_stm_id_vb_detection) { 700 unsigned long flags; 701 u32 ggpio, gotgctl; 702 703 ret = regulator_enable(dwc2->usb33d); 704 if (ret) 705 return ret; 706 707 ggpio = dwc2_readl(dwc2, GGPIO); 708 ggpio |= GGPIO_STM32_OTG_GCCFG_IDEN; 709 ggpio |= GGPIO_STM32_OTG_GCCFG_VBDEN; 710 dwc2_writel(dwc2, ggpio, GGPIO); 711 712 /* ID/VBUS detection startup time */ 713 usleep_range(5000, 7000); 714 715 spin_lock_irqsave(&dwc2->lock, flags); 716 gotgctl = dwc2_readl(dwc2, GOTGCTL); 717 gotgctl &= ~GOTGCTL_DBNCE_FLTR_BYPASS; 718 gotgctl &= ~(GOTGCTL_BVALOEN | GOTGCTL_AVALOEN | 719 GOTGCTL_BVALOVAL | GOTGCTL_AVALOVAL); 720 dwc2_writel(dwc2, gotgctl, GOTGCTL); 721 spin_unlock_irqrestore(&dwc2->lock, flags); 722 } 723 724 if (!dwc2->role_sw) { 725 /* Need to restore FORCEDEVMODE/FORCEHOSTMODE */ 726 dwc2_force_dr_mode(dwc2); 727 } else { 728 dwc2_drd_resume(dwc2); 729 } 730 731 if (dwc2_is_device_mode(dwc2)) 732 ret = dwc2_hsotg_resume(dwc2); 733 734 return ret; 735 } 736 737 static const struct dev_pm_ops dwc2_dev_pm_ops = { 738 SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume) 739 }; 740 741 static struct platform_driver dwc2_platform_driver = { 742 .driver = { 743 .name = dwc2_driver_name, 744 .of_match_table = dwc2_of_match_table, 745 .acpi_match_table = ACPI_PTR(dwc2_acpi_match), 746 .pm = &dwc2_dev_pm_ops, 747 }, 748 .probe = dwc2_driver_probe, 749 .remove = dwc2_driver_remove, 750 .shutdown = dwc2_driver_shutdown, 751 }; 752 753 module_platform_driver(dwc2_platform_driver); 754