1 /* 2 * udc.c - ChipIdea UDC driver 3 * 4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. 5 * 6 * Author: David Lopo 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/delay.h> 14 #include <linux/device.h> 15 #include <linux/dmapool.h> 16 #include <linux/err.h> 17 #include <linux/irqreturn.h> 18 #include <linux/kernel.h> 19 #include <linux/slab.h> 20 #include <linux/pm_runtime.h> 21 #include <linux/usb/ch9.h> 22 #include <linux/usb/gadget.h> 23 #include <linux/usb/otg.h> 24 #include <linux/usb/chipidea.h> 25 26 #include "ci.h" 27 #include "udc.h" 28 #include "bits.h" 29 #include "debug.h" 30 31 /* control endpoint description */ 32 static const struct usb_endpoint_descriptor 33 ctrl_endpt_out_desc = { 34 .bLength = USB_DT_ENDPOINT_SIZE, 35 .bDescriptorType = USB_DT_ENDPOINT, 36 37 .bEndpointAddress = USB_DIR_OUT, 38 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 39 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), 40 }; 41 42 static const struct usb_endpoint_descriptor 43 ctrl_endpt_in_desc = { 44 .bLength = USB_DT_ENDPOINT_SIZE, 45 .bDescriptorType = USB_DT_ENDPOINT, 46 47 .bEndpointAddress = USB_DIR_IN, 48 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 49 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), 50 }; 51 52 /** 53 * hw_ep_bit: calculates the bit number 54 * @num: endpoint number 55 * @dir: endpoint direction 56 * 57 * This function returns bit number 58 */ 59 static inline int hw_ep_bit(int num, int dir) 60 { 61 return num + (dir ? 16 : 0); 62 } 63 64 static inline int ep_to_bit(struct ci_hdrc *ci, int n) 65 { 66 int fill = 16 - ci->hw_ep_max / 2; 67 68 if (n >= ci->hw_ep_max / 2) 69 n += fill; 70 71 return n; 72 } 73 74 /** 75 * hw_device_state: enables/disables interrupts (execute without interruption) 76 * @dma: 0 => disable, !0 => enable and set dma engine 77 * 78 * This function returns an error code 79 */ 80 static int hw_device_state(struct ci_hdrc *ci, u32 dma) 81 { 82 if (dma) { 83 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma); 84 /* interrupt, error, port change, reset, sleep/suspend */ 85 hw_write(ci, OP_USBINTR, ~0, 86 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI); 87 } else { 88 hw_write(ci, OP_USBINTR, ~0, 0); 89 } 90 return 0; 91 } 92 93 /** 94 * hw_ep_flush: flush endpoint fifo (execute without interruption) 95 * @num: endpoint number 96 * @dir: endpoint direction 97 * 98 * This function returns an error code 99 */ 100 static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir) 101 { 102 int n = hw_ep_bit(num, dir); 103 104 do { 105 /* flush any pending transfer */ 106 hw_write(ci, OP_ENDPTFLUSH, BIT(n), BIT(n)); 107 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n))) 108 cpu_relax(); 109 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n))); 110 111 return 0; 112 } 113 114 /** 115 * hw_ep_disable: disables endpoint (execute without interruption) 116 * @num: endpoint number 117 * @dir: endpoint direction 118 * 119 * This function returns an error code 120 */ 121 static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir) 122 { 123 hw_ep_flush(ci, num, dir); 124 hw_write(ci, OP_ENDPTCTRL + num, 125 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0); 126 return 0; 127 } 128 129 /** 130 * hw_ep_enable: enables endpoint (execute without interruption) 131 * @num: endpoint number 132 * @dir: endpoint direction 133 * @type: endpoint type 134 * 135 * This function returns an error code 136 */ 137 static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type) 138 { 139 u32 mask, data; 140 141 if (dir) { 142 mask = ENDPTCTRL_TXT; /* type */ 143 data = type << __ffs(mask); 144 145 mask |= ENDPTCTRL_TXS; /* unstall */ 146 mask |= ENDPTCTRL_TXR; /* reset data toggle */ 147 data |= ENDPTCTRL_TXR; 148 mask |= ENDPTCTRL_TXE; /* enable */ 149 data |= ENDPTCTRL_TXE; 150 } else { 151 mask = ENDPTCTRL_RXT; /* type */ 152 data = type << __ffs(mask); 153 154 mask |= ENDPTCTRL_RXS; /* unstall */ 155 mask |= ENDPTCTRL_RXR; /* reset data toggle */ 156 data |= ENDPTCTRL_RXR; 157 mask |= ENDPTCTRL_RXE; /* enable */ 158 data |= ENDPTCTRL_RXE; 159 } 160 hw_write(ci, OP_ENDPTCTRL + num, mask, data); 161 return 0; 162 } 163 164 /** 165 * hw_ep_get_halt: return endpoint halt status 166 * @num: endpoint number 167 * @dir: endpoint direction 168 * 169 * This function returns 1 if endpoint halted 170 */ 171 static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir) 172 { 173 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; 174 175 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0; 176 } 177 178 /** 179 * hw_test_and_clear_setup_status: test & clear setup status (execute without 180 * interruption) 181 * @n: endpoint number 182 * 183 * This function returns setup status 184 */ 185 static int hw_test_and_clear_setup_status(struct ci_hdrc *ci, int n) 186 { 187 n = ep_to_bit(ci, n); 188 return hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(n)); 189 } 190 191 /** 192 * hw_ep_prime: primes endpoint (execute without interruption) 193 * @num: endpoint number 194 * @dir: endpoint direction 195 * @is_ctrl: true if control endpoint 196 * 197 * This function returns an error code 198 */ 199 static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) 200 { 201 int n = hw_ep_bit(num, dir); 202 203 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) 204 return -EAGAIN; 205 206 hw_write(ci, OP_ENDPTPRIME, BIT(n), BIT(n)); 207 208 while (hw_read(ci, OP_ENDPTPRIME, BIT(n))) 209 cpu_relax(); 210 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) 211 return -EAGAIN; 212 213 /* status shoult be tested according with manual but it doesn't work */ 214 return 0; 215 } 216 217 /** 218 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute 219 * without interruption) 220 * @num: endpoint number 221 * @dir: endpoint direction 222 * @value: true => stall, false => unstall 223 * 224 * This function returns an error code 225 */ 226 static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) 227 { 228 if (value != 0 && value != 1) 229 return -EINVAL; 230 231 do { 232 enum ci_hw_regs reg = OP_ENDPTCTRL + num; 233 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; 234 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR; 235 236 /* data toggle - reserved for EP0 but it's in ESS */ 237 hw_write(ci, reg, mask_xs|mask_xr, 238 value ? mask_xs : mask_xr); 239 } while (value != hw_ep_get_halt(ci, num, dir)); 240 241 return 0; 242 } 243 244 /** 245 * hw_is_port_high_speed: test if port is high speed 246 * 247 * This function returns true if high speed port 248 */ 249 static int hw_port_is_high_speed(struct ci_hdrc *ci) 250 { 251 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) : 252 hw_read(ci, OP_PORTSC, PORTSC_HSP); 253 } 254 255 /** 256 * hw_read_intr_enable: returns interrupt enable register 257 * 258 * This function returns register data 259 */ 260 static u32 hw_read_intr_enable(struct ci_hdrc *ci) 261 { 262 return hw_read(ci, OP_USBINTR, ~0); 263 } 264 265 /** 266 * hw_read_intr_status: returns interrupt status register 267 * 268 * This function returns register data 269 */ 270 static u32 hw_read_intr_status(struct ci_hdrc *ci) 271 { 272 return hw_read(ci, OP_USBSTS, ~0); 273 } 274 275 /** 276 * hw_test_and_clear_complete: test & clear complete status (execute without 277 * interruption) 278 * @n: endpoint number 279 * 280 * This function returns complete status 281 */ 282 static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n) 283 { 284 n = ep_to_bit(ci, n); 285 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n)); 286 } 287 288 /** 289 * hw_test_and_clear_intr_active: test & clear active interrupts (execute 290 * without interruption) 291 * 292 * This function returns active interrutps 293 */ 294 static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci) 295 { 296 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci); 297 298 hw_write(ci, OP_USBSTS, ~0, reg); 299 return reg; 300 } 301 302 /** 303 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without 304 * interruption) 305 * 306 * This function returns guard value 307 */ 308 static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci) 309 { 310 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0); 311 } 312 313 /** 314 * hw_test_and_set_setup_guard: test & set setup guard (execute without 315 * interruption) 316 * 317 * This function returns guard value 318 */ 319 static int hw_test_and_set_setup_guard(struct ci_hdrc *ci) 320 { 321 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW); 322 } 323 324 /** 325 * hw_usb_set_address: configures USB address (execute without interruption) 326 * @value: new USB address 327 * 328 * This function explicitly sets the address, without the "USBADRA" (advance) 329 * feature, which is not supported by older versions of the controller. 330 */ 331 static void hw_usb_set_address(struct ci_hdrc *ci, u8 value) 332 { 333 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR, 334 value << __ffs(DEVICEADDR_USBADR)); 335 } 336 337 /** 338 * hw_usb_reset: restart device after a bus reset (execute without 339 * interruption) 340 * 341 * This function returns an error code 342 */ 343 static int hw_usb_reset(struct ci_hdrc *ci) 344 { 345 hw_usb_set_address(ci, 0); 346 347 /* ESS flushes only at end?!? */ 348 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0); 349 350 /* clear setup token semaphores */ 351 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0); 352 353 /* clear complete status */ 354 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0); 355 356 /* wait until all bits cleared */ 357 while (hw_read(ci, OP_ENDPTPRIME, ~0)) 358 udelay(10); /* not RTOS friendly */ 359 360 /* reset all endpoints ? */ 361 362 /* reset internal status and wait for further instructions 363 no need to verify the port reset status (ESS does it) */ 364 365 return 0; 366 } 367 368 /****************************************************************************** 369 * UTIL block 370 *****************************************************************************/ 371 372 static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq, 373 unsigned length) 374 { 375 int i; 376 u32 temp; 377 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node), 378 GFP_ATOMIC); 379 380 if (node == NULL) 381 return -ENOMEM; 382 383 node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC, 384 &node->dma); 385 if (node->ptr == NULL) { 386 kfree(node); 387 return -ENOMEM; 388 } 389 390 memset(node->ptr, 0, sizeof(struct ci_hw_td)); 391 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES)); 392 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES); 393 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE); 394 395 temp = (u32) (hwreq->req.dma + hwreq->req.actual); 396 if (length) { 397 node->ptr->page[0] = cpu_to_le32(temp); 398 for (i = 1; i < TD_PAGE_COUNT; i++) { 399 u32 page = temp + i * CI_HDRC_PAGE_SIZE; 400 page &= ~TD_RESERVED_MASK; 401 node->ptr->page[i] = cpu_to_le32(page); 402 } 403 } 404 405 hwreq->req.actual += length; 406 407 if (!list_empty(&hwreq->tds)) { 408 /* get the last entry */ 409 lastnode = list_entry(hwreq->tds.prev, 410 struct td_node, td); 411 lastnode->ptr->next = cpu_to_le32(node->dma); 412 } 413 414 INIT_LIST_HEAD(&node->td); 415 list_add_tail(&node->td, &hwreq->tds); 416 417 return 0; 418 } 419 420 /** 421 * _usb_addr: calculates endpoint address from direction & number 422 * @ep: endpoint 423 */ 424 static inline u8 _usb_addr(struct ci_hw_ep *ep) 425 { 426 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num; 427 } 428 429 /** 430 * _hardware_queue: configures a request at hardware level 431 * @gadget: gadget 432 * @hwep: endpoint 433 * 434 * This function returns an error code 435 */ 436 static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) 437 { 438 struct ci_hdrc *ci = hwep->ci; 439 int ret = 0; 440 unsigned rest = hwreq->req.length; 441 int pages = TD_PAGE_COUNT; 442 struct td_node *firstnode, *lastnode; 443 444 /* don't queue twice */ 445 if (hwreq->req.status == -EALREADY) 446 return -EALREADY; 447 448 hwreq->req.status = -EALREADY; 449 450 ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir); 451 if (ret) 452 return ret; 453 454 /* 455 * The first buffer could be not page aligned. 456 * In that case we have to span into one extra td. 457 */ 458 if (hwreq->req.dma % PAGE_SIZE) 459 pages--; 460 461 if (rest == 0) 462 add_td_to_list(hwep, hwreq, 0); 463 464 while (rest > 0) { 465 unsigned count = min(hwreq->req.length - hwreq->req.actual, 466 (unsigned)(pages * CI_HDRC_PAGE_SIZE)); 467 add_td_to_list(hwep, hwreq, count); 468 rest -= count; 469 } 470 471 if (hwreq->req.zero && hwreq->req.length 472 && (hwreq->req.length % hwep->ep.maxpacket == 0)) 473 add_td_to_list(hwep, hwreq, 0); 474 475 firstnode = list_first_entry(&hwreq->tds, struct td_node, td); 476 477 lastnode = list_entry(hwreq->tds.prev, 478 struct td_node, td); 479 480 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE); 481 if (!hwreq->req.no_interrupt) 482 lastnode->ptr->token |= cpu_to_le32(TD_IOC); 483 wmb(); 484 485 hwreq->req.actual = 0; 486 if (!list_empty(&hwep->qh.queue)) { 487 struct ci_hw_req *hwreqprev; 488 int n = hw_ep_bit(hwep->num, hwep->dir); 489 int tmp_stat; 490 struct td_node *prevlastnode; 491 u32 next = firstnode->dma & TD_ADDR_MASK; 492 493 hwreqprev = list_entry(hwep->qh.queue.prev, 494 struct ci_hw_req, queue); 495 prevlastnode = list_entry(hwreqprev->tds.prev, 496 struct td_node, td); 497 498 prevlastnode->ptr->next = cpu_to_le32(next); 499 wmb(); 500 if (hw_read(ci, OP_ENDPTPRIME, BIT(n))) 501 goto done; 502 do { 503 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW); 504 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n)); 505 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW)); 506 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0); 507 if (tmp_stat) 508 goto done; 509 } 510 511 /* QH configuration */ 512 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma); 513 hwep->qh.ptr->td.token &= 514 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE)); 515 516 if (hwep->type == USB_ENDPOINT_XFER_ISOC) { 517 u32 mul = hwreq->req.length / hwep->ep.maxpacket; 518 519 if (hwreq->req.length % hwep->ep.maxpacket) 520 mul++; 521 hwep->qh.ptr->cap |= mul << __ffs(QH_MULT); 522 } 523 524 wmb(); /* synchronize before ep prime */ 525 526 ret = hw_ep_prime(ci, hwep->num, hwep->dir, 527 hwep->type == USB_ENDPOINT_XFER_CONTROL); 528 done: 529 return ret; 530 } 531 532 /* 533 * free_pending_td: remove a pending request for the endpoint 534 * @hwep: endpoint 535 */ 536 static void free_pending_td(struct ci_hw_ep *hwep) 537 { 538 struct td_node *pending = hwep->pending_td; 539 540 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma); 541 hwep->pending_td = NULL; 542 kfree(pending); 543 } 544 545 /** 546 * _hardware_dequeue: handles a request at hardware level 547 * @gadget: gadget 548 * @hwep: endpoint 549 * 550 * This function returns an error code 551 */ 552 static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) 553 { 554 u32 tmptoken; 555 struct td_node *node, *tmpnode; 556 unsigned remaining_length; 557 unsigned actual = hwreq->req.length; 558 559 if (hwreq->req.status != -EALREADY) 560 return -EINVAL; 561 562 hwreq->req.status = 0; 563 564 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { 565 tmptoken = le32_to_cpu(node->ptr->token); 566 if ((TD_STATUS_ACTIVE & tmptoken) != 0) { 567 hwreq->req.status = -EALREADY; 568 return -EBUSY; 569 } 570 571 remaining_length = (tmptoken & TD_TOTAL_BYTES); 572 remaining_length >>= __ffs(TD_TOTAL_BYTES); 573 actual -= remaining_length; 574 575 hwreq->req.status = tmptoken & TD_STATUS; 576 if ((TD_STATUS_HALTED & hwreq->req.status)) { 577 hwreq->req.status = -EPIPE; 578 break; 579 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) { 580 hwreq->req.status = -EPROTO; 581 break; 582 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) { 583 hwreq->req.status = -EILSEQ; 584 break; 585 } 586 587 if (remaining_length) { 588 if (hwep->dir) { 589 hwreq->req.status = -EPROTO; 590 break; 591 } 592 } 593 /* 594 * As the hardware could still address the freed td 595 * which will run the udc unusable, the cleanup of the 596 * td has to be delayed by one. 597 */ 598 if (hwep->pending_td) 599 free_pending_td(hwep); 600 601 hwep->pending_td = node; 602 list_del_init(&node->td); 603 } 604 605 usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir); 606 607 hwreq->req.actual += actual; 608 609 if (hwreq->req.status) 610 return hwreq->req.status; 611 612 return hwreq->req.actual; 613 } 614 615 /** 616 * _ep_nuke: dequeues all endpoint requests 617 * @hwep: endpoint 618 * 619 * This function returns an error code 620 * Caller must hold lock 621 */ 622 static int _ep_nuke(struct ci_hw_ep *hwep) 623 __releases(hwep->lock) 624 __acquires(hwep->lock) 625 { 626 struct td_node *node, *tmpnode; 627 if (hwep == NULL) 628 return -EINVAL; 629 630 hw_ep_flush(hwep->ci, hwep->num, hwep->dir); 631 632 while (!list_empty(&hwep->qh.queue)) { 633 634 /* pop oldest request */ 635 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next, 636 struct ci_hw_req, queue); 637 638 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { 639 dma_pool_free(hwep->td_pool, node->ptr, node->dma); 640 list_del_init(&node->td); 641 node->ptr = NULL; 642 kfree(node); 643 } 644 645 list_del_init(&hwreq->queue); 646 hwreq->req.status = -ESHUTDOWN; 647 648 if (hwreq->req.complete != NULL) { 649 spin_unlock(hwep->lock); 650 hwreq->req.complete(&hwep->ep, &hwreq->req); 651 spin_lock(hwep->lock); 652 } 653 } 654 655 if (hwep->pending_td) 656 free_pending_td(hwep); 657 658 return 0; 659 } 660 661 /** 662 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts 663 * @gadget: gadget 664 * 665 * This function returns an error code 666 */ 667 static int _gadget_stop_activity(struct usb_gadget *gadget) 668 { 669 struct usb_ep *ep; 670 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); 671 unsigned long flags; 672 673 spin_lock_irqsave(&ci->lock, flags); 674 ci->gadget.speed = USB_SPEED_UNKNOWN; 675 ci->remote_wakeup = 0; 676 ci->suspended = 0; 677 spin_unlock_irqrestore(&ci->lock, flags); 678 679 /* flush all endpoints */ 680 gadget_for_each_ep(ep, gadget) { 681 usb_ep_fifo_flush(ep); 682 } 683 usb_ep_fifo_flush(&ci->ep0out->ep); 684 usb_ep_fifo_flush(&ci->ep0in->ep); 685 686 if (ci->driver) 687 ci->driver->disconnect(gadget); 688 689 /* make sure to disable all endpoints */ 690 gadget_for_each_ep(ep, gadget) { 691 usb_ep_disable(ep); 692 } 693 694 if (ci->status != NULL) { 695 usb_ep_free_request(&ci->ep0in->ep, ci->status); 696 ci->status = NULL; 697 } 698 699 return 0; 700 } 701 702 /****************************************************************************** 703 * ISR block 704 *****************************************************************************/ 705 /** 706 * isr_reset_handler: USB reset interrupt handler 707 * @ci: UDC device 708 * 709 * This function resets USB engine after a bus reset occurred 710 */ 711 static void isr_reset_handler(struct ci_hdrc *ci) 712 __releases(ci->lock) 713 __acquires(ci->lock) 714 { 715 int retval; 716 717 spin_unlock(&ci->lock); 718 retval = _gadget_stop_activity(&ci->gadget); 719 if (retval) 720 goto done; 721 722 retval = hw_usb_reset(ci); 723 if (retval) 724 goto done; 725 726 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC); 727 if (ci->status == NULL) 728 retval = -ENOMEM; 729 730 done: 731 spin_lock(&ci->lock); 732 733 if (retval) 734 dev_err(ci->dev, "error: %i\n", retval); 735 } 736 737 /** 738 * isr_get_status_complete: get_status request complete function 739 * @ep: endpoint 740 * @req: request handled 741 * 742 * Caller must release lock 743 */ 744 static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req) 745 { 746 if (ep == NULL || req == NULL) 747 return; 748 749 kfree(req->buf); 750 usb_ep_free_request(ep, req); 751 } 752 753 /** 754 * _ep_queue: queues (submits) an I/O request to an endpoint 755 * 756 * Caller must hold lock 757 */ 758 static int _ep_queue(struct usb_ep *ep, struct usb_request *req, 759 gfp_t __maybe_unused gfp_flags) 760 { 761 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 762 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); 763 struct ci_hdrc *ci = hwep->ci; 764 int retval = 0; 765 766 if (ep == NULL || req == NULL || hwep->ep.desc == NULL) 767 return -EINVAL; 768 769 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { 770 if (req->length) 771 hwep = (ci->ep0_dir == RX) ? 772 ci->ep0out : ci->ep0in; 773 if (!list_empty(&hwep->qh.queue)) { 774 _ep_nuke(hwep); 775 retval = -EOVERFLOW; 776 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n", 777 _usb_addr(hwep)); 778 } 779 } 780 781 if (usb_endpoint_xfer_isoc(hwep->ep.desc) && 782 hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) { 783 dev_err(hwep->ci->dev, "request length too big for isochronous\n"); 784 return -EMSGSIZE; 785 } 786 787 /* first nuke then test link, e.g. previous status has not sent */ 788 if (!list_empty(&hwreq->queue)) { 789 dev_err(hwep->ci->dev, "request already in queue\n"); 790 return -EBUSY; 791 } 792 793 /* push request */ 794 hwreq->req.status = -EINPROGRESS; 795 hwreq->req.actual = 0; 796 797 retval = _hardware_enqueue(hwep, hwreq); 798 799 if (retval == -EALREADY) 800 retval = 0; 801 if (!retval) 802 list_add_tail(&hwreq->queue, &hwep->qh.queue); 803 804 return retval; 805 } 806 807 /** 808 * isr_get_status_response: get_status request response 809 * @ci: ci struct 810 * @setup: setup request packet 811 * 812 * This function returns an error code 813 */ 814 static int isr_get_status_response(struct ci_hdrc *ci, 815 struct usb_ctrlrequest *setup) 816 __releases(hwep->lock) 817 __acquires(hwep->lock) 818 { 819 struct ci_hw_ep *hwep = ci->ep0in; 820 struct usb_request *req = NULL; 821 gfp_t gfp_flags = GFP_ATOMIC; 822 int dir, num, retval; 823 824 if (hwep == NULL || setup == NULL) 825 return -EINVAL; 826 827 spin_unlock(hwep->lock); 828 req = usb_ep_alloc_request(&hwep->ep, gfp_flags); 829 spin_lock(hwep->lock); 830 if (req == NULL) 831 return -ENOMEM; 832 833 req->complete = isr_get_status_complete; 834 req->length = 2; 835 req->buf = kzalloc(req->length, gfp_flags); 836 if (req->buf == NULL) { 837 retval = -ENOMEM; 838 goto err_free_req; 839 } 840 841 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) { 842 /* Assume that device is bus powered for now. */ 843 *(u16 *)req->buf = ci->remote_wakeup << 1; 844 retval = 0; 845 } else if ((setup->bRequestType & USB_RECIP_MASK) \ 846 == USB_RECIP_ENDPOINT) { 847 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ? 848 TX : RX; 849 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK; 850 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir); 851 } 852 /* else do nothing; reserved for future use */ 853 854 retval = _ep_queue(&hwep->ep, req, gfp_flags); 855 if (retval) 856 goto err_free_buf; 857 858 return 0; 859 860 err_free_buf: 861 kfree(req->buf); 862 err_free_req: 863 spin_unlock(hwep->lock); 864 usb_ep_free_request(&hwep->ep, req); 865 spin_lock(hwep->lock); 866 return retval; 867 } 868 869 /** 870 * isr_setup_status_complete: setup_status request complete function 871 * @ep: endpoint 872 * @req: request handled 873 * 874 * Caller must release lock. Put the port in test mode if test mode 875 * feature is selected. 876 */ 877 static void 878 isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req) 879 { 880 struct ci_hdrc *ci = req->context; 881 unsigned long flags; 882 883 if (ci->setaddr) { 884 hw_usb_set_address(ci, ci->address); 885 ci->setaddr = false; 886 } 887 888 spin_lock_irqsave(&ci->lock, flags); 889 if (ci->test_mode) 890 hw_port_test_set(ci, ci->test_mode); 891 spin_unlock_irqrestore(&ci->lock, flags); 892 } 893 894 /** 895 * isr_setup_status_phase: queues the status phase of a setup transation 896 * @ci: ci struct 897 * 898 * This function returns an error code 899 */ 900 static int isr_setup_status_phase(struct ci_hdrc *ci) 901 { 902 int retval; 903 struct ci_hw_ep *hwep; 904 905 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in; 906 ci->status->context = ci; 907 ci->status->complete = isr_setup_status_complete; 908 909 retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC); 910 911 return retval; 912 } 913 914 /** 915 * isr_tr_complete_low: transaction complete low level handler 916 * @hwep: endpoint 917 * 918 * This function returns an error code 919 * Caller must hold lock 920 */ 921 static int isr_tr_complete_low(struct ci_hw_ep *hwep) 922 __releases(hwep->lock) 923 __acquires(hwep->lock) 924 { 925 struct ci_hw_req *hwreq, *hwreqtemp; 926 struct ci_hw_ep *hweptemp = hwep; 927 int retval = 0; 928 929 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue, 930 queue) { 931 retval = _hardware_dequeue(hwep, hwreq); 932 if (retval < 0) 933 break; 934 list_del_init(&hwreq->queue); 935 if (hwreq->req.complete != NULL) { 936 spin_unlock(hwep->lock); 937 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) && 938 hwreq->req.length) 939 hweptemp = hwep->ci->ep0in; 940 hwreq->req.complete(&hweptemp->ep, &hwreq->req); 941 spin_lock(hwep->lock); 942 } 943 } 944 945 if (retval == -EBUSY) 946 retval = 0; 947 948 return retval; 949 } 950 951 /** 952 * isr_tr_complete_handler: transaction complete interrupt handler 953 * @ci: UDC descriptor 954 * 955 * This function handles traffic events 956 */ 957 static void isr_tr_complete_handler(struct ci_hdrc *ci) 958 __releases(ci->lock) 959 __acquires(ci->lock) 960 { 961 unsigned i; 962 u8 tmode = 0; 963 964 for (i = 0; i < ci->hw_ep_max; i++) { 965 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; 966 int type, num, dir, err = -EINVAL; 967 struct usb_ctrlrequest req; 968 969 if (hwep->ep.desc == NULL) 970 continue; /* not configured */ 971 972 if (hw_test_and_clear_complete(ci, i)) { 973 err = isr_tr_complete_low(hwep); 974 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { 975 if (err > 0) /* needs status phase */ 976 err = isr_setup_status_phase(ci); 977 if (err < 0) { 978 spin_unlock(&ci->lock); 979 if (usb_ep_set_halt(&hwep->ep)) 980 dev_err(ci->dev, 981 "error: ep_set_halt\n"); 982 spin_lock(&ci->lock); 983 } 984 } 985 } 986 987 if (hwep->type != USB_ENDPOINT_XFER_CONTROL || 988 !hw_test_and_clear_setup_status(ci, i)) 989 continue; 990 991 if (i != 0) { 992 dev_warn(ci->dev, "ctrl traffic at endpoint %d\n", i); 993 continue; 994 } 995 996 /* 997 * Flush data and handshake transactions of previous 998 * setup packet. 999 */ 1000 _ep_nuke(ci->ep0out); 1001 _ep_nuke(ci->ep0in); 1002 1003 /* read_setup_packet */ 1004 do { 1005 hw_test_and_set_setup_guard(ci); 1006 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req)); 1007 } while (!hw_test_and_clear_setup_guard(ci)); 1008 1009 type = req.bRequestType; 1010 1011 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX; 1012 1013 switch (req.bRequest) { 1014 case USB_REQ_CLEAR_FEATURE: 1015 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && 1016 le16_to_cpu(req.wValue) == 1017 USB_ENDPOINT_HALT) { 1018 if (req.wLength != 0) 1019 break; 1020 num = le16_to_cpu(req.wIndex); 1021 dir = num & USB_ENDPOINT_DIR_MASK; 1022 num &= USB_ENDPOINT_NUMBER_MASK; 1023 if (dir) /* TX */ 1024 num += ci->hw_ep_max/2; 1025 if (!ci->ci_hw_ep[num].wedge) { 1026 spin_unlock(&ci->lock); 1027 err = usb_ep_clear_halt( 1028 &ci->ci_hw_ep[num].ep); 1029 spin_lock(&ci->lock); 1030 if (err) 1031 break; 1032 } 1033 err = isr_setup_status_phase(ci); 1034 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) && 1035 le16_to_cpu(req.wValue) == 1036 USB_DEVICE_REMOTE_WAKEUP) { 1037 if (req.wLength != 0) 1038 break; 1039 ci->remote_wakeup = 0; 1040 err = isr_setup_status_phase(ci); 1041 } else { 1042 goto delegate; 1043 } 1044 break; 1045 case USB_REQ_GET_STATUS: 1046 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) && 1047 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) && 1048 type != (USB_DIR_IN|USB_RECIP_INTERFACE)) 1049 goto delegate; 1050 if (le16_to_cpu(req.wLength) != 2 || 1051 le16_to_cpu(req.wValue) != 0) 1052 break; 1053 err = isr_get_status_response(ci, &req); 1054 break; 1055 case USB_REQ_SET_ADDRESS: 1056 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE)) 1057 goto delegate; 1058 if (le16_to_cpu(req.wLength) != 0 || 1059 le16_to_cpu(req.wIndex) != 0) 1060 break; 1061 ci->address = (u8)le16_to_cpu(req.wValue); 1062 ci->setaddr = true; 1063 err = isr_setup_status_phase(ci); 1064 break; 1065 case USB_REQ_SET_FEATURE: 1066 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && 1067 le16_to_cpu(req.wValue) == 1068 USB_ENDPOINT_HALT) { 1069 if (req.wLength != 0) 1070 break; 1071 num = le16_to_cpu(req.wIndex); 1072 dir = num & USB_ENDPOINT_DIR_MASK; 1073 num &= USB_ENDPOINT_NUMBER_MASK; 1074 if (dir) /* TX */ 1075 num += ci->hw_ep_max/2; 1076 1077 spin_unlock(&ci->lock); 1078 err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep); 1079 spin_lock(&ci->lock); 1080 if (!err) 1081 isr_setup_status_phase(ci); 1082 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) { 1083 if (req.wLength != 0) 1084 break; 1085 switch (le16_to_cpu(req.wValue)) { 1086 case USB_DEVICE_REMOTE_WAKEUP: 1087 ci->remote_wakeup = 1; 1088 err = isr_setup_status_phase(ci); 1089 break; 1090 case USB_DEVICE_TEST_MODE: 1091 tmode = le16_to_cpu(req.wIndex) >> 8; 1092 switch (tmode) { 1093 case TEST_J: 1094 case TEST_K: 1095 case TEST_SE0_NAK: 1096 case TEST_PACKET: 1097 case TEST_FORCE_EN: 1098 ci->test_mode = tmode; 1099 err = isr_setup_status_phase( 1100 ci); 1101 break; 1102 default: 1103 break; 1104 } 1105 default: 1106 goto delegate; 1107 } 1108 } else { 1109 goto delegate; 1110 } 1111 break; 1112 default: 1113 delegate: 1114 if (req.wLength == 0) /* no data phase */ 1115 ci->ep0_dir = TX; 1116 1117 spin_unlock(&ci->lock); 1118 err = ci->driver->setup(&ci->gadget, &req); 1119 spin_lock(&ci->lock); 1120 break; 1121 } 1122 1123 if (err < 0) { 1124 spin_unlock(&ci->lock); 1125 if (usb_ep_set_halt(&hwep->ep)) 1126 dev_err(ci->dev, "error: ep_set_halt\n"); 1127 spin_lock(&ci->lock); 1128 } 1129 } 1130 } 1131 1132 /****************************************************************************** 1133 * ENDPT block 1134 *****************************************************************************/ 1135 /** 1136 * ep_enable: configure endpoint, making it usable 1137 * 1138 * Check usb_ep_enable() at "usb_gadget.h" for details 1139 */ 1140 static int ep_enable(struct usb_ep *ep, 1141 const struct usb_endpoint_descriptor *desc) 1142 { 1143 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1144 int retval = 0; 1145 unsigned long flags; 1146 u32 cap = 0; 1147 1148 if (ep == NULL || desc == NULL) 1149 return -EINVAL; 1150 1151 spin_lock_irqsave(hwep->lock, flags); 1152 1153 /* only internal SW should enable ctrl endpts */ 1154 1155 hwep->ep.desc = desc; 1156 1157 if (!list_empty(&hwep->qh.queue)) 1158 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n"); 1159 1160 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX; 1161 hwep->num = usb_endpoint_num(desc); 1162 hwep->type = usb_endpoint_type(desc); 1163 1164 hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff; 1165 hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc)); 1166 1167 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) 1168 cap |= QH_IOS; 1169 if (hwep->num) 1170 cap |= QH_ZLT; 1171 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT; 1172 1173 hwep->qh.ptr->cap = cpu_to_le32(cap); 1174 1175 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */ 1176 1177 /* 1178 * Enable endpoints in the HW other than ep0 as ep0 1179 * is always enabled 1180 */ 1181 if (hwep->num) 1182 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir, 1183 hwep->type); 1184 1185 spin_unlock_irqrestore(hwep->lock, flags); 1186 return retval; 1187 } 1188 1189 /** 1190 * ep_disable: endpoint is no longer usable 1191 * 1192 * Check usb_ep_disable() at "usb_gadget.h" for details 1193 */ 1194 static int ep_disable(struct usb_ep *ep) 1195 { 1196 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1197 int direction, retval = 0; 1198 unsigned long flags; 1199 1200 if (ep == NULL) 1201 return -EINVAL; 1202 else if (hwep->ep.desc == NULL) 1203 return -EBUSY; 1204 1205 spin_lock_irqsave(hwep->lock, flags); 1206 1207 /* only internal SW should disable ctrl endpts */ 1208 1209 direction = hwep->dir; 1210 do { 1211 retval |= _ep_nuke(hwep); 1212 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir); 1213 1214 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) 1215 hwep->dir = (hwep->dir == TX) ? RX : TX; 1216 1217 } while (hwep->dir != direction); 1218 1219 hwep->ep.desc = NULL; 1220 1221 spin_unlock_irqrestore(hwep->lock, flags); 1222 return retval; 1223 } 1224 1225 /** 1226 * ep_alloc_request: allocate a request object to use with this endpoint 1227 * 1228 * Check usb_ep_alloc_request() at "usb_gadget.h" for details 1229 */ 1230 static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) 1231 { 1232 struct ci_hw_req *hwreq = NULL; 1233 1234 if (ep == NULL) 1235 return NULL; 1236 1237 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags); 1238 if (hwreq != NULL) { 1239 INIT_LIST_HEAD(&hwreq->queue); 1240 INIT_LIST_HEAD(&hwreq->tds); 1241 } 1242 1243 return (hwreq == NULL) ? NULL : &hwreq->req; 1244 } 1245 1246 /** 1247 * ep_free_request: frees a request object 1248 * 1249 * Check usb_ep_free_request() at "usb_gadget.h" for details 1250 */ 1251 static void ep_free_request(struct usb_ep *ep, struct usb_request *req) 1252 { 1253 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1254 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); 1255 struct td_node *node, *tmpnode; 1256 unsigned long flags; 1257 1258 if (ep == NULL || req == NULL) { 1259 return; 1260 } else if (!list_empty(&hwreq->queue)) { 1261 dev_err(hwep->ci->dev, "freeing queued request\n"); 1262 return; 1263 } 1264 1265 spin_lock_irqsave(hwep->lock, flags); 1266 1267 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { 1268 dma_pool_free(hwep->td_pool, node->ptr, node->dma); 1269 list_del_init(&node->td); 1270 node->ptr = NULL; 1271 kfree(node); 1272 } 1273 1274 kfree(hwreq); 1275 1276 spin_unlock_irqrestore(hwep->lock, flags); 1277 } 1278 1279 /** 1280 * ep_queue: queues (submits) an I/O request to an endpoint 1281 * 1282 * Check usb_ep_queue()* at usb_gadget.h" for details 1283 */ 1284 static int ep_queue(struct usb_ep *ep, struct usb_request *req, 1285 gfp_t __maybe_unused gfp_flags) 1286 { 1287 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1288 int retval = 0; 1289 unsigned long flags; 1290 1291 if (ep == NULL || req == NULL || hwep->ep.desc == NULL) 1292 return -EINVAL; 1293 1294 spin_lock_irqsave(hwep->lock, flags); 1295 retval = _ep_queue(ep, req, gfp_flags); 1296 spin_unlock_irqrestore(hwep->lock, flags); 1297 return retval; 1298 } 1299 1300 /** 1301 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint 1302 * 1303 * Check usb_ep_dequeue() at "usb_gadget.h" for details 1304 */ 1305 static int ep_dequeue(struct usb_ep *ep, struct usb_request *req) 1306 { 1307 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1308 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); 1309 unsigned long flags; 1310 1311 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY || 1312 hwep->ep.desc == NULL || list_empty(&hwreq->queue) || 1313 list_empty(&hwep->qh.queue)) 1314 return -EINVAL; 1315 1316 spin_lock_irqsave(hwep->lock, flags); 1317 1318 hw_ep_flush(hwep->ci, hwep->num, hwep->dir); 1319 1320 /* pop request */ 1321 list_del_init(&hwreq->queue); 1322 1323 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir); 1324 1325 req->status = -ECONNRESET; 1326 1327 if (hwreq->req.complete != NULL) { 1328 spin_unlock(hwep->lock); 1329 hwreq->req.complete(&hwep->ep, &hwreq->req); 1330 spin_lock(hwep->lock); 1331 } 1332 1333 spin_unlock_irqrestore(hwep->lock, flags); 1334 return 0; 1335 } 1336 1337 /** 1338 * ep_set_halt: sets the endpoint halt feature 1339 * 1340 * Check usb_ep_set_halt() at "usb_gadget.h" for details 1341 */ 1342 static int ep_set_halt(struct usb_ep *ep, int value) 1343 { 1344 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1345 int direction, retval = 0; 1346 unsigned long flags; 1347 1348 if (ep == NULL || hwep->ep.desc == NULL) 1349 return -EINVAL; 1350 1351 if (usb_endpoint_xfer_isoc(hwep->ep.desc)) 1352 return -EOPNOTSUPP; 1353 1354 spin_lock_irqsave(hwep->lock, flags); 1355 1356 #ifndef STALL_IN 1357 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */ 1358 if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX && 1359 !list_empty(&hwep->qh.queue)) { 1360 spin_unlock_irqrestore(hwep->lock, flags); 1361 return -EAGAIN; 1362 } 1363 #endif 1364 1365 direction = hwep->dir; 1366 do { 1367 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value); 1368 1369 if (!value) 1370 hwep->wedge = 0; 1371 1372 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) 1373 hwep->dir = (hwep->dir == TX) ? RX : TX; 1374 1375 } while (hwep->dir != direction); 1376 1377 spin_unlock_irqrestore(hwep->lock, flags); 1378 return retval; 1379 } 1380 1381 /** 1382 * ep_set_wedge: sets the halt feature and ignores clear requests 1383 * 1384 * Check usb_ep_set_wedge() at "usb_gadget.h" for details 1385 */ 1386 static int ep_set_wedge(struct usb_ep *ep) 1387 { 1388 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1389 unsigned long flags; 1390 1391 if (ep == NULL || hwep->ep.desc == NULL) 1392 return -EINVAL; 1393 1394 spin_lock_irqsave(hwep->lock, flags); 1395 hwep->wedge = 1; 1396 spin_unlock_irqrestore(hwep->lock, flags); 1397 1398 return usb_ep_set_halt(ep); 1399 } 1400 1401 /** 1402 * ep_fifo_flush: flushes contents of a fifo 1403 * 1404 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details 1405 */ 1406 static void ep_fifo_flush(struct usb_ep *ep) 1407 { 1408 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1409 unsigned long flags; 1410 1411 if (ep == NULL) { 1412 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep)); 1413 return; 1414 } 1415 1416 spin_lock_irqsave(hwep->lock, flags); 1417 1418 hw_ep_flush(hwep->ci, hwep->num, hwep->dir); 1419 1420 spin_unlock_irqrestore(hwep->lock, flags); 1421 } 1422 1423 /** 1424 * Endpoint-specific part of the API to the USB controller hardware 1425 * Check "usb_gadget.h" for details 1426 */ 1427 static const struct usb_ep_ops usb_ep_ops = { 1428 .enable = ep_enable, 1429 .disable = ep_disable, 1430 .alloc_request = ep_alloc_request, 1431 .free_request = ep_free_request, 1432 .queue = ep_queue, 1433 .dequeue = ep_dequeue, 1434 .set_halt = ep_set_halt, 1435 .set_wedge = ep_set_wedge, 1436 .fifo_flush = ep_fifo_flush, 1437 }; 1438 1439 /****************************************************************************** 1440 * GADGET block 1441 *****************************************************************************/ 1442 static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active) 1443 { 1444 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1445 unsigned long flags; 1446 int gadget_ready = 0; 1447 1448 if (!(ci->platdata->flags & CI_HDRC_PULLUP_ON_VBUS)) 1449 return -EOPNOTSUPP; 1450 1451 spin_lock_irqsave(&ci->lock, flags); 1452 ci->vbus_active = is_active; 1453 if (ci->driver) 1454 gadget_ready = 1; 1455 spin_unlock_irqrestore(&ci->lock, flags); 1456 1457 if (gadget_ready) { 1458 if (is_active) { 1459 pm_runtime_get_sync(&_gadget->dev); 1460 hw_device_reset(ci, USBMODE_CM_DC); 1461 hw_device_state(ci, ci->ep0out->qh.dma); 1462 } else { 1463 hw_device_state(ci, 0); 1464 if (ci->platdata->notify_event) 1465 ci->platdata->notify_event(ci, 1466 CI_HDRC_CONTROLLER_STOPPED_EVENT); 1467 _gadget_stop_activity(&ci->gadget); 1468 pm_runtime_put_sync(&_gadget->dev); 1469 } 1470 } 1471 1472 return 0; 1473 } 1474 1475 static int ci_udc_wakeup(struct usb_gadget *_gadget) 1476 { 1477 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1478 unsigned long flags; 1479 int ret = 0; 1480 1481 spin_lock_irqsave(&ci->lock, flags); 1482 if (!ci->remote_wakeup) { 1483 ret = -EOPNOTSUPP; 1484 goto out; 1485 } 1486 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) { 1487 ret = -EINVAL; 1488 goto out; 1489 } 1490 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR); 1491 out: 1492 spin_unlock_irqrestore(&ci->lock, flags); 1493 return ret; 1494 } 1495 1496 static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma) 1497 { 1498 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1499 1500 if (ci->transceiver) 1501 return usb_phy_set_power(ci->transceiver, ma); 1502 return -ENOTSUPP; 1503 } 1504 1505 /* Change Data+ pullup status 1506 * this func is used by usb_gadget_connect/disconnet 1507 */ 1508 static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on) 1509 { 1510 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1511 1512 if (is_on) 1513 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); 1514 else 1515 hw_write(ci, OP_USBCMD, USBCMD_RS, 0); 1516 1517 return 0; 1518 } 1519 1520 static int ci_udc_start(struct usb_gadget *gadget, 1521 struct usb_gadget_driver *driver); 1522 static int ci_udc_stop(struct usb_gadget *gadget, 1523 struct usb_gadget_driver *driver); 1524 /** 1525 * Device operations part of the API to the USB controller hardware, 1526 * which don't involve endpoints (or i/o) 1527 * Check "usb_gadget.h" for details 1528 */ 1529 static const struct usb_gadget_ops usb_gadget_ops = { 1530 .vbus_session = ci_udc_vbus_session, 1531 .wakeup = ci_udc_wakeup, 1532 .pullup = ci_udc_pullup, 1533 .vbus_draw = ci_udc_vbus_draw, 1534 .udc_start = ci_udc_start, 1535 .udc_stop = ci_udc_stop, 1536 }; 1537 1538 static int init_eps(struct ci_hdrc *ci) 1539 { 1540 int retval = 0, i, j; 1541 1542 for (i = 0; i < ci->hw_ep_max/2; i++) 1543 for (j = RX; j <= TX; j++) { 1544 int k = i + j * ci->hw_ep_max/2; 1545 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k]; 1546 1547 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i, 1548 (j == TX) ? "in" : "out"); 1549 1550 hwep->ci = ci; 1551 hwep->lock = &ci->lock; 1552 hwep->td_pool = ci->td_pool; 1553 1554 hwep->ep.name = hwep->name; 1555 hwep->ep.ops = &usb_ep_ops; 1556 /* 1557 * for ep0: maxP defined in desc, for other 1558 * eps, maxP is set by epautoconfig() called 1559 * by gadget layer 1560 */ 1561 hwep->ep.maxpacket = (unsigned short)~0; 1562 1563 INIT_LIST_HEAD(&hwep->qh.queue); 1564 hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL, 1565 &hwep->qh.dma); 1566 if (hwep->qh.ptr == NULL) 1567 retval = -ENOMEM; 1568 else 1569 memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr)); 1570 1571 /* 1572 * set up shorthands for ep0 out and in endpoints, 1573 * don't add to gadget's ep_list 1574 */ 1575 if (i == 0) { 1576 if (j == RX) 1577 ci->ep0out = hwep; 1578 else 1579 ci->ep0in = hwep; 1580 1581 hwep->ep.maxpacket = CTRL_PAYLOAD_MAX; 1582 continue; 1583 } 1584 1585 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list); 1586 } 1587 1588 return retval; 1589 } 1590 1591 static void destroy_eps(struct ci_hdrc *ci) 1592 { 1593 int i; 1594 1595 for (i = 0; i < ci->hw_ep_max; i++) { 1596 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; 1597 1598 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma); 1599 } 1600 } 1601 1602 /** 1603 * ci_udc_start: register a gadget driver 1604 * @gadget: our gadget 1605 * @driver: the driver being registered 1606 * 1607 * Interrupts are enabled here. 1608 */ 1609 static int ci_udc_start(struct usb_gadget *gadget, 1610 struct usb_gadget_driver *driver) 1611 { 1612 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); 1613 unsigned long flags; 1614 int retval = -ENOMEM; 1615 1616 if (driver->disconnect == NULL) 1617 return -EINVAL; 1618 1619 1620 ci->ep0out->ep.desc = &ctrl_endpt_out_desc; 1621 retval = usb_ep_enable(&ci->ep0out->ep); 1622 if (retval) 1623 return retval; 1624 1625 ci->ep0in->ep.desc = &ctrl_endpt_in_desc; 1626 retval = usb_ep_enable(&ci->ep0in->ep); 1627 if (retval) 1628 return retval; 1629 spin_lock_irqsave(&ci->lock, flags); 1630 1631 ci->driver = driver; 1632 pm_runtime_get_sync(&ci->gadget.dev); 1633 if (ci->platdata->flags & CI_HDRC_PULLUP_ON_VBUS) { 1634 if (ci->vbus_active) { 1635 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) 1636 hw_device_reset(ci, USBMODE_CM_DC); 1637 } else { 1638 pm_runtime_put_sync(&ci->gadget.dev); 1639 goto done; 1640 } 1641 } 1642 1643 retval = hw_device_state(ci, ci->ep0out->qh.dma); 1644 if (retval) 1645 pm_runtime_put_sync(&ci->gadget.dev); 1646 1647 done: 1648 spin_unlock_irqrestore(&ci->lock, flags); 1649 return retval; 1650 } 1651 1652 /** 1653 * ci_udc_stop: unregister a gadget driver 1654 */ 1655 static int ci_udc_stop(struct usb_gadget *gadget, 1656 struct usb_gadget_driver *driver) 1657 { 1658 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); 1659 unsigned long flags; 1660 1661 spin_lock_irqsave(&ci->lock, flags); 1662 1663 if (!(ci->platdata->flags & CI_HDRC_PULLUP_ON_VBUS) || 1664 ci->vbus_active) { 1665 hw_device_state(ci, 0); 1666 if (ci->platdata->notify_event) 1667 ci->platdata->notify_event(ci, 1668 CI_HDRC_CONTROLLER_STOPPED_EVENT); 1669 ci->driver = NULL; 1670 spin_unlock_irqrestore(&ci->lock, flags); 1671 _gadget_stop_activity(&ci->gadget); 1672 spin_lock_irqsave(&ci->lock, flags); 1673 pm_runtime_put(&ci->gadget.dev); 1674 } 1675 1676 spin_unlock_irqrestore(&ci->lock, flags); 1677 1678 return 0; 1679 } 1680 1681 /****************************************************************************** 1682 * BUS block 1683 *****************************************************************************/ 1684 /** 1685 * udc_irq: ci interrupt handler 1686 * 1687 * This function returns IRQ_HANDLED if the IRQ has been handled 1688 * It locks access to registers 1689 */ 1690 static irqreturn_t udc_irq(struct ci_hdrc *ci) 1691 { 1692 irqreturn_t retval; 1693 u32 intr; 1694 1695 if (ci == NULL) 1696 return IRQ_HANDLED; 1697 1698 spin_lock(&ci->lock); 1699 1700 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) { 1701 if (hw_read(ci, OP_USBMODE, USBMODE_CM) != 1702 USBMODE_CM_DC) { 1703 spin_unlock(&ci->lock); 1704 return IRQ_NONE; 1705 } 1706 } 1707 intr = hw_test_and_clear_intr_active(ci); 1708 1709 if (intr) { 1710 /* order defines priority - do NOT change it */ 1711 if (USBi_URI & intr) 1712 isr_reset_handler(ci); 1713 1714 if (USBi_PCI & intr) { 1715 ci->gadget.speed = hw_port_is_high_speed(ci) ? 1716 USB_SPEED_HIGH : USB_SPEED_FULL; 1717 if (ci->suspended && ci->driver->resume) { 1718 spin_unlock(&ci->lock); 1719 ci->driver->resume(&ci->gadget); 1720 spin_lock(&ci->lock); 1721 ci->suspended = 0; 1722 } 1723 } 1724 1725 if (USBi_UI & intr) 1726 isr_tr_complete_handler(ci); 1727 1728 if (USBi_SLI & intr) { 1729 if (ci->gadget.speed != USB_SPEED_UNKNOWN && 1730 ci->driver->suspend) { 1731 ci->suspended = 1; 1732 spin_unlock(&ci->lock); 1733 ci->driver->suspend(&ci->gadget); 1734 spin_lock(&ci->lock); 1735 } 1736 } 1737 retval = IRQ_HANDLED; 1738 } else { 1739 retval = IRQ_NONE; 1740 } 1741 spin_unlock(&ci->lock); 1742 1743 return retval; 1744 } 1745 1746 /** 1747 * udc_start: initialize gadget role 1748 * @ci: chipidea controller 1749 */ 1750 static int udc_start(struct ci_hdrc *ci) 1751 { 1752 struct device *dev = ci->dev; 1753 int retval = 0; 1754 1755 spin_lock_init(&ci->lock); 1756 1757 ci->gadget.ops = &usb_gadget_ops; 1758 ci->gadget.speed = USB_SPEED_UNKNOWN; 1759 ci->gadget.max_speed = USB_SPEED_HIGH; 1760 ci->gadget.is_otg = 0; 1761 ci->gadget.name = ci->platdata->name; 1762 1763 INIT_LIST_HEAD(&ci->gadget.ep_list); 1764 1765 /* alloc resources */ 1766 ci->qh_pool = dma_pool_create("ci_hw_qh", dev, 1767 sizeof(struct ci_hw_qh), 1768 64, CI_HDRC_PAGE_SIZE); 1769 if (ci->qh_pool == NULL) 1770 return -ENOMEM; 1771 1772 ci->td_pool = dma_pool_create("ci_hw_td", dev, 1773 sizeof(struct ci_hw_td), 1774 64, CI_HDRC_PAGE_SIZE); 1775 if (ci->td_pool == NULL) { 1776 retval = -ENOMEM; 1777 goto free_qh_pool; 1778 } 1779 1780 retval = init_eps(ci); 1781 if (retval) 1782 goto free_pools; 1783 1784 ci->gadget.ep0 = &ci->ep0in->ep; 1785 1786 if (ci->global_phy) { 1787 ci->transceiver = usb_get_phy(USB_PHY_TYPE_USB2); 1788 if (IS_ERR(ci->transceiver)) 1789 ci->transceiver = NULL; 1790 } 1791 1792 if (ci->platdata->flags & CI_HDRC_REQUIRE_TRANSCEIVER) { 1793 if (ci->transceiver == NULL) { 1794 retval = -ENODEV; 1795 goto destroy_eps; 1796 } 1797 } 1798 1799 if (!(ci->platdata->flags & CI_HDRC_REGS_SHARED)) { 1800 retval = hw_device_reset(ci, USBMODE_CM_DC); 1801 if (retval) 1802 goto put_transceiver; 1803 } 1804 1805 if (ci->transceiver) { 1806 retval = otg_set_peripheral(ci->transceiver->otg, 1807 &ci->gadget); 1808 if (retval) 1809 goto put_transceiver; 1810 } 1811 1812 retval = usb_add_gadget_udc(dev, &ci->gadget); 1813 if (retval) 1814 goto remove_trans; 1815 1816 pm_runtime_no_callbacks(&ci->gadget.dev); 1817 pm_runtime_enable(&ci->gadget.dev); 1818 1819 return retval; 1820 1821 remove_trans: 1822 if (ci->transceiver) { 1823 otg_set_peripheral(ci->transceiver->otg, NULL); 1824 if (ci->global_phy) 1825 usb_put_phy(ci->transceiver); 1826 } 1827 1828 dev_err(dev, "error = %i\n", retval); 1829 put_transceiver: 1830 if (ci->transceiver && ci->global_phy) 1831 usb_put_phy(ci->transceiver); 1832 destroy_eps: 1833 destroy_eps(ci); 1834 free_pools: 1835 dma_pool_destroy(ci->td_pool); 1836 free_qh_pool: 1837 dma_pool_destroy(ci->qh_pool); 1838 return retval; 1839 } 1840 1841 /** 1842 * udc_remove: parent remove must call this to remove UDC 1843 * 1844 * No interrupts active, the IRQ has been released 1845 */ 1846 static void udc_stop(struct ci_hdrc *ci) 1847 { 1848 if (ci == NULL) 1849 return; 1850 1851 usb_del_gadget_udc(&ci->gadget); 1852 1853 destroy_eps(ci); 1854 1855 dma_pool_destroy(ci->td_pool); 1856 dma_pool_destroy(ci->qh_pool); 1857 1858 if (ci->transceiver) { 1859 otg_set_peripheral(ci->transceiver->otg, NULL); 1860 if (ci->global_phy) 1861 usb_put_phy(ci->transceiver); 1862 } 1863 /* my kobject is dynamic, I swear! */ 1864 memset(&ci->gadget, 0, sizeof(ci->gadget)); 1865 } 1866 1867 /** 1868 * ci_hdrc_gadget_init - initialize device related bits 1869 * ci: the controller 1870 * 1871 * This function enables the gadget role, if the device is "device capable". 1872 */ 1873 int ci_hdrc_gadget_init(struct ci_hdrc *ci) 1874 { 1875 struct ci_role_driver *rdrv; 1876 1877 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC)) 1878 return -ENXIO; 1879 1880 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); 1881 if (!rdrv) 1882 return -ENOMEM; 1883 1884 rdrv->start = udc_start; 1885 rdrv->stop = udc_stop; 1886 rdrv->irq = udc_irq; 1887 rdrv->name = "gadget"; 1888 ci->roles[CI_ROLE_GADGET] = rdrv; 1889 1890 return 0; 1891 } 1892