1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * otg_fsm.c - ChipIdea USB IP core OTG FSM driver 4 * 5 * Copyright (C) 2014 Freescale Semiconductor, Inc. 6 * 7 * Author: Jun Li 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 /* 15 * This file mainly handles OTG fsm, it includes OTG fsm operations 16 * for HNP and SRP. 17 * 18 * TODO List 19 * - ADP 20 * - OTG test device 21 */ 22 23 #include <linux/usb/otg.h> 24 #include <linux/usb/gadget.h> 25 #include <linux/usb/hcd.h> 26 #include <linux/usb/chipidea.h> 27 #include <linux/regulator/consumer.h> 28 29 #include "ci.h" 30 #include "bits.h" 31 #include "otg.h" 32 #include "otg_fsm.h" 33 34 /* Add for otg: interact with user space app */ 35 static ssize_t 36 get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf) 37 { 38 char *next; 39 unsigned size, t; 40 struct ci_hdrc *ci = dev_get_drvdata(dev); 41 42 next = buf; 43 size = PAGE_SIZE; 44 t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_req); 45 size -= t; 46 next += t; 47 48 return PAGE_SIZE - size; 49 } 50 51 static ssize_t 52 set_a_bus_req(struct device *dev, struct device_attribute *attr, 53 const char *buf, size_t count) 54 { 55 struct ci_hdrc *ci = dev_get_drvdata(dev); 56 57 if (count > 2) 58 return -1; 59 60 mutex_lock(&ci->fsm.lock); 61 if (buf[0] == '0') { 62 ci->fsm.a_bus_req = 0; 63 } else if (buf[0] == '1') { 64 /* If a_bus_drop is TRUE, a_bus_req can't be set */ 65 if (ci->fsm.a_bus_drop) { 66 mutex_unlock(&ci->fsm.lock); 67 return count; 68 } 69 ci->fsm.a_bus_req = 1; 70 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) { 71 ci->gadget.host_request_flag = 1; 72 mutex_unlock(&ci->fsm.lock); 73 return count; 74 } 75 } 76 77 ci_otg_queue_work(ci); 78 mutex_unlock(&ci->fsm.lock); 79 80 return count; 81 } 82 static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req, set_a_bus_req); 83 84 static ssize_t 85 get_a_bus_drop(struct device *dev, struct device_attribute *attr, char *buf) 86 { 87 char *next; 88 unsigned size, t; 89 struct ci_hdrc *ci = dev_get_drvdata(dev); 90 91 next = buf; 92 size = PAGE_SIZE; 93 t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_drop); 94 size -= t; 95 next += t; 96 97 return PAGE_SIZE - size; 98 } 99 100 static ssize_t 101 set_a_bus_drop(struct device *dev, struct device_attribute *attr, 102 const char *buf, size_t count) 103 { 104 struct ci_hdrc *ci = dev_get_drvdata(dev); 105 106 if (count > 2) 107 return -1; 108 109 mutex_lock(&ci->fsm.lock); 110 if (buf[0] == '0') { 111 ci->fsm.a_bus_drop = 0; 112 } else if (buf[0] == '1') { 113 ci->fsm.a_bus_drop = 1; 114 ci->fsm.a_bus_req = 0; 115 } 116 117 ci_otg_queue_work(ci); 118 mutex_unlock(&ci->fsm.lock); 119 120 return count; 121 } 122 static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR, get_a_bus_drop, 123 set_a_bus_drop); 124 125 static ssize_t 126 get_b_bus_req(struct device *dev, struct device_attribute *attr, char *buf) 127 { 128 char *next; 129 unsigned size, t; 130 struct ci_hdrc *ci = dev_get_drvdata(dev); 131 132 next = buf; 133 size = PAGE_SIZE; 134 t = scnprintf(next, size, "%d\n", ci->fsm.b_bus_req); 135 size -= t; 136 next += t; 137 138 return PAGE_SIZE - size; 139 } 140 141 static ssize_t 142 set_b_bus_req(struct device *dev, struct device_attribute *attr, 143 const char *buf, size_t count) 144 { 145 struct ci_hdrc *ci = dev_get_drvdata(dev); 146 147 if (count > 2) 148 return -1; 149 150 mutex_lock(&ci->fsm.lock); 151 if (buf[0] == '0') 152 ci->fsm.b_bus_req = 0; 153 else if (buf[0] == '1') { 154 ci->fsm.b_bus_req = 1; 155 if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) { 156 ci->gadget.host_request_flag = 1; 157 mutex_unlock(&ci->fsm.lock); 158 return count; 159 } 160 } 161 162 ci_otg_queue_work(ci); 163 mutex_unlock(&ci->fsm.lock); 164 165 return count; 166 } 167 static DEVICE_ATTR(b_bus_req, S_IRUGO | S_IWUSR, get_b_bus_req, set_b_bus_req); 168 169 static ssize_t 170 set_a_clr_err(struct device *dev, struct device_attribute *attr, 171 const char *buf, size_t count) 172 { 173 struct ci_hdrc *ci = dev_get_drvdata(dev); 174 175 if (count > 2) 176 return -1; 177 178 mutex_lock(&ci->fsm.lock); 179 if (buf[0] == '1') 180 ci->fsm.a_clr_err = 1; 181 182 ci_otg_queue_work(ci); 183 mutex_unlock(&ci->fsm.lock); 184 185 return count; 186 } 187 static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err); 188 189 static struct attribute *inputs_attrs[] = { 190 &dev_attr_a_bus_req.attr, 191 &dev_attr_a_bus_drop.attr, 192 &dev_attr_b_bus_req.attr, 193 &dev_attr_a_clr_err.attr, 194 NULL, 195 }; 196 197 static const struct attribute_group inputs_attr_group = { 198 .name = "inputs", 199 .attrs = inputs_attrs, 200 }; 201 202 /* 203 * Keep this list in the same order as timers indexed 204 * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h 205 */ 206 static unsigned otg_timer_ms[] = { 207 TA_WAIT_VRISE, 208 TA_WAIT_VFALL, 209 TA_WAIT_BCON, 210 TA_AIDL_BDIS, 211 TB_ASE0_BRST, 212 TA_BIDL_ADIS, 213 TB_AIDL_BDIS, 214 TB_SE0_SRP, 215 TB_SRP_FAIL, 216 0, 217 TB_DATA_PLS, 218 TB_SSEND_SRP, 219 }; 220 221 /* 222 * Add timer to active timer list 223 */ 224 static void ci_otg_add_timer(struct ci_hdrc *ci, enum otg_fsm_timer t) 225 { 226 unsigned long flags, timer_sec, timer_nsec; 227 228 if (t >= NUM_OTG_FSM_TIMERS) 229 return; 230 231 spin_lock_irqsave(&ci->lock, flags); 232 timer_sec = otg_timer_ms[t] / MSEC_PER_SEC; 233 timer_nsec = (otg_timer_ms[t] % MSEC_PER_SEC) * NSEC_PER_MSEC; 234 ci->hr_timeouts[t] = ktime_add(ktime_get(), 235 ktime_set(timer_sec, timer_nsec)); 236 ci->enabled_otg_timer_bits |= (1 << t); 237 if ((ci->next_otg_timer == NUM_OTG_FSM_TIMERS) || 238 ktime_after(ci->hr_timeouts[ci->next_otg_timer], 239 ci->hr_timeouts[t])) { 240 ci->next_otg_timer = t; 241 hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, 242 ci->hr_timeouts[t], NSEC_PER_MSEC, 243 HRTIMER_MODE_ABS); 244 } 245 spin_unlock_irqrestore(&ci->lock, flags); 246 } 247 248 /* 249 * Remove timer from active timer list 250 */ 251 static void ci_otg_del_timer(struct ci_hdrc *ci, enum otg_fsm_timer t) 252 { 253 unsigned long flags, enabled_timer_bits; 254 enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS; 255 256 if ((t >= NUM_OTG_FSM_TIMERS) || 257 !(ci->enabled_otg_timer_bits & (1 << t))) 258 return; 259 260 spin_lock_irqsave(&ci->lock, flags); 261 ci->enabled_otg_timer_bits &= ~(1 << t); 262 if (ci->next_otg_timer == t) { 263 if (ci->enabled_otg_timer_bits == 0) { 264 /* No enabled timers after delete it */ 265 hrtimer_cancel(&ci->otg_fsm_hrtimer); 266 ci->next_otg_timer = NUM_OTG_FSM_TIMERS; 267 } else { 268 /* Find the next timer */ 269 enabled_timer_bits = ci->enabled_otg_timer_bits; 270 for_each_set_bit(cur_timer, &enabled_timer_bits, 271 NUM_OTG_FSM_TIMERS) { 272 if ((next_timer == NUM_OTG_FSM_TIMERS) || 273 ktime_before(ci->hr_timeouts[next_timer], 274 ci->hr_timeouts[cur_timer])) 275 next_timer = cur_timer; 276 } 277 } 278 } 279 if (next_timer != NUM_OTG_FSM_TIMERS) { 280 ci->next_otg_timer = next_timer; 281 hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, 282 ci->hr_timeouts[next_timer], NSEC_PER_MSEC, 283 HRTIMER_MODE_ABS); 284 } 285 spin_unlock_irqrestore(&ci->lock, flags); 286 } 287 288 /* OTG FSM timer handlers */ 289 static int a_wait_vrise_tmout(struct ci_hdrc *ci) 290 { 291 ci->fsm.a_wait_vrise_tmout = 1; 292 return 0; 293 } 294 295 static int a_wait_vfall_tmout(struct ci_hdrc *ci) 296 { 297 ci->fsm.a_wait_vfall_tmout = 1; 298 return 0; 299 } 300 301 static int a_wait_bcon_tmout(struct ci_hdrc *ci) 302 { 303 ci->fsm.a_wait_bcon_tmout = 1; 304 return 0; 305 } 306 307 static int a_aidl_bdis_tmout(struct ci_hdrc *ci) 308 { 309 ci->fsm.a_aidl_bdis_tmout = 1; 310 return 0; 311 } 312 313 static int b_ase0_brst_tmout(struct ci_hdrc *ci) 314 { 315 ci->fsm.b_ase0_brst_tmout = 1; 316 return 0; 317 } 318 319 static int a_bidl_adis_tmout(struct ci_hdrc *ci) 320 { 321 ci->fsm.a_bidl_adis_tmout = 1; 322 return 0; 323 } 324 325 static int b_aidl_bdis_tmout(struct ci_hdrc *ci) 326 { 327 ci->fsm.a_bus_suspend = 1; 328 return 0; 329 } 330 331 static int b_se0_srp_tmout(struct ci_hdrc *ci) 332 { 333 ci->fsm.b_se0_srp = 1; 334 return 0; 335 } 336 337 static int b_srp_fail_tmout(struct ci_hdrc *ci) 338 { 339 ci->fsm.b_srp_done = 1; 340 return 1; 341 } 342 343 static int b_data_pls_tmout(struct ci_hdrc *ci) 344 { 345 ci->fsm.b_srp_done = 1; 346 ci->fsm.b_bus_req = 0; 347 if (ci->fsm.power_up) 348 ci->fsm.power_up = 0; 349 hw_write_otgsc(ci, OTGSC_HABA, 0); 350 pm_runtime_put(ci->dev); 351 return 0; 352 } 353 354 static int b_ssend_srp_tmout(struct ci_hdrc *ci) 355 { 356 ci->fsm.b_ssend_srp = 1; 357 /* only vbus fall below B_sess_vld in b_idle state */ 358 if (ci->fsm.otg->state == OTG_STATE_B_IDLE) 359 return 0; 360 else 361 return 1; 362 } 363 364 /* 365 * Keep this list in the same order as timers indexed 366 * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h 367 */ 368 static int (*otg_timer_handlers[])(struct ci_hdrc *) = { 369 a_wait_vrise_tmout, /* A_WAIT_VRISE */ 370 a_wait_vfall_tmout, /* A_WAIT_VFALL */ 371 a_wait_bcon_tmout, /* A_WAIT_BCON */ 372 a_aidl_bdis_tmout, /* A_AIDL_BDIS */ 373 b_ase0_brst_tmout, /* B_ASE0_BRST */ 374 a_bidl_adis_tmout, /* A_BIDL_ADIS */ 375 b_aidl_bdis_tmout, /* B_AIDL_BDIS */ 376 b_se0_srp_tmout, /* B_SE0_SRP */ 377 b_srp_fail_tmout, /* B_SRP_FAIL */ 378 NULL, /* A_WAIT_ENUM */ 379 b_data_pls_tmout, /* B_DATA_PLS */ 380 b_ssend_srp_tmout, /* B_SSEND_SRP */ 381 }; 382 383 /* 384 * Enable the next nearest enabled timer if have 385 */ 386 static enum hrtimer_restart ci_otg_hrtimer_func(struct hrtimer *t) 387 { 388 struct ci_hdrc *ci = container_of(t, struct ci_hdrc, otg_fsm_hrtimer); 389 ktime_t now, *timeout; 390 unsigned long enabled_timer_bits; 391 unsigned long flags; 392 enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS; 393 int ret = -EINVAL; 394 395 spin_lock_irqsave(&ci->lock, flags); 396 enabled_timer_bits = ci->enabled_otg_timer_bits; 397 ci->next_otg_timer = NUM_OTG_FSM_TIMERS; 398 399 now = ktime_get(); 400 for_each_set_bit(cur_timer, &enabled_timer_bits, NUM_OTG_FSM_TIMERS) { 401 if (ktime_compare(now, ci->hr_timeouts[cur_timer]) >= 0) { 402 ci->enabled_otg_timer_bits &= ~(1 << cur_timer); 403 if (otg_timer_handlers[cur_timer]) 404 ret = otg_timer_handlers[cur_timer](ci); 405 } else { 406 if ((next_timer == NUM_OTG_FSM_TIMERS) || 407 ktime_before(ci->hr_timeouts[cur_timer], 408 ci->hr_timeouts[next_timer])) 409 next_timer = cur_timer; 410 } 411 } 412 /* Enable the next nearest timer */ 413 if (next_timer < NUM_OTG_FSM_TIMERS) { 414 timeout = &ci->hr_timeouts[next_timer]; 415 hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, *timeout, 416 NSEC_PER_MSEC, HRTIMER_MODE_ABS); 417 ci->next_otg_timer = next_timer; 418 } 419 spin_unlock_irqrestore(&ci->lock, flags); 420 421 if (!ret) 422 ci_otg_queue_work(ci); 423 424 return HRTIMER_NORESTART; 425 } 426 427 /* Initialize timers */ 428 static int ci_otg_init_timers(struct ci_hdrc *ci) 429 { 430 hrtimer_init(&ci->otg_fsm_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); 431 ci->otg_fsm_hrtimer.function = ci_otg_hrtimer_func; 432 433 return 0; 434 } 435 436 /* -------------------------------------------------------------*/ 437 /* Operations that will be called from OTG Finite State Machine */ 438 /* -------------------------------------------------------------*/ 439 static void ci_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t) 440 { 441 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 442 443 if (t < NUM_OTG_FSM_TIMERS) 444 ci_otg_add_timer(ci, t); 445 return; 446 } 447 448 static void ci_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t) 449 { 450 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 451 452 if (t < NUM_OTG_FSM_TIMERS) 453 ci_otg_del_timer(ci, t); 454 return; 455 } 456 457 /* 458 * A-device drive vbus: turn on vbus regulator and enable port power 459 * Data pulse irq should be disabled while vbus is on. 460 */ 461 static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on) 462 { 463 int ret; 464 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 465 466 if (on) { 467 /* Enable power power */ 468 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP, 469 PORTSC_PP); 470 if (ci->platdata->reg_vbus) { 471 ret = regulator_enable(ci->platdata->reg_vbus); 472 if (ret) { 473 dev_err(ci->dev, 474 "Failed to enable vbus regulator, ret=%d\n", 475 ret); 476 return; 477 } 478 } 479 /* Disable data pulse irq */ 480 hw_write_otgsc(ci, OTGSC_DPIE, 0); 481 482 fsm->a_srp_det = 0; 483 fsm->power_up = 0; 484 } else { 485 if (ci->platdata->reg_vbus) 486 regulator_disable(ci->platdata->reg_vbus); 487 488 fsm->a_bus_drop = 1; 489 fsm->a_bus_req = 0; 490 } 491 } 492 493 /* 494 * Control data line by Run Stop bit. 495 */ 496 static void ci_otg_loc_conn(struct otg_fsm *fsm, int on) 497 { 498 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 499 500 if (on) 501 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); 502 else 503 hw_write(ci, OP_USBCMD, USBCMD_RS, 0); 504 } 505 506 /* 507 * Generate SOF by host. 508 * In host mode, controller will automatically send SOF. 509 * Suspend will block the data on the port. 510 * 511 * This is controlled through usbcore by usb autosuspend, 512 * so the usb device class driver need support autosuspend, 513 * otherwise the bus suspend will not happen. 514 */ 515 static void ci_otg_loc_sof(struct otg_fsm *fsm, int on) 516 { 517 struct usb_device *udev; 518 519 if (!fsm->otg->host) 520 return; 521 522 udev = usb_hub_find_child(fsm->otg->host->root_hub, 1); 523 if (!udev) 524 return; 525 526 if (on) { 527 usb_disable_autosuspend(udev); 528 } else { 529 pm_runtime_set_autosuspend_delay(&udev->dev, 0); 530 usb_enable_autosuspend(udev); 531 } 532 } 533 534 /* 535 * Start SRP pulsing by data-line pulsing, 536 * no v-bus pulsing followed 537 */ 538 static void ci_otg_start_pulse(struct otg_fsm *fsm) 539 { 540 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 541 542 /* Hardware Assistant Data pulse */ 543 hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP); 544 545 pm_runtime_get(ci->dev); 546 ci_otg_add_timer(ci, B_DATA_PLS); 547 } 548 549 static int ci_otg_start_host(struct otg_fsm *fsm, int on) 550 { 551 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 552 553 if (on) { 554 ci_role_stop(ci); 555 ci_role_start(ci, CI_ROLE_HOST); 556 } else { 557 ci_role_stop(ci); 558 ci_role_start(ci, CI_ROLE_GADGET); 559 } 560 return 0; 561 } 562 563 static int ci_otg_start_gadget(struct otg_fsm *fsm, int on) 564 { 565 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 566 567 if (on) 568 usb_gadget_vbus_connect(&ci->gadget); 569 else 570 usb_gadget_vbus_disconnect(&ci->gadget); 571 572 return 0; 573 } 574 575 static struct otg_fsm_ops ci_otg_ops = { 576 .drv_vbus = ci_otg_drv_vbus, 577 .loc_conn = ci_otg_loc_conn, 578 .loc_sof = ci_otg_loc_sof, 579 .start_pulse = ci_otg_start_pulse, 580 .add_timer = ci_otg_fsm_add_timer, 581 .del_timer = ci_otg_fsm_del_timer, 582 .start_host = ci_otg_start_host, 583 .start_gadget = ci_otg_start_gadget, 584 }; 585 586 int ci_otg_fsm_work(struct ci_hdrc *ci) 587 { 588 /* 589 * Don't do fsm transition for B device 590 * when there is no gadget class driver 591 */ 592 if (ci->fsm.id && !(ci->driver) && 593 ci->fsm.otg->state < OTG_STATE_A_IDLE) 594 return 0; 595 596 pm_runtime_get_sync(ci->dev); 597 if (otg_statemachine(&ci->fsm)) { 598 if (ci->fsm.otg->state == OTG_STATE_A_IDLE) { 599 /* 600 * Further state change for cases: 601 * a_idle to b_idle; or 602 * a_idle to a_wait_vrise due to ID change(1->0), so 603 * B-dev becomes A-dev can try to start new session 604 * consequently; or 605 * a_idle to a_wait_vrise when power up 606 */ 607 if ((ci->fsm.id) || (ci->id_event) || 608 (ci->fsm.power_up)) { 609 ci_otg_queue_work(ci); 610 } else { 611 /* Enable data pulse irq */ 612 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | 613 PORTSC_PP, 0); 614 hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS); 615 hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE); 616 } 617 if (ci->id_event) 618 ci->id_event = false; 619 } else if (ci->fsm.otg->state == OTG_STATE_B_IDLE) { 620 if (ci->fsm.b_sess_vld) { 621 ci->fsm.power_up = 0; 622 /* 623 * Further transite to b_periphearl state 624 * when register gadget driver with vbus on 625 */ 626 ci_otg_queue_work(ci); 627 } 628 } else if (ci->fsm.otg->state == OTG_STATE_A_HOST) { 629 pm_runtime_mark_last_busy(ci->dev); 630 pm_runtime_put_autosuspend(ci->dev); 631 return 0; 632 } 633 } 634 pm_runtime_put_sync(ci->dev); 635 return 0; 636 } 637 638 /* 639 * Update fsm variables in each state if catching expected interrupts, 640 * called by otg fsm isr. 641 */ 642 static void ci_otg_fsm_event(struct ci_hdrc *ci) 643 { 644 u32 intr_sts, otg_bsess_vld, port_conn; 645 struct otg_fsm *fsm = &ci->fsm; 646 647 intr_sts = hw_read_intr_status(ci); 648 otg_bsess_vld = hw_read_otgsc(ci, OTGSC_BSV); 649 port_conn = hw_read(ci, OP_PORTSC, PORTSC_CCS); 650 651 switch (ci->fsm.otg->state) { 652 case OTG_STATE_A_WAIT_BCON: 653 if (port_conn) { 654 fsm->b_conn = 1; 655 fsm->a_bus_req = 1; 656 ci_otg_queue_work(ci); 657 } 658 break; 659 case OTG_STATE_B_IDLE: 660 if (otg_bsess_vld && (intr_sts & USBi_PCI) && port_conn) { 661 fsm->b_sess_vld = 1; 662 ci_otg_queue_work(ci); 663 } 664 break; 665 case OTG_STATE_B_PERIPHERAL: 666 if ((intr_sts & USBi_SLI) && port_conn && otg_bsess_vld) { 667 ci_otg_add_timer(ci, B_AIDL_BDIS); 668 } else if (intr_sts & USBi_PCI) { 669 ci_otg_del_timer(ci, B_AIDL_BDIS); 670 if (fsm->a_bus_suspend == 1) 671 fsm->a_bus_suspend = 0; 672 } 673 break; 674 case OTG_STATE_B_HOST: 675 if ((intr_sts & USBi_PCI) && !port_conn) { 676 fsm->a_conn = 0; 677 fsm->b_bus_req = 0; 678 ci_otg_queue_work(ci); 679 } 680 break; 681 case OTG_STATE_A_PERIPHERAL: 682 if (intr_sts & USBi_SLI) { 683 fsm->b_bus_suspend = 1; 684 /* 685 * Init a timer to know how long this suspend 686 * will continue, if time out, indicates B no longer 687 * wants to be host role 688 */ 689 ci_otg_add_timer(ci, A_BIDL_ADIS); 690 } 691 692 if (intr_sts & USBi_URI) 693 ci_otg_del_timer(ci, A_BIDL_ADIS); 694 695 if (intr_sts & USBi_PCI) { 696 if (fsm->b_bus_suspend == 1) { 697 ci_otg_del_timer(ci, A_BIDL_ADIS); 698 fsm->b_bus_suspend = 0; 699 } 700 } 701 break; 702 case OTG_STATE_A_SUSPEND: 703 if ((intr_sts & USBi_PCI) && !port_conn) { 704 fsm->b_conn = 0; 705 706 /* if gadget driver is binded */ 707 if (ci->driver) { 708 /* A device to be peripheral mode */ 709 ci->gadget.is_a_peripheral = 1; 710 } 711 ci_otg_queue_work(ci); 712 } 713 break; 714 case OTG_STATE_A_HOST: 715 if ((intr_sts & USBi_PCI) && !port_conn) { 716 fsm->b_conn = 0; 717 ci_otg_queue_work(ci); 718 } 719 break; 720 case OTG_STATE_B_WAIT_ACON: 721 if ((intr_sts & USBi_PCI) && port_conn) { 722 fsm->a_conn = 1; 723 ci_otg_queue_work(ci); 724 } 725 break; 726 default: 727 break; 728 } 729 } 730 731 /* 732 * ci_otg_irq - otg fsm related irq handling 733 * and also update otg fsm variable by monitoring usb host and udc 734 * state change interrupts. 735 * @ci: ci_hdrc 736 */ 737 irqreturn_t ci_otg_fsm_irq(struct ci_hdrc *ci) 738 { 739 irqreturn_t retval = IRQ_NONE; 740 u32 otgsc, otg_int_src = 0; 741 struct otg_fsm *fsm = &ci->fsm; 742 743 otgsc = hw_read_otgsc(ci, ~0); 744 otg_int_src = otgsc & OTGSC_INT_STATUS_BITS & (otgsc >> 8); 745 fsm->id = (otgsc & OTGSC_ID) ? 1 : 0; 746 747 if (otg_int_src) { 748 if (otg_int_src & OTGSC_DPIS) { 749 hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS); 750 fsm->a_srp_det = 1; 751 fsm->a_bus_drop = 0; 752 } else if (otg_int_src & OTGSC_IDIS) { 753 hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS); 754 if (fsm->id == 0) { 755 fsm->a_bus_drop = 0; 756 fsm->a_bus_req = 1; 757 ci->id_event = true; 758 } 759 } else if (otg_int_src & OTGSC_BSVIS) { 760 hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS); 761 if (otgsc & OTGSC_BSV) { 762 fsm->b_sess_vld = 1; 763 ci_otg_del_timer(ci, B_SSEND_SRP); 764 ci_otg_del_timer(ci, B_SRP_FAIL); 765 fsm->b_ssend_srp = 0; 766 } else { 767 fsm->b_sess_vld = 0; 768 if (fsm->id) 769 ci_otg_add_timer(ci, B_SSEND_SRP); 770 } 771 } else if (otg_int_src & OTGSC_AVVIS) { 772 hw_write_otgsc(ci, OTGSC_AVVIS, OTGSC_AVVIS); 773 if (otgsc & OTGSC_AVV) { 774 fsm->a_vbus_vld = 1; 775 } else { 776 fsm->a_vbus_vld = 0; 777 fsm->b_conn = 0; 778 } 779 } 780 ci_otg_queue_work(ci); 781 return IRQ_HANDLED; 782 } 783 784 ci_otg_fsm_event(ci); 785 786 return retval; 787 } 788 789 void ci_hdrc_otg_fsm_start(struct ci_hdrc *ci) 790 { 791 ci_otg_queue_work(ci); 792 } 793 794 int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci) 795 { 796 int retval = 0; 797 798 if (ci->phy) 799 ci->otg.phy = ci->phy; 800 else 801 ci->otg.usb_phy = ci->usb_phy; 802 803 ci->otg.gadget = &ci->gadget; 804 ci->fsm.otg = &ci->otg; 805 ci->fsm.power_up = 1; 806 ci->fsm.id = hw_read_otgsc(ci, OTGSC_ID) ? 1 : 0; 807 ci->fsm.otg->state = OTG_STATE_UNDEFINED; 808 ci->fsm.ops = &ci_otg_ops; 809 ci->gadget.hnp_polling_support = 1; 810 ci->fsm.host_req_flag = devm_kzalloc(ci->dev, 1, GFP_KERNEL); 811 if (!ci->fsm.host_req_flag) 812 return -ENOMEM; 813 814 mutex_init(&ci->fsm.lock); 815 816 retval = ci_otg_init_timers(ci); 817 if (retval) { 818 dev_err(ci->dev, "Couldn't init OTG timers\n"); 819 return retval; 820 } 821 ci->enabled_otg_timer_bits = 0; 822 ci->next_otg_timer = NUM_OTG_FSM_TIMERS; 823 824 retval = sysfs_create_group(&ci->dev->kobj, &inputs_attr_group); 825 if (retval < 0) { 826 dev_dbg(ci->dev, 827 "Can't register sysfs attr group: %d\n", retval); 828 return retval; 829 } 830 831 /* Enable A vbus valid irq */ 832 hw_write_otgsc(ci, OTGSC_AVVIE, OTGSC_AVVIE); 833 834 if (ci->fsm.id) { 835 ci->fsm.b_ssend_srp = 836 hw_read_otgsc(ci, OTGSC_BSV) ? 0 : 1; 837 ci->fsm.b_sess_vld = 838 hw_read_otgsc(ci, OTGSC_BSV) ? 1 : 0; 839 /* Enable BSV irq */ 840 hw_write_otgsc(ci, OTGSC_BSVIE, OTGSC_BSVIE); 841 } 842 843 return 0; 844 } 845 846 void ci_hdrc_otg_fsm_remove(struct ci_hdrc *ci) 847 { 848 sysfs_remove_group(&ci->dev->kobj, &inputs_attr_group); 849 } 850