xref: /linux/drivers/usb/chipidea/otg_fsm.c (revision 50e59058a42056063add41c2d900d1b162e2d6d6)
1 /*
2  * otg_fsm.c - ChipIdea USB IP core OTG FSM driver
3  *
4  * Copyright (C) 2014 Freescale Semiconductor, Inc.
5  *
6  * Author: Jun Li
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 /*
14  * This file mainly handles OTG fsm, it includes OTG fsm operations
15  * for HNP and SRP.
16  *
17  * TODO List
18  * - ADP
19  * - OTG test device
20  */
21 
22 #include <linux/usb/otg.h>
23 #include <linux/usb/gadget.h>
24 #include <linux/usb/hcd.h>
25 #include <linux/usb/chipidea.h>
26 #include <linux/regulator/consumer.h>
27 
28 #include "ci.h"
29 #include "bits.h"
30 #include "otg.h"
31 #include "otg_fsm.h"
32 
33 static struct ci_otg_fsm_timer *otg_timer_initializer
34 (struct ci_hdrc *ci, void (*function)(void *, unsigned long),
35 			unsigned long expires, unsigned long data)
36 {
37 	struct ci_otg_fsm_timer *timer;
38 
39 	timer = devm_kzalloc(ci->dev, sizeof(struct ci_otg_fsm_timer),
40 								GFP_KERNEL);
41 	if (!timer)
42 		return NULL;
43 	timer->function = function;
44 	timer->expires = expires;
45 	timer->data = data;
46 	return timer;
47 }
48 
49 /* Add for otg: interact with user space app */
50 static ssize_t
51 get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
52 {
53 	char		*next;
54 	unsigned	size, t;
55 	struct ci_hdrc	*ci = dev_get_drvdata(dev);
56 
57 	next = buf;
58 	size = PAGE_SIZE;
59 	t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_req);
60 	size -= t;
61 	next += t;
62 
63 	return PAGE_SIZE - size;
64 }
65 
66 static ssize_t
67 set_a_bus_req(struct device *dev, struct device_attribute *attr,
68 					const char *buf, size_t count)
69 {
70 	struct ci_hdrc *ci = dev_get_drvdata(dev);
71 
72 	if (count > 2)
73 		return -1;
74 
75 	mutex_lock(&ci->fsm.lock);
76 	if (buf[0] == '0') {
77 		ci->fsm.a_bus_req = 0;
78 	} else if (buf[0] == '1') {
79 		/* If a_bus_drop is TRUE, a_bus_req can't be set */
80 		if (ci->fsm.a_bus_drop) {
81 			mutex_unlock(&ci->fsm.lock);
82 			return count;
83 		}
84 		ci->fsm.a_bus_req = 1;
85 	}
86 
87 	ci_otg_queue_work(ci);
88 	mutex_unlock(&ci->fsm.lock);
89 
90 	return count;
91 }
92 static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req, set_a_bus_req);
93 
94 static ssize_t
95 get_a_bus_drop(struct device *dev, struct device_attribute *attr, char *buf)
96 {
97 	char		*next;
98 	unsigned	size, t;
99 	struct ci_hdrc	*ci = dev_get_drvdata(dev);
100 
101 	next = buf;
102 	size = PAGE_SIZE;
103 	t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_drop);
104 	size -= t;
105 	next += t;
106 
107 	return PAGE_SIZE - size;
108 }
109 
110 static ssize_t
111 set_a_bus_drop(struct device *dev, struct device_attribute *attr,
112 					const char *buf, size_t count)
113 {
114 	struct ci_hdrc	*ci = dev_get_drvdata(dev);
115 
116 	if (count > 2)
117 		return -1;
118 
119 	mutex_lock(&ci->fsm.lock);
120 	if (buf[0] == '0') {
121 		ci->fsm.a_bus_drop = 0;
122 	} else if (buf[0] == '1') {
123 		ci->fsm.a_bus_drop = 1;
124 		ci->fsm.a_bus_req = 0;
125 	}
126 
127 	ci_otg_queue_work(ci);
128 	mutex_unlock(&ci->fsm.lock);
129 
130 	return count;
131 }
132 static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR, get_a_bus_drop,
133 						set_a_bus_drop);
134 
135 static ssize_t
136 get_b_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
137 {
138 	char		*next;
139 	unsigned	size, t;
140 	struct ci_hdrc	*ci = dev_get_drvdata(dev);
141 
142 	next = buf;
143 	size = PAGE_SIZE;
144 	t = scnprintf(next, size, "%d\n", ci->fsm.b_bus_req);
145 	size -= t;
146 	next += t;
147 
148 	return PAGE_SIZE - size;
149 }
150 
151 static ssize_t
152 set_b_bus_req(struct device *dev, struct device_attribute *attr,
153 					const char *buf, size_t count)
154 {
155 	struct ci_hdrc	*ci = dev_get_drvdata(dev);
156 
157 	if (count > 2)
158 		return -1;
159 
160 	mutex_lock(&ci->fsm.lock);
161 	if (buf[0] == '0')
162 		ci->fsm.b_bus_req = 0;
163 	else if (buf[0] == '1')
164 		ci->fsm.b_bus_req = 1;
165 
166 	ci_otg_queue_work(ci);
167 	mutex_unlock(&ci->fsm.lock);
168 
169 	return count;
170 }
171 static DEVICE_ATTR(b_bus_req, S_IRUGO | S_IWUSR, get_b_bus_req, set_b_bus_req);
172 
173 static ssize_t
174 set_a_clr_err(struct device *dev, struct device_attribute *attr,
175 					const char *buf, size_t count)
176 {
177 	struct ci_hdrc	*ci = dev_get_drvdata(dev);
178 
179 	if (count > 2)
180 		return -1;
181 
182 	mutex_lock(&ci->fsm.lock);
183 	if (buf[0] == '1')
184 		ci->fsm.a_clr_err = 1;
185 
186 	ci_otg_queue_work(ci);
187 	mutex_unlock(&ci->fsm.lock);
188 
189 	return count;
190 }
191 static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err);
192 
193 static struct attribute *inputs_attrs[] = {
194 	&dev_attr_a_bus_req.attr,
195 	&dev_attr_a_bus_drop.attr,
196 	&dev_attr_b_bus_req.attr,
197 	&dev_attr_a_clr_err.attr,
198 	NULL,
199 };
200 
201 static struct attribute_group inputs_attr_group = {
202 	.name = "inputs",
203 	.attrs = inputs_attrs,
204 };
205 
206 /*
207  * Add timer to active timer list
208  */
209 static void ci_otg_add_timer(struct ci_hdrc *ci, enum ci_otg_fsm_timer_index t)
210 {
211 	struct ci_otg_fsm_timer *tmp_timer;
212 	struct ci_otg_fsm_timer *timer = ci->fsm_timer->timer_list[t];
213 	struct list_head *active_timers = &ci->fsm_timer->active_timers;
214 
215 	if (t >= NUM_CI_OTG_FSM_TIMERS)
216 		return;
217 
218 	/*
219 	 * Check if the timer is already in the active list,
220 	 * if so update timer count
221 	 */
222 	list_for_each_entry(tmp_timer, active_timers, list)
223 		if (tmp_timer == timer) {
224 			timer->count = timer->expires;
225 			return;
226 		}
227 
228 	timer->count = timer->expires;
229 	list_add_tail(&timer->list, active_timers);
230 
231 	/* Enable 1ms irq */
232 	if (!(hw_read_otgsc(ci, OTGSC_1MSIE)))
233 		hw_write_otgsc(ci, OTGSC_1MSIE, OTGSC_1MSIE);
234 }
235 
236 /*
237  * Remove timer from active timer list
238  */
239 static void ci_otg_del_timer(struct ci_hdrc *ci, enum ci_otg_fsm_timer_index t)
240 {
241 	struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
242 	struct ci_otg_fsm_timer *timer = ci->fsm_timer->timer_list[t];
243 	struct list_head *active_timers = &ci->fsm_timer->active_timers;
244 
245 	if (t >= NUM_CI_OTG_FSM_TIMERS)
246 		return;
247 
248 	list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list)
249 		if (tmp_timer == timer)
250 			list_del(&timer->list);
251 
252 	/* Disable 1ms irq if there is no any active timer */
253 	if (list_empty(active_timers))
254 		hw_write_otgsc(ci, OTGSC_1MSIE, 0);
255 }
256 
257 /*
258  * Reduce timer count by 1, and find timeout conditions.
259  * Called by otg 1ms timer interrupt
260  */
261 static inline int ci_otg_tick_timer(struct ci_hdrc *ci)
262 {
263 	struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
264 	struct list_head *active_timers = &ci->fsm_timer->active_timers;
265 	int expired = 0;
266 
267 	list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list) {
268 		tmp_timer->count--;
269 		/* check if timer expires */
270 		if (!tmp_timer->count) {
271 			list_del(&tmp_timer->list);
272 			tmp_timer->function(ci, tmp_timer->data);
273 			expired = 1;
274 		}
275 	}
276 
277 	/* disable 1ms irq if there is no any timer active */
278 	if ((expired == 1) && list_empty(active_timers))
279 		hw_write_otgsc(ci, OTGSC_1MSIE, 0);
280 
281 	return expired;
282 }
283 
284 /* The timeout callback function to set time out bit */
285 static void set_tmout(void *ptr, unsigned long indicator)
286 {
287 	*(int *)indicator = 1;
288 }
289 
290 static void set_tmout_and_fsm(void *ptr, unsigned long indicator)
291 {
292 	struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
293 
294 	set_tmout(ci, indicator);
295 
296 	ci_otg_queue_work(ci);
297 }
298 
299 static void a_wait_vfall_tmout_func(void *ptr, unsigned long indicator)
300 {
301 	struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
302 
303 	set_tmout(ci, indicator);
304 	/* Disable port power */
305 	hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP, 0);
306 	/* Clear exsiting DP irq */
307 	hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
308 	/* Enable data pulse irq */
309 	hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE);
310 	ci_otg_queue_work(ci);
311 }
312 
313 static void b_ase0_brst_tmout_func(void *ptr, unsigned long indicator)
314 {
315 	struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
316 
317 	set_tmout(ci, indicator);
318 	if (!hw_read_otgsc(ci, OTGSC_BSV))
319 		ci->fsm.b_sess_vld = 0;
320 
321 	ci_otg_queue_work(ci);
322 }
323 
324 static void b_ssend_srp_tmout_func(void *ptr, unsigned long indicator)
325 {
326 	struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
327 
328 	set_tmout(ci, indicator);
329 
330 	/* only vbus fall below B_sess_vld in b_idle state */
331 	if (ci->transceiver->state == OTG_STATE_B_IDLE)
332 		ci_otg_queue_work(ci);
333 }
334 
335 static void b_sess_vld_tmout_func(void *ptr, unsigned long indicator)
336 {
337 	struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
338 
339 	/* Check if A detached */
340 	if (!(hw_read_otgsc(ci, OTGSC_BSV))) {
341 		ci->fsm.b_sess_vld = 0;
342 		ci_otg_add_timer(ci, B_SSEND_SRP);
343 		ci_otg_queue_work(ci);
344 	}
345 }
346 
347 static void b_data_pulse_end(void *ptr, unsigned long indicator)
348 {
349 	struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
350 
351 	ci->fsm.b_srp_done = 1;
352 	ci->fsm.b_bus_req = 0;
353 	if (ci->fsm.power_up)
354 		ci->fsm.power_up = 0;
355 
356 	hw_write_otgsc(ci, OTGSC_HABA, 0);
357 
358 	ci_otg_queue_work(ci);
359 }
360 
361 /* Initialize timers */
362 static int ci_otg_init_timers(struct ci_hdrc *ci)
363 {
364 	struct otg_fsm *fsm = &ci->fsm;
365 
366 	/* FSM used timers */
367 	ci->fsm_timer->timer_list[A_WAIT_VRISE] =
368 		otg_timer_initializer(ci, &set_tmout_and_fsm, TA_WAIT_VRISE,
369 			(unsigned long)&fsm->a_wait_vrise_tmout);
370 	if (ci->fsm_timer->timer_list[A_WAIT_VRISE] == NULL)
371 		return -ENOMEM;
372 
373 	ci->fsm_timer->timer_list[A_WAIT_VFALL] =
374 		otg_timer_initializer(ci, &a_wait_vfall_tmout_func,
375 		TA_WAIT_VFALL, (unsigned long)&fsm->a_wait_vfall_tmout);
376 	if (ci->fsm_timer->timer_list[A_WAIT_VFALL] == NULL)
377 		return -ENOMEM;
378 
379 	ci->fsm_timer->timer_list[A_WAIT_BCON] =
380 		otg_timer_initializer(ci, &set_tmout_and_fsm, TA_WAIT_BCON,
381 				(unsigned long)&fsm->a_wait_bcon_tmout);
382 	if (ci->fsm_timer->timer_list[A_WAIT_BCON] == NULL)
383 		return -ENOMEM;
384 
385 	ci->fsm_timer->timer_list[A_AIDL_BDIS] =
386 		otg_timer_initializer(ci, &set_tmout_and_fsm, TA_AIDL_BDIS,
387 				(unsigned long)&fsm->a_aidl_bdis_tmout);
388 	if (ci->fsm_timer->timer_list[A_AIDL_BDIS] == NULL)
389 		return -ENOMEM;
390 
391 	ci->fsm_timer->timer_list[A_BIDL_ADIS] =
392 		otg_timer_initializer(ci, &set_tmout_and_fsm, TA_BIDL_ADIS,
393 				(unsigned long)&fsm->a_bidl_adis_tmout);
394 	if (ci->fsm_timer->timer_list[A_BIDL_ADIS] == NULL)
395 		return -ENOMEM;
396 
397 	ci->fsm_timer->timer_list[B_ASE0_BRST] =
398 		otg_timer_initializer(ci, &b_ase0_brst_tmout_func, TB_ASE0_BRST,
399 					(unsigned long)&fsm->b_ase0_brst_tmout);
400 	if (ci->fsm_timer->timer_list[B_ASE0_BRST] == NULL)
401 		return -ENOMEM;
402 
403 	ci->fsm_timer->timer_list[B_SE0_SRP] =
404 		otg_timer_initializer(ci, &set_tmout_and_fsm, TB_SE0_SRP,
405 					(unsigned long)&fsm->b_se0_srp);
406 	if (ci->fsm_timer->timer_list[B_SE0_SRP] == NULL)
407 		return -ENOMEM;
408 
409 	ci->fsm_timer->timer_list[B_SSEND_SRP] =
410 		otg_timer_initializer(ci, &b_ssend_srp_tmout_func, TB_SSEND_SRP,
411 					(unsigned long)&fsm->b_ssend_srp);
412 	if (ci->fsm_timer->timer_list[B_SSEND_SRP] == NULL)
413 		return -ENOMEM;
414 
415 	ci->fsm_timer->timer_list[B_SRP_FAIL] =
416 		otg_timer_initializer(ci, &set_tmout, TB_SRP_FAIL,
417 				(unsigned long)&fsm->b_srp_done);
418 	if (ci->fsm_timer->timer_list[B_SRP_FAIL] == NULL)
419 		return -ENOMEM;
420 
421 	ci->fsm_timer->timer_list[B_DATA_PLS] =
422 		otg_timer_initializer(ci, &b_data_pulse_end, TB_DATA_PLS, 0);
423 	if (ci->fsm_timer->timer_list[B_DATA_PLS] == NULL)
424 		return -ENOMEM;
425 
426 	ci->fsm_timer->timer_list[B_SESS_VLD] =	otg_timer_initializer(ci,
427 					&b_sess_vld_tmout_func, TB_SESS_VLD, 0);
428 	if (ci->fsm_timer->timer_list[B_SESS_VLD] == NULL)
429 		return -ENOMEM;
430 
431 	return 0;
432 }
433 
434 /* -------------------------------------------------------------*/
435 /* Operations that will be called from OTG Finite State Machine */
436 /* -------------------------------------------------------------*/
437 static void ci_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
438 {
439 	struct ci_hdrc	*ci = container_of(fsm, struct ci_hdrc, fsm);
440 
441 	if (t < NUM_OTG_FSM_TIMERS)
442 		ci_otg_add_timer(ci, t);
443 	return;
444 }
445 
446 static void ci_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
447 {
448 	struct ci_hdrc	*ci = container_of(fsm, struct ci_hdrc, fsm);
449 
450 	if (t < NUM_OTG_FSM_TIMERS)
451 		ci_otg_del_timer(ci, t);
452 	return;
453 }
454 
455 /*
456  * A-device drive vbus: turn on vbus regulator and enable port power
457  * Data pulse irq should be disabled while vbus is on.
458  */
459 static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on)
460 {
461 	int ret;
462 	struct ci_hdrc	*ci = container_of(fsm, struct ci_hdrc, fsm);
463 
464 	if (on) {
465 		/* Enable power power */
466 		hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
467 							PORTSC_PP);
468 		if (ci->platdata->reg_vbus) {
469 			ret = regulator_enable(ci->platdata->reg_vbus);
470 			if (ret) {
471 				dev_err(ci->dev,
472 				"Failed to enable vbus regulator, ret=%d\n",
473 				ret);
474 				return;
475 			}
476 		}
477 		/* Disable data pulse irq */
478 		hw_write_otgsc(ci, OTGSC_DPIE, 0);
479 
480 		fsm->a_srp_det = 0;
481 		fsm->power_up = 0;
482 	} else {
483 		if (ci->platdata->reg_vbus)
484 			regulator_disable(ci->platdata->reg_vbus);
485 
486 		fsm->a_bus_drop = 1;
487 		fsm->a_bus_req = 0;
488 	}
489 }
490 
491 /*
492  * Control data line by Run Stop bit.
493  */
494 static void ci_otg_loc_conn(struct otg_fsm *fsm, int on)
495 {
496 	struct ci_hdrc	*ci = container_of(fsm, struct ci_hdrc, fsm);
497 
498 	if (on)
499 		hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
500 	else
501 		hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
502 }
503 
504 /*
505  * Generate SOF by host.
506  * This is controlled through suspend/resume the port.
507  * In host mode, controller will automatically send SOF.
508  * Suspend will block the data on the port.
509  */
510 static void ci_otg_loc_sof(struct otg_fsm *fsm, int on)
511 {
512 	struct ci_hdrc	*ci = container_of(fsm, struct ci_hdrc, fsm);
513 
514 	if (on)
515 		hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_FPR,
516 							PORTSC_FPR);
517 	else
518 		hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_SUSP,
519 							PORTSC_SUSP);
520 }
521 
522 /*
523  * Start SRP pulsing by data-line pulsing,
524  * no v-bus pulsing followed
525  */
526 static void ci_otg_start_pulse(struct otg_fsm *fsm)
527 {
528 	struct ci_hdrc	*ci = container_of(fsm, struct ci_hdrc, fsm);
529 
530 	/* Hardware Assistant Data pulse */
531 	hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP);
532 
533 	ci_otg_add_timer(ci, B_DATA_PLS);
534 }
535 
536 static int ci_otg_start_host(struct otg_fsm *fsm, int on)
537 {
538 	struct ci_hdrc	*ci = container_of(fsm, struct ci_hdrc, fsm);
539 
540 	mutex_unlock(&fsm->lock);
541 	if (on) {
542 		ci_role_stop(ci);
543 		ci_role_start(ci, CI_ROLE_HOST);
544 	} else {
545 		ci_role_stop(ci);
546 		hw_device_reset(ci, USBMODE_CM_DC);
547 		ci_role_start(ci, CI_ROLE_GADGET);
548 	}
549 	mutex_lock(&fsm->lock);
550 	return 0;
551 }
552 
553 static int ci_otg_start_gadget(struct otg_fsm *fsm, int on)
554 {
555 	struct ci_hdrc	*ci = container_of(fsm, struct ci_hdrc, fsm);
556 
557 	mutex_unlock(&fsm->lock);
558 	if (on)
559 		usb_gadget_vbus_connect(&ci->gadget);
560 	else
561 		usb_gadget_vbus_disconnect(&ci->gadget);
562 	mutex_lock(&fsm->lock);
563 
564 	return 0;
565 }
566 
567 static struct otg_fsm_ops ci_otg_ops = {
568 	.drv_vbus = ci_otg_drv_vbus,
569 	.loc_conn = ci_otg_loc_conn,
570 	.loc_sof = ci_otg_loc_sof,
571 	.start_pulse = ci_otg_start_pulse,
572 	.add_timer = ci_otg_fsm_add_timer,
573 	.del_timer = ci_otg_fsm_del_timer,
574 	.start_host = ci_otg_start_host,
575 	.start_gadget = ci_otg_start_gadget,
576 };
577 
578 int ci_otg_fsm_work(struct ci_hdrc *ci)
579 {
580 	/*
581 	 * Don't do fsm transition for B device
582 	 * when there is no gadget class driver
583 	 */
584 	if (ci->fsm.id && !(ci->driver) &&
585 		ci->transceiver->state < OTG_STATE_A_IDLE)
586 		return 0;
587 
588 	if (otg_statemachine(&ci->fsm)) {
589 		if (ci->transceiver->state == OTG_STATE_A_IDLE) {
590 			/*
591 			 * Further state change for cases:
592 			 * a_idle to b_idle; or
593 			 * a_idle to a_wait_vrise due to ID change(1->0), so
594 			 * B-dev becomes A-dev can try to start new session
595 			 * consequently; or
596 			 * a_idle to a_wait_vrise when power up
597 			 */
598 			if ((ci->fsm.id) || (ci->id_event) ||
599 						(ci->fsm.power_up))
600 				ci_otg_queue_work(ci);
601 			if (ci->id_event)
602 				ci->id_event = false;
603 		} else if (ci->transceiver->state == OTG_STATE_B_IDLE) {
604 			if (ci->fsm.b_sess_vld) {
605 				ci->fsm.power_up = 0;
606 				/*
607 				 * Further transite to b_periphearl state
608 				 * when register gadget driver with vbus on
609 				 */
610 				ci_otg_queue_work(ci);
611 			}
612 		}
613 	}
614 	return 0;
615 }
616 
617 /*
618  * Update fsm variables in each state if catching expected interrupts,
619  * called by otg fsm isr.
620  */
621 static void ci_otg_fsm_event(struct ci_hdrc *ci)
622 {
623 	u32 intr_sts, otg_bsess_vld, port_conn;
624 	struct otg_fsm *fsm = &ci->fsm;
625 
626 	intr_sts = hw_read_intr_status(ci);
627 	otg_bsess_vld = hw_read_otgsc(ci, OTGSC_BSV);
628 	port_conn = hw_read(ci, OP_PORTSC, PORTSC_CCS);
629 
630 	switch (ci->transceiver->state) {
631 	case OTG_STATE_A_WAIT_BCON:
632 		if (port_conn) {
633 			fsm->b_conn = 1;
634 			fsm->a_bus_req = 1;
635 			ci_otg_queue_work(ci);
636 		}
637 		break;
638 	case OTG_STATE_B_IDLE:
639 		if (otg_bsess_vld && (intr_sts & USBi_PCI) && port_conn) {
640 			fsm->b_sess_vld = 1;
641 			ci_otg_queue_work(ci);
642 		}
643 		break;
644 	case OTG_STATE_B_PERIPHERAL:
645 		if ((intr_sts & USBi_SLI) && port_conn && otg_bsess_vld) {
646 			fsm->a_bus_suspend = 1;
647 			ci_otg_queue_work(ci);
648 		} else if (intr_sts & USBi_PCI) {
649 			if (fsm->a_bus_suspend == 1)
650 				fsm->a_bus_suspend = 0;
651 		}
652 		break;
653 	case OTG_STATE_B_HOST:
654 		if ((intr_sts & USBi_PCI) && !port_conn) {
655 			fsm->a_conn = 0;
656 			fsm->b_bus_req = 0;
657 			ci_otg_queue_work(ci);
658 			ci_otg_add_timer(ci, B_SESS_VLD);
659 		}
660 		break;
661 	case OTG_STATE_A_PERIPHERAL:
662 		if (intr_sts & USBi_SLI) {
663 			 fsm->b_bus_suspend = 1;
664 			/*
665 			 * Init a timer to know how long this suspend
666 			 * will contine, if time out, indicates B no longer
667 			 * wants to be host role
668 			 */
669 			 ci_otg_add_timer(ci, A_BIDL_ADIS);
670 		}
671 
672 		if (intr_sts & USBi_URI)
673 			ci_otg_del_timer(ci, A_BIDL_ADIS);
674 
675 		if (intr_sts & USBi_PCI) {
676 			if (fsm->b_bus_suspend == 1) {
677 				ci_otg_del_timer(ci, A_BIDL_ADIS);
678 				fsm->b_bus_suspend = 0;
679 			}
680 		}
681 		break;
682 	case OTG_STATE_A_SUSPEND:
683 		if ((intr_sts & USBi_PCI) && !port_conn) {
684 			fsm->b_conn = 0;
685 
686 			/* if gadget driver is binded */
687 			if (ci->driver) {
688 				/* A device to be peripheral mode */
689 				ci->gadget.is_a_peripheral = 1;
690 			}
691 			ci_otg_queue_work(ci);
692 		}
693 		break;
694 	case OTG_STATE_A_HOST:
695 		if ((intr_sts & USBi_PCI) && !port_conn) {
696 			fsm->b_conn = 0;
697 			ci_otg_queue_work(ci);
698 		}
699 		break;
700 	case OTG_STATE_B_WAIT_ACON:
701 		if ((intr_sts & USBi_PCI) && port_conn) {
702 			fsm->a_conn = 1;
703 			ci_otg_queue_work(ci);
704 		}
705 		break;
706 	default:
707 		break;
708 	}
709 }
710 
711 /*
712  * ci_otg_irq - otg fsm related irq handling
713  * and also update otg fsm variable by monitoring usb host and udc
714  * state change interrupts.
715  * @ci: ci_hdrc
716  */
717 irqreturn_t ci_otg_fsm_irq(struct ci_hdrc *ci)
718 {
719 	irqreturn_t retval =  IRQ_NONE;
720 	u32 otgsc, otg_int_src = 0;
721 	struct otg_fsm *fsm = &ci->fsm;
722 
723 	otgsc = hw_read_otgsc(ci, ~0);
724 	otg_int_src = otgsc & OTGSC_INT_STATUS_BITS & (otgsc >> 8);
725 	fsm->id = (otgsc & OTGSC_ID) ? 1 : 0;
726 
727 	if (otg_int_src) {
728 		if (otg_int_src & OTGSC_1MSIS) {
729 			hw_write_otgsc(ci, OTGSC_1MSIS, OTGSC_1MSIS);
730 			retval = ci_otg_tick_timer(ci);
731 			return IRQ_HANDLED;
732 		} else if (otg_int_src & OTGSC_DPIS) {
733 			hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
734 			fsm->a_srp_det = 1;
735 			fsm->a_bus_drop = 0;
736 		} else if (otg_int_src & OTGSC_IDIS) {
737 			hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
738 			if (fsm->id == 0) {
739 				fsm->a_bus_drop = 0;
740 				fsm->a_bus_req = 1;
741 				ci->id_event = true;
742 			}
743 		} else if (otg_int_src & OTGSC_BSVIS) {
744 			hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
745 			if (otgsc & OTGSC_BSV) {
746 				fsm->b_sess_vld = 1;
747 				ci_otg_del_timer(ci, B_SSEND_SRP);
748 				ci_otg_del_timer(ci, B_SRP_FAIL);
749 				fsm->b_ssend_srp = 0;
750 			} else {
751 				fsm->b_sess_vld = 0;
752 				if (fsm->id)
753 					ci_otg_add_timer(ci, B_SSEND_SRP);
754 			}
755 		} else if (otg_int_src & OTGSC_AVVIS) {
756 			hw_write_otgsc(ci, OTGSC_AVVIS, OTGSC_AVVIS);
757 			if (otgsc & OTGSC_AVV) {
758 				fsm->a_vbus_vld = 1;
759 			} else {
760 				fsm->a_vbus_vld = 0;
761 				fsm->b_conn = 0;
762 			}
763 		}
764 		ci_otg_queue_work(ci);
765 		return IRQ_HANDLED;
766 	}
767 
768 	ci_otg_fsm_event(ci);
769 
770 	return retval;
771 }
772 
773 void ci_hdrc_otg_fsm_start(struct ci_hdrc *ci)
774 {
775 	ci_otg_queue_work(ci);
776 }
777 
778 int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
779 {
780 	int retval = 0;
781 	struct usb_otg *otg;
782 
783 	otg = devm_kzalloc(ci->dev,
784 			sizeof(struct usb_otg), GFP_KERNEL);
785 	if (!otg) {
786 		dev_err(ci->dev,
787 		"Failed to allocate usb_otg structure for ci hdrc otg!\n");
788 		return -ENOMEM;
789 	}
790 
791 	otg->phy = ci->transceiver;
792 	otg->gadget = &ci->gadget;
793 	ci->fsm.otg = otg;
794 	ci->transceiver->otg = ci->fsm.otg;
795 	ci->fsm.power_up = 1;
796 	ci->fsm.id = hw_read_otgsc(ci, OTGSC_ID) ? 1 : 0;
797 	ci->transceiver->state = OTG_STATE_UNDEFINED;
798 	ci->fsm.ops = &ci_otg_ops;
799 
800 	mutex_init(&ci->fsm.lock);
801 
802 	ci->fsm_timer = devm_kzalloc(ci->dev,
803 			sizeof(struct ci_otg_fsm_timer_list), GFP_KERNEL);
804 	if (!ci->fsm_timer) {
805 		dev_err(ci->dev,
806 		"Failed to allocate timer structure for ci hdrc otg!\n");
807 		return -ENOMEM;
808 	}
809 
810 	INIT_LIST_HEAD(&ci->fsm_timer->active_timers);
811 	retval = ci_otg_init_timers(ci);
812 	if (retval) {
813 		dev_err(ci->dev, "Couldn't init OTG timers\n");
814 		return retval;
815 	}
816 
817 	retval = sysfs_create_group(&ci->dev->kobj, &inputs_attr_group);
818 	if (retval < 0) {
819 		dev_dbg(ci->dev,
820 			"Can't register sysfs attr group: %d\n", retval);
821 		return retval;
822 	}
823 
824 	/* Enable A vbus valid irq */
825 	hw_write_otgsc(ci, OTGSC_AVVIE, OTGSC_AVVIE);
826 
827 	if (ci->fsm.id) {
828 		ci->fsm.b_ssend_srp =
829 			hw_read_otgsc(ci, OTGSC_BSV) ? 0 : 1;
830 		ci->fsm.b_sess_vld =
831 			hw_read_otgsc(ci, OTGSC_BSV) ? 1 : 0;
832 		/* Enable BSV irq */
833 		hw_write_otgsc(ci, OTGSC_BSVIE, OTGSC_BSVIE);
834 	}
835 
836 	return 0;
837 }
838 
839 void ci_hdrc_otg_fsm_remove(struct ci_hdrc *ci)
840 {
841 	sysfs_remove_group(&ci->dev->kobj, &inputs_attr_group);
842 }
843