xref: /linux/drivers/usb/chipidea/otg.c (revision ca55b2fef3a9373fcfc30f82fd26bc7fccbda732)
1 /*
2  * otg.c - ChipIdea USB IP core OTG driver
3  *
4  * Copyright (C) 2013 Freescale Semiconductor, Inc.
5  *
6  * Author: Peter Chen
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 /*
14  * This file mainly handles otgsc register, OTG fsm operations for HNP and SRP
15  * are also included.
16  */
17 
18 #include <linux/usb/otg.h>
19 #include <linux/usb/gadget.h>
20 #include <linux/usb/chipidea.h>
21 
22 #include "ci.h"
23 #include "bits.h"
24 #include "otg.h"
25 #include "otg_fsm.h"
26 
27 /**
28  * hw_read_otgsc returns otgsc register bits value.
29  * @mask: bitfield mask
30  */
31 u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
32 {
33 	return hw_read(ci, OP_OTGSC, mask);
34 }
35 
36 /**
37  * hw_write_otgsc updates target bits of OTGSC register.
38  * @mask: bitfield mask
39  * @data: to be written
40  */
41 void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
42 {
43 	hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
44 }
45 
46 /**
47  * ci_otg_role - pick role based on ID pin state
48  * @ci: the controller
49  */
50 enum ci_role ci_otg_role(struct ci_hdrc *ci)
51 {
52 	enum ci_role role = hw_read_otgsc(ci, OTGSC_ID)
53 		? CI_ROLE_GADGET
54 		: CI_ROLE_HOST;
55 
56 	return role;
57 }
58 
59 void ci_handle_vbus_change(struct ci_hdrc *ci)
60 {
61 	if (!ci->is_otg)
62 		return;
63 
64 	if (hw_read_otgsc(ci, OTGSC_BSV))
65 		usb_gadget_vbus_connect(&ci->gadget);
66 	else
67 		usb_gadget_vbus_disconnect(&ci->gadget);
68 }
69 
70 #define CI_VBUS_STABLE_TIMEOUT_MS 5000
71 static void ci_handle_id_switch(struct ci_hdrc *ci)
72 {
73 	enum ci_role role = ci_otg_role(ci);
74 
75 	if (role != ci->role) {
76 		dev_dbg(ci->dev, "switching from %s to %s\n",
77 			ci_role(ci)->name, ci->roles[role]->name);
78 
79 		ci_role_stop(ci);
80 		/* wait vbus lower than OTGSC_BSV */
81 		hw_wait_reg(ci, OP_OTGSC, OTGSC_BSV, 0,
82 				CI_VBUS_STABLE_TIMEOUT_MS);
83 		ci_role_start(ci, role);
84 	}
85 }
86 /**
87  * ci_otg_work - perform otg (vbus/id) event handle
88  * @work: work struct
89  */
90 static void ci_otg_work(struct work_struct *work)
91 {
92 	struct ci_hdrc *ci = container_of(work, struct ci_hdrc, work);
93 
94 	if (ci_otg_is_fsm_mode(ci) && !ci_otg_fsm_work(ci)) {
95 		enable_irq(ci->irq);
96 		return;
97 	}
98 
99 	pm_runtime_get_sync(ci->dev);
100 	if (ci->id_event) {
101 		ci->id_event = false;
102 		ci_handle_id_switch(ci);
103 	} else if (ci->b_sess_valid_event) {
104 		ci->b_sess_valid_event = false;
105 		ci_handle_vbus_change(ci);
106 	} else
107 		dev_err(ci->dev, "unexpected event occurs at %s\n", __func__);
108 	pm_runtime_put_sync(ci->dev);
109 
110 	enable_irq(ci->irq);
111 }
112 
113 
114 /**
115  * ci_hdrc_otg_init - initialize otg struct
116  * ci: the controller
117  */
118 int ci_hdrc_otg_init(struct ci_hdrc *ci)
119 {
120 	INIT_WORK(&ci->work, ci_otg_work);
121 	ci->wq = create_singlethread_workqueue("ci_otg");
122 	if (!ci->wq) {
123 		dev_err(ci->dev, "can't create workqueue\n");
124 		return -ENODEV;
125 	}
126 
127 	if (ci_otg_is_fsm_mode(ci))
128 		return ci_hdrc_otg_fsm_init(ci);
129 
130 	return 0;
131 }
132 
133 /**
134  * ci_hdrc_otg_destroy - destroy otg struct
135  * ci: the controller
136  */
137 void ci_hdrc_otg_destroy(struct ci_hdrc *ci)
138 {
139 	if (ci->wq) {
140 		flush_workqueue(ci->wq);
141 		destroy_workqueue(ci->wq);
142 	}
143 	/* Disable all OTG irq and clear status */
144 	hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
145 						OTGSC_INT_STATUS_BITS);
146 	if (ci_otg_is_fsm_mode(ci))
147 		ci_hdrc_otg_fsm_remove(ci);
148 }
149