1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Cadence CDNSP DRD Driver. 4 * 5 * Copyright (C) 2020 Cadence. 6 * 7 * Author: Pawel Laszczak <pawell@cadence.com> 8 * 9 * Code based on Linux XHCI driver. 10 * Origin: Copyright (C) 2008 Intel Corp 11 */ 12 13 /* 14 * Ring initialization rules: 15 * 1. Each segment is initialized to zero, except for link TRBs. 16 * 2. Ring cycle state = 0. This represents Producer Cycle State (PCS) or 17 * Consumer Cycle State (CCS), depending on ring function. 18 * 3. Enqueue pointer = dequeue pointer = address of first TRB in the segment. 19 * 20 * Ring behavior rules: 21 * 1. A ring is empty if enqueue == dequeue. This means there will always be at 22 * least one free TRB in the ring. This is useful if you want to turn that 23 * into a link TRB and expand the ring. 24 * 2. When incrementing an enqueue or dequeue pointer, if the next TRB is a 25 * link TRB, then load the pointer with the address in the link TRB. If the 26 * link TRB had its toggle bit set, you may need to update the ring cycle 27 * state (see cycle bit rules). You may have to do this multiple times 28 * until you reach a non-link TRB. 29 * 3. A ring is full if enqueue++ (for the definition of increment above) 30 * equals the dequeue pointer. 31 * 32 * Cycle bit rules: 33 * 1. When a consumer increments a dequeue pointer and encounters a toggle bit 34 * in a link TRB, it must toggle the ring cycle state. 35 * 2. When a producer increments an enqueue pointer and encounters a toggle bit 36 * in a link TRB, it must toggle the ring cycle state. 37 * 38 * Producer rules: 39 * 1. Check if ring is full before you enqueue. 40 * 2. Write the ring cycle state to the cycle bit in the TRB you're enqueuing. 41 * Update enqueue pointer between each write (which may update the ring 42 * cycle state). 43 * 3. Notify consumer. If SW is producer, it rings the doorbell for command 44 * and endpoint rings. If controller is the producer for the event ring, 45 * and it generates an interrupt according to interrupt modulation rules. 46 * 47 * Consumer rules: 48 * 1. Check if TRB belongs to you. If the cycle bit == your ring cycle state, 49 * the TRB is owned by the consumer. 50 * 2. Update dequeue pointer (which may update the ring cycle state) and 51 * continue processing TRBs until you reach a TRB which is not owned by you. 52 * 3. Notify the producer. SW is the consumer for the event ring, and it 53 * updates event ring dequeue pointer. Controller is the consumer for the 54 * command and endpoint rings; it generates events on the event ring 55 * for these. 56 */ 57 58 #include <linux/scatterlist.h> 59 #include <linux/dma-mapping.h> 60 #include <linux/delay.h> 61 #include <linux/slab.h> 62 #include <linux/irq.h> 63 64 #include "cdnsp-trace.h" 65 #include "cdnsp-gadget.h" 66 67 /* 68 * Returns zero if the TRB isn't in this segment, otherwise it returns the DMA 69 * address of the TRB. 70 */ 71 dma_addr_t cdnsp_trb_virt_to_dma(struct cdnsp_segment *seg, 72 union cdnsp_trb *trb) 73 { 74 unsigned long segment_offset = trb - seg->trbs; 75 76 if (trb < seg->trbs || segment_offset >= TRBS_PER_SEGMENT) 77 return 0; 78 79 return seg->dma + (segment_offset * sizeof(*trb)); 80 } 81 82 static bool cdnsp_trb_is_noop(union cdnsp_trb *trb) 83 { 84 return TRB_TYPE_NOOP_LE32(trb->generic.field[3]); 85 } 86 87 static bool cdnsp_trb_is_link(union cdnsp_trb *trb) 88 { 89 return TRB_TYPE_LINK_LE32(trb->link.control); 90 } 91 92 bool cdnsp_last_trb_on_seg(struct cdnsp_segment *seg, union cdnsp_trb *trb) 93 { 94 return trb == &seg->trbs[TRBS_PER_SEGMENT - 1]; 95 } 96 97 bool cdnsp_last_trb_on_ring(struct cdnsp_ring *ring, 98 struct cdnsp_segment *seg, 99 union cdnsp_trb *trb) 100 { 101 return cdnsp_last_trb_on_seg(seg, trb) && (seg->next == ring->first_seg); 102 } 103 104 static bool cdnsp_link_trb_toggles_cycle(union cdnsp_trb *trb) 105 { 106 return le32_to_cpu(trb->link.control) & LINK_TOGGLE; 107 } 108 109 static void cdnsp_trb_to_noop(union cdnsp_trb *trb, u32 noop_type) 110 { 111 if (cdnsp_trb_is_link(trb)) { 112 /* Unchain chained link TRBs. */ 113 trb->link.control &= cpu_to_le32(~TRB_CHAIN); 114 } else { 115 trb->generic.field[0] = 0; 116 trb->generic.field[1] = 0; 117 trb->generic.field[2] = 0; 118 /* Preserve only the cycle bit of this TRB. */ 119 trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE); 120 trb->generic.field[3] |= cpu_to_le32(TRB_TYPE(noop_type)); 121 } 122 } 123 124 /* 125 * Updates trb to point to the next TRB in the ring, and updates seg if the next 126 * TRB is in a new segment. This does not skip over link TRBs, and it does not 127 * effect the ring dequeue or enqueue pointers. 128 */ 129 static void cdnsp_next_trb(struct cdnsp_device *pdev, 130 struct cdnsp_ring *ring, 131 struct cdnsp_segment **seg, 132 union cdnsp_trb **trb) 133 { 134 if (cdnsp_trb_is_link(*trb)) { 135 *seg = (*seg)->next; 136 *trb = ((*seg)->trbs); 137 } else { 138 (*trb)++; 139 } 140 } 141 142 /* 143 * See Cycle bit rules. SW is the consumer for the event ring only. 144 * Don't make a ring full of link TRBs. That would be dumb and this would loop. 145 */ 146 void cdnsp_inc_deq(struct cdnsp_device *pdev, struct cdnsp_ring *ring) 147 { 148 /* event ring doesn't have link trbs, check for last trb. */ 149 if (ring->type == TYPE_EVENT) { 150 if (!cdnsp_last_trb_on_seg(ring->deq_seg, ring->dequeue)) { 151 ring->dequeue++; 152 goto out; 153 } 154 155 if (cdnsp_last_trb_on_ring(ring, ring->deq_seg, ring->dequeue)) 156 ring->cycle_state ^= 1; 157 158 ring->deq_seg = ring->deq_seg->next; 159 ring->dequeue = ring->deq_seg->trbs; 160 goto out; 161 } 162 163 /* All other rings have link trbs. */ 164 if (!cdnsp_trb_is_link(ring->dequeue)) { 165 ring->dequeue++; 166 ring->num_trbs_free++; 167 } 168 while (cdnsp_trb_is_link(ring->dequeue)) { 169 ring->deq_seg = ring->deq_seg->next; 170 ring->dequeue = ring->deq_seg->trbs; 171 } 172 out: 173 trace_cdnsp_inc_deq(ring); 174 } 175 176 /* 177 * See Cycle bit rules. SW is the consumer for the event ring only. 178 * Don't make a ring full of link TRBs. That would be dumb and this would loop. 179 * 180 * If we've just enqueued a TRB that is in the middle of a TD (meaning the 181 * chain bit is set), then set the chain bit in all the following link TRBs. 182 * If we've enqueued the last TRB in a TD, make sure the following link TRBs 183 * have their chain bit cleared (so that each Link TRB is a separate TD). 184 * 185 * @more_trbs_coming: Will you enqueue more TRBs before ringing the doorbell. 186 */ 187 static void cdnsp_inc_enq(struct cdnsp_device *pdev, 188 struct cdnsp_ring *ring, 189 bool more_trbs_coming) 190 { 191 union cdnsp_trb *next; 192 u32 chain; 193 194 chain = le32_to_cpu(ring->enqueue->generic.field[3]) & TRB_CHAIN; 195 196 /* If this is not event ring, there is one less usable TRB. */ 197 if (!cdnsp_trb_is_link(ring->enqueue)) 198 ring->num_trbs_free--; 199 next = ++(ring->enqueue); 200 201 /* Update the dequeue pointer further if that was a link TRB */ 202 while (cdnsp_trb_is_link(next)) { 203 /* 204 * If the caller doesn't plan on enqueuing more TDs before 205 * ringing the doorbell, then we don't want to give the link TRB 206 * to the hardware just yet. We'll give the link TRB back in 207 * cdnsp_prepare_ring() just before we enqueue the TD at the 208 * top of the ring. 209 */ 210 if (!chain && !more_trbs_coming) 211 break; 212 213 next->link.control &= cpu_to_le32(~TRB_CHAIN); 214 next->link.control |= cpu_to_le32(chain); 215 216 /* Give this link TRB to the hardware */ 217 wmb(); 218 next->link.control ^= cpu_to_le32(TRB_CYCLE); 219 220 /* Toggle the cycle bit after the last ring segment. */ 221 if (cdnsp_link_trb_toggles_cycle(next)) 222 ring->cycle_state ^= 1; 223 224 ring->enq_seg = ring->enq_seg->next; 225 ring->enqueue = ring->enq_seg->trbs; 226 next = ring->enqueue; 227 } 228 229 trace_cdnsp_inc_enq(ring); 230 } 231 232 /* 233 * Check to see if there's room to enqueue num_trbs on the ring and make sure 234 * enqueue pointer will not advance into dequeue segment. 235 */ 236 static bool cdnsp_room_on_ring(struct cdnsp_device *pdev, 237 struct cdnsp_ring *ring, 238 unsigned int num_trbs) 239 { 240 int num_trbs_in_deq_seg; 241 242 if (ring->num_trbs_free < num_trbs) 243 return false; 244 245 if (ring->type != TYPE_COMMAND && ring->type != TYPE_EVENT) { 246 num_trbs_in_deq_seg = ring->dequeue - ring->deq_seg->trbs; 247 248 if (ring->num_trbs_free < num_trbs + num_trbs_in_deq_seg) 249 return false; 250 } 251 252 return true; 253 } 254 255 /* 256 * Workaround for L1: controller has issue with resuming from L1 after 257 * setting doorbell for endpoint during L1 state. This function forces 258 * resume signal in such case. 259 */ 260 static void cdnsp_force_l0_go(struct cdnsp_device *pdev) 261 { 262 if (pdev->active_port == &pdev->usb2_port && pdev->gadget.lpm_capable) 263 cdnsp_set_link_state(pdev, &pdev->active_port->regs->portsc, XDEV_U0); 264 } 265 266 /* Ring the doorbell after placing a command on the ring. */ 267 void cdnsp_ring_cmd_db(struct cdnsp_device *pdev) 268 { 269 writel(DB_VALUE_CMD, &pdev->dba->cmd_db); 270 } 271 272 /* 273 * Ring the doorbell after placing a transfer on the ring. 274 * Returns true if doorbell was set, otherwise false. 275 */ 276 static bool cdnsp_ring_ep_doorbell(struct cdnsp_device *pdev, 277 struct cdnsp_ep *pep, 278 unsigned int stream_id) 279 { 280 __le32 __iomem *reg_addr = &pdev->dba->ep_db; 281 unsigned int ep_state = pep->ep_state; 282 unsigned int db_value; 283 284 /* 285 * Don't ring the doorbell for this endpoint if endpoint is halted or 286 * disabled. 287 */ 288 if (ep_state & EP_HALTED || !(ep_state & EP_ENABLED)) 289 return false; 290 291 /* For stream capable endpoints driver can ring doorbell only twice. */ 292 if (pep->ep_state & EP_HAS_STREAMS) { 293 if (pep->stream_info.drbls_count >= 2) 294 return false; 295 296 pep->stream_info.drbls_count++; 297 } 298 299 pep->ep_state &= ~EP_STOPPED; 300 301 if (pep->idx == 0 && pdev->ep0_stage == CDNSP_DATA_STAGE && 302 !pdev->ep0_expect_in) 303 db_value = DB_VALUE_EP0_OUT(pep->idx, stream_id); 304 else 305 db_value = DB_VALUE(pep->idx, stream_id); 306 307 trace_cdnsp_tr_drbl(pep, stream_id); 308 309 writel(db_value, reg_addr); 310 311 if (pdev->rtl_revision < RTL_REVISION_NEW_LPM) 312 cdnsp_force_l0_go(pdev); 313 314 /* Doorbell was set. */ 315 return true; 316 } 317 318 /* 319 * Get the right ring for the given pep and stream_id. 320 * If the endpoint supports streams, boundary check the USB request's stream ID. 321 * If the endpoint doesn't support streams, return the singular endpoint ring. 322 */ 323 static struct cdnsp_ring *cdnsp_get_transfer_ring(struct cdnsp_device *pdev, 324 struct cdnsp_ep *pep, 325 unsigned int stream_id) 326 { 327 if (!(pep->ep_state & EP_HAS_STREAMS)) 328 return pep->ring; 329 330 if (stream_id == 0 || stream_id >= pep->stream_info.num_streams) { 331 dev_err(pdev->dev, "ERR: %s ring doesn't exist for SID: %d.\n", 332 pep->name, stream_id); 333 return NULL; 334 } 335 336 return pep->stream_info.stream_rings[stream_id]; 337 } 338 339 static struct cdnsp_ring * 340 cdnsp_request_to_transfer_ring(struct cdnsp_device *pdev, 341 struct cdnsp_request *preq) 342 { 343 return cdnsp_get_transfer_ring(pdev, preq->pep, 344 preq->request.stream_id); 345 } 346 347 /* Ring the doorbell for any rings with pending requests. */ 348 void cdnsp_ring_doorbell_for_active_rings(struct cdnsp_device *pdev, 349 struct cdnsp_ep *pep) 350 { 351 struct cdnsp_stream_info *stream_info; 352 unsigned int stream_id; 353 int ret; 354 355 if (pep->ep_state & EP_DIS_IN_RROGRESS) 356 return; 357 358 /* A ring has pending Request if its TD list is not empty. */ 359 if (!(pep->ep_state & EP_HAS_STREAMS) && pep->number) { 360 if (pep->ring && !list_empty(&pep->ring->td_list)) 361 cdnsp_ring_ep_doorbell(pdev, pep, 0); 362 return; 363 } 364 365 stream_info = &pep->stream_info; 366 367 for (stream_id = 1; stream_id < stream_info->num_streams; stream_id++) { 368 struct cdnsp_td *td, *td_temp; 369 struct cdnsp_ring *ep_ring; 370 371 if (stream_info->drbls_count >= 2) 372 return; 373 374 ep_ring = cdnsp_get_transfer_ring(pdev, pep, stream_id); 375 if (!ep_ring) 376 continue; 377 378 if (!ep_ring->stream_active || ep_ring->stream_rejected) 379 continue; 380 381 list_for_each_entry_safe(td, td_temp, &ep_ring->td_list, 382 td_list) { 383 if (td->drbl) 384 continue; 385 386 ret = cdnsp_ring_ep_doorbell(pdev, pep, stream_id); 387 if (ret) 388 td->drbl = 1; 389 } 390 } 391 } 392 393 /* 394 * Get the hw dequeue pointer controller stopped on, either directly from the 395 * endpoint context, or if streams are in use from the stream context. 396 * The returned hw_dequeue contains the lowest four bits with cycle state 397 * and possible stream context type. 398 */ 399 static u64 cdnsp_get_hw_deq(struct cdnsp_device *pdev, 400 unsigned int ep_index, 401 unsigned int stream_id) 402 { 403 struct cdnsp_stream_ctx *st_ctx; 404 struct cdnsp_ep *pep; 405 406 pep = &pdev->eps[ep_index]; 407 408 if (pep->ep_state & EP_HAS_STREAMS) { 409 st_ctx = &pep->stream_info.stream_ctx_array[stream_id]; 410 return le64_to_cpu(st_ctx->stream_ring); 411 } 412 413 return le64_to_cpu(pep->out_ctx->deq); 414 } 415 416 /* 417 * Move the controller endpoint ring dequeue pointer past cur_td. 418 * Record the new state of the controller endpoint ring dequeue segment, 419 * dequeue pointer, and new consumer cycle state in state. 420 * Update internal representation of the ring's dequeue pointer. 421 * 422 * We do this in three jumps: 423 * - First we update our new ring state to be the same as when the 424 * controller stopped. 425 * - Then we traverse the ring to find the segment that contains 426 * the last TRB in the TD. We toggle the controller new cycle state 427 * when we pass any link TRBs with the toggle cycle bit set. 428 * - Finally we move the dequeue state one TRB further, toggling the cycle bit 429 * if we've moved it past a link TRB with the toggle cycle bit set. 430 */ 431 static void cdnsp_find_new_dequeue_state(struct cdnsp_device *pdev, 432 struct cdnsp_ep *pep, 433 unsigned int stream_id, 434 struct cdnsp_td *cur_td, 435 struct cdnsp_dequeue_state *state) 436 { 437 bool td_last_trb_found = false; 438 struct cdnsp_segment *new_seg; 439 struct cdnsp_ring *ep_ring; 440 union cdnsp_trb *new_deq; 441 bool cycle_found = false; 442 u64 hw_dequeue; 443 444 ep_ring = cdnsp_get_transfer_ring(pdev, pep, stream_id); 445 if (!ep_ring) 446 return; 447 448 /* 449 * Dig out the cycle state saved by the controller during the 450 * stop endpoint command. 451 */ 452 hw_dequeue = cdnsp_get_hw_deq(pdev, pep->idx, stream_id); 453 new_seg = ep_ring->deq_seg; 454 new_deq = ep_ring->dequeue; 455 state->new_cycle_state = hw_dequeue & 0x1; 456 state->stream_id = stream_id; 457 458 /* 459 * We want to find the pointer, segment and cycle state of the new trb 460 * (the one after current TD's last_trb). We know the cycle state at 461 * hw_dequeue, so walk the ring until both hw_dequeue and last_trb are 462 * found. 463 */ 464 do { 465 if (!cycle_found && cdnsp_trb_virt_to_dma(new_seg, new_deq) 466 == (dma_addr_t)(hw_dequeue & ~0xf)) { 467 cycle_found = true; 468 469 if (td_last_trb_found) 470 break; 471 } 472 473 if (new_deq == cur_td->last_trb) 474 td_last_trb_found = true; 475 476 if (cycle_found && cdnsp_trb_is_link(new_deq) && 477 cdnsp_link_trb_toggles_cycle(new_deq)) 478 state->new_cycle_state ^= 0x1; 479 480 cdnsp_next_trb(pdev, ep_ring, &new_seg, &new_deq); 481 482 /* Search wrapped around, bail out. */ 483 if (new_deq == pep->ring->dequeue) { 484 dev_err(pdev->dev, 485 "Error: Failed finding new dequeue state\n"); 486 state->new_deq_seg = NULL; 487 state->new_deq_ptr = NULL; 488 return; 489 } 490 491 } while (!cycle_found || !td_last_trb_found); 492 493 state->new_deq_seg = new_seg; 494 state->new_deq_ptr = new_deq; 495 496 trace_cdnsp_new_deq_state(state); 497 } 498 499 /* 500 * flip_cycle means flip the cycle bit of all but the first and last TRB. 501 * (The last TRB actually points to the ring enqueue pointer, which is not part 502 * of this TD.) This is used to remove partially enqueued isoc TDs from a ring. 503 */ 504 static void cdnsp_td_to_noop(struct cdnsp_device *pdev, 505 struct cdnsp_ring *ep_ring, 506 struct cdnsp_td *td, 507 bool flip_cycle) 508 { 509 struct cdnsp_segment *seg = td->start_seg; 510 union cdnsp_trb *trb = td->first_trb; 511 512 while (1) { 513 cdnsp_trb_to_noop(trb, TRB_TR_NOOP); 514 515 /* flip cycle if asked to */ 516 if (flip_cycle && trb != td->first_trb && trb != td->last_trb) 517 trb->generic.field[3] ^= cpu_to_le32(TRB_CYCLE); 518 519 if (trb == td->last_trb) 520 break; 521 522 cdnsp_next_trb(pdev, ep_ring, &seg, &trb); 523 } 524 } 525 526 /* 527 * This TD is defined by the TRBs starting at start_trb in start_seg and ending 528 * at end_trb, which may be in another segment. If the suspect DMA address is a 529 * TRB in this TD, this function returns that TRB's segment. Otherwise it 530 * returns 0. 531 */ 532 static struct cdnsp_segment *cdnsp_trb_in_td(struct cdnsp_device *pdev, 533 struct cdnsp_segment *start_seg, 534 union cdnsp_trb *start_trb, 535 union cdnsp_trb *end_trb, 536 dma_addr_t suspect_dma) 537 { 538 struct cdnsp_segment *cur_seg; 539 union cdnsp_trb *temp_trb; 540 dma_addr_t end_seg_dma; 541 dma_addr_t end_trb_dma; 542 dma_addr_t start_dma; 543 544 start_dma = cdnsp_trb_virt_to_dma(start_seg, start_trb); 545 cur_seg = start_seg; 546 547 do { 548 if (start_dma == 0) 549 return NULL; 550 551 temp_trb = &cur_seg->trbs[TRBS_PER_SEGMENT - 1]; 552 /* We may get an event for a Link TRB in the middle of a TD */ 553 end_seg_dma = cdnsp_trb_virt_to_dma(cur_seg, temp_trb); 554 /* If the end TRB isn't in this segment, this is set to 0 */ 555 end_trb_dma = cdnsp_trb_virt_to_dma(cur_seg, end_trb); 556 557 trace_cdnsp_looking_trb_in_td(suspect_dma, start_dma, 558 end_trb_dma, cur_seg->dma, 559 end_seg_dma); 560 561 if (end_trb_dma > 0) { 562 /* 563 * The end TRB is in this segment, so suspect should 564 * be here 565 */ 566 if (start_dma <= end_trb_dma) { 567 if (suspect_dma >= start_dma && 568 suspect_dma <= end_trb_dma) { 569 return cur_seg; 570 } 571 } else { 572 /* 573 * Case for one segment with a 574 * TD wrapped around to the top 575 */ 576 if ((suspect_dma >= start_dma && 577 suspect_dma <= end_seg_dma) || 578 (suspect_dma >= cur_seg->dma && 579 suspect_dma <= end_trb_dma)) { 580 return cur_seg; 581 } 582 } 583 584 return NULL; 585 } 586 587 /* Might still be somewhere in this segment */ 588 if (suspect_dma >= start_dma && suspect_dma <= end_seg_dma) 589 return cur_seg; 590 591 cur_seg = cur_seg->next; 592 start_dma = cdnsp_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]); 593 } while (cur_seg != start_seg); 594 595 return NULL; 596 } 597 598 static void cdnsp_unmap_td_bounce_buffer(struct cdnsp_device *pdev, 599 struct cdnsp_ring *ring, 600 struct cdnsp_td *td) 601 { 602 struct cdnsp_segment *seg = td->bounce_seg; 603 struct cdnsp_request *preq; 604 size_t len; 605 606 if (!seg) 607 return; 608 609 preq = td->preq; 610 611 trace_cdnsp_bounce_unmap(td->preq, seg->bounce_len, seg->bounce_offs, 612 seg->bounce_dma, 0); 613 614 if (!preq->direction) { 615 dma_unmap_single(pdev->dev, seg->bounce_dma, 616 ring->bounce_buf_len, DMA_TO_DEVICE); 617 return; 618 } 619 620 dma_unmap_single(pdev->dev, seg->bounce_dma, ring->bounce_buf_len, 621 DMA_FROM_DEVICE); 622 623 /* For in transfers we need to copy the data from bounce to sg */ 624 len = sg_pcopy_from_buffer(preq->request.sg, preq->request.num_sgs, 625 seg->bounce_buf, seg->bounce_len, 626 seg->bounce_offs); 627 if (len != seg->bounce_len) 628 dev_warn(pdev->dev, "WARN Wrong bounce buffer read length: %zu != %d\n", 629 len, seg->bounce_len); 630 631 seg->bounce_len = 0; 632 seg->bounce_offs = 0; 633 } 634 635 static int cdnsp_cmd_set_deq(struct cdnsp_device *pdev, 636 struct cdnsp_ep *pep, 637 struct cdnsp_dequeue_state *deq_state) 638 { 639 struct cdnsp_ring *ep_ring; 640 int ret; 641 642 if (!deq_state->new_deq_ptr || !deq_state->new_deq_seg) { 643 cdnsp_ring_doorbell_for_active_rings(pdev, pep); 644 return 0; 645 } 646 647 cdnsp_queue_new_dequeue_state(pdev, pep, deq_state); 648 cdnsp_ring_cmd_db(pdev); 649 ret = cdnsp_wait_for_cmd_compl(pdev); 650 651 trace_cdnsp_handle_cmd_set_deq(cdnsp_get_slot_ctx(&pdev->out_ctx)); 652 trace_cdnsp_handle_cmd_set_deq_ep(pep->out_ctx); 653 654 /* 655 * Update the ring's dequeue segment and dequeue pointer 656 * to reflect the new position. 657 */ 658 ep_ring = cdnsp_get_transfer_ring(pdev, pep, deq_state->stream_id); 659 660 if (cdnsp_trb_is_link(ep_ring->dequeue)) { 661 ep_ring->deq_seg = ep_ring->deq_seg->next; 662 ep_ring->dequeue = ep_ring->deq_seg->trbs; 663 } 664 665 while (ep_ring->dequeue != deq_state->new_deq_ptr) { 666 ep_ring->num_trbs_free++; 667 ep_ring->dequeue++; 668 669 if (cdnsp_trb_is_link(ep_ring->dequeue)) { 670 if (ep_ring->dequeue == deq_state->new_deq_ptr) 671 break; 672 673 ep_ring->deq_seg = ep_ring->deq_seg->next; 674 ep_ring->dequeue = ep_ring->deq_seg->trbs; 675 } 676 } 677 678 /* 679 * Probably there was TIMEOUT during handling Set Dequeue Pointer 680 * command. It's critical error and controller will be stopped. 681 */ 682 if (ret) 683 return -ESHUTDOWN; 684 685 /* Restart any rings with pending requests */ 686 cdnsp_ring_doorbell_for_active_rings(pdev, pep); 687 688 return 0; 689 } 690 691 int cdnsp_remove_request(struct cdnsp_device *pdev, 692 struct cdnsp_request *preq, 693 struct cdnsp_ep *pep) 694 { 695 struct cdnsp_dequeue_state deq_state; 696 struct cdnsp_td *cur_td = NULL; 697 struct cdnsp_ring *ep_ring; 698 struct cdnsp_segment *seg; 699 int status = -ECONNRESET; 700 int ret = 0; 701 u64 hw_deq; 702 703 memset(&deq_state, 0, sizeof(deq_state)); 704 705 trace_cdnsp_remove_request(pep->out_ctx); 706 trace_cdnsp_remove_request_td(preq); 707 708 cur_td = &preq->td; 709 ep_ring = cdnsp_request_to_transfer_ring(pdev, preq); 710 711 /* 712 * If we stopped on the TD we need to cancel, then we have to 713 * move the controller endpoint ring dequeue pointer past 714 * this TD. 715 */ 716 hw_deq = cdnsp_get_hw_deq(pdev, pep->idx, preq->request.stream_id); 717 hw_deq &= ~0xf; 718 719 seg = cdnsp_trb_in_td(pdev, cur_td->start_seg, cur_td->first_trb, 720 cur_td->last_trb, hw_deq); 721 722 if (seg && (pep->ep_state & EP_ENABLED) && 723 !(pep->ep_state & EP_DIS_IN_RROGRESS)) 724 cdnsp_find_new_dequeue_state(pdev, pep, preq->request.stream_id, 725 cur_td, &deq_state); 726 else 727 cdnsp_td_to_noop(pdev, ep_ring, cur_td, false); 728 729 /* 730 * The event handler won't see a completion for this TD anymore, 731 * so remove it from the endpoint ring's TD list. 732 */ 733 list_del_init(&cur_td->td_list); 734 ep_ring->num_tds--; 735 pep->stream_info.td_count--; 736 737 /* 738 * During disconnecting all endpoint will be disabled so we don't 739 * have to worry about updating dequeue pointer. 740 */ 741 if (pdev->cdnsp_state & CDNSP_STATE_DISCONNECT_PENDING || 742 pep->ep_state & EP_DIS_IN_RROGRESS) { 743 status = -ESHUTDOWN; 744 ret = cdnsp_cmd_set_deq(pdev, pep, &deq_state); 745 } 746 747 cdnsp_unmap_td_bounce_buffer(pdev, ep_ring, cur_td); 748 cdnsp_gadget_giveback(pep, cur_td->preq, status); 749 750 return ret; 751 } 752 753 static int cdnsp_update_port_id(struct cdnsp_device *pdev, u32 port_id) 754 { 755 struct cdnsp_port *port = pdev->active_port; 756 u8 old_port = 0; 757 758 if (port && port->port_num == port_id) 759 return 0; 760 761 if (port) 762 old_port = port->port_num; 763 764 if (port_id == pdev->usb2_port.port_num) { 765 port = &pdev->usb2_port; 766 } else if (port_id == pdev->usb3_port.port_num) { 767 port = &pdev->usb3_port; 768 } else { 769 dev_err(pdev->dev, "Port event with invalid port ID %d\n", 770 port_id); 771 return -EINVAL; 772 } 773 774 if (port_id != old_port) { 775 if (pdev->slot_id) 776 cdnsp_disable_slot(pdev); 777 778 pdev->active_port = port; 779 cdnsp_enable_slot(pdev); 780 } 781 782 if (port_id == pdev->usb2_port.port_num) 783 cdnsp_set_usb2_hardware_lpm(pdev, NULL, 1); 784 else 785 writel(PORT_U1_TIMEOUT(1) | PORT_U2_TIMEOUT(1), 786 &pdev->usb3_port.regs->portpmsc); 787 788 return 0; 789 } 790 791 static void cdnsp_handle_port_status(struct cdnsp_device *pdev, 792 union cdnsp_trb *event) 793 { 794 struct cdnsp_port_regs __iomem *port_regs; 795 u32 portsc, cmd_regs; 796 bool port2 = false; 797 u32 link_state; 798 u32 port_id; 799 800 /* Port status change events always have a successful completion code */ 801 if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS) 802 dev_err(pdev->dev, "ERR: incorrect PSC event\n"); 803 804 port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0])); 805 806 if (cdnsp_update_port_id(pdev, port_id)) 807 goto cleanup; 808 809 port_regs = pdev->active_port->regs; 810 811 if (port_id == pdev->usb2_port.port_num) 812 port2 = true; 813 814 new_event: 815 portsc = readl(&port_regs->portsc); 816 writel(cdnsp_port_state_to_neutral(portsc) | 817 (portsc & PORT_CHANGE_BITS), &port_regs->portsc); 818 819 trace_cdnsp_handle_port_status(pdev->active_port->port_num, portsc); 820 821 pdev->gadget.speed = cdnsp_port_speed(portsc); 822 link_state = portsc & PORT_PLS_MASK; 823 824 /* Port Link State change detected. */ 825 if ((portsc & PORT_PLC)) { 826 if (!(pdev->cdnsp_state & CDNSP_WAKEUP_PENDING) && 827 link_state == XDEV_RESUME) { 828 cmd_regs = readl(&pdev->op_regs->command); 829 if (!(cmd_regs & CMD_R_S)) 830 goto cleanup; 831 832 if (DEV_SUPERSPEED_ANY(portsc)) { 833 cdnsp_set_link_state(pdev, &port_regs->portsc, 834 XDEV_U0); 835 836 cdnsp_resume_gadget(pdev); 837 } 838 } 839 840 if ((pdev->cdnsp_state & CDNSP_WAKEUP_PENDING) && 841 link_state == XDEV_U0) { 842 pdev->cdnsp_state &= ~CDNSP_WAKEUP_PENDING; 843 844 cdnsp_force_header_wakeup(pdev, 1); 845 cdnsp_ring_cmd_db(pdev); 846 cdnsp_wait_for_cmd_compl(pdev); 847 } 848 849 if (link_state == XDEV_U0 && pdev->link_state == XDEV_U3 && 850 !DEV_SUPERSPEED_ANY(portsc)) 851 cdnsp_resume_gadget(pdev); 852 853 if (link_state == XDEV_U3 && pdev->link_state != XDEV_U3) 854 cdnsp_suspend_gadget(pdev); 855 856 pdev->link_state = link_state; 857 } 858 859 if (portsc & PORT_CSC) { 860 /* Detach device. */ 861 if (pdev->gadget.connected && !(portsc & PORT_CONNECT)) 862 cdnsp_disconnect_gadget(pdev); 863 864 /* Attach device. */ 865 if (portsc & PORT_CONNECT) { 866 if (!port2) 867 cdnsp_irq_reset(pdev); 868 869 usb_gadget_set_state(&pdev->gadget, USB_STATE_ATTACHED); 870 } 871 } 872 873 /* Port reset. */ 874 if ((portsc & (PORT_RC | PORT_WRC)) && (portsc & PORT_CONNECT)) { 875 cdnsp_irq_reset(pdev); 876 pdev->u1_allowed = 0; 877 pdev->u2_allowed = 0; 878 pdev->may_wakeup = 0; 879 } 880 881 if (portsc & PORT_CEC) 882 dev_err(pdev->dev, "Port Over Current detected\n"); 883 884 if (portsc & PORT_CEC) 885 dev_err(pdev->dev, "Port Configure Error detected\n"); 886 887 if (readl(&port_regs->portsc) & PORT_CHANGE_BITS) 888 goto new_event; 889 890 cleanup: 891 cdnsp_inc_deq(pdev, pdev->event_ring); 892 } 893 894 static void cdnsp_td_cleanup(struct cdnsp_device *pdev, 895 struct cdnsp_td *td, 896 struct cdnsp_ring *ep_ring, 897 int *status) 898 { 899 struct cdnsp_request *preq = td->preq; 900 901 /* if a bounce buffer was used to align this td then unmap it */ 902 cdnsp_unmap_td_bounce_buffer(pdev, ep_ring, td); 903 904 /* 905 * If the controller said we transferred more data than the buffer 906 * length, Play it safe and say we didn't transfer anything. 907 */ 908 if (preq->request.actual > preq->request.length) { 909 preq->request.actual = 0; 910 *status = 0; 911 } 912 913 list_del_init(&td->td_list); 914 ep_ring->num_tds--; 915 preq->pep->stream_info.td_count--; 916 917 cdnsp_gadget_giveback(preq->pep, preq, *status); 918 } 919 920 static void cdnsp_finish_td(struct cdnsp_device *pdev, 921 struct cdnsp_td *td, 922 struct cdnsp_transfer_event *event, 923 struct cdnsp_ep *ep, 924 int *status) 925 { 926 struct cdnsp_ring *ep_ring; 927 u32 trb_comp_code; 928 929 ep_ring = cdnsp_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer)); 930 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); 931 932 if (trb_comp_code == COMP_STOPPED_LENGTH_INVALID || 933 trb_comp_code == COMP_STOPPED || 934 trb_comp_code == COMP_STOPPED_SHORT_PACKET) { 935 /* 936 * The Endpoint Stop Command completion will take care of any 937 * stopped TDs. A stopped TD may be restarted, so don't update 938 * the ring dequeue pointer or take this TD off any lists yet. 939 */ 940 return; 941 } 942 943 /* Update ring dequeue pointer */ 944 while (ep_ring->dequeue != td->last_trb) 945 cdnsp_inc_deq(pdev, ep_ring); 946 947 cdnsp_inc_deq(pdev, ep_ring); 948 949 cdnsp_td_cleanup(pdev, td, ep_ring, status); 950 } 951 952 /* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */ 953 static int cdnsp_sum_trb_lengths(struct cdnsp_device *pdev, 954 struct cdnsp_ring *ring, 955 union cdnsp_trb *stop_trb) 956 { 957 struct cdnsp_segment *seg = ring->deq_seg; 958 union cdnsp_trb *trb = ring->dequeue; 959 u32 sum; 960 961 for (sum = 0; trb != stop_trb; cdnsp_next_trb(pdev, ring, &seg, &trb)) { 962 if (!cdnsp_trb_is_noop(trb) && !cdnsp_trb_is_link(trb)) 963 sum += TRB_LEN(le32_to_cpu(trb->generic.field[2])); 964 } 965 return sum; 966 } 967 968 static int cdnsp_giveback_first_trb(struct cdnsp_device *pdev, 969 struct cdnsp_ep *pep, 970 unsigned int stream_id, 971 int start_cycle, 972 struct cdnsp_generic_trb *start_trb) 973 { 974 /* 975 * Pass all the TRBs to the hardware at once and make sure this write 976 * isn't reordered. 977 */ 978 wmb(); 979 980 if (start_cycle) 981 start_trb->field[3] |= cpu_to_le32(start_cycle); 982 else 983 start_trb->field[3] &= cpu_to_le32(~TRB_CYCLE); 984 985 if ((pep->ep_state & EP_HAS_STREAMS) && 986 !pep->stream_info.first_prime_det) { 987 trace_cdnsp_wait_for_prime(pep, stream_id); 988 return 0; 989 } 990 991 return cdnsp_ring_ep_doorbell(pdev, pep, stream_id); 992 } 993 994 /* 995 * Process control tds, update USB request status and actual_length. 996 */ 997 static void cdnsp_process_ctrl_td(struct cdnsp_device *pdev, 998 struct cdnsp_td *td, 999 union cdnsp_trb *event_trb, 1000 struct cdnsp_transfer_event *event, 1001 struct cdnsp_ep *pep, 1002 int *status) 1003 { 1004 struct cdnsp_ring *ep_ring; 1005 u32 remaining; 1006 u32 trb_type; 1007 1008 trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(event_trb->generic.field[3])); 1009 ep_ring = cdnsp_dma_to_transfer_ring(pep, le64_to_cpu(event->buffer)); 1010 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); 1011 1012 /* 1013 * if on data stage then update the actual_length of the USB 1014 * request and flag it as set, so it won't be overwritten in the event 1015 * for the last TRB. 1016 */ 1017 if (trb_type == TRB_DATA) { 1018 td->request_length_set = true; 1019 td->preq->request.actual = td->preq->request.length - remaining; 1020 } 1021 1022 /* at status stage */ 1023 if (!td->request_length_set) 1024 td->preq->request.actual = td->preq->request.length; 1025 1026 if (pdev->ep0_stage == CDNSP_DATA_STAGE && pep->number == 0 && 1027 pdev->three_stage_setup) { 1028 td = list_entry(ep_ring->td_list.next, struct cdnsp_td, 1029 td_list); 1030 pdev->ep0_stage = CDNSP_STATUS_STAGE; 1031 1032 cdnsp_giveback_first_trb(pdev, pep, 0, ep_ring->cycle_state, 1033 &td->last_trb->generic); 1034 return; 1035 } 1036 1037 *status = 0; 1038 1039 cdnsp_finish_td(pdev, td, event, pep, status); 1040 } 1041 1042 /* 1043 * Process isochronous tds, update usb request status and actual_length. 1044 */ 1045 static void cdnsp_process_isoc_td(struct cdnsp_device *pdev, 1046 struct cdnsp_td *td, 1047 union cdnsp_trb *ep_trb, 1048 struct cdnsp_transfer_event *event, 1049 struct cdnsp_ep *pep, 1050 int status) 1051 { 1052 struct cdnsp_request *preq = td->preq; 1053 u32 remaining, requested, ep_trb_len; 1054 bool sum_trbs_for_length = false; 1055 struct cdnsp_ring *ep_ring; 1056 u32 trb_comp_code; 1057 u32 td_length; 1058 1059 ep_ring = cdnsp_dma_to_transfer_ring(pep, le64_to_cpu(event->buffer)); 1060 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); 1061 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); 1062 ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2])); 1063 1064 requested = preq->request.length; 1065 1066 /* handle completion code */ 1067 switch (trb_comp_code) { 1068 case COMP_SUCCESS: 1069 preq->request.status = 0; 1070 break; 1071 case COMP_SHORT_PACKET: 1072 preq->request.status = 0; 1073 sum_trbs_for_length = true; 1074 break; 1075 case COMP_ISOCH_BUFFER_OVERRUN: 1076 case COMP_BABBLE_DETECTED_ERROR: 1077 preq->request.status = -EOVERFLOW; 1078 break; 1079 case COMP_STOPPED: 1080 sum_trbs_for_length = true; 1081 break; 1082 case COMP_STOPPED_SHORT_PACKET: 1083 /* field normally containing residue now contains transferred */ 1084 preq->request.status = 0; 1085 requested = remaining; 1086 break; 1087 case COMP_STOPPED_LENGTH_INVALID: 1088 requested = 0; 1089 remaining = 0; 1090 break; 1091 default: 1092 sum_trbs_for_length = true; 1093 preq->request.status = -1; 1094 break; 1095 } 1096 1097 if (sum_trbs_for_length) { 1098 td_length = cdnsp_sum_trb_lengths(pdev, ep_ring, ep_trb); 1099 td_length += ep_trb_len - remaining; 1100 } else { 1101 td_length = requested; 1102 } 1103 1104 td->preq->request.actual += td_length; 1105 1106 cdnsp_finish_td(pdev, td, event, pep, &status); 1107 } 1108 1109 static void cdnsp_skip_isoc_td(struct cdnsp_device *pdev, 1110 struct cdnsp_td *td, 1111 struct cdnsp_transfer_event *event, 1112 struct cdnsp_ep *pep, 1113 int status) 1114 { 1115 struct cdnsp_ring *ep_ring; 1116 1117 ep_ring = cdnsp_dma_to_transfer_ring(pep, le64_to_cpu(event->buffer)); 1118 td->preq->request.status = -EXDEV; 1119 td->preq->request.actual = 0; 1120 1121 /* Update ring dequeue pointer */ 1122 while (ep_ring->dequeue != td->last_trb) 1123 cdnsp_inc_deq(pdev, ep_ring); 1124 1125 cdnsp_inc_deq(pdev, ep_ring); 1126 1127 cdnsp_td_cleanup(pdev, td, ep_ring, &status); 1128 } 1129 1130 /* 1131 * Process bulk and interrupt tds, update usb request status and actual_length. 1132 */ 1133 static void cdnsp_process_bulk_intr_td(struct cdnsp_device *pdev, 1134 struct cdnsp_td *td, 1135 union cdnsp_trb *ep_trb, 1136 struct cdnsp_transfer_event *event, 1137 struct cdnsp_ep *ep, 1138 int *status) 1139 { 1140 u32 remaining, requested, ep_trb_len; 1141 struct cdnsp_ring *ep_ring; 1142 u32 trb_comp_code; 1143 1144 ep_ring = cdnsp_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer)); 1145 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); 1146 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); 1147 ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2])); 1148 requested = td->preq->request.length; 1149 1150 switch (trb_comp_code) { 1151 case COMP_SUCCESS: 1152 case COMP_SHORT_PACKET: 1153 *status = 0; 1154 break; 1155 case COMP_STOPPED_SHORT_PACKET: 1156 td->preq->request.actual = remaining; 1157 goto finish_td; 1158 case COMP_STOPPED_LENGTH_INVALID: 1159 /* Stopped on ep trb with invalid length, exclude it. */ 1160 ep_trb_len = 0; 1161 remaining = 0; 1162 break; 1163 } 1164 1165 if (ep_trb == td->last_trb) 1166 ep_trb_len = requested - remaining; 1167 else 1168 ep_trb_len = cdnsp_sum_trb_lengths(pdev, ep_ring, ep_trb) + 1169 ep_trb_len - remaining; 1170 td->preq->request.actual = ep_trb_len; 1171 1172 finish_td: 1173 ep->stream_info.drbls_count--; 1174 1175 cdnsp_finish_td(pdev, td, event, ep, status); 1176 } 1177 1178 static void cdnsp_handle_tx_nrdy(struct cdnsp_device *pdev, 1179 struct cdnsp_transfer_event *event) 1180 { 1181 struct cdnsp_generic_trb *generic; 1182 struct cdnsp_ring *ep_ring; 1183 struct cdnsp_ep *pep; 1184 int cur_stream; 1185 int ep_index; 1186 int host_sid; 1187 int dev_sid; 1188 1189 generic = (struct cdnsp_generic_trb *)event; 1190 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1; 1191 dev_sid = TRB_TO_DEV_STREAM(le32_to_cpu(generic->field[0])); 1192 host_sid = TRB_TO_HOST_STREAM(le32_to_cpu(generic->field[2])); 1193 1194 pep = &pdev->eps[ep_index]; 1195 1196 if (!(pep->ep_state & EP_HAS_STREAMS)) 1197 return; 1198 1199 if (host_sid == STREAM_PRIME_ACK) { 1200 pep->stream_info.first_prime_det = 1; 1201 for (cur_stream = 1; cur_stream < pep->stream_info.num_streams; 1202 cur_stream++) { 1203 ep_ring = pep->stream_info.stream_rings[cur_stream]; 1204 ep_ring->stream_active = 1; 1205 ep_ring->stream_rejected = 0; 1206 } 1207 } 1208 1209 if (host_sid == STREAM_REJECTED) { 1210 struct cdnsp_td *td, *td_temp; 1211 1212 pep->stream_info.drbls_count--; 1213 ep_ring = pep->stream_info.stream_rings[dev_sid]; 1214 ep_ring->stream_active = 0; 1215 ep_ring->stream_rejected = 1; 1216 1217 list_for_each_entry_safe(td, td_temp, &ep_ring->td_list, 1218 td_list) { 1219 td->drbl = 0; 1220 } 1221 } 1222 1223 cdnsp_ring_doorbell_for_active_rings(pdev, pep); 1224 } 1225 1226 /* 1227 * If this function returns an error condition, it means it got a Transfer 1228 * event with a corrupted TRB DMA address or endpoint is disabled. 1229 */ 1230 static int cdnsp_handle_tx_event(struct cdnsp_device *pdev, 1231 struct cdnsp_transfer_event *event) 1232 { 1233 const struct usb_endpoint_descriptor *desc; 1234 bool handling_skipped_tds = false; 1235 struct cdnsp_segment *ep_seg; 1236 struct cdnsp_ring *ep_ring; 1237 int status = -EINPROGRESS; 1238 union cdnsp_trb *ep_trb; 1239 dma_addr_t ep_trb_dma; 1240 struct cdnsp_ep *pep; 1241 struct cdnsp_td *td; 1242 u32 trb_comp_code; 1243 int invalidate; 1244 int ep_index; 1245 1246 invalidate = le32_to_cpu(event->flags) & TRB_EVENT_INVALIDATE; 1247 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1; 1248 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); 1249 ep_trb_dma = le64_to_cpu(event->buffer); 1250 1251 pep = &pdev->eps[ep_index]; 1252 ep_ring = cdnsp_dma_to_transfer_ring(pep, le64_to_cpu(event->buffer)); 1253 1254 /* 1255 * If device is disconnect then all requests will be dequeued 1256 * by upper layers as part of disconnect sequence. 1257 * We don't want handle such event to avoid racing. 1258 */ 1259 if (invalidate || !pdev->gadget.connected) 1260 goto cleanup; 1261 1262 if (GET_EP_CTX_STATE(pep->out_ctx) == EP_STATE_DISABLED) { 1263 trace_cdnsp_ep_disabled(pep->out_ctx); 1264 goto err_out; 1265 } 1266 1267 /* Some transfer events don't always point to a trb*/ 1268 if (!ep_ring) { 1269 switch (trb_comp_code) { 1270 case COMP_INVALID_STREAM_TYPE_ERROR: 1271 case COMP_INVALID_STREAM_ID_ERROR: 1272 case COMP_RING_UNDERRUN: 1273 case COMP_RING_OVERRUN: 1274 goto cleanup; 1275 default: 1276 dev_err(pdev->dev, "ERROR: %s event for unknown ring\n", 1277 pep->name); 1278 goto err_out; 1279 } 1280 } 1281 1282 /* Look for some error cases that need special treatment. */ 1283 switch (trb_comp_code) { 1284 case COMP_BABBLE_DETECTED_ERROR: 1285 status = -EOVERFLOW; 1286 break; 1287 case COMP_RING_UNDERRUN: 1288 case COMP_RING_OVERRUN: 1289 /* 1290 * When the Isoch ring is empty, the controller will generate 1291 * a Ring Overrun Event for IN Isoch endpoint or Ring 1292 * Underrun Event for OUT Isoch endpoint. 1293 */ 1294 goto cleanup; 1295 case COMP_MISSED_SERVICE_ERROR: 1296 /* 1297 * When encounter missed service error, one or more isoc tds 1298 * may be missed by controller. 1299 * Set skip flag of the ep_ring; Complete the missed tds as 1300 * short transfer when process the ep_ring next time. 1301 */ 1302 pep->skip = true; 1303 break; 1304 } 1305 1306 do { 1307 /* 1308 * This TRB should be in the TD at the head of this ring's TD 1309 * list. 1310 */ 1311 if (list_empty(&ep_ring->td_list)) { 1312 /* 1313 * Don't print warnings if it's due to a stopped 1314 * endpoint generating an extra completion event, or 1315 * a event for the last TRB of a short TD we already 1316 * got a short event for. 1317 * The short TD is already removed from the TD list. 1318 */ 1319 if (!(trb_comp_code == COMP_STOPPED || 1320 trb_comp_code == COMP_STOPPED_LENGTH_INVALID || 1321 ep_ring->last_td_was_short)) 1322 trace_cdnsp_trb_without_td(ep_ring, 1323 (struct cdnsp_generic_trb *)event); 1324 1325 if (pep->skip) { 1326 pep->skip = false; 1327 trace_cdnsp_ep_list_empty_with_skip(pep, 0); 1328 } 1329 1330 goto cleanup; 1331 } 1332 1333 td = list_entry(ep_ring->td_list.next, struct cdnsp_td, 1334 td_list); 1335 1336 /* Is this a TRB in the currently executing TD? */ 1337 ep_seg = cdnsp_trb_in_td(pdev, ep_ring->deq_seg, 1338 ep_ring->dequeue, td->last_trb, 1339 ep_trb_dma); 1340 1341 desc = td->preq->pep->endpoint.desc; 1342 1343 if (ep_seg) { 1344 ep_trb = &ep_seg->trbs[(ep_trb_dma - ep_seg->dma) 1345 / sizeof(*ep_trb)]; 1346 1347 trace_cdnsp_handle_transfer(ep_ring, 1348 (struct cdnsp_generic_trb *)ep_trb); 1349 1350 if (pep->skip && usb_endpoint_xfer_isoc(desc) && 1351 td->last_trb != ep_trb) 1352 return -EAGAIN; 1353 } 1354 1355 /* 1356 * Skip the Force Stopped Event. The event_trb(ep_trb_dma) 1357 * of FSE is not in the current TD pointed by ep_ring->dequeue 1358 * because that the hardware dequeue pointer still at the 1359 * previous TRB of the current TD. The previous TRB maybe a 1360 * Link TD or the last TRB of the previous TD. The command 1361 * completion handle will take care the rest. 1362 */ 1363 if (!ep_seg && (trb_comp_code == COMP_STOPPED || 1364 trb_comp_code == COMP_STOPPED_LENGTH_INVALID)) { 1365 pep->skip = false; 1366 goto cleanup; 1367 } 1368 1369 if (!ep_seg) { 1370 if (!pep->skip || !usb_endpoint_xfer_isoc(desc)) { 1371 /* Something is busted, give up! */ 1372 dev_err(pdev->dev, 1373 "ERROR Transfer event TRB DMA ptr not " 1374 "part of current TD ep_index %d " 1375 "comp_code %u\n", ep_index, 1376 trb_comp_code); 1377 return -EINVAL; 1378 } 1379 1380 cdnsp_skip_isoc_td(pdev, td, event, pep, status); 1381 goto cleanup; 1382 } 1383 1384 if (trb_comp_code == COMP_SHORT_PACKET) 1385 ep_ring->last_td_was_short = true; 1386 else 1387 ep_ring->last_td_was_short = false; 1388 1389 if (pep->skip) { 1390 pep->skip = false; 1391 cdnsp_skip_isoc_td(pdev, td, event, pep, status); 1392 goto cleanup; 1393 } 1394 1395 if (cdnsp_trb_is_noop(ep_trb)) 1396 goto cleanup; 1397 1398 if (usb_endpoint_xfer_control(desc)) 1399 cdnsp_process_ctrl_td(pdev, td, ep_trb, event, pep, 1400 &status); 1401 else if (usb_endpoint_xfer_isoc(desc)) 1402 cdnsp_process_isoc_td(pdev, td, ep_trb, event, pep, 1403 status); 1404 else 1405 cdnsp_process_bulk_intr_td(pdev, td, ep_trb, event, pep, 1406 &status); 1407 cleanup: 1408 handling_skipped_tds = pep->skip; 1409 1410 /* 1411 * Do not update event ring dequeue pointer if we're in a loop 1412 * processing missed tds. 1413 */ 1414 if (!handling_skipped_tds) 1415 cdnsp_inc_deq(pdev, pdev->event_ring); 1416 1417 /* 1418 * If ep->skip is set, it means there are missed tds on the 1419 * endpoint ring need to take care of. 1420 * Process them as short transfer until reach the td pointed by 1421 * the event. 1422 */ 1423 } while (handling_skipped_tds); 1424 return 0; 1425 1426 err_out: 1427 dev_err(pdev->dev, "@%016llx %08x %08x %08x %08x\n", 1428 (unsigned long long) 1429 cdnsp_trb_virt_to_dma(pdev->event_ring->deq_seg, 1430 pdev->event_ring->dequeue), 1431 lower_32_bits(le64_to_cpu(event->buffer)), 1432 upper_32_bits(le64_to_cpu(event->buffer)), 1433 le32_to_cpu(event->transfer_len), 1434 le32_to_cpu(event->flags)); 1435 return -EINVAL; 1436 } 1437 1438 /* 1439 * This function handles all events on the event ring. 1440 * Returns true for "possibly more events to process" (caller should call 1441 * again), otherwise false if done. 1442 */ 1443 static bool cdnsp_handle_event(struct cdnsp_device *pdev) 1444 { 1445 unsigned int comp_code; 1446 union cdnsp_trb *event; 1447 bool update_ptrs = true; 1448 u32 cycle_bit; 1449 int ret = 0; 1450 u32 flags; 1451 1452 event = pdev->event_ring->dequeue; 1453 flags = le32_to_cpu(event->event_cmd.flags); 1454 cycle_bit = (flags & TRB_CYCLE); 1455 1456 /* Does the controller or driver own the TRB? */ 1457 if (cycle_bit != pdev->event_ring->cycle_state) 1458 return false; 1459 1460 trace_cdnsp_handle_event(pdev->event_ring, &event->generic); 1461 1462 /* 1463 * Barrier between reading the TRB_CYCLE (valid) flag above and any 1464 * reads of the event's flags/data below. 1465 */ 1466 rmb(); 1467 1468 switch (flags & TRB_TYPE_BITMASK) { 1469 case TRB_TYPE(TRB_COMPLETION): 1470 /* 1471 * Command can't be handled in interrupt context so just 1472 * increment command ring dequeue pointer. 1473 */ 1474 cdnsp_inc_deq(pdev, pdev->cmd_ring); 1475 break; 1476 case TRB_TYPE(TRB_PORT_STATUS): 1477 cdnsp_handle_port_status(pdev, event); 1478 update_ptrs = false; 1479 break; 1480 case TRB_TYPE(TRB_TRANSFER): 1481 ret = cdnsp_handle_tx_event(pdev, &event->trans_event); 1482 if (ret >= 0) 1483 update_ptrs = false; 1484 break; 1485 case TRB_TYPE(TRB_SETUP): 1486 pdev->ep0_stage = CDNSP_SETUP_STAGE; 1487 pdev->setup_id = TRB_SETUPID_TO_TYPE(flags); 1488 pdev->setup_speed = TRB_SETUP_SPEEDID(flags); 1489 pdev->setup = *((struct usb_ctrlrequest *) 1490 &event->trans_event.buffer); 1491 1492 cdnsp_setup_analyze(pdev); 1493 break; 1494 case TRB_TYPE(TRB_ENDPOINT_NRDY): 1495 cdnsp_handle_tx_nrdy(pdev, &event->trans_event); 1496 break; 1497 case TRB_TYPE(TRB_HC_EVENT): { 1498 comp_code = GET_COMP_CODE(le32_to_cpu(event->generic.field[2])); 1499 1500 switch (comp_code) { 1501 case COMP_EVENT_RING_FULL_ERROR: 1502 dev_err(pdev->dev, "Event Ring Full\n"); 1503 break; 1504 default: 1505 dev_err(pdev->dev, "Controller error code 0x%02x\n", 1506 comp_code); 1507 } 1508 1509 break; 1510 } 1511 case TRB_TYPE(TRB_MFINDEX_WRAP): 1512 case TRB_TYPE(TRB_DRB_OVERFLOW): 1513 break; 1514 default: 1515 dev_warn(pdev->dev, "ERROR unknown event type %ld\n", 1516 TRB_FIELD_TO_TYPE(flags)); 1517 } 1518 1519 if (update_ptrs) 1520 /* Update SW event ring dequeue pointer. */ 1521 cdnsp_inc_deq(pdev, pdev->event_ring); 1522 1523 /* 1524 * Caller will call us again to check if there are more items 1525 * on the event ring. 1526 */ 1527 return true; 1528 } 1529 1530 irqreturn_t cdnsp_thread_irq_handler(int irq, void *data) 1531 { 1532 struct cdnsp_device *pdev = (struct cdnsp_device *)data; 1533 union cdnsp_trb *event_ring_deq; 1534 unsigned long flags; 1535 int counter = 0; 1536 1537 local_bh_disable(); 1538 spin_lock_irqsave(&pdev->lock, flags); 1539 1540 if (pdev->cdnsp_state & (CDNSP_STATE_HALTED | CDNSP_STATE_DYING)) { 1541 /* 1542 * While removing or stopping driver there may still be deferred 1543 * not handled interrupt which should not be treated as error. 1544 * Driver should simply ignore it. 1545 */ 1546 if (pdev->gadget_driver) 1547 cdnsp_died(pdev); 1548 1549 spin_unlock_irqrestore(&pdev->lock, flags); 1550 local_bh_enable(); 1551 return IRQ_HANDLED; 1552 } 1553 1554 event_ring_deq = pdev->event_ring->dequeue; 1555 1556 while (cdnsp_handle_event(pdev)) { 1557 if (++counter >= TRBS_PER_EV_DEQ_UPDATE) { 1558 cdnsp_update_erst_dequeue(pdev, event_ring_deq, 0); 1559 event_ring_deq = pdev->event_ring->dequeue; 1560 counter = 0; 1561 } 1562 } 1563 1564 cdnsp_update_erst_dequeue(pdev, event_ring_deq, 1); 1565 1566 spin_unlock_irqrestore(&pdev->lock, flags); 1567 local_bh_enable(); 1568 1569 return IRQ_HANDLED; 1570 } 1571 1572 irqreturn_t cdnsp_irq_handler(int irq, void *priv) 1573 { 1574 struct cdnsp_device *pdev = (struct cdnsp_device *)priv; 1575 u32 irq_pending; 1576 u32 status; 1577 1578 status = readl(&pdev->op_regs->status); 1579 1580 if (status == ~(u32)0) { 1581 cdnsp_died(pdev); 1582 return IRQ_HANDLED; 1583 } 1584 1585 if (!(status & STS_EINT)) 1586 return IRQ_NONE; 1587 1588 writel(status | STS_EINT, &pdev->op_regs->status); 1589 irq_pending = readl(&pdev->ir_set->irq_pending); 1590 irq_pending |= IMAN_IP; 1591 writel(irq_pending, &pdev->ir_set->irq_pending); 1592 1593 if (status & STS_FATAL) { 1594 cdnsp_died(pdev); 1595 return IRQ_HANDLED; 1596 } 1597 1598 return IRQ_WAKE_THREAD; 1599 } 1600 1601 /* 1602 * Generic function for queuing a TRB on a ring. 1603 * The caller must have checked to make sure there's room on the ring. 1604 * 1605 * @more_trbs_coming: Will you enqueue more TRBs before setting doorbell? 1606 */ 1607 static void cdnsp_queue_trb(struct cdnsp_device *pdev, struct cdnsp_ring *ring, 1608 bool more_trbs_coming, u32 field1, u32 field2, 1609 u32 field3, u32 field4) 1610 { 1611 struct cdnsp_generic_trb *trb; 1612 1613 trb = &ring->enqueue->generic; 1614 1615 trb->field[0] = cpu_to_le32(field1); 1616 trb->field[1] = cpu_to_le32(field2); 1617 trb->field[2] = cpu_to_le32(field3); 1618 trb->field[3] = cpu_to_le32(field4); 1619 1620 trace_cdnsp_queue_trb(ring, trb); 1621 cdnsp_inc_enq(pdev, ring, more_trbs_coming); 1622 } 1623 1624 /* 1625 * Does various checks on the endpoint ring, and makes it ready to 1626 * queue num_trbs. 1627 */ 1628 static int cdnsp_prepare_ring(struct cdnsp_device *pdev, 1629 struct cdnsp_ring *ep_ring, 1630 u32 ep_state, unsigned 1631 int num_trbs, 1632 gfp_t mem_flags) 1633 { 1634 unsigned int num_trbs_needed; 1635 1636 /* Make sure the endpoint has been added to controller schedule. */ 1637 switch (ep_state) { 1638 case EP_STATE_STOPPED: 1639 case EP_STATE_RUNNING: 1640 case EP_STATE_HALTED: 1641 break; 1642 default: 1643 dev_err(pdev->dev, "ERROR: incorrect endpoint state\n"); 1644 return -EINVAL; 1645 } 1646 1647 while (1) { 1648 if (cdnsp_room_on_ring(pdev, ep_ring, num_trbs)) 1649 break; 1650 1651 trace_cdnsp_no_room_on_ring("try ring expansion"); 1652 1653 num_trbs_needed = num_trbs - ep_ring->num_trbs_free; 1654 if (cdnsp_ring_expansion(pdev, ep_ring, num_trbs_needed, 1655 mem_flags)) { 1656 dev_err(pdev->dev, "Ring expansion failed\n"); 1657 return -ENOMEM; 1658 } 1659 } 1660 1661 while (cdnsp_trb_is_link(ep_ring->enqueue)) { 1662 ep_ring->enqueue->link.control |= cpu_to_le32(TRB_CHAIN); 1663 /* The cycle bit must be set as the last operation. */ 1664 wmb(); 1665 ep_ring->enqueue->link.control ^= cpu_to_le32(TRB_CYCLE); 1666 1667 /* Toggle the cycle bit after the last ring segment. */ 1668 if (cdnsp_link_trb_toggles_cycle(ep_ring->enqueue)) 1669 ep_ring->cycle_state ^= 1; 1670 ep_ring->enq_seg = ep_ring->enq_seg->next; 1671 ep_ring->enqueue = ep_ring->enq_seg->trbs; 1672 } 1673 return 0; 1674 } 1675 1676 static int cdnsp_prepare_transfer(struct cdnsp_device *pdev, 1677 struct cdnsp_request *preq, 1678 unsigned int num_trbs) 1679 { 1680 struct cdnsp_ring *ep_ring; 1681 int ret; 1682 1683 ep_ring = cdnsp_get_transfer_ring(pdev, preq->pep, 1684 preq->request.stream_id); 1685 if (!ep_ring) 1686 return -EINVAL; 1687 1688 ret = cdnsp_prepare_ring(pdev, ep_ring, 1689 GET_EP_CTX_STATE(preq->pep->out_ctx), 1690 num_trbs, GFP_ATOMIC); 1691 if (ret) 1692 return ret; 1693 1694 INIT_LIST_HEAD(&preq->td.td_list); 1695 preq->td.preq = preq; 1696 1697 /* Add this TD to the tail of the endpoint ring's TD list. */ 1698 list_add_tail(&preq->td.td_list, &ep_ring->td_list); 1699 ep_ring->num_tds++; 1700 preq->pep->stream_info.td_count++; 1701 1702 preq->td.start_seg = ep_ring->enq_seg; 1703 preq->td.first_trb = ep_ring->enqueue; 1704 1705 return 0; 1706 } 1707 1708 static unsigned int cdnsp_count_trbs(u64 addr, u64 len) 1709 { 1710 unsigned int num_trbs; 1711 1712 num_trbs = DIV_ROUND_UP(len + (addr & (TRB_MAX_BUFF_SIZE - 1)), 1713 TRB_MAX_BUFF_SIZE); 1714 if (num_trbs == 0) 1715 num_trbs++; 1716 1717 return num_trbs; 1718 } 1719 1720 static unsigned int count_trbs_needed(struct cdnsp_request *preq) 1721 { 1722 return cdnsp_count_trbs(preq->request.dma, preq->request.length); 1723 } 1724 1725 static unsigned int count_sg_trbs_needed(struct cdnsp_request *preq) 1726 { 1727 unsigned int i, len, full_len, num_trbs = 0; 1728 struct scatterlist *sg; 1729 1730 full_len = preq->request.length; 1731 1732 for_each_sg(preq->request.sg, sg, preq->request.num_sgs, i) { 1733 len = sg_dma_len(sg); 1734 num_trbs += cdnsp_count_trbs(sg_dma_address(sg), len); 1735 len = min(len, full_len); 1736 full_len -= len; 1737 if (full_len == 0) 1738 break; 1739 } 1740 1741 return num_trbs; 1742 } 1743 1744 static void cdnsp_check_trb_math(struct cdnsp_request *preq, int running_total) 1745 { 1746 if (running_total != preq->request.length) 1747 dev_err(preq->pep->pdev->dev, 1748 "%s - Miscalculated tx length, " 1749 "queued %#x, asked for %#x (%d)\n", 1750 preq->pep->name, running_total, 1751 preq->request.length, preq->request.actual); 1752 } 1753 1754 /* 1755 * TD size is the number of max packet sized packets remaining in the TD 1756 * (*not* including this TRB). 1757 * 1758 * Total TD packet count = total_packet_count = 1759 * DIV_ROUND_UP(TD size in bytes / wMaxPacketSize) 1760 * 1761 * Packets transferred up to and including this TRB = packets_transferred = 1762 * rounddown(total bytes transferred including this TRB / wMaxPacketSize) 1763 * 1764 * TD size = total_packet_count - packets_transferred 1765 * 1766 * It must fit in bits 21:17, so it can't be bigger than 31. 1767 * This is taken care of in the TRB_TD_SIZE() macro 1768 * 1769 * The last TRB in a TD must have the TD size set to zero. 1770 */ 1771 static u32 cdnsp_td_remainder(struct cdnsp_device *pdev, 1772 int transferred, 1773 int trb_buff_len, 1774 unsigned int td_total_len, 1775 struct cdnsp_request *preq, 1776 bool more_trbs_coming, 1777 bool zlp) 1778 { 1779 u32 maxp, total_packet_count; 1780 1781 /* Before ZLP driver needs set TD_SIZE = 1. */ 1782 if (zlp) 1783 return 1; 1784 1785 /* One TRB with a zero-length data packet. */ 1786 if (!more_trbs_coming || (transferred == 0 && trb_buff_len == 0) || 1787 trb_buff_len == td_total_len) 1788 return 0; 1789 1790 maxp = usb_endpoint_maxp(preq->pep->endpoint.desc); 1791 total_packet_count = DIV_ROUND_UP(td_total_len, maxp); 1792 1793 /* Queuing functions don't count the current TRB into transferred. */ 1794 return (total_packet_count - ((transferred + trb_buff_len) / maxp)); 1795 } 1796 1797 static int cdnsp_align_td(struct cdnsp_device *pdev, 1798 struct cdnsp_request *preq, u32 enqd_len, 1799 u32 *trb_buff_len, struct cdnsp_segment *seg) 1800 { 1801 struct device *dev = pdev->dev; 1802 unsigned int unalign; 1803 unsigned int max_pkt; 1804 u32 new_buff_len; 1805 1806 max_pkt = usb_endpoint_maxp(preq->pep->endpoint.desc); 1807 unalign = (enqd_len + *trb_buff_len) % max_pkt; 1808 1809 /* We got lucky, last normal TRB data on segment is packet aligned. */ 1810 if (unalign == 0) 1811 return 0; 1812 1813 /* Is the last nornal TRB alignable by splitting it. */ 1814 if (*trb_buff_len > unalign) { 1815 *trb_buff_len -= unalign; 1816 trace_cdnsp_bounce_align_td_split(preq, *trb_buff_len, 1817 enqd_len, 0, unalign); 1818 return 0; 1819 } 1820 1821 /* 1822 * We want enqd_len + trb_buff_len to sum up to a number aligned to 1823 * number which is divisible by the endpoint's wMaxPacketSize. IOW: 1824 * (size of currently enqueued TRBs + remainder) % wMaxPacketSize == 0. 1825 */ 1826 new_buff_len = max_pkt - (enqd_len % max_pkt); 1827 1828 if (new_buff_len > (preq->request.length - enqd_len)) 1829 new_buff_len = (preq->request.length - enqd_len); 1830 1831 /* Create a max max_pkt sized bounce buffer pointed to by last trb. */ 1832 if (preq->direction) { 1833 sg_pcopy_to_buffer(preq->request.sg, 1834 preq->request.num_mapped_sgs, 1835 seg->bounce_buf, new_buff_len, enqd_len); 1836 seg->bounce_dma = dma_map_single(dev, seg->bounce_buf, 1837 max_pkt, DMA_TO_DEVICE); 1838 } else { 1839 seg->bounce_dma = dma_map_single(dev, seg->bounce_buf, 1840 max_pkt, DMA_FROM_DEVICE); 1841 } 1842 1843 if (dma_mapping_error(dev, seg->bounce_dma)) { 1844 /* Try without aligning.*/ 1845 dev_warn(pdev->dev, 1846 "Failed mapping bounce buffer, not aligning\n"); 1847 return 0; 1848 } 1849 1850 *trb_buff_len = new_buff_len; 1851 seg->bounce_len = new_buff_len; 1852 seg->bounce_offs = enqd_len; 1853 1854 trace_cdnsp_bounce_map(preq, new_buff_len, enqd_len, seg->bounce_dma, 1855 unalign); 1856 1857 /* 1858 * Bounce buffer successful aligned and seg->bounce_dma will be used 1859 * in transfer TRB as new transfer buffer address. 1860 */ 1861 return 1; 1862 } 1863 1864 int cdnsp_queue_bulk_tx(struct cdnsp_device *pdev, struct cdnsp_request *preq) 1865 { 1866 unsigned int enqd_len, block_len, trb_buff_len, full_len; 1867 unsigned int start_cycle, num_sgs = 0; 1868 struct cdnsp_generic_trb *start_trb; 1869 u32 field, length_field, remainder; 1870 struct scatterlist *sg = NULL; 1871 bool more_trbs_coming = true; 1872 bool need_zero_pkt = false; 1873 bool zero_len_trb = false; 1874 struct cdnsp_ring *ring; 1875 bool first_trb = true; 1876 unsigned int num_trbs; 1877 struct cdnsp_ep *pep; 1878 u64 addr, send_addr; 1879 int sent_len, ret; 1880 1881 ring = cdnsp_request_to_transfer_ring(pdev, preq); 1882 if (!ring) 1883 return -EINVAL; 1884 1885 full_len = preq->request.length; 1886 1887 if (preq->request.num_sgs) { 1888 num_sgs = preq->request.num_sgs; 1889 sg = preq->request.sg; 1890 addr = (u64)sg_dma_address(sg); 1891 block_len = sg_dma_len(sg); 1892 num_trbs = count_sg_trbs_needed(preq); 1893 } else { 1894 num_trbs = count_trbs_needed(preq); 1895 addr = (u64)preq->request.dma; 1896 block_len = full_len; 1897 } 1898 1899 pep = preq->pep; 1900 1901 /* Deal with request.zero - need one more td/trb. */ 1902 if (preq->request.zero && preq->request.length && 1903 IS_ALIGNED(full_len, usb_endpoint_maxp(pep->endpoint.desc))) { 1904 need_zero_pkt = true; 1905 num_trbs++; 1906 } 1907 1908 ret = cdnsp_prepare_transfer(pdev, preq, num_trbs); 1909 if (ret) 1910 return ret; 1911 1912 /* 1913 * workaround 1: STOP EP command on LINK TRB with TC bit set to 1 1914 * causes that internal cycle bit can have incorrect state after 1915 * command complete. In consequence empty transfer ring can be 1916 * incorrectly detected when EP is resumed. 1917 * NOP TRB before LINK TRB avoid such scenario. STOP EP command is 1918 * then on NOP TRB and internal cycle bit is not changed and have 1919 * correct value. 1920 */ 1921 if (pep->wa1_nop_trb) { 1922 field = le32_to_cpu(pep->wa1_nop_trb->trans_event.flags); 1923 field ^= TRB_CYCLE; 1924 1925 pep->wa1_nop_trb->trans_event.flags = cpu_to_le32(field); 1926 pep->wa1_nop_trb = NULL; 1927 } 1928 1929 /* 1930 * Don't give the first TRB to the hardware (by toggling the cycle bit) 1931 * until we've finished creating all the other TRBs. The ring's cycle 1932 * state may change as we enqueue the other TRBs, so save it too. 1933 */ 1934 start_trb = &ring->enqueue->generic; 1935 start_cycle = ring->cycle_state; 1936 send_addr = addr; 1937 1938 /* Queue the TRBs, even if they are zero-length */ 1939 for (enqd_len = 0; zero_len_trb || first_trb || enqd_len < full_len; 1940 enqd_len += trb_buff_len) { 1941 field = TRB_TYPE(TRB_NORMAL); 1942 1943 /* TRB buffer should not cross 64KB boundaries */ 1944 trb_buff_len = TRB_BUFF_LEN_UP_TO_BOUNDARY(addr); 1945 trb_buff_len = min(trb_buff_len, block_len); 1946 if (enqd_len + trb_buff_len > full_len) 1947 trb_buff_len = full_len - enqd_len; 1948 1949 /* Don't change the cycle bit of the first TRB until later */ 1950 if (first_trb) { 1951 first_trb = false; 1952 if (start_cycle == 0) 1953 field |= TRB_CYCLE; 1954 } else { 1955 field |= ring->cycle_state; 1956 } 1957 1958 /* 1959 * Chain all the TRBs together; clear the chain bit in the last 1960 * TRB to indicate it's the last TRB in the chain. 1961 */ 1962 if (enqd_len + trb_buff_len < full_len || need_zero_pkt) { 1963 field |= TRB_CHAIN; 1964 if (cdnsp_trb_is_link(ring->enqueue + 1)) { 1965 if (cdnsp_align_td(pdev, preq, enqd_len, 1966 &trb_buff_len, 1967 ring->enq_seg)) { 1968 send_addr = ring->enq_seg->bounce_dma; 1969 /* Assuming TD won't span 2 segs */ 1970 preq->td.bounce_seg = ring->enq_seg; 1971 } 1972 } 1973 } 1974 1975 if (enqd_len + trb_buff_len >= full_len) { 1976 if (need_zero_pkt && !zero_len_trb) { 1977 zero_len_trb = true; 1978 } else { 1979 zero_len_trb = false; 1980 field &= ~TRB_CHAIN; 1981 field |= TRB_IOC; 1982 more_trbs_coming = false; 1983 need_zero_pkt = false; 1984 preq->td.last_trb = ring->enqueue; 1985 } 1986 } 1987 1988 /* Only set interrupt on short packet for OUT endpoints. */ 1989 if (!preq->direction) 1990 field |= TRB_ISP; 1991 1992 /* Set the TRB length, TD size, and interrupter fields. */ 1993 remainder = cdnsp_td_remainder(pdev, enqd_len, trb_buff_len, 1994 full_len, preq, 1995 more_trbs_coming, 1996 zero_len_trb); 1997 1998 length_field = TRB_LEN(trb_buff_len) | TRB_TD_SIZE(remainder) | 1999 TRB_INTR_TARGET(0); 2000 2001 cdnsp_queue_trb(pdev, ring, more_trbs_coming, 2002 lower_32_bits(send_addr), 2003 upper_32_bits(send_addr), 2004 length_field, 2005 field); 2006 2007 addr += trb_buff_len; 2008 sent_len = trb_buff_len; 2009 while (sg && sent_len >= block_len) { 2010 /* New sg entry */ 2011 --num_sgs; 2012 sent_len -= block_len; 2013 if (num_sgs != 0) { 2014 sg = sg_next(sg); 2015 block_len = sg_dma_len(sg); 2016 addr = (u64)sg_dma_address(sg); 2017 addr += sent_len; 2018 } 2019 } 2020 block_len -= sent_len; 2021 send_addr = addr; 2022 } 2023 2024 if (cdnsp_trb_is_link(ring->enqueue + 1)) { 2025 field = TRB_TYPE(TRB_TR_NOOP) | TRB_IOC; 2026 if (!ring->cycle_state) 2027 field |= TRB_CYCLE; 2028 2029 pep->wa1_nop_trb = ring->enqueue; 2030 2031 cdnsp_queue_trb(pdev, ring, 0, 0x0, 0x0, 2032 TRB_INTR_TARGET(0), field); 2033 } 2034 2035 cdnsp_check_trb_math(preq, enqd_len); 2036 ret = cdnsp_giveback_first_trb(pdev, pep, preq->request.stream_id, 2037 start_cycle, start_trb); 2038 2039 if (ret) 2040 preq->td.drbl = 1; 2041 2042 return 0; 2043 } 2044 2045 int cdnsp_queue_ctrl_tx(struct cdnsp_device *pdev, struct cdnsp_request *preq) 2046 { 2047 u32 field, length_field, zlp = 0; 2048 struct cdnsp_ep *pep = preq->pep; 2049 struct cdnsp_ring *ep_ring; 2050 int num_trbs; 2051 u32 maxp; 2052 int ret; 2053 2054 ep_ring = cdnsp_request_to_transfer_ring(pdev, preq); 2055 if (!ep_ring) 2056 return -EINVAL; 2057 2058 /* 1 TRB for data, 1 for status */ 2059 num_trbs = (pdev->three_stage_setup) ? 2 : 1; 2060 2061 maxp = usb_endpoint_maxp(pep->endpoint.desc); 2062 2063 if (preq->request.zero && preq->request.length && 2064 (preq->request.length % maxp == 0)) { 2065 num_trbs++; 2066 zlp = 1; 2067 } 2068 2069 ret = cdnsp_prepare_transfer(pdev, preq, num_trbs); 2070 if (ret) 2071 return ret; 2072 2073 /* If there's data, queue data TRBs */ 2074 if (preq->request.length > 0) { 2075 field = TRB_TYPE(TRB_DATA); 2076 2077 if (zlp) 2078 field |= TRB_CHAIN; 2079 else 2080 field |= TRB_IOC | (pdev->ep0_expect_in ? 0 : TRB_ISP); 2081 2082 if (pdev->ep0_expect_in) 2083 field |= TRB_DIR_IN; 2084 2085 length_field = TRB_LEN(preq->request.length) | 2086 TRB_TD_SIZE(zlp) | TRB_INTR_TARGET(0); 2087 2088 cdnsp_queue_trb(pdev, ep_ring, true, 2089 lower_32_bits(preq->request.dma), 2090 upper_32_bits(preq->request.dma), length_field, 2091 field | ep_ring->cycle_state | 2092 TRB_SETUPID(pdev->setup_id) | 2093 pdev->setup_speed); 2094 2095 if (zlp) { 2096 field = TRB_TYPE(TRB_NORMAL) | TRB_IOC; 2097 2098 if (!pdev->ep0_expect_in) 2099 field = TRB_ISP; 2100 2101 cdnsp_queue_trb(pdev, ep_ring, true, 2102 lower_32_bits(preq->request.dma), 2103 upper_32_bits(preq->request.dma), 0, 2104 field | ep_ring->cycle_state | 2105 TRB_SETUPID(pdev->setup_id) | 2106 pdev->setup_speed); 2107 } 2108 2109 pdev->ep0_stage = CDNSP_DATA_STAGE; 2110 } 2111 2112 /* Save the DMA address of the last TRB in the TD. */ 2113 preq->td.last_trb = ep_ring->enqueue; 2114 2115 /* Queue status TRB. */ 2116 if (preq->request.length == 0) 2117 field = ep_ring->cycle_state; 2118 else 2119 field = (ep_ring->cycle_state ^ 1); 2120 2121 if (preq->request.length > 0 && pdev->ep0_expect_in) 2122 field |= TRB_DIR_IN; 2123 2124 if (pep->ep_state & EP0_HALTED_STATUS) { 2125 pep->ep_state &= ~EP0_HALTED_STATUS; 2126 field |= TRB_SETUPSTAT(TRB_SETUPSTAT_STALL); 2127 } else { 2128 field |= TRB_SETUPSTAT(TRB_SETUPSTAT_ACK); 2129 } 2130 2131 cdnsp_queue_trb(pdev, ep_ring, false, 0, 0, TRB_INTR_TARGET(0), 2132 field | TRB_IOC | TRB_SETUPID(pdev->setup_id) | 2133 TRB_TYPE(TRB_STATUS) | pdev->setup_speed); 2134 2135 cdnsp_ring_ep_doorbell(pdev, pep, preq->request.stream_id); 2136 2137 return 0; 2138 } 2139 2140 int cdnsp_cmd_stop_ep(struct cdnsp_device *pdev, struct cdnsp_ep *pep) 2141 { 2142 u32 ep_state = GET_EP_CTX_STATE(pep->out_ctx); 2143 int ret = 0; 2144 2145 if (ep_state == EP_STATE_STOPPED || ep_state == EP_STATE_DISABLED || 2146 ep_state == EP_STATE_HALTED) { 2147 trace_cdnsp_ep_stopped_or_disabled(pep->out_ctx); 2148 goto ep_stopped; 2149 } 2150 2151 cdnsp_queue_stop_endpoint(pdev, pep->idx); 2152 cdnsp_ring_cmd_db(pdev); 2153 ret = cdnsp_wait_for_cmd_compl(pdev); 2154 2155 trace_cdnsp_handle_cmd_stop_ep(pep->out_ctx); 2156 2157 ep_stopped: 2158 pep->ep_state |= EP_STOPPED; 2159 return ret; 2160 } 2161 2162 /* 2163 * The transfer burst count field of the isochronous TRB defines the number of 2164 * bursts that are required to move all packets in this TD. Only SuperSpeed 2165 * devices can burst up to bMaxBurst number of packets per service interval. 2166 * This field is zero based, meaning a value of zero in the field means one 2167 * burst. Basically, for everything but SuperSpeed devices, this field will be 2168 * zero. 2169 */ 2170 static unsigned int cdnsp_get_burst_count(struct cdnsp_device *pdev, 2171 struct cdnsp_request *preq, 2172 unsigned int total_packet_count) 2173 { 2174 unsigned int max_burst; 2175 2176 if (pdev->gadget.speed < USB_SPEED_SUPER) 2177 return 0; 2178 2179 max_burst = preq->pep->endpoint.comp_desc->bMaxBurst; 2180 return DIV_ROUND_UP(total_packet_count, max_burst + 1) - 1; 2181 } 2182 2183 /* 2184 * Returns the number of packets in the last "burst" of packets. This field is 2185 * valid for all speeds of devices. USB 2.0 devices can only do one "burst", so 2186 * the last burst packet count is equal to the total number of packets in the 2187 * TD. SuperSpeed endpoints can have up to 3 bursts. All but the last burst 2188 * must contain (bMaxBurst + 1) number of packets, but the last burst can 2189 * contain 1 to (bMaxBurst + 1) packets. 2190 */ 2191 static unsigned int 2192 cdnsp_get_last_burst_packet_count(struct cdnsp_device *pdev, 2193 struct cdnsp_request *preq, 2194 unsigned int total_packet_count) 2195 { 2196 unsigned int max_burst; 2197 unsigned int residue; 2198 2199 if (pdev->gadget.speed >= USB_SPEED_SUPER) { 2200 /* bMaxBurst is zero based: 0 means 1 packet per burst. */ 2201 max_burst = preq->pep->endpoint.comp_desc->bMaxBurst; 2202 residue = total_packet_count % (max_burst + 1); 2203 2204 /* 2205 * If residue is zero, the last burst contains (max_burst + 1) 2206 * number of packets, but the TLBPC field is zero-based. 2207 */ 2208 if (residue == 0) 2209 return max_burst; 2210 2211 return residue - 1; 2212 } 2213 if (total_packet_count == 0) 2214 return 0; 2215 2216 return total_packet_count - 1; 2217 } 2218 2219 /* Queue function isoc transfer */ 2220 int cdnsp_queue_isoc_tx(struct cdnsp_device *pdev, 2221 struct cdnsp_request *preq) 2222 { 2223 unsigned int trb_buff_len, td_len, td_remain_len, block_len; 2224 unsigned int burst_count, last_burst_pkt; 2225 unsigned int total_pkt_count, max_pkt; 2226 struct cdnsp_generic_trb *start_trb; 2227 struct scatterlist *sg = NULL; 2228 bool more_trbs_coming = true; 2229 struct cdnsp_ring *ep_ring; 2230 unsigned int num_sgs = 0; 2231 int running_total = 0; 2232 u32 field, length_field; 2233 u64 addr, send_addr; 2234 int start_cycle; 2235 int trbs_per_td; 2236 int i, sent_len, ret; 2237 2238 ep_ring = preq->pep->ring; 2239 2240 td_len = preq->request.length; 2241 2242 if (preq->request.num_sgs) { 2243 num_sgs = preq->request.num_sgs; 2244 sg = preq->request.sg; 2245 addr = (u64)sg_dma_address(sg); 2246 block_len = sg_dma_len(sg); 2247 trbs_per_td = count_sg_trbs_needed(preq); 2248 } else { 2249 addr = (u64)preq->request.dma; 2250 block_len = td_len; 2251 trbs_per_td = count_trbs_needed(preq); 2252 } 2253 2254 ret = cdnsp_prepare_transfer(pdev, preq, trbs_per_td); 2255 if (ret) 2256 return ret; 2257 2258 start_trb = &ep_ring->enqueue->generic; 2259 start_cycle = ep_ring->cycle_state; 2260 td_remain_len = td_len; 2261 send_addr = addr; 2262 2263 max_pkt = usb_endpoint_maxp(preq->pep->endpoint.desc); 2264 total_pkt_count = DIV_ROUND_UP(td_len, max_pkt); 2265 2266 /* A zero-length transfer still involves at least one packet. */ 2267 if (total_pkt_count == 0) 2268 total_pkt_count++; 2269 2270 burst_count = cdnsp_get_burst_count(pdev, preq, total_pkt_count); 2271 last_burst_pkt = cdnsp_get_last_burst_packet_count(pdev, preq, 2272 total_pkt_count); 2273 2274 /* 2275 * Set isoc specific data for the first TRB in a TD. 2276 * Prevent HW from getting the TRBs by keeping the cycle state 2277 * inverted in the first TDs isoc TRB. 2278 */ 2279 field = TRB_TYPE(TRB_ISOC) | TRB_TLBPC(last_burst_pkt) | 2280 TRB_SIA | TRB_TBC(burst_count); 2281 2282 if (!start_cycle) 2283 field |= TRB_CYCLE; 2284 2285 /* Fill the rest of the TRB fields, and remaining normal TRBs. */ 2286 for (i = 0; i < trbs_per_td; i++) { 2287 u32 remainder; 2288 2289 /* Calculate TRB length. */ 2290 trb_buff_len = TRB_BUFF_LEN_UP_TO_BOUNDARY(addr); 2291 trb_buff_len = min(trb_buff_len, block_len); 2292 if (trb_buff_len > td_remain_len) 2293 trb_buff_len = td_remain_len; 2294 2295 /* Set the TRB length, TD size, & interrupter fields. */ 2296 remainder = cdnsp_td_remainder(pdev, running_total, 2297 trb_buff_len, td_len, preq, 2298 more_trbs_coming, 0); 2299 2300 length_field = TRB_LEN(trb_buff_len) | TRB_TD_SIZE(remainder) | 2301 TRB_INTR_TARGET(0); 2302 2303 /* Only first TRB is isoc, overwrite otherwise. */ 2304 if (i) { 2305 field = TRB_TYPE(TRB_NORMAL) | ep_ring->cycle_state; 2306 length_field |= TRB_TD_SIZE(remainder); 2307 } else { 2308 length_field |= TRB_TD_SIZE_TBC(burst_count); 2309 } 2310 2311 /* Only set interrupt on short packet for OUT EPs. */ 2312 if (usb_endpoint_dir_out(preq->pep->endpoint.desc)) 2313 field |= TRB_ISP; 2314 2315 /* Set the chain bit for all except the last TRB. */ 2316 if (i < trbs_per_td - 1) { 2317 more_trbs_coming = true; 2318 field |= TRB_CHAIN; 2319 } else { 2320 more_trbs_coming = false; 2321 preq->td.last_trb = ep_ring->enqueue; 2322 field |= TRB_IOC; 2323 } 2324 2325 cdnsp_queue_trb(pdev, ep_ring, more_trbs_coming, 2326 lower_32_bits(send_addr), upper_32_bits(send_addr), 2327 length_field, field); 2328 2329 running_total += trb_buff_len; 2330 addr += trb_buff_len; 2331 td_remain_len -= trb_buff_len; 2332 2333 sent_len = trb_buff_len; 2334 while (sg && sent_len >= block_len) { 2335 /* New sg entry */ 2336 --num_sgs; 2337 sent_len -= block_len; 2338 if (num_sgs != 0) { 2339 sg = sg_next(sg); 2340 block_len = sg_dma_len(sg); 2341 addr = (u64)sg_dma_address(sg); 2342 addr += sent_len; 2343 } 2344 } 2345 block_len -= sent_len; 2346 send_addr = addr; 2347 } 2348 2349 /* Check TD length */ 2350 if (running_total != td_len) { 2351 dev_err(pdev->dev, "ISOC TD length unmatch\n"); 2352 ret = -EINVAL; 2353 goto cleanup; 2354 } 2355 2356 cdnsp_giveback_first_trb(pdev, preq->pep, preq->request.stream_id, 2357 start_cycle, start_trb); 2358 2359 return 0; 2360 2361 cleanup: 2362 /* Clean up a partially enqueued isoc transfer. */ 2363 list_del_init(&preq->td.td_list); 2364 ep_ring->num_tds--; 2365 2366 /* 2367 * Use the first TD as a temporary variable to turn the TDs we've 2368 * queued into No-ops with a software-owned cycle bit. 2369 * That way the hardware won't accidentally start executing bogus TDs 2370 * when we partially overwrite them. 2371 * td->first_trb and td->start_seg are already set. 2372 */ 2373 preq->td.last_trb = ep_ring->enqueue; 2374 /* Every TRB except the first & last will have its cycle bit flipped. */ 2375 cdnsp_td_to_noop(pdev, ep_ring, &preq->td, true); 2376 2377 /* Reset the ring enqueue back to the first TRB and its cycle bit. */ 2378 ep_ring->enqueue = preq->td.first_trb; 2379 ep_ring->enq_seg = preq->td.start_seg; 2380 ep_ring->cycle_state = start_cycle; 2381 return ret; 2382 } 2383 2384 /**** Command Ring Operations ****/ 2385 /* 2386 * Generic function for queuing a command TRB on the command ring. 2387 * Driver queue only one command to ring in the moment. 2388 */ 2389 static void cdnsp_queue_command(struct cdnsp_device *pdev, 2390 u32 field1, 2391 u32 field2, 2392 u32 field3, 2393 u32 field4) 2394 { 2395 cdnsp_prepare_ring(pdev, pdev->cmd_ring, EP_STATE_RUNNING, 1, 2396 GFP_ATOMIC); 2397 2398 pdev->cmd.command_trb = pdev->cmd_ring->enqueue; 2399 2400 cdnsp_queue_trb(pdev, pdev->cmd_ring, false, field1, field2, 2401 field3, field4 | pdev->cmd_ring->cycle_state); 2402 } 2403 2404 /* Queue a slot enable or disable request on the command ring */ 2405 void cdnsp_queue_slot_control(struct cdnsp_device *pdev, u32 trb_type) 2406 { 2407 cdnsp_queue_command(pdev, 0, 0, 0, TRB_TYPE(trb_type) | 2408 SLOT_ID_FOR_TRB(pdev->slot_id)); 2409 } 2410 2411 /* Queue an address device command TRB */ 2412 void cdnsp_queue_address_device(struct cdnsp_device *pdev, 2413 dma_addr_t in_ctx_ptr, 2414 enum cdnsp_setup_dev setup) 2415 { 2416 cdnsp_queue_command(pdev, lower_32_bits(in_ctx_ptr), 2417 upper_32_bits(in_ctx_ptr), 0, 2418 TRB_TYPE(TRB_ADDR_DEV) | 2419 SLOT_ID_FOR_TRB(pdev->slot_id) | 2420 (setup == SETUP_CONTEXT_ONLY ? TRB_BSR : 0)); 2421 } 2422 2423 /* Queue a reset device command TRB */ 2424 void cdnsp_queue_reset_device(struct cdnsp_device *pdev) 2425 { 2426 cdnsp_queue_command(pdev, 0, 0, 0, TRB_TYPE(TRB_RESET_DEV) | 2427 SLOT_ID_FOR_TRB(pdev->slot_id)); 2428 } 2429 2430 /* Queue a configure endpoint command TRB */ 2431 void cdnsp_queue_configure_endpoint(struct cdnsp_device *pdev, 2432 dma_addr_t in_ctx_ptr) 2433 { 2434 cdnsp_queue_command(pdev, lower_32_bits(in_ctx_ptr), 2435 upper_32_bits(in_ctx_ptr), 0, 2436 TRB_TYPE(TRB_CONFIG_EP) | 2437 SLOT_ID_FOR_TRB(pdev->slot_id)); 2438 } 2439 2440 /* 2441 * Suspend is set to indicate "Stop Endpoint Command" is being issued to stop 2442 * activity on an endpoint that is about to be suspended. 2443 */ 2444 void cdnsp_queue_stop_endpoint(struct cdnsp_device *pdev, unsigned int ep_index) 2445 { 2446 cdnsp_queue_command(pdev, 0, 0, 0, SLOT_ID_FOR_TRB(pdev->slot_id) | 2447 EP_ID_FOR_TRB(ep_index) | TRB_TYPE(TRB_STOP_RING)); 2448 } 2449 2450 /* Set Transfer Ring Dequeue Pointer command. */ 2451 void cdnsp_queue_new_dequeue_state(struct cdnsp_device *pdev, 2452 struct cdnsp_ep *pep, 2453 struct cdnsp_dequeue_state *deq_state) 2454 { 2455 u32 trb_stream_id = STREAM_ID_FOR_TRB(deq_state->stream_id); 2456 u32 trb_slot_id = SLOT_ID_FOR_TRB(pdev->slot_id); 2457 u32 type = TRB_TYPE(TRB_SET_DEQ); 2458 u32 trb_sct = 0; 2459 dma_addr_t addr; 2460 2461 addr = cdnsp_trb_virt_to_dma(deq_state->new_deq_seg, 2462 deq_state->new_deq_ptr); 2463 2464 if (deq_state->stream_id) 2465 trb_sct = SCT_FOR_TRB(SCT_PRI_TR); 2466 2467 cdnsp_queue_command(pdev, lower_32_bits(addr) | trb_sct | 2468 deq_state->new_cycle_state, upper_32_bits(addr), 2469 trb_stream_id, trb_slot_id | 2470 EP_ID_FOR_TRB(pep->idx) | type); 2471 } 2472 2473 void cdnsp_queue_reset_ep(struct cdnsp_device *pdev, unsigned int ep_index) 2474 { 2475 return cdnsp_queue_command(pdev, 0, 0, 0, 2476 SLOT_ID_FOR_TRB(pdev->slot_id) | 2477 EP_ID_FOR_TRB(ep_index) | 2478 TRB_TYPE(TRB_RESET_EP)); 2479 } 2480 2481 /* 2482 * Queue a halt endpoint request on the command ring. 2483 */ 2484 void cdnsp_queue_halt_endpoint(struct cdnsp_device *pdev, unsigned int ep_index) 2485 { 2486 cdnsp_queue_command(pdev, 0, 0, 0, TRB_TYPE(TRB_HALT_ENDPOINT) | 2487 SLOT_ID_FOR_TRB(pdev->slot_id) | 2488 EP_ID_FOR_TRB(ep_index) | 2489 (!ep_index ? TRB_ESP : 0)); 2490 } 2491 2492 void cdnsp_force_header_wakeup(struct cdnsp_device *pdev, int intf_num) 2493 { 2494 u32 lo, mid; 2495 2496 lo = TRB_FH_TO_PACKET_TYPE(TRB_FH_TR_PACKET) | 2497 TRB_FH_TO_DEVICE_ADDRESS(pdev->device_address); 2498 mid = TRB_FH_TR_PACKET_DEV_NOT | 2499 TRB_FH_TO_NOT_TYPE(TRB_FH_TR_PACKET_FUNCTION_WAKE) | 2500 TRB_FH_TO_INTERFACE(intf_num); 2501 2502 cdnsp_queue_command(pdev, lo, mid, 0, 2503 TRB_TYPE(TRB_FORCE_HEADER) | SET_PORT_ID(2)); 2504 } 2505