xref: /linux/drivers/ufs/host/ufs-mediatek-sip.h (revision 4b132aacb0768ac1e652cf517097ea6f237214b9)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2022 MediaTek Inc.
4  */
5 
6 #ifndef _UFS_MEDIATEK_SIP_H
7 #define _UFS_MEDIATEK_SIP_H
8 
9 #include <linux/soc/mediatek/mtk_sip_svc.h>
10 
11 /*
12  * SiP (Slicon Partner) commands
13  */
14 #define MTK_SIP_UFS_CONTROL               MTK_SIP_SMC_CMD(0x276)
15 #define UFS_MTK_SIP_VA09_PWR_CTRL         BIT(0)
16 #define UFS_MTK_SIP_DEVICE_RESET          BIT(1)
17 #define UFS_MTK_SIP_CRYPTO_CTRL           BIT(2)
18 #define UFS_MTK_SIP_REF_CLK_NOTIFICATION  BIT(3)
19 #define UFS_MTK_SIP_SRAM_PWR_CTRL         BIT(5)
20 #define UFS_MTK_SIP_GET_VCC_NUM           BIT(6)
21 #define UFS_MTK_SIP_DEVICE_PWR_CTRL       BIT(7)
22 #define UFS_MTK_SIP_MPHY_CTRL             BIT(8)
23 #define UFS_MTK_SIP_MTCMOS_CTRL           BIT(9)
24 
25 /*
26  * Multi-VCC by Numbering
27  */
28 enum ufs_mtk_vcc_num {
29 	UFS_VCC_NONE = 0,
30 	UFS_VCC_1,
31 	UFS_VCC_2,
32 	UFS_VCC_MAX
33 };
34 
35 enum ufs_mtk_mphy_op {
36 	UFS_MPHY_BACKUP = 0,
37 	UFS_MPHY_RESTORE
38 };
39 
40 /*
41  * SMC call wrapper function
42  */
43 struct ufs_mtk_smc_arg {
44 	unsigned long cmd;
45 	struct arm_smccc_res *res;
46 	unsigned long v1;
47 	unsigned long v2;
48 	unsigned long v3;
49 	unsigned long v4;
50 	unsigned long v5;
51 	unsigned long v6;
52 	unsigned long v7;
53 };
54 
55 
56 static inline void _ufs_mtk_smc(struct ufs_mtk_smc_arg s)
57 {
58 	arm_smccc_smc(MTK_SIP_UFS_CONTROL,
59 		s.cmd,
60 		s.v1, s.v2, s.v3, s.v4, s.v5, s.v6, s.res);
61 }
62 
63 #define ufs_mtk_smc(...) \
64 	_ufs_mtk_smc((struct ufs_mtk_smc_arg) {__VA_ARGS__})
65 
66 /* Sip kernel interface */
67 #define ufs_mtk_va09_pwr_ctrl(res, on) \
68 	ufs_mtk_smc(UFS_MTK_SIP_VA09_PWR_CTRL, &(res), on)
69 
70 #define ufs_mtk_crypto_ctrl(res, enable) \
71 	ufs_mtk_smc(UFS_MTK_SIP_CRYPTO_CTRL, &(res), enable)
72 
73 #define ufs_mtk_ref_clk_notify(on, stage, res) \
74 	ufs_mtk_smc(UFS_MTK_SIP_REF_CLK_NOTIFICATION, &(res), on, stage)
75 
76 #define ufs_mtk_device_reset_ctrl(high, res) \
77 	ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, &(res), high)
78 
79 #define ufs_mtk_sram_pwr_ctrl(on, res) \
80 	ufs_mtk_smc(UFS_MTK_SIP_SRAM_PWR_CTRL, &(res), on)
81 
82 #define ufs_mtk_get_vcc_num(res) \
83 	ufs_mtk_smc(UFS_MTK_SIP_GET_VCC_NUM, &(res))
84 
85 #define ufs_mtk_device_pwr_ctrl(on, ufs_version, res) \
86 	ufs_mtk_smc(UFS_MTK_SIP_DEVICE_PWR_CTRL, &(res), on, ufs_version)
87 
88 #define ufs_mtk_mphy_ctrl(op, res) \
89 	ufs_mtk_smc(UFS_MTK_SIP_MPHY_CTRL, &(res), op)
90 
91 #define ufs_mtk_mtcmos_ctrl(op, res) \
92 	ufs_mtk_smc(UFS_MTK_SIP_MTCMOS_CTRL, &(res), op)
93 
94 #endif /* !_UFS_MEDIATEK_SIP_H */
95