xref: /linux/drivers/tty/serial/uartlite.c (revision e3b3d0f549c1d19b94e6ac55c66643166ea649ef) 
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * uartlite.c: Serial driver for Xilinx uartlite serial controller
4  *
5  * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
6  * Copyright (C) 2007 Secret Lab Technologies Ltd.
7  *
8  * This file is licensed under the terms of the GNU General Public License
9  * version 2.  This program is licensed "as is" without any warranty of any
10  * kind, whether express or implied.
11  */
12 
13 #include <linux/platform_device.h>
14 #include <linux/module.h>
15 #include <linux/console.h>
16 #include <linux/serial.h>
17 #include <linux/serial_core.h>
18 #include <linux/tty.h>
19 #include <linux/tty_flip.h>
20 #include <linux/delay.h>
21 #include <linux/interrupt.h>
22 #include <linux/init.h>
23 #include <linux/io.h>
24 #include <linux/of.h>
25 #include <linux/of_address.h>
26 #include <linux/of_device.h>
27 #include <linux/of_platform.h>
28 
29 #define ULITE_NAME		"ttyUL"
30 #define ULITE_MAJOR		204
31 #define ULITE_MINOR		187
32 #define ULITE_NR_UARTS		CONFIG_SERIAL_UARTLITE_NR_UARTS
33 
34 /* ---------------------------------------------------------------------
35  * Register definitions
36  *
37  * For register details see datasheet:
38  * http://www.xilinx.com/support/documentation/ip_documentation/opb_uartlite.pdf
39  */
40 
41 #define ULITE_RX		0x00
42 #define ULITE_TX		0x04
43 #define ULITE_STATUS		0x08
44 #define ULITE_CONTROL		0x0c
45 
46 #define ULITE_REGION		16
47 
48 #define ULITE_STATUS_RXVALID	0x01
49 #define ULITE_STATUS_RXFULL	0x02
50 #define ULITE_STATUS_TXEMPTY	0x04
51 #define ULITE_STATUS_TXFULL	0x08
52 #define ULITE_STATUS_IE		0x10
53 #define ULITE_STATUS_OVERRUN	0x20
54 #define ULITE_STATUS_FRAME	0x40
55 #define ULITE_STATUS_PARITY	0x80
56 
57 #define ULITE_CONTROL_RST_TX	0x01
58 #define ULITE_CONTROL_RST_RX	0x02
59 #define ULITE_CONTROL_IE	0x10
60 
61 struct uartlite_reg_ops {
62 	u32 (*in)(void __iomem *addr);
63 	void (*out)(u32 val, void __iomem *addr);
64 };
65 
66 static u32 uartlite_inbe32(void __iomem *addr)
67 {
68 	return ioread32be(addr);
69 }
70 
71 static void uartlite_outbe32(u32 val, void __iomem *addr)
72 {
73 	iowrite32be(val, addr);
74 }
75 
76 static const struct uartlite_reg_ops uartlite_be = {
77 	.in = uartlite_inbe32,
78 	.out = uartlite_outbe32,
79 };
80 
81 static u32 uartlite_inle32(void __iomem *addr)
82 {
83 	return ioread32(addr);
84 }
85 
86 static void uartlite_outle32(u32 val, void __iomem *addr)
87 {
88 	iowrite32(val, addr);
89 }
90 
91 static const struct uartlite_reg_ops uartlite_le = {
92 	.in = uartlite_inle32,
93 	.out = uartlite_outle32,
94 };
95 
96 static inline u32 uart_in32(u32 offset, struct uart_port *port)
97 {
98 	const struct uartlite_reg_ops *reg_ops = port->private_data;
99 
100 	return reg_ops->in(port->membase + offset);
101 }
102 
103 static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)
104 {
105 	const struct uartlite_reg_ops *reg_ops = port->private_data;
106 
107 	reg_ops->out(val, port->membase + offset);
108 }
109 
110 static struct uart_port ulite_ports[ULITE_NR_UARTS];
111 
112 /* ---------------------------------------------------------------------
113  * Core UART driver operations
114  */
115 
116 static int ulite_receive(struct uart_port *port, int stat)
117 {
118 	struct tty_port *tport = &port->state->port;
119 	unsigned char ch = 0;
120 	char flag = TTY_NORMAL;
121 
122 	if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
123 		     | ULITE_STATUS_FRAME)) == 0)
124 		return 0;
125 
126 	/* stats */
127 	if (stat & ULITE_STATUS_RXVALID) {
128 		port->icount.rx++;
129 		ch = uart_in32(ULITE_RX, port);
130 
131 		if (stat & ULITE_STATUS_PARITY)
132 			port->icount.parity++;
133 	}
134 
135 	if (stat & ULITE_STATUS_OVERRUN)
136 		port->icount.overrun++;
137 
138 	if (stat & ULITE_STATUS_FRAME)
139 		port->icount.frame++;
140 
141 
142 	/* drop byte with parity error if IGNPAR specificed */
143 	if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
144 		stat &= ~ULITE_STATUS_RXVALID;
145 
146 	stat &= port->read_status_mask;
147 
148 	if (stat & ULITE_STATUS_PARITY)
149 		flag = TTY_PARITY;
150 
151 
152 	stat &= ~port->ignore_status_mask;
153 
154 	if (stat & ULITE_STATUS_RXVALID)
155 		tty_insert_flip_char(tport, ch, flag);
156 
157 	if (stat & ULITE_STATUS_FRAME)
158 		tty_insert_flip_char(tport, 0, TTY_FRAME);
159 
160 	if (stat & ULITE_STATUS_OVERRUN)
161 		tty_insert_flip_char(tport, 0, TTY_OVERRUN);
162 
163 	return 1;
164 }
165 
166 static int ulite_transmit(struct uart_port *port, int stat)
167 {
168 	struct circ_buf *xmit  = &port->state->xmit;
169 
170 	if (stat & ULITE_STATUS_TXFULL)
171 		return 0;
172 
173 	if (port->x_char) {
174 		uart_out32(port->x_char, ULITE_TX, port);
175 		port->x_char = 0;
176 		port->icount.tx++;
177 		return 1;
178 	}
179 
180 	if (uart_circ_empty(xmit) || uart_tx_stopped(port))
181 		return 0;
182 
183 	uart_out32(xmit->buf[xmit->tail], ULITE_TX, port);
184 	xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
185 	port->icount.tx++;
186 
187 	/* wake up */
188 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
189 		uart_write_wakeup(port);
190 
191 	return 1;
192 }
193 
194 static irqreturn_t ulite_isr(int irq, void *dev_id)
195 {
196 	struct uart_port *port = dev_id;
197 	int stat, busy, n = 0;
198 	unsigned long flags;
199 
200 	do {
201 		spin_lock_irqsave(&port->lock, flags);
202 		stat = uart_in32(ULITE_STATUS, port);
203 		busy  = ulite_receive(port, stat);
204 		busy |= ulite_transmit(port, stat);
205 		spin_unlock_irqrestore(&port->lock, flags);
206 		n++;
207 	} while (busy);
208 
209 	/* work done? */
210 	if (n > 1) {
211 		tty_flip_buffer_push(&port->state->port);
212 		return IRQ_HANDLED;
213 	} else {
214 		return IRQ_NONE;
215 	}
216 }
217 
218 static unsigned int ulite_tx_empty(struct uart_port *port)
219 {
220 	unsigned long flags;
221 	unsigned int ret;
222 
223 	spin_lock_irqsave(&port->lock, flags);
224 	ret = uart_in32(ULITE_STATUS, port);
225 	spin_unlock_irqrestore(&port->lock, flags);
226 
227 	return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
228 }
229 
230 static unsigned int ulite_get_mctrl(struct uart_port *port)
231 {
232 	return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
233 }
234 
235 static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
236 {
237 	/* N/A */
238 }
239 
240 static void ulite_stop_tx(struct uart_port *port)
241 {
242 	/* N/A */
243 }
244 
245 static void ulite_start_tx(struct uart_port *port)
246 {
247 	ulite_transmit(port, uart_in32(ULITE_STATUS, port));
248 }
249 
250 static void ulite_stop_rx(struct uart_port *port)
251 {
252 	/* don't forward any more data (like !CREAD) */
253 	port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
254 		| ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
255 }
256 
257 static void ulite_break_ctl(struct uart_port *port, int ctl)
258 {
259 	/* N/A */
260 }
261 
262 static int ulite_startup(struct uart_port *port)
263 {
264 	int ret;
265 
266 	ret = request_irq(port->irq, ulite_isr, IRQF_SHARED | IRQF_TRIGGER_RISING,
267 			  "uartlite", port);
268 	if (ret)
269 		return ret;
270 
271 	uart_out32(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
272 		ULITE_CONTROL, port);
273 	uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
274 
275 	return 0;
276 }
277 
278 static void ulite_shutdown(struct uart_port *port)
279 {
280 	uart_out32(0, ULITE_CONTROL, port);
281 	uart_in32(ULITE_CONTROL, port); /* dummy */
282 	free_irq(port->irq, port);
283 }
284 
285 static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
286 			      struct ktermios *old)
287 {
288 	unsigned long flags;
289 	unsigned int baud;
290 
291 	spin_lock_irqsave(&port->lock, flags);
292 
293 	port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
294 		| ULITE_STATUS_TXFULL;
295 
296 	if (termios->c_iflag & INPCK)
297 		port->read_status_mask |=
298 			ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
299 
300 	port->ignore_status_mask = 0;
301 	if (termios->c_iflag & IGNPAR)
302 		port->ignore_status_mask |= ULITE_STATUS_PARITY
303 			| ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
304 
305 	/* ignore all characters if CREAD is not set */
306 	if ((termios->c_cflag & CREAD) == 0)
307 		port->ignore_status_mask |=
308 			ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
309 			| ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
310 
311 	/* update timeout */
312 	baud = uart_get_baud_rate(port, termios, old, 0, 460800);
313 	uart_update_timeout(port, termios->c_cflag, baud);
314 
315 	spin_unlock_irqrestore(&port->lock, flags);
316 }
317 
318 static const char *ulite_type(struct uart_port *port)
319 {
320 	return port->type == PORT_UARTLITE ? "uartlite" : NULL;
321 }
322 
323 static void ulite_release_port(struct uart_port *port)
324 {
325 	release_mem_region(port->mapbase, ULITE_REGION);
326 	iounmap(port->membase);
327 	port->membase = NULL;
328 }
329 
330 static int ulite_request_port(struct uart_port *port)
331 {
332 	int ret;
333 
334 	pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
335 		 port, (unsigned long long) port->mapbase);
336 
337 	if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
338 		dev_err(port->dev, "Memory region busy\n");
339 		return -EBUSY;
340 	}
341 
342 	port->membase = ioremap(port->mapbase, ULITE_REGION);
343 	if (!port->membase) {
344 		dev_err(port->dev, "Unable to map registers\n");
345 		release_mem_region(port->mapbase, ULITE_REGION);
346 		return -EBUSY;
347 	}
348 
349 	port->private_data = (void *)&uartlite_be;
350 	ret = uart_in32(ULITE_CONTROL, port);
351 	uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port);
352 	ret = uart_in32(ULITE_STATUS, port);
353 	/* Endianess detection */
354 	if ((ret & ULITE_STATUS_TXEMPTY) != ULITE_STATUS_TXEMPTY)
355 		port->private_data = (void *)&uartlite_le;
356 
357 	return 0;
358 }
359 
360 static void ulite_config_port(struct uart_port *port, int flags)
361 {
362 	if (!ulite_request_port(port))
363 		port->type = PORT_UARTLITE;
364 }
365 
366 static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
367 {
368 	/* we don't want the core code to modify any port params */
369 	return -EINVAL;
370 }
371 
372 #ifdef CONFIG_CONSOLE_POLL
373 static int ulite_get_poll_char(struct uart_port *port)
374 {
375 	if (!(uart_in32(ULITE_STATUS, port) & ULITE_STATUS_RXVALID))
376 		return NO_POLL_CHAR;
377 
378 	return uart_in32(ULITE_RX, port);
379 }
380 
381 static void ulite_put_poll_char(struct uart_port *port, unsigned char ch)
382 {
383 	while (uart_in32(ULITE_STATUS, port) & ULITE_STATUS_TXFULL)
384 		cpu_relax();
385 
386 	/* write char to device */
387 	uart_out32(ch, ULITE_TX, port);
388 }
389 #endif
390 
391 static const struct uart_ops ulite_ops = {
392 	.tx_empty	= ulite_tx_empty,
393 	.set_mctrl	= ulite_set_mctrl,
394 	.get_mctrl	= ulite_get_mctrl,
395 	.stop_tx	= ulite_stop_tx,
396 	.start_tx	= ulite_start_tx,
397 	.stop_rx	= ulite_stop_rx,
398 	.break_ctl	= ulite_break_ctl,
399 	.startup	= ulite_startup,
400 	.shutdown	= ulite_shutdown,
401 	.set_termios	= ulite_set_termios,
402 	.type		= ulite_type,
403 	.release_port	= ulite_release_port,
404 	.request_port	= ulite_request_port,
405 	.config_port	= ulite_config_port,
406 	.verify_port	= ulite_verify_port,
407 #ifdef CONFIG_CONSOLE_POLL
408 	.poll_get_char	= ulite_get_poll_char,
409 	.poll_put_char	= ulite_put_poll_char,
410 #endif
411 };
412 
413 /* ---------------------------------------------------------------------
414  * Console driver operations
415  */
416 
417 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
418 static void ulite_console_wait_tx(struct uart_port *port)
419 {
420 	u8 val;
421 	unsigned long timeout;
422 
423 	/*
424 	 * Spin waiting for TX fifo to have space available.
425 	 * When using the Microblaze Debug Module this can take up to 1s
426 	 */
427 	timeout = jiffies + msecs_to_jiffies(1000);
428 	while (1) {
429 		val = uart_in32(ULITE_STATUS, port);
430 		if ((val & ULITE_STATUS_TXFULL) == 0)
431 			break;
432 		if (time_after(jiffies, timeout)) {
433 			dev_warn(port->dev,
434 				 "timeout waiting for TX buffer empty\n");
435 			break;
436 		}
437 		cpu_relax();
438 	}
439 }
440 
441 static void ulite_console_putchar(struct uart_port *port, int ch)
442 {
443 	ulite_console_wait_tx(port);
444 	uart_out32(ch, ULITE_TX, port);
445 }
446 
447 static void ulite_console_write(struct console *co, const char *s,
448 				unsigned int count)
449 {
450 	struct uart_port *port = &ulite_ports[co->index];
451 	unsigned long flags;
452 	unsigned int ier;
453 	int locked = 1;
454 
455 	if (oops_in_progress) {
456 		locked = spin_trylock_irqsave(&port->lock, flags);
457 	} else
458 		spin_lock_irqsave(&port->lock, flags);
459 
460 	/* save and disable interrupt */
461 	ier = uart_in32(ULITE_STATUS, port) & ULITE_STATUS_IE;
462 	uart_out32(0, ULITE_CONTROL, port);
463 
464 	uart_console_write(port, s, count, ulite_console_putchar);
465 
466 	ulite_console_wait_tx(port);
467 
468 	/* restore interrupt state */
469 	if (ier)
470 		uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
471 
472 	if (locked)
473 		spin_unlock_irqrestore(&port->lock, flags);
474 }
475 
476 static int ulite_console_setup(struct console *co, char *options)
477 {
478 	struct uart_port *port;
479 	int baud = 9600;
480 	int bits = 8;
481 	int parity = 'n';
482 	int flow = 'n';
483 
484 	if (co->index < 0 || co->index >= ULITE_NR_UARTS)
485 		return -EINVAL;
486 
487 	port = &ulite_ports[co->index];
488 
489 	/* Has the device been initialized yet? */
490 	if (!port->mapbase) {
491 		pr_debug("console on ttyUL%i not present\n", co->index);
492 		return -ENODEV;
493 	}
494 
495 	/* not initialized yet? */
496 	if (!port->membase) {
497 		if (ulite_request_port(port))
498 			return -ENODEV;
499 	}
500 
501 	if (options)
502 		uart_parse_options(options, &baud, &parity, &bits, &flow);
503 
504 	return uart_set_options(port, co, baud, parity, bits, flow);
505 }
506 
507 static struct uart_driver ulite_uart_driver;
508 
509 static struct console ulite_console = {
510 	.name	= ULITE_NAME,
511 	.write	= ulite_console_write,
512 	.device	= uart_console_device,
513 	.setup	= ulite_console_setup,
514 	.flags	= CON_PRINTBUFFER,
515 	.index	= -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
516 	.data	= &ulite_uart_driver,
517 };
518 
519 static int __init ulite_console_init(void)
520 {
521 	register_console(&ulite_console);
522 	return 0;
523 }
524 
525 console_initcall(ulite_console_init);
526 
527 static void early_uartlite_putc(struct uart_port *port, int c)
528 {
529 	/*
530 	 * Limit how many times we'll spin waiting for TX FIFO status.
531 	 * This will prevent lockups if the base address is incorrectly
532 	 * set, or any other issue on the UARTLITE.
533 	 * This limit is pretty arbitrary, unless we are at about 10 baud
534 	 * we'll never timeout on a working UART.
535 	 */
536 
537 	unsigned retries = 1000000;
538 	/* read status bit - 0x8 offset */
539 	while (--retries && (readl(port->membase + 8) & (1 << 3)))
540 		;
541 
542 	/* Only attempt the iowrite if we didn't timeout */
543 	/* write to TX_FIFO - 0x4 offset */
544 	if (retries)
545 		writel(c & 0xff, port->membase + 4);
546 }
547 
548 static void early_uartlite_write(struct console *console,
549 				 const char *s, unsigned n)
550 {
551 	struct earlycon_device *device = console->data;
552 	uart_console_write(&device->port, s, n, early_uartlite_putc);
553 }
554 
555 static int __init early_uartlite_setup(struct earlycon_device *device,
556 				       const char *options)
557 {
558 	if (!device->port.membase)
559 		return -ENODEV;
560 
561 	device->con->write = early_uartlite_write;
562 	return 0;
563 }
564 EARLYCON_DECLARE(uartlite, early_uartlite_setup);
565 OF_EARLYCON_DECLARE(uartlite_b, "xlnx,opb-uartlite-1.00.b", early_uartlite_setup);
566 OF_EARLYCON_DECLARE(uartlite_a, "xlnx,xps-uartlite-1.00.a", early_uartlite_setup);
567 
568 #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
569 
570 static struct uart_driver ulite_uart_driver = {
571 	.owner		= THIS_MODULE,
572 	.driver_name	= "uartlite",
573 	.dev_name	= ULITE_NAME,
574 	.major		= ULITE_MAJOR,
575 	.minor		= ULITE_MINOR,
576 	.nr		= ULITE_NR_UARTS,
577 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
578 	.cons		= &ulite_console,
579 #endif
580 };
581 
582 /* ---------------------------------------------------------------------
583  * Port assignment functions (mapping devices to uart_port structures)
584  */
585 
586 /** ulite_assign: register a uartlite device with the driver
587  *
588  * @dev: pointer to device structure
589  * @id: requested id number.  Pass -1 for automatic port assignment
590  * @base: base address of uartlite registers
591  * @irq: irq number for uartlite
592  *
593  * Returns: 0 on success, <0 otherwise
594  */
595 static int ulite_assign(struct device *dev, int id, u32 base, int irq)
596 {
597 	struct uart_port *port;
598 	int rc;
599 
600 	/* if id = -1; then scan for a free id and use that */
601 	if (id < 0) {
602 		for (id = 0; id < ULITE_NR_UARTS; id++)
603 			if (ulite_ports[id].mapbase == 0)
604 				break;
605 	}
606 	if (id < 0 || id >= ULITE_NR_UARTS) {
607 		dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
608 		return -EINVAL;
609 	}
610 
611 	if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
612 		dev_err(dev, "cannot assign to %s%i; it is already in use\n",
613 			ULITE_NAME, id);
614 		return -EBUSY;
615 	}
616 
617 	port = &ulite_ports[id];
618 
619 	spin_lock_init(&port->lock);
620 	port->fifosize = 16;
621 	port->regshift = 2;
622 	port->iotype = UPIO_MEM;
623 	port->iobase = 1; /* mark port in use */
624 	port->mapbase = base;
625 	port->membase = NULL;
626 	port->ops = &ulite_ops;
627 	port->irq = irq;
628 	port->flags = UPF_BOOT_AUTOCONF;
629 	port->dev = dev;
630 	port->type = PORT_UNKNOWN;
631 	port->line = id;
632 
633 	dev_set_drvdata(dev, port);
634 
635 	/* Register the port */
636 	rc = uart_add_one_port(&ulite_uart_driver, port);
637 	if (rc) {
638 		dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
639 		port->mapbase = 0;
640 		dev_set_drvdata(dev, NULL);
641 		return rc;
642 	}
643 
644 	return 0;
645 }
646 
647 /** ulite_release: register a uartlite device with the driver
648  *
649  * @dev: pointer to device structure
650  */
651 static int ulite_release(struct device *dev)
652 {
653 	struct uart_port *port = dev_get_drvdata(dev);
654 	int rc = 0;
655 
656 	if (port) {
657 		rc = uart_remove_one_port(&ulite_uart_driver, port);
658 		dev_set_drvdata(dev, NULL);
659 		port->mapbase = 0;
660 	}
661 
662 	return rc;
663 }
664 
665 /* ---------------------------------------------------------------------
666  * Platform bus binding
667  */
668 
669 #if defined(CONFIG_OF)
670 /* Match table for of_platform binding */
671 static const struct of_device_id ulite_of_match[] = {
672 	{ .compatible = "xlnx,opb-uartlite-1.00.b", },
673 	{ .compatible = "xlnx,xps-uartlite-1.00.a", },
674 	{}
675 };
676 MODULE_DEVICE_TABLE(of, ulite_of_match);
677 #endif /* CONFIG_OF */
678 
679 static int ulite_probe(struct platform_device *pdev)
680 {
681 	struct resource *res;
682 	int irq;
683 	int id = pdev->id;
684 #ifdef CONFIG_OF
685 	const __be32 *prop;
686 
687 	prop = of_get_property(pdev->dev.of_node, "port-number", NULL);
688 	if (prop)
689 		id = be32_to_cpup(prop);
690 #endif
691 
692 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
693 	if (!res)
694 		return -ENODEV;
695 
696 	irq = platform_get_irq(pdev, 0);
697 	if (irq <= 0)
698 		return -ENXIO;
699 
700 	return ulite_assign(&pdev->dev, id, res->start, irq);
701 }
702 
703 static int ulite_remove(struct platform_device *pdev)
704 {
705 	return ulite_release(&pdev->dev);
706 }
707 
708 /* work with hotplug and coldplug */
709 MODULE_ALIAS("platform:uartlite");
710 
711 static struct platform_driver ulite_platform_driver = {
712 	.probe = ulite_probe,
713 	.remove = ulite_remove,
714 	.driver = {
715 		.name  = "uartlite",
716 		.of_match_table = of_match_ptr(ulite_of_match),
717 	},
718 };
719 
720 /* ---------------------------------------------------------------------
721  * Module setup/teardown
722  */
723 
724 static int __init ulite_init(void)
725 {
726 	int ret;
727 
728 	pr_debug("uartlite: calling uart_register_driver()\n");
729 	ret = uart_register_driver(&ulite_uart_driver);
730 	if (ret)
731 		goto err_uart;
732 
733 	pr_debug("uartlite: calling platform_driver_register()\n");
734 	ret = platform_driver_register(&ulite_platform_driver);
735 	if (ret)
736 		goto err_plat;
737 
738 	return 0;
739 
740 err_plat:
741 	uart_unregister_driver(&ulite_uart_driver);
742 err_uart:
743 	pr_err("registering uartlite driver failed: err=%i\n", ret);
744 	return ret;
745 }
746 
747 static void __exit ulite_exit(void)
748 {
749 	platform_driver_unregister(&ulite_platform_driver);
750 	uart_unregister_driver(&ulite_uart_driver);
751 }
752 
753 module_init(ulite_init);
754 module_exit(ulite_exit);
755 
756 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
757 MODULE_DESCRIPTION("Xilinx uartlite serial driver");
758 MODULE_LICENSE("GPL");
759