1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Derived from many drivers using generic_serial interface, 4 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c 5 * (was in Linux/VR tree) by Jim Pick. 6 * 7 * Copyright (C) 1999 Harald Koerfgen 8 * Copyright (C) 2000 Jim Pick <jim@jimpick.com> 9 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com) 10 * Copyright (C) 2000-2002 Toshiba Corporation 11 * 12 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller 13 */ 14 15 #include <linux/module.h> 16 #include <linux/ioport.h> 17 #include <linux/init.h> 18 #include <linux/console.h> 19 #include <linux/delay.h> 20 #include <linux/platform_device.h> 21 #include <linux/pci.h> 22 #include <linux/serial_core.h> 23 #include <linux/serial.h> 24 #include <linux/tty.h> 25 #include <linux/tty_flip.h> 26 #include <linux/io.h> 27 28 #include <asm/txx9/generic.h> 29 30 #define PASS_LIMIT 256 31 32 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL) 33 /* "ttyS" is used for standard serial driver */ 34 #define TXX9_TTY_NAME "ttyTX" 35 #define TXX9_TTY_MINOR_START 196 36 #define TXX9_TTY_MAJOR 204 37 #else 38 /* acts like standard serial driver */ 39 #define TXX9_TTY_NAME "ttyS" 40 #define TXX9_TTY_MINOR_START 64 41 #define TXX9_TTY_MAJOR TTY_MAJOR 42 #endif 43 44 /* flag aliases */ 45 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART 46 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER 47 48 #ifdef CONFIG_PCI 49 /* support for Toshiba TC86C001 SIO */ 50 #define ENABLE_SERIAL_TXX9_PCI 51 #endif 52 53 /* 54 * Number of serial ports 55 */ 56 #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS 57 58 #define TXX9_REGION_SIZE 0x24 59 60 /* TXX9 Serial Registers */ 61 #define TXX9_SILCR 0x00 62 #define TXX9_SIDICR 0x04 63 #define TXX9_SIDISR 0x08 64 #define TXX9_SICISR 0x0c 65 #define TXX9_SIFCR 0x10 66 #define TXX9_SIFLCR 0x14 67 #define TXX9_SIBGR 0x18 68 #define TXX9_SITFIFO 0x1c 69 #define TXX9_SIRFIFO 0x20 70 71 /* SILCR : Line Control */ 72 #define TXX9_SILCR_SCS_MASK 0x00000060 73 #define TXX9_SILCR_SCS_IMCLK 0x00000000 74 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020 75 #define TXX9_SILCR_SCS_SCLK 0x00000040 76 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060 77 #define TXX9_SILCR_UEPS 0x00000010 78 #define TXX9_SILCR_UPEN 0x00000008 79 #define TXX9_SILCR_USBL_MASK 0x00000004 80 #define TXX9_SILCR_USBL_1BIT 0x00000000 81 #define TXX9_SILCR_USBL_2BIT 0x00000004 82 #define TXX9_SILCR_UMODE_MASK 0x00000003 83 #define TXX9_SILCR_UMODE_8BIT 0x00000000 84 #define TXX9_SILCR_UMODE_7BIT 0x00000001 85 86 /* SIDICR : DMA/Int. Control */ 87 #define TXX9_SIDICR_TDE 0x00008000 88 #define TXX9_SIDICR_RDE 0x00004000 89 #define TXX9_SIDICR_TIE 0x00002000 90 #define TXX9_SIDICR_RIE 0x00001000 91 #define TXX9_SIDICR_SPIE 0x00000800 92 #define TXX9_SIDICR_CTSAC 0x00000600 93 #define TXX9_SIDICR_STIE_MASK 0x0000003f 94 #define TXX9_SIDICR_STIE_OERS 0x00000020 95 #define TXX9_SIDICR_STIE_CTSS 0x00000010 96 #define TXX9_SIDICR_STIE_RBRKD 0x00000008 97 #define TXX9_SIDICR_STIE_TRDY 0x00000004 98 #define TXX9_SIDICR_STIE_TXALS 0x00000002 99 #define TXX9_SIDICR_STIE_UBRKD 0x00000001 100 101 /* SIDISR : DMA/Int. Status */ 102 #define TXX9_SIDISR_UBRK 0x00008000 103 #define TXX9_SIDISR_UVALID 0x00004000 104 #define TXX9_SIDISR_UFER 0x00002000 105 #define TXX9_SIDISR_UPER 0x00001000 106 #define TXX9_SIDISR_UOER 0x00000800 107 #define TXX9_SIDISR_ERI 0x00000400 108 #define TXX9_SIDISR_TOUT 0x00000200 109 #define TXX9_SIDISR_TDIS 0x00000100 110 #define TXX9_SIDISR_RDIS 0x00000080 111 #define TXX9_SIDISR_STIS 0x00000040 112 #define TXX9_SIDISR_RFDN_MASK 0x0000001f 113 114 /* SICISR : Change Int. Status */ 115 #define TXX9_SICISR_OERS 0x00000020 116 #define TXX9_SICISR_CTSS 0x00000010 117 #define TXX9_SICISR_RBRKD 0x00000008 118 #define TXX9_SICISR_TRDY 0x00000004 119 #define TXX9_SICISR_TXALS 0x00000002 120 #define TXX9_SICISR_UBRKD 0x00000001 121 122 /* SIFCR : FIFO Control */ 123 #define TXX9_SIFCR_SWRST 0x00008000 124 #define TXX9_SIFCR_RDIL_MASK 0x00000180 125 #define TXX9_SIFCR_RDIL_1 0x00000000 126 #define TXX9_SIFCR_RDIL_4 0x00000080 127 #define TXX9_SIFCR_RDIL_8 0x00000100 128 #define TXX9_SIFCR_RDIL_12 0x00000180 129 #define TXX9_SIFCR_RDIL_MAX 0x00000180 130 #define TXX9_SIFCR_TDIL_MASK 0x00000018 131 #define TXX9_SIFCR_TDIL_1 0x00000000 132 #define TXX9_SIFCR_TDIL_4 0x00000001 133 #define TXX9_SIFCR_TDIL_8 0x00000010 134 #define TXX9_SIFCR_TDIL_MAX 0x00000010 135 #define TXX9_SIFCR_TFRST 0x00000004 136 #define TXX9_SIFCR_RFRST 0x00000002 137 #define TXX9_SIFCR_FRSTE 0x00000001 138 #define TXX9_SIO_TX_FIFO 8 139 #define TXX9_SIO_RX_FIFO 16 140 141 /* SIFLCR : Flow Control */ 142 #define TXX9_SIFLCR_RCS 0x00001000 143 #define TXX9_SIFLCR_TES 0x00000800 144 #define TXX9_SIFLCR_RTSSC 0x00000200 145 #define TXX9_SIFLCR_RSDE 0x00000100 146 #define TXX9_SIFLCR_TSDE 0x00000080 147 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e 148 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e 149 #define TXX9_SIFLCR_TBRK 0x00000001 150 151 /* SIBGR : Baudrate Control */ 152 #define TXX9_SIBGR_BCLK_MASK 0x00000300 153 #define TXX9_SIBGR_BCLK_T0 0x00000000 154 #define TXX9_SIBGR_BCLK_T2 0x00000100 155 #define TXX9_SIBGR_BCLK_T4 0x00000200 156 #define TXX9_SIBGR_BCLK_T6 0x00000300 157 #define TXX9_SIBGR_BRD_MASK 0x000000ff 158 159 static inline unsigned int sio_in(struct uart_port *up, int offset) 160 { 161 switch (up->iotype) { 162 default: 163 return __raw_readl(up->membase + offset); 164 case UPIO_PORT: 165 return inl(up->iobase + offset); 166 } 167 } 168 169 static inline void 170 sio_out(struct uart_port *up, int offset, int value) 171 { 172 switch (up->iotype) { 173 default: 174 __raw_writel(value, up->membase + offset); 175 break; 176 case UPIO_PORT: 177 outl(value, up->iobase + offset); 178 break; 179 } 180 } 181 182 static inline void 183 sio_mask(struct uart_port *up, int offset, unsigned int value) 184 { 185 sio_out(up, offset, sio_in(up, offset) & ~value); 186 } 187 static inline void 188 sio_set(struct uart_port *up, int offset, unsigned int value) 189 { 190 sio_out(up, offset, sio_in(up, offset) | value); 191 } 192 193 static inline void 194 sio_quot_set(struct uart_port *up, int quot) 195 { 196 quot >>= 1; 197 if (quot < 256) 198 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0); 199 else if (quot < (256 << 2)) 200 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2); 201 else if (quot < (256 << 4)) 202 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4); 203 else if (quot < (256 << 6)) 204 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6); 205 else 206 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6); 207 } 208 209 static void serial_txx9_stop_tx(struct uart_port *up) 210 { 211 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE); 212 } 213 214 static void serial_txx9_start_tx(struct uart_port *up) 215 { 216 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE); 217 } 218 219 static void serial_txx9_stop_rx(struct uart_port *up) 220 { 221 up->read_status_mask &= ~TXX9_SIDISR_RDIS; 222 } 223 224 static void serial_txx9_initialize(struct uart_port *up) 225 { 226 unsigned int tmout = 10000; 227 228 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST); 229 /* TX4925 BUG WORKAROUND. Accessing SIOC register 230 * immediately after soft reset causes bus error. */ 231 udelay(1); 232 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout) 233 udelay(1); 234 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */ 235 sio_set(up, TXX9_SIFCR, 236 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1); 237 /* initial settings */ 238 sio_out(up, TXX9_SILCR, 239 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT | 240 ((up->flags & UPF_TXX9_USE_SCLK) ? 241 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG)); 242 sio_quot_set(up, uart_get_divisor(up, 9600)); 243 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */); 244 sio_out(up, TXX9_SIDICR, 0); 245 } 246 247 static inline void 248 receive_chars(struct uart_port *up, unsigned int *status) 249 { 250 unsigned int disr = *status; 251 int max_count = 256; 252 unsigned int next_ignore_status_mask; 253 u8 ch, flag; 254 255 do { 256 ch = sio_in(up, TXX9_SIRFIFO); 257 flag = TTY_NORMAL; 258 up->icount.rx++; 259 260 /* mask out RFDN_MASK bit added by previous overrun */ 261 next_ignore_status_mask = 262 up->ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK; 263 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER | 264 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) { 265 /* 266 * For statistics only 267 */ 268 if (disr & TXX9_SIDISR_UBRK) { 269 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER); 270 up->icount.brk++; 271 /* 272 * We do the SysRQ and SAK checking 273 * here because otherwise the break 274 * may get masked by ignore_status_mask 275 * or read_status_mask. 276 */ 277 if (uart_handle_break(up)) 278 goto ignore_char; 279 } else if (disr & TXX9_SIDISR_UPER) 280 up->icount.parity++; 281 else if (disr & TXX9_SIDISR_UFER) 282 up->icount.frame++; 283 if (disr & TXX9_SIDISR_UOER) { 284 up->icount.overrun++; 285 /* 286 * The receiver read buffer still hold 287 * a char which caused overrun. 288 * Ignore next char by adding RFDN_MASK 289 * to ignore_status_mask temporarily. 290 */ 291 next_ignore_status_mask |= 292 TXX9_SIDISR_RFDN_MASK; 293 } 294 295 /* 296 * Mask off conditions which should be ingored. 297 */ 298 disr &= up->read_status_mask; 299 300 if (disr & TXX9_SIDISR_UBRK) { 301 flag = TTY_BREAK; 302 } else if (disr & TXX9_SIDISR_UPER) 303 flag = TTY_PARITY; 304 else if (disr & TXX9_SIDISR_UFER) 305 flag = TTY_FRAME; 306 } 307 if (uart_handle_sysrq_char(up, ch)) 308 goto ignore_char; 309 310 uart_insert_char(up, disr, TXX9_SIDISR_UOER, ch, flag); 311 312 ignore_char: 313 up->ignore_status_mask = next_ignore_status_mask; 314 disr = sio_in(up, TXX9_SIDISR); 315 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0)); 316 317 tty_flip_buffer_push(&up->state->port); 318 319 *status = disr; 320 } 321 322 static inline void transmit_chars(struct uart_port *up) 323 { 324 u8 ch; 325 326 uart_port_tx_limited(up, ch, TXX9_SIO_TX_FIFO, 327 true, 328 sio_out(up, TXX9_SITFIFO, ch), 329 ({})); 330 } 331 332 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id) 333 { 334 int pass_counter = 0; 335 struct uart_port *up = dev_id; 336 unsigned int status; 337 338 while (1) { 339 uart_port_lock(up); 340 status = sio_in(up, TXX9_SIDISR); 341 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE)) 342 status &= ~TXX9_SIDISR_TDIS; 343 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS | 344 TXX9_SIDISR_TOUT))) { 345 uart_port_unlock(up); 346 break; 347 } 348 349 if (status & TXX9_SIDISR_RDIS) 350 receive_chars(up, &status); 351 if (status & TXX9_SIDISR_TDIS) 352 transmit_chars(up); 353 /* Clear TX/RX Int. Status */ 354 sio_mask(up, TXX9_SIDISR, 355 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS | 356 TXX9_SIDISR_TOUT); 357 uart_port_unlock(up); 358 359 if (pass_counter++ > PASS_LIMIT) 360 break; 361 } 362 363 return pass_counter ? IRQ_HANDLED : IRQ_NONE; 364 } 365 366 static unsigned int serial_txx9_tx_empty(struct uart_port *up) 367 { 368 unsigned long flags; 369 unsigned int ret; 370 371 uart_port_lock_irqsave(up, &flags); 372 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0; 373 uart_port_unlock_irqrestore(up, flags); 374 375 return ret; 376 } 377 378 static unsigned int serial_txx9_get_mctrl(struct uart_port *up) 379 { 380 unsigned int ret; 381 382 /* no modem control lines */ 383 ret = TIOCM_CAR | TIOCM_DSR; 384 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS; 385 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS; 386 387 return ret; 388 } 389 390 static void serial_txx9_set_mctrl(struct uart_port *up, unsigned int mctrl) 391 { 392 393 if (mctrl & TIOCM_RTS) 394 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC); 395 else 396 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC); 397 } 398 399 static void serial_txx9_break_ctl(struct uart_port *up, int break_state) 400 { 401 unsigned long flags; 402 403 uart_port_lock_irqsave(up, &flags); 404 if (break_state == -1) 405 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); 406 else 407 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); 408 uart_port_unlock_irqrestore(up, flags); 409 } 410 411 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL) 412 /* 413 * Wait for transmitter & holding register to empty 414 */ 415 static void wait_for_xmitr(struct uart_port *up) 416 { 417 unsigned int tmout = 10000; 418 419 /* Wait up to 10ms for the character(s) to be sent. */ 420 while (--tmout && 421 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS)) 422 udelay(1); 423 424 /* Wait up to 1s for flow control if necessary */ 425 if (up->flags & UPF_CONS_FLOW) { 426 tmout = 1000000; 427 while (--tmout && 428 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS)) 429 udelay(1); 430 } 431 } 432 #endif 433 434 #ifdef CONFIG_CONSOLE_POLL 435 /* 436 * Console polling routines for writing and reading from the uart while 437 * in an interrupt or debug context. 438 */ 439 440 static int serial_txx9_get_poll_char(struct uart_port *up) 441 { 442 unsigned int ier; 443 unsigned char c; 444 445 /* 446 * First save the IER then disable the interrupts 447 */ 448 ier = sio_in(up, TXX9_SIDICR); 449 sio_out(up, TXX9_SIDICR, 0); 450 451 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID) 452 ; 453 454 c = sio_in(up, TXX9_SIRFIFO); 455 456 /* 457 * Finally, clear RX interrupt status 458 * and restore the IER 459 */ 460 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS); 461 sio_out(up, TXX9_SIDICR, ier); 462 return c; 463 } 464 465 466 static void serial_txx9_put_poll_char(struct uart_port *up, unsigned char c) 467 { 468 unsigned int ier; 469 470 /* 471 * First save the IER then disable the interrupts 472 */ 473 ier = sio_in(up, TXX9_SIDICR); 474 sio_out(up, TXX9_SIDICR, 0); 475 476 wait_for_xmitr(up); 477 /* 478 * Send the character out. 479 */ 480 sio_out(up, TXX9_SITFIFO, c); 481 482 /* 483 * Finally, wait for transmitter to become empty 484 * and restore the IER 485 */ 486 wait_for_xmitr(up); 487 sio_out(up, TXX9_SIDICR, ier); 488 } 489 490 #endif /* CONFIG_CONSOLE_POLL */ 491 492 static int serial_txx9_startup(struct uart_port *up) 493 { 494 unsigned long flags; 495 int retval; 496 497 /* 498 * Clear the FIFO buffers and disable them. 499 * (they will be reenabled in set_termios()) 500 */ 501 sio_set(up, TXX9_SIFCR, 502 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); 503 /* clear reset */ 504 sio_mask(up, TXX9_SIFCR, 505 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); 506 sio_out(up, TXX9_SIDICR, 0); 507 508 /* 509 * Clear the interrupt registers. 510 */ 511 sio_out(up, TXX9_SIDISR, 0); 512 513 retval = request_irq(up->irq, serial_txx9_interrupt, 514 IRQF_SHARED, "serial_txx9", up); 515 if (retval) 516 return retval; 517 518 /* 519 * Now, initialize the UART 520 */ 521 uart_port_lock_irqsave(up, &flags); 522 serial_txx9_set_mctrl(up, up->mctrl); 523 uart_port_unlock_irqrestore(up, flags); 524 525 /* Enable RX/TX */ 526 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE); 527 528 /* 529 * Finally, enable interrupts. 530 */ 531 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE); 532 533 return 0; 534 } 535 536 static void serial_txx9_shutdown(struct uart_port *up) 537 { 538 unsigned long flags; 539 540 /* 541 * Disable interrupts from this port 542 */ 543 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */ 544 545 uart_port_lock_irqsave(up, &flags); 546 serial_txx9_set_mctrl(up, up->mctrl); 547 uart_port_unlock_irqrestore(up, flags); 548 549 /* 550 * Disable break condition 551 */ 552 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); 553 554 #ifdef CONFIG_SERIAL_TXX9_CONSOLE 555 if (up->cons && up->line == up->cons->index) { 556 free_irq(up->irq, up); 557 return; 558 } 559 #endif 560 /* reset FIFOs */ 561 sio_set(up, TXX9_SIFCR, 562 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); 563 /* clear reset */ 564 sio_mask(up, TXX9_SIFCR, 565 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); 566 567 /* Disable RX/TX */ 568 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE); 569 570 free_irq(up->irq, up); 571 } 572 573 static void 574 serial_txx9_set_termios(struct uart_port *up, struct ktermios *termios, 575 const struct ktermios *old) 576 { 577 unsigned int cval, fcr = 0; 578 unsigned long flags; 579 unsigned int baud, quot; 580 581 /* 582 * We don't support modem control lines. 583 */ 584 termios->c_cflag &= ~(HUPCL | CMSPAR); 585 termios->c_cflag |= CLOCAL; 586 587 cval = sio_in(up, TXX9_SILCR); 588 /* byte size and parity */ 589 cval &= ~TXX9_SILCR_UMODE_MASK; 590 switch (termios->c_cflag & CSIZE) { 591 case CS7: 592 cval |= TXX9_SILCR_UMODE_7BIT; 593 break; 594 default: 595 case CS5: /* not supported */ 596 case CS6: /* not supported */ 597 case CS8: 598 cval |= TXX9_SILCR_UMODE_8BIT; 599 termios->c_cflag &= ~CSIZE; 600 termios->c_cflag |= CS8; 601 break; 602 } 603 604 cval &= ~TXX9_SILCR_USBL_MASK; 605 if (termios->c_cflag & CSTOPB) 606 cval |= TXX9_SILCR_USBL_2BIT; 607 else 608 cval |= TXX9_SILCR_USBL_1BIT; 609 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS); 610 if (termios->c_cflag & PARENB) 611 cval |= TXX9_SILCR_UPEN; 612 if (!(termios->c_cflag & PARODD)) 613 cval |= TXX9_SILCR_UEPS; 614 615 /* 616 * Ask the core to calculate the divisor for us. 617 */ 618 baud = uart_get_baud_rate(up, termios, old, 0, up->uartclk/16/2); 619 quot = uart_get_divisor(up, baud); 620 621 /* Set up FIFOs */ 622 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */ 623 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1; 624 625 /* 626 * Ok, we're now changing the port state. Do it with 627 * interrupts disabled. 628 */ 629 uart_port_lock_irqsave(up, &flags); 630 631 /* 632 * Update the per-port timeout. 633 */ 634 uart_update_timeout(up, termios->c_cflag, baud); 635 636 up->read_status_mask = TXX9_SIDISR_UOER | 637 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS; 638 if (termios->c_iflag & INPCK) 639 up->read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER; 640 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) 641 up->read_status_mask |= TXX9_SIDISR_UBRK; 642 643 /* 644 * Characteres to ignore 645 */ 646 up->ignore_status_mask = 0; 647 if (termios->c_iflag & IGNPAR) 648 up->ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER; 649 if (termios->c_iflag & IGNBRK) { 650 up->ignore_status_mask |= TXX9_SIDISR_UBRK; 651 /* 652 * If we're ignoring parity and break indicators, 653 * ignore overruns too (for real raw support). 654 */ 655 if (termios->c_iflag & IGNPAR) 656 up->ignore_status_mask |= TXX9_SIDISR_UOER; 657 } 658 659 /* 660 * ignore all characters if CREAD is not set 661 */ 662 if ((termios->c_cflag & CREAD) == 0) 663 up->ignore_status_mask |= TXX9_SIDISR_RDIS; 664 665 /* CTS flow control flag */ 666 if ((termios->c_cflag & CRTSCTS) && 667 (up->flags & UPF_TXX9_HAVE_CTS_LINE)) { 668 sio_set(up, TXX9_SIFLCR, 669 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES); 670 } else { 671 sio_mask(up, TXX9_SIFLCR, 672 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES); 673 } 674 675 sio_out(up, TXX9_SILCR, cval); 676 sio_quot_set(up, quot); 677 sio_out(up, TXX9_SIFCR, fcr); 678 679 serial_txx9_set_mctrl(up, up->mctrl); 680 uart_port_unlock_irqrestore(up, flags); 681 } 682 683 static void 684 serial_txx9_pm(struct uart_port *port, unsigned int state, 685 unsigned int oldstate) 686 { 687 /* 688 * If oldstate was -1 this is called from 689 * uart_configure_port(). In this case do not initialize the 690 * port now, because the port was already initialized (for 691 * non-console port) or should not be initialized here (for 692 * console port). If we initialized the port here we lose 693 * serial console settings. 694 */ 695 if (state == 0 && oldstate != -1) 696 serial_txx9_initialize(port); 697 } 698 699 static int serial_txx9_request_resource(struct uart_port *up) 700 { 701 unsigned int size = TXX9_REGION_SIZE; 702 int ret = 0; 703 704 switch (up->iotype) { 705 default: 706 if (!up->mapbase) 707 break; 708 709 if (!request_mem_region(up->mapbase, size, "serial_txx9")) { 710 ret = -EBUSY; 711 break; 712 } 713 714 if (up->flags & UPF_IOREMAP) { 715 up->membase = ioremap(up->mapbase, size); 716 if (!up->membase) { 717 release_mem_region(up->mapbase, size); 718 ret = -ENOMEM; 719 } 720 } 721 break; 722 723 case UPIO_PORT: 724 if (!request_region(up->iobase, size, "serial_txx9")) 725 ret = -EBUSY; 726 break; 727 } 728 return ret; 729 } 730 731 static void serial_txx9_release_resource(struct uart_port *up) 732 { 733 unsigned int size = TXX9_REGION_SIZE; 734 735 switch (up->iotype) { 736 default: 737 if (!up->mapbase) 738 break; 739 740 if (up->flags & UPF_IOREMAP) { 741 iounmap(up->membase); 742 up->membase = NULL; 743 } 744 745 release_mem_region(up->mapbase, size); 746 break; 747 748 case UPIO_PORT: 749 release_region(up->iobase, size); 750 break; 751 } 752 } 753 754 static void serial_txx9_release_port(struct uart_port *up) 755 { 756 serial_txx9_release_resource(up); 757 } 758 759 static int serial_txx9_request_port(struct uart_port *up) 760 { 761 return serial_txx9_request_resource(up); 762 } 763 764 static void serial_txx9_config_port(struct uart_port *up, int uflags) 765 { 766 int ret; 767 768 /* 769 * Find the region that we can probe for. This in turn 770 * tells us whether we can probe for the type of port. 771 */ 772 ret = serial_txx9_request_resource(up); 773 if (ret < 0) 774 return; 775 up->type = PORT_TXX9; 776 up->fifosize = TXX9_SIO_TX_FIFO; 777 778 #ifdef CONFIG_SERIAL_TXX9_CONSOLE 779 if (up->line == up->cons->index) 780 return; 781 #endif 782 serial_txx9_initialize(up); 783 } 784 785 static const char * 786 serial_txx9_type(struct uart_port *port) 787 { 788 return "txx9"; 789 } 790 791 static const struct uart_ops serial_txx9_pops = { 792 .tx_empty = serial_txx9_tx_empty, 793 .set_mctrl = serial_txx9_set_mctrl, 794 .get_mctrl = serial_txx9_get_mctrl, 795 .stop_tx = serial_txx9_stop_tx, 796 .start_tx = serial_txx9_start_tx, 797 .stop_rx = serial_txx9_stop_rx, 798 .break_ctl = serial_txx9_break_ctl, 799 .startup = serial_txx9_startup, 800 .shutdown = serial_txx9_shutdown, 801 .set_termios = serial_txx9_set_termios, 802 .pm = serial_txx9_pm, 803 .type = serial_txx9_type, 804 .release_port = serial_txx9_release_port, 805 .request_port = serial_txx9_request_port, 806 .config_port = serial_txx9_config_port, 807 #ifdef CONFIG_CONSOLE_POLL 808 .poll_get_char = serial_txx9_get_poll_char, 809 .poll_put_char = serial_txx9_put_poll_char, 810 #endif 811 }; 812 813 static struct uart_port serial_txx9_ports[UART_NR]; 814 815 static void __init serial_txx9_register_ports(struct uart_driver *drv, 816 struct device *dev) 817 { 818 int i; 819 820 for (i = 0; i < UART_NR; i++) { 821 struct uart_port *up = &serial_txx9_ports[i]; 822 823 up->line = i; 824 up->ops = &serial_txx9_pops; 825 up->dev = dev; 826 if (up->iobase || up->mapbase) 827 uart_add_one_port(drv, up); 828 } 829 } 830 831 #ifdef CONFIG_SERIAL_TXX9_CONSOLE 832 833 static void serial_txx9_console_putchar(struct uart_port *up, unsigned char ch) 834 { 835 wait_for_xmitr(up); 836 sio_out(up, TXX9_SITFIFO, ch); 837 } 838 839 /* 840 * Print a string to the serial port trying not to disturb 841 * any possible real use of the port... 842 * 843 * The console_lock must be held when we get here. 844 */ 845 static void 846 serial_txx9_console_write(struct console *co, const char *s, unsigned int count) 847 { 848 struct uart_port *up = &serial_txx9_ports[co->index]; 849 unsigned int ier, flcr; 850 851 /* 852 * First save the UER then disable the interrupts 853 */ 854 ier = sio_in(up, TXX9_SIDICR); 855 sio_out(up, TXX9_SIDICR, 0); 856 /* 857 * Disable flow-control if enabled (and unnecessary) 858 */ 859 flcr = sio_in(up, TXX9_SIFLCR); 860 if (!(up->flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES)) 861 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES); 862 863 uart_console_write(up, s, count, serial_txx9_console_putchar); 864 865 /* 866 * Finally, wait for transmitter to become empty 867 * and restore the IER 868 */ 869 wait_for_xmitr(up); 870 sio_out(up, TXX9_SIFLCR, flcr); 871 sio_out(up, TXX9_SIDICR, ier); 872 } 873 874 static int __init serial_txx9_console_setup(struct console *co, char *options) 875 { 876 struct uart_port *up; 877 int baud = 9600; 878 int bits = 8; 879 int parity = 'n'; 880 int flow = 'n'; 881 882 /* 883 * Check whether an invalid uart number has been specified, and 884 * if so, search for the first available port that does have 885 * console support. 886 */ 887 if (co->index >= UART_NR) 888 co->index = 0; 889 up = &serial_txx9_ports[co->index]; 890 if (!up->ops) 891 return -ENODEV; 892 893 serial_txx9_initialize(up); 894 895 if (options) 896 uart_parse_options(options, &baud, &parity, &bits, &flow); 897 898 return uart_set_options(up, co, baud, parity, bits, flow); 899 } 900 901 static struct uart_driver serial_txx9_reg; 902 static struct console serial_txx9_console = { 903 .name = TXX9_TTY_NAME, 904 .write = serial_txx9_console_write, 905 .device = uart_console_device, 906 .setup = serial_txx9_console_setup, 907 .flags = CON_PRINTBUFFER, 908 .index = -1, 909 .data = &serial_txx9_reg, 910 }; 911 912 static int __init serial_txx9_console_init(void) 913 { 914 register_console(&serial_txx9_console); 915 return 0; 916 } 917 console_initcall(serial_txx9_console_init); 918 919 #define SERIAL_TXX9_CONSOLE &serial_txx9_console 920 #else 921 #define SERIAL_TXX9_CONSOLE NULL 922 #endif 923 924 static struct uart_driver serial_txx9_reg = { 925 .owner = THIS_MODULE, 926 .driver_name = "serial_txx9", 927 .dev_name = TXX9_TTY_NAME, 928 .major = TXX9_TTY_MAJOR, 929 .minor = TXX9_TTY_MINOR_START, 930 .nr = UART_NR, 931 .cons = SERIAL_TXX9_CONSOLE, 932 }; 933 934 int __init early_serial_txx9_setup(struct uart_port *port) 935 { 936 if (port->line >= ARRAY_SIZE(serial_txx9_ports)) 937 return -ENODEV; 938 939 serial_txx9_ports[port->line] = *port; 940 serial_txx9_ports[port->line].ops = &serial_txx9_pops; 941 serial_txx9_ports[port->line].flags |= 942 UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; 943 return 0; 944 } 945 946 static DEFINE_MUTEX(serial_txx9_mutex); 947 948 /** 949 * serial_txx9_register_port - register a serial port 950 * @port: serial port template 951 * 952 * Configure the serial port specified by the request. 953 * 954 * The port is then probed and if necessary the IRQ is autodetected 955 * If this fails an error is returned. 956 * 957 * On success the port is ready to use and the line number is returned. 958 */ 959 static int serial_txx9_register_port(struct uart_port *port) 960 { 961 int i; 962 struct uart_port *uart; 963 int ret = -ENOSPC; 964 965 mutex_lock(&serial_txx9_mutex); 966 for (i = 0; i < UART_NR; i++) { 967 uart = &serial_txx9_ports[i]; 968 if (uart_match_port(uart, port)) { 969 uart_remove_one_port(&serial_txx9_reg, uart); 970 break; 971 } 972 } 973 if (i == UART_NR) { 974 /* Find unused port */ 975 for (i = 0; i < UART_NR; i++) { 976 uart = &serial_txx9_ports[i]; 977 if (!(uart->iobase || uart->mapbase)) 978 break; 979 } 980 } 981 if (i < UART_NR) { 982 uart->iobase = port->iobase; 983 uart->membase = port->membase; 984 uart->irq = port->irq; 985 uart->uartclk = port->uartclk; 986 uart->iotype = port->iotype; 987 uart->flags = port->flags 988 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; 989 uart->mapbase = port->mapbase; 990 if (port->dev) 991 uart->dev = port->dev; 992 ret = uart_add_one_port(&serial_txx9_reg, uart); 993 if (ret == 0) 994 ret = uart->line; 995 } 996 mutex_unlock(&serial_txx9_mutex); 997 return ret; 998 } 999 1000 /** 1001 * serial_txx9_unregister_port - remove a txx9 serial port at runtime 1002 * @line: serial line number 1003 * 1004 * Remove one serial port. This may not be called from interrupt 1005 * context. We hand the port back to the our control. 1006 */ 1007 static void serial_txx9_unregister_port(int line) 1008 { 1009 struct uart_port *uart = &serial_txx9_ports[line]; 1010 1011 mutex_lock(&serial_txx9_mutex); 1012 uart_remove_one_port(&serial_txx9_reg, uart); 1013 uart->flags = 0; 1014 uart->type = PORT_UNKNOWN; 1015 uart->iobase = 0; 1016 uart->mapbase = 0; 1017 uart->membase = NULL; 1018 uart->dev = NULL; 1019 mutex_unlock(&serial_txx9_mutex); 1020 } 1021 1022 /* 1023 * Register a set of serial devices attached to a platform device. 1024 */ 1025 static int serial_txx9_probe(struct platform_device *dev) 1026 { 1027 struct uart_port *p = dev_get_platdata(&dev->dev); 1028 struct uart_port port; 1029 int ret, i; 1030 1031 memset(&port, 0, sizeof(struct uart_port)); 1032 for (i = 0; p && p->uartclk != 0; p++, i++) { 1033 port.iobase = p->iobase; 1034 port.membase = p->membase; 1035 port.irq = p->irq; 1036 port.uartclk = p->uartclk; 1037 port.iotype = p->iotype; 1038 port.flags = p->flags; 1039 port.mapbase = p->mapbase; 1040 port.dev = &dev->dev; 1041 port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_TXX9_CONSOLE); 1042 ret = serial_txx9_register_port(&port); 1043 if (ret < 0) { 1044 dev_err(&dev->dev, "unable to register port at index %d " 1045 "(IO%lx MEM%llx IRQ%d): %d\n", i, 1046 p->iobase, (unsigned long long)p->mapbase, 1047 p->irq, ret); 1048 } 1049 } 1050 return 0; 1051 } 1052 1053 /* 1054 * Remove serial ports registered against a platform device. 1055 */ 1056 static void serial_txx9_remove(struct platform_device *dev) 1057 { 1058 int i; 1059 1060 for (i = 0; i < UART_NR; i++) { 1061 struct uart_port *up = &serial_txx9_ports[i]; 1062 1063 if (up->dev == &dev->dev) 1064 serial_txx9_unregister_port(i); 1065 } 1066 } 1067 1068 #ifdef CONFIG_PM 1069 static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state) 1070 { 1071 int i; 1072 1073 for (i = 0; i < UART_NR; i++) { 1074 struct uart_port *up = &serial_txx9_ports[i]; 1075 1076 if (up->type != PORT_UNKNOWN && up->dev == &dev->dev) 1077 uart_suspend_port(&serial_txx9_reg, up); 1078 } 1079 1080 return 0; 1081 } 1082 1083 static int serial_txx9_resume(struct platform_device *dev) 1084 { 1085 int i; 1086 1087 for (i = 0; i < UART_NR; i++) { 1088 struct uart_port *up = &serial_txx9_ports[i]; 1089 1090 if (up->type != PORT_UNKNOWN && up->dev == &dev->dev) 1091 uart_resume_port(&serial_txx9_reg, up); 1092 } 1093 1094 return 0; 1095 } 1096 #endif 1097 1098 static struct platform_driver serial_txx9_plat_driver = { 1099 .probe = serial_txx9_probe, 1100 .remove_new = serial_txx9_remove, 1101 #ifdef CONFIG_PM 1102 .suspend = serial_txx9_suspend, 1103 .resume = serial_txx9_resume, 1104 #endif 1105 .driver = { 1106 .name = "serial_txx9", 1107 }, 1108 }; 1109 1110 #ifdef ENABLE_SERIAL_TXX9_PCI 1111 /* 1112 * Probe one serial board. Unfortunately, there is no rhyme nor reason 1113 * to the arrangement of serial ports on a PCI card. 1114 */ 1115 static int 1116 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent) 1117 { 1118 struct uart_port port; 1119 int line; 1120 int rc; 1121 1122 rc = pci_enable_device(dev); 1123 if (rc) 1124 return rc; 1125 1126 memset(&port, 0, sizeof(port)); 1127 port.ops = &serial_txx9_pops; 1128 port.flags |= UPF_TXX9_HAVE_CTS_LINE; 1129 port.uartclk = 66670000; 1130 port.irq = dev->irq; 1131 port.iotype = UPIO_PORT; 1132 port.iobase = pci_resource_start(dev, 1); 1133 port.dev = &dev->dev; 1134 line = serial_txx9_register_port(&port); 1135 if (line < 0) { 1136 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line); 1137 pci_disable_device(dev); 1138 return line; 1139 } 1140 pci_set_drvdata(dev, &serial_txx9_ports[line]); 1141 1142 return 0; 1143 } 1144 1145 static void pciserial_txx9_remove_one(struct pci_dev *dev) 1146 { 1147 struct uart_port *up = pci_get_drvdata(dev); 1148 1149 if (up) { 1150 serial_txx9_unregister_port(up->line); 1151 pci_disable_device(dev); 1152 } 1153 } 1154 1155 #ifdef CONFIG_PM 1156 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state) 1157 { 1158 struct uart_port *up = pci_get_drvdata(dev); 1159 1160 if (up) 1161 uart_suspend_port(&serial_txx9_reg, up); 1162 pci_save_state(dev); 1163 pci_set_power_state(dev, pci_choose_state(dev, state)); 1164 return 0; 1165 } 1166 1167 static int pciserial_txx9_resume_one(struct pci_dev *dev) 1168 { 1169 struct uart_port *up = pci_get_drvdata(dev); 1170 1171 pci_set_power_state(dev, PCI_D0); 1172 pci_restore_state(dev); 1173 if (up) 1174 uart_resume_port(&serial_txx9_reg, up); 1175 return 0; 1176 } 1177 #endif 1178 1179 static const struct pci_device_id serial_txx9_pci_tbl[] = { 1180 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) }, 1181 { 0, } 1182 }; 1183 1184 static struct pci_driver serial_txx9_pci_driver = { 1185 .name = "serial_txx9", 1186 .probe = pciserial_txx9_init_one, 1187 .remove = pciserial_txx9_remove_one, 1188 #ifdef CONFIG_PM 1189 .suspend = pciserial_txx9_suspend_one, 1190 .resume = pciserial_txx9_resume_one, 1191 #endif 1192 .id_table = serial_txx9_pci_tbl, 1193 }; 1194 1195 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl); 1196 #endif /* ENABLE_SERIAL_TXX9_PCI */ 1197 1198 static struct platform_device *serial_txx9_plat_devs; 1199 1200 static int __init serial_txx9_init(void) 1201 { 1202 int ret; 1203 1204 ret = uart_register_driver(&serial_txx9_reg); 1205 if (ret) 1206 goto out; 1207 1208 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1); 1209 if (!serial_txx9_plat_devs) { 1210 ret = -ENOMEM; 1211 goto unreg_uart_drv; 1212 } 1213 1214 ret = platform_device_add(serial_txx9_plat_devs); 1215 if (ret) 1216 goto put_dev; 1217 1218 serial_txx9_register_ports(&serial_txx9_reg, 1219 &serial_txx9_plat_devs->dev); 1220 1221 ret = platform_driver_register(&serial_txx9_plat_driver); 1222 if (ret) 1223 goto del_dev; 1224 1225 #ifdef ENABLE_SERIAL_TXX9_PCI 1226 ret = pci_register_driver(&serial_txx9_pci_driver); 1227 if (ret) { 1228 platform_driver_unregister(&serial_txx9_plat_driver); 1229 } 1230 #endif 1231 if (ret == 0) 1232 goto out; 1233 1234 del_dev: 1235 platform_device_del(serial_txx9_plat_devs); 1236 put_dev: 1237 platform_device_put(serial_txx9_plat_devs); 1238 unreg_uart_drv: 1239 uart_unregister_driver(&serial_txx9_reg); 1240 out: 1241 return ret; 1242 } 1243 1244 static void __exit serial_txx9_exit(void) 1245 { 1246 int i; 1247 1248 #ifdef ENABLE_SERIAL_TXX9_PCI 1249 pci_unregister_driver(&serial_txx9_pci_driver); 1250 #endif 1251 platform_driver_unregister(&serial_txx9_plat_driver); 1252 platform_device_unregister(serial_txx9_plat_devs); 1253 for (i = 0; i < UART_NR; i++) { 1254 struct uart_port *up = &serial_txx9_ports[i]; 1255 if (up->iobase || up->mapbase) 1256 uart_remove_one_port(&serial_txx9_reg, up); 1257 } 1258 1259 uart_unregister_driver(&serial_txx9_reg); 1260 } 1261 1262 module_init(serial_txx9_init); 1263 module_exit(serial_txx9_exit); 1264 1265 MODULE_LICENSE("GPL"); 1266 MODULE_DESCRIPTION("TX39/49 serial driver"); 1267 1268 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR); 1269