1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Serial core port device driver 4 * 5 * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ 6 * Author: Tony Lindgren <tony@atomide.com> 7 */ 8 9 #include <linux/device.h> 10 #include <linux/module.h> 11 #include <linux/of.h> 12 #include <linux/platform_device.h> 13 #include <linux/pm_runtime.h> 14 #include <linux/pnp.h> 15 #include <linux/property.h> 16 #include <linux/serial_core.h> 17 #include <linux/spinlock.h> 18 19 #include "serial_base.h" 20 21 #define SERIAL_PORT_AUTOSUSPEND_DELAY_MS 500 22 23 /* Only considers pending TX for now. Caller must take care of locking */ 24 static int __serial_port_busy(struct uart_port *port) 25 { 26 return !uart_tx_stopped(port) && 27 !kfifo_is_empty(&port->state->port.xmit_fifo); 28 } 29 30 static int serial_port_runtime_resume(struct device *dev) 31 { 32 struct serial_port_device *port_dev = to_serial_base_port_device(dev); 33 struct uart_port *port; 34 unsigned long flags; 35 36 port = port_dev->port; 37 38 if (port->flags & UPF_DEAD) 39 goto out; 40 41 /* Flush any pending TX for the port */ 42 uart_port_lock_irqsave(port, &flags); 43 if (!port_dev->tx_enabled) 44 goto unlock; 45 if (__serial_port_busy(port)) 46 port->ops->start_tx(port); 47 48 unlock: 49 uart_port_unlock_irqrestore(port, flags); 50 51 out: 52 pm_runtime_mark_last_busy(dev); 53 54 return 0; 55 } 56 57 static int serial_port_runtime_suspend(struct device *dev) 58 { 59 struct serial_port_device *port_dev = to_serial_base_port_device(dev); 60 struct uart_port *port = port_dev->port; 61 unsigned long flags; 62 bool busy; 63 64 if (port->flags & UPF_DEAD) 65 return 0; 66 67 uart_port_lock_irqsave(port, &flags); 68 if (!port_dev->tx_enabled) { 69 uart_port_unlock_irqrestore(port, flags); 70 return 0; 71 } 72 73 busy = __serial_port_busy(port); 74 if (busy) 75 port->ops->start_tx(port); 76 uart_port_unlock_irqrestore(port, flags); 77 78 if (busy) 79 pm_runtime_mark_last_busy(dev); 80 81 return busy ? -EBUSY : 0; 82 } 83 84 static void serial_base_port_set_tx(struct uart_port *port, 85 struct serial_port_device *port_dev, 86 bool enabled) 87 { 88 unsigned long flags; 89 90 uart_port_lock_irqsave(port, &flags); 91 port_dev->tx_enabled = enabled; 92 uart_port_unlock_irqrestore(port, flags); 93 } 94 95 void serial_base_port_startup(struct uart_port *port) 96 { 97 struct serial_port_device *port_dev = port->port_dev; 98 99 serial_base_port_set_tx(port, port_dev, true); 100 } 101 102 void serial_base_port_shutdown(struct uart_port *port) 103 { 104 struct serial_port_device *port_dev = port->port_dev; 105 106 serial_base_port_set_tx(port, port_dev, false); 107 } 108 109 static DEFINE_RUNTIME_DEV_PM_OPS(serial_port_pm, 110 serial_port_runtime_suspend, 111 serial_port_runtime_resume, NULL); 112 113 static int serial_port_probe(struct device *dev) 114 { 115 pm_runtime_enable(dev); 116 pm_runtime_set_autosuspend_delay(dev, SERIAL_PORT_AUTOSUSPEND_DELAY_MS); 117 pm_runtime_use_autosuspend(dev); 118 119 return 0; 120 } 121 122 static int serial_port_remove(struct device *dev) 123 { 124 pm_runtime_dont_use_autosuspend(dev); 125 pm_runtime_disable(dev); 126 127 return 0; 128 } 129 130 /* 131 * Serial core port device init functions. Note that the physical serial 132 * port device driver may not have completed probe at this point. 133 */ 134 int uart_add_one_port(struct uart_driver *drv, struct uart_port *port) 135 { 136 return serial_ctrl_register_port(drv, port); 137 } 138 EXPORT_SYMBOL(uart_add_one_port); 139 140 void uart_remove_one_port(struct uart_driver *drv, struct uart_port *port) 141 { 142 serial_ctrl_unregister_port(drv, port); 143 } 144 EXPORT_SYMBOL(uart_remove_one_port); 145 146 /** 147 * __uart_read_properties - read firmware properties of the given UART port 148 * @port: corresponding port 149 * @use_defaults: apply defaults (when %true) or validate the values (when %false) 150 * 151 * The following device properties are supported: 152 * - clock-frequency (optional) 153 * - fifo-size (optional) 154 * - no-loopback-test (optional) 155 * - reg-shift (defaults may apply) 156 * - reg-offset (value may be validated) 157 * - reg-io-width (defaults may apply or value may be validated) 158 * - interrupts (OF only) 159 * - serial [alias ID] (OF only) 160 * 161 * If the port->dev is of struct platform_device type the interrupt line 162 * will be retrieved via platform_get_irq() call against that device. 163 * Otherwise it will be assigned by fwnode_irq_get() call. In both cases 164 * the index 0 of the resource is used. 165 * 166 * The caller is responsible to initialize the following fields of the @port 167 * ->dev (must be valid) 168 * ->flags 169 * ->mapbase 170 * ->mapsize 171 * ->regshift (if @use_defaults is false) 172 * before calling this function. Alternatively the above mentioned fields 173 * may be zeroed, in such case the only ones, that have associated properties 174 * found, will be set to the respective values. 175 * 176 * If no error happened, the ->irq, ->mapbase, ->mapsize will be altered. 177 * The ->iotype is always altered. 178 * 179 * When @use_defaults is true and the respective property is not found 180 * the following values will be applied: 181 * ->regshift = 0 182 * In this case IRQ must be provided, otherwise an error will be returned. 183 * 184 * When @use_defaults is false and the respective property is found 185 * the following values will be validated: 186 * - reg-io-width (->iotype) 187 * - reg-offset (->mapsize against ->mapbase) 188 * 189 * Returns: 0 on success or negative errno on failure 190 */ 191 static int __uart_read_properties(struct uart_port *port, bool use_defaults) 192 { 193 struct device *dev = port->dev; 194 u32 value; 195 int ret; 196 197 /* Read optional UART functional clock frequency */ 198 device_property_read_u32(dev, "clock-frequency", &port->uartclk); 199 200 /* Read the registers alignment (default: 8-bit) */ 201 ret = device_property_read_u32(dev, "reg-shift", &value); 202 if (ret) 203 port->regshift = use_defaults ? 0 : port->regshift; 204 else 205 port->regshift = value; 206 207 /* Read the registers I/O access type (default: MMIO 8-bit) */ 208 ret = device_property_read_u32(dev, "reg-io-width", &value); 209 if (ret) { 210 port->iotype = UPIO_MEM; 211 } else { 212 switch (value) { 213 case 1: 214 port->iotype = UPIO_MEM; 215 break; 216 case 2: 217 port->iotype = UPIO_MEM16; 218 break; 219 case 4: 220 port->iotype = device_is_big_endian(dev) ? UPIO_MEM32BE : UPIO_MEM32; 221 break; 222 default: 223 if (!use_defaults) { 224 dev_err(dev, "Unsupported reg-io-width (%u)\n", value); 225 return -EINVAL; 226 } 227 port->iotype = UPIO_UNKNOWN; 228 break; 229 } 230 } 231 232 /* Read the address mapping base offset (default: no offset) */ 233 ret = device_property_read_u32(dev, "reg-offset", &value); 234 if (ret) 235 value = 0; 236 237 /* Check for shifted address mapping overflow */ 238 if (!use_defaults && port->mapsize < value) { 239 dev_err(dev, "reg-offset %u exceeds region size %pa\n", value, &port->mapsize); 240 return -EINVAL; 241 } 242 243 port->mapbase += value; 244 port->mapsize -= value; 245 246 /* Read optional FIFO size */ 247 device_property_read_u32(dev, "fifo-size", &port->fifosize); 248 249 if (device_property_read_bool(dev, "no-loopback-test")) 250 port->flags |= UPF_SKIP_TEST; 251 252 /* Get index of serial line, if found in DT aliases */ 253 ret = of_alias_get_id(dev_of_node(dev), "serial"); 254 if (ret >= 0) 255 port->line = ret; 256 257 if (dev_is_platform(dev)) 258 ret = platform_get_irq(to_platform_device(dev), 0); 259 else if (dev_is_pnp(dev)) { 260 ret = pnp_irq(to_pnp_dev(dev), 0); 261 if (ret < 0) 262 ret = -ENXIO; 263 } else 264 ret = fwnode_irq_get(dev_fwnode(dev), 0); 265 if (ret == -EPROBE_DEFER) 266 return ret; 267 if (ret > 0) 268 port->irq = ret; 269 else if (use_defaults) 270 /* By default IRQ support is mandatory */ 271 return ret; 272 else 273 port->irq = 0; 274 275 port->flags |= UPF_SHARE_IRQ; 276 277 return 0; 278 } 279 280 int uart_read_port_properties(struct uart_port *port) 281 { 282 return __uart_read_properties(port, true); 283 } 284 EXPORT_SYMBOL_GPL(uart_read_port_properties); 285 286 int uart_read_and_validate_port_properties(struct uart_port *port) 287 { 288 return __uart_read_properties(port, false); 289 } 290 EXPORT_SYMBOL_GPL(uart_read_and_validate_port_properties); 291 292 static struct device_driver serial_port_driver = { 293 .name = "port", 294 .suppress_bind_attrs = true, 295 .probe = serial_port_probe, 296 .remove = serial_port_remove, 297 .pm = pm_ptr(&serial_port_pm), 298 }; 299 300 int serial_base_port_init(void) 301 { 302 return serial_base_driver_register(&serial_port_driver); 303 } 304 305 void serial_base_port_exit(void) 306 { 307 serial_base_driver_unregister(&serial_port_driver); 308 } 309 310 MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>"); 311 MODULE_DESCRIPTION("Serial controller port driver"); 312 MODULE_LICENSE("GPL"); 313