xref: /linux/drivers/tty/serial/sc16is7xx_spi.c (revision cdd30ebb1b9f36159d66f088b61aee264e649d7a)
1d4921643SHugo Villeneuve // SPDX-License-Identifier: GPL-2.0+
2d4921643SHugo Villeneuve /* SC16IS7xx SPI interface driver */
3d4921643SHugo Villeneuve 
4d4921643SHugo Villeneuve #include <linux/dev_printk.h>
5d4921643SHugo Villeneuve #include <linux/mod_devicetable.h>
6d4921643SHugo Villeneuve #include <linux/module.h>
7d4921643SHugo Villeneuve #include <linux/regmap.h>
8d4921643SHugo Villeneuve #include <linux/spi/spi.h>
9d4921643SHugo Villeneuve #include <linux/string.h>
10d4921643SHugo Villeneuve #include <linux/units.h>
11d4921643SHugo Villeneuve 
12d4921643SHugo Villeneuve #include "sc16is7xx.h"
13d4921643SHugo Villeneuve 
14d4921643SHugo Villeneuve /* SPI definitions */
15d4921643SHugo Villeneuve #define SC16IS7XX_SPI_READ_BIT	BIT(7)
16d4921643SHugo Villeneuve 
sc16is7xx_spi_probe(struct spi_device * spi)17d4921643SHugo Villeneuve static int sc16is7xx_spi_probe(struct spi_device *spi)
18d4921643SHugo Villeneuve {
19d4921643SHugo Villeneuve 	const struct sc16is7xx_devtype *devtype;
20d4921643SHugo Villeneuve 	struct regmap *regmaps[SC16IS7XX_MAX_PORTS];
2148d4a801SHugo Villeneuve 	struct regmap_config regcfg;
22d4921643SHugo Villeneuve 	unsigned int i;
23d4921643SHugo Villeneuve 	int ret;
24d4921643SHugo Villeneuve 
25d4921643SHugo Villeneuve 	/* Setup SPI bus */
26d4921643SHugo Villeneuve 	spi->bits_per_word	= 8;
27d4921643SHugo Villeneuve 	/* For all variants, only mode 0 is supported */
28d4921643SHugo Villeneuve 	if ((spi->mode & SPI_MODE_X_MASK) != SPI_MODE_0)
29d4921643SHugo Villeneuve 		return dev_err_probe(&spi->dev, -EINVAL, "Unsupported SPI mode\n");
30d4921643SHugo Villeneuve 
31d4921643SHugo Villeneuve 	spi->mode		= spi->mode ? : SPI_MODE_0;
32d4921643SHugo Villeneuve 	spi->max_speed_hz	= spi->max_speed_hz ? : 4 * HZ_PER_MHZ;
33d4921643SHugo Villeneuve 	ret = spi_setup(spi);
34d4921643SHugo Villeneuve 	if (ret)
35d4921643SHugo Villeneuve 		return ret;
36d4921643SHugo Villeneuve 
37d4921643SHugo Villeneuve 	devtype = spi_get_device_match_data(spi);
38d4921643SHugo Villeneuve 	if (!devtype)
39d4921643SHugo Villeneuve 		return dev_err_probe(&spi->dev, -ENODEV, "Failed to match device\n");
40d4921643SHugo Villeneuve 
4148d4a801SHugo Villeneuve 	memcpy(&regcfg, &sc16is7xx_regcfg, sizeof(struct regmap_config));
4248d4a801SHugo Villeneuve 
43d4921643SHugo Villeneuve 	for (i = 0; i < devtype->nr_uart; i++) {
4448d4a801SHugo Villeneuve 		regcfg.name = sc16is7xx_regmap_name(i);
45d4921643SHugo Villeneuve 		/*
46d4921643SHugo Villeneuve 		 * If read_flag_mask is 0, the regmap code sets it to a default
47d4921643SHugo Villeneuve 		 * of 0x80. Since we specify our own mask, we must add the READ
48d4921643SHugo Villeneuve 		 * bit ourselves:
49d4921643SHugo Villeneuve 		 */
5048d4a801SHugo Villeneuve 		regcfg.read_flag_mask = sc16is7xx_regmap_port_mask(i) |
51d4921643SHugo Villeneuve 			SC16IS7XX_SPI_READ_BIT;
5248d4a801SHugo Villeneuve 		regcfg.write_flag_mask = sc16is7xx_regmap_port_mask(i);
5348d4a801SHugo Villeneuve 		regmaps[i] = devm_regmap_init_spi(spi, &regcfg);
54d4921643SHugo Villeneuve 	}
55d4921643SHugo Villeneuve 
56d4921643SHugo Villeneuve 	return sc16is7xx_probe(&spi->dev, devtype, regmaps, spi->irq);
57d4921643SHugo Villeneuve }
58d4921643SHugo Villeneuve 
sc16is7xx_spi_remove(struct spi_device * spi)59d4921643SHugo Villeneuve static void sc16is7xx_spi_remove(struct spi_device *spi)
60d4921643SHugo Villeneuve {
61d4921643SHugo Villeneuve 	sc16is7xx_remove(&spi->dev);
62d4921643SHugo Villeneuve }
63d4921643SHugo Villeneuve 
64d4921643SHugo Villeneuve static const struct spi_device_id sc16is7xx_spi_id_table[] = {
65d4921643SHugo Villeneuve 	{ "sc16is74x",	(kernel_ulong_t)&sc16is74x_devtype, },
66d4921643SHugo Villeneuve 	{ "sc16is740",	(kernel_ulong_t)&sc16is74x_devtype, },
67d4921643SHugo Villeneuve 	{ "sc16is741",	(kernel_ulong_t)&sc16is74x_devtype, },
68d4921643SHugo Villeneuve 	{ "sc16is750",	(kernel_ulong_t)&sc16is750_devtype, },
69d4921643SHugo Villeneuve 	{ "sc16is752",	(kernel_ulong_t)&sc16is752_devtype, },
70d4921643SHugo Villeneuve 	{ "sc16is760",	(kernel_ulong_t)&sc16is760_devtype, },
71d4921643SHugo Villeneuve 	{ "sc16is762",	(kernel_ulong_t)&sc16is762_devtype, },
72d4921643SHugo Villeneuve 	{ }
73d4921643SHugo Villeneuve };
74d4921643SHugo Villeneuve MODULE_DEVICE_TABLE(spi, sc16is7xx_spi_id_table);
75d4921643SHugo Villeneuve 
76d4921643SHugo Villeneuve static struct spi_driver sc16is7xx_spi_driver = {
77d4921643SHugo Villeneuve 	.driver = {
78d4921643SHugo Villeneuve 		.name		= SC16IS7XX_NAME,
79d4921643SHugo Villeneuve 		.of_match_table	= sc16is7xx_dt_ids,
80d4921643SHugo Villeneuve 	},
81d4921643SHugo Villeneuve 	.probe		= sc16is7xx_spi_probe,
82d4921643SHugo Villeneuve 	.remove		= sc16is7xx_spi_remove,
83d4921643SHugo Villeneuve 	.id_table	= sc16is7xx_spi_id_table,
84d4921643SHugo Villeneuve };
85d4921643SHugo Villeneuve 
86d4921643SHugo Villeneuve module_spi_driver(sc16is7xx_spi_driver);
87d4921643SHugo Villeneuve 
88d4921643SHugo Villeneuve MODULE_LICENSE("GPL");
89d4921643SHugo Villeneuve MODULE_DESCRIPTION("SC16IS7xx SPI interface driver");
90*cdd30ebbSPeter Zijlstra MODULE_IMPORT_NS("SERIAL_NXP_SC16IS7XX");
91