1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * RDA8810PL serial device driver 4 * 5 * Copyright RDA Microelectronics Company Limited 6 * Copyright (c) 2017 Andreas Färber 7 * Copyright (c) 2018 Manivannan Sadhasivam 8 */ 9 10 #include <linux/clk.h> 11 #include <linux/console.h> 12 #include <linux/delay.h> 13 #include <linux/io.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/platform_device.h> 17 #include <linux/serial.h> 18 #include <linux/serial_core.h> 19 #include <linux/tty.h> 20 #include <linux/tty_flip.h> 21 22 #define RDA_UART_PORT_NUM 3 23 #define RDA_UART_DEV_NAME "ttyRDA" 24 25 #define RDA_UART_CTRL 0x00 26 #define RDA_UART_STATUS 0x04 27 #define RDA_UART_RXTX_BUFFER 0x08 28 #define RDA_UART_IRQ_MASK 0x0c 29 #define RDA_UART_IRQ_CAUSE 0x10 30 #define RDA_UART_IRQ_TRIGGERS 0x14 31 #define RDA_UART_CMD_SET 0x18 32 #define RDA_UART_CMD_CLR 0x1c 33 34 /* UART_CTRL Bits */ 35 #define RDA_UART_ENABLE BIT(0) 36 #define RDA_UART_DBITS_8 BIT(1) 37 #define RDA_UART_TX_SBITS_2 BIT(2) 38 #define RDA_UART_PARITY_EN BIT(3) 39 #define RDA_UART_PARITY(x) (((x) & 0x3) << 4) 40 #define RDA_UART_PARITY_ODD RDA_UART_PARITY(0) 41 #define RDA_UART_PARITY_EVEN RDA_UART_PARITY(1) 42 #define RDA_UART_PARITY_SPACE RDA_UART_PARITY(2) 43 #define RDA_UART_PARITY_MARK RDA_UART_PARITY(3) 44 #define RDA_UART_DIV_MODE BIT(20) 45 #define RDA_UART_IRDA_EN BIT(21) 46 #define RDA_UART_DMA_EN BIT(22) 47 #define RDA_UART_FLOW_CNT_EN BIT(23) 48 #define RDA_UART_LOOP_BACK_EN BIT(24) 49 #define RDA_UART_RX_LOCK_ERR BIT(25) 50 #define RDA_UART_RX_BREAK_LEN(x) (((x) & 0xf) << 28) 51 52 /* UART_STATUS Bits */ 53 #define RDA_UART_RX_FIFO(x) (((x) & 0x7f) << 0) 54 #define RDA_UART_RX_FIFO_MASK (0x7f << 0) 55 #define RDA_UART_TX_FIFO(x) (((x) & 0x1f) << 8) 56 #define RDA_UART_TX_FIFO_MASK (0x1f << 8) 57 #define RDA_UART_TX_ACTIVE BIT(14) 58 #define RDA_UART_RX_ACTIVE BIT(15) 59 #define RDA_UART_RX_OVERFLOW_ERR BIT(16) 60 #define RDA_UART_TX_OVERFLOW_ERR BIT(17) 61 #define RDA_UART_RX_PARITY_ERR BIT(18) 62 #define RDA_UART_RX_FRAMING_ERR BIT(19) 63 #define RDA_UART_RX_BREAK_INT BIT(20) 64 #define RDA_UART_DCTS BIT(24) 65 #define RDA_UART_CTS BIT(25) 66 #define RDA_UART_DTR BIT(28) 67 #define RDA_UART_CLK_ENABLED BIT(31) 68 69 /* UART_RXTX_BUFFER Bits */ 70 #define RDA_UART_RX_DATA(x) (((x) & 0xff) << 0) 71 #define RDA_UART_TX_DATA(x) (((x) & 0xff) << 0) 72 73 /* UART_IRQ_MASK Bits */ 74 #define RDA_UART_TX_MODEM_STATUS BIT(0) 75 #define RDA_UART_RX_DATA_AVAILABLE BIT(1) 76 #define RDA_UART_TX_DATA_NEEDED BIT(2) 77 #define RDA_UART_RX_TIMEOUT BIT(3) 78 #define RDA_UART_RX_LINE_ERR BIT(4) 79 #define RDA_UART_TX_DMA_DONE BIT(5) 80 #define RDA_UART_RX_DMA_DONE BIT(6) 81 #define RDA_UART_RX_DMA_TIMEOUT BIT(7) 82 #define RDA_UART_DTR_RISE BIT(8) 83 #define RDA_UART_DTR_FALL BIT(9) 84 85 /* UART_IRQ_CAUSE Bits */ 86 #define RDA_UART_TX_MODEM_STATUS_U BIT(16) 87 #define RDA_UART_RX_DATA_AVAILABLE_U BIT(17) 88 #define RDA_UART_TX_DATA_NEEDED_U BIT(18) 89 #define RDA_UART_RX_TIMEOUT_U BIT(19) 90 #define RDA_UART_RX_LINE_ERR_U BIT(20) 91 #define RDA_UART_TX_DMA_DONE_U BIT(21) 92 #define RDA_UART_RX_DMA_DONE_U BIT(22) 93 #define RDA_UART_RX_DMA_TIMEOUT_U BIT(23) 94 #define RDA_UART_DTR_RISE_U BIT(24) 95 #define RDA_UART_DTR_FALL_U BIT(25) 96 97 /* UART_TRIGGERS Bits */ 98 #define RDA_UART_RX_TRIGGER(x) (((x) & 0x1f) << 0) 99 #define RDA_UART_TX_TRIGGER(x) (((x) & 0xf) << 8) 100 #define RDA_UART_AFC_LEVEL(x) (((x) & 0x1f) << 16) 101 102 /* UART_CMD_SET Bits */ 103 #define RDA_UART_RI BIT(0) 104 #define RDA_UART_DCD BIT(1) 105 #define RDA_UART_DSR BIT(2) 106 #define RDA_UART_TX_BREAK_CONTROL BIT(3) 107 #define RDA_UART_TX_FINISH_N_WAIT BIT(4) 108 #define RDA_UART_RTS BIT(5) 109 #define RDA_UART_RX_FIFO_RESET BIT(6) 110 #define RDA_UART_TX_FIFO_RESET BIT(7) 111 112 #define RDA_UART_TX_FIFO_SIZE 16 113 114 static struct uart_driver rda_uart_driver; 115 116 struct rda_uart_port { 117 struct uart_port port; 118 struct clk *clk; 119 }; 120 121 #define to_rda_uart_port(port) container_of(port, struct rda_uart_port, port) 122 123 static struct rda_uart_port *rda_uart_ports[RDA_UART_PORT_NUM]; 124 125 static inline void rda_uart_write(struct uart_port *port, u32 val, 126 unsigned int off) 127 { 128 writel(val, port->membase + off); 129 } 130 131 static inline u32 rda_uart_read(struct uart_port *port, unsigned int off) 132 { 133 return readl(port->membase + off); 134 } 135 136 static unsigned int rda_uart_tx_empty(struct uart_port *port) 137 { 138 unsigned long flags; 139 unsigned int ret; 140 u32 val; 141 142 uart_port_lock_irqsave(port, &flags); 143 144 val = rda_uart_read(port, RDA_UART_STATUS); 145 ret = (val & RDA_UART_TX_FIFO_MASK) ? TIOCSER_TEMT : 0; 146 147 uart_port_unlock_irqrestore(port, flags); 148 149 return ret; 150 } 151 152 static unsigned int rda_uart_get_mctrl(struct uart_port *port) 153 { 154 unsigned int mctrl = 0; 155 u32 cmd_set, status; 156 157 cmd_set = rda_uart_read(port, RDA_UART_CMD_SET); 158 status = rda_uart_read(port, RDA_UART_STATUS); 159 if (cmd_set & RDA_UART_RTS) 160 mctrl |= TIOCM_RTS; 161 if (!(status & RDA_UART_CTS)) 162 mctrl |= TIOCM_CTS; 163 164 return mctrl; 165 } 166 167 static void rda_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) 168 { 169 u32 val; 170 171 if (mctrl & TIOCM_RTS) { 172 val = rda_uart_read(port, RDA_UART_CMD_SET); 173 rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_SET); 174 } else { 175 /* Clear RTS to stop to receive. */ 176 val = rda_uart_read(port, RDA_UART_CMD_CLR); 177 rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_CLR); 178 } 179 180 val = rda_uart_read(port, RDA_UART_CTRL); 181 182 if (mctrl & TIOCM_LOOP) 183 val |= RDA_UART_LOOP_BACK_EN; 184 else 185 val &= ~RDA_UART_LOOP_BACK_EN; 186 187 rda_uart_write(port, val, RDA_UART_CTRL); 188 } 189 190 static void rda_uart_stop_tx(struct uart_port *port) 191 { 192 u32 val; 193 194 val = rda_uart_read(port, RDA_UART_IRQ_MASK); 195 val &= ~RDA_UART_TX_DATA_NEEDED; 196 rda_uart_write(port, val, RDA_UART_IRQ_MASK); 197 198 val = rda_uart_read(port, RDA_UART_CMD_SET); 199 val |= RDA_UART_TX_FIFO_RESET; 200 rda_uart_write(port, val, RDA_UART_CMD_SET); 201 } 202 203 static void rda_uart_stop_rx(struct uart_port *port) 204 { 205 u32 val; 206 207 val = rda_uart_read(port, RDA_UART_IRQ_MASK); 208 val &= ~(RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT); 209 rda_uart_write(port, val, RDA_UART_IRQ_MASK); 210 211 /* Read Rx buffer before reset to avoid Rx timeout interrupt */ 212 val = rda_uart_read(port, RDA_UART_RXTX_BUFFER); 213 214 val = rda_uart_read(port, RDA_UART_CMD_SET); 215 val |= RDA_UART_RX_FIFO_RESET; 216 rda_uart_write(port, val, RDA_UART_CMD_SET); 217 } 218 219 static void rda_uart_start_tx(struct uart_port *port) 220 { 221 u32 val; 222 223 if (uart_tx_stopped(port)) { 224 rda_uart_stop_tx(port); 225 return; 226 } 227 228 val = rda_uart_read(port, RDA_UART_IRQ_MASK); 229 val |= RDA_UART_TX_DATA_NEEDED; 230 rda_uart_write(port, val, RDA_UART_IRQ_MASK); 231 } 232 233 static void rda_uart_change_baudrate(struct rda_uart_port *rda_port, 234 unsigned long baud) 235 { 236 clk_set_rate(rda_port->clk, baud * 8); 237 } 238 239 static void rda_uart_set_termios(struct uart_port *port, 240 struct ktermios *termios, 241 const struct ktermios *old) 242 { 243 struct rda_uart_port *rda_port = to_rda_uart_port(port); 244 unsigned long flags; 245 unsigned int ctrl, cmd_set, cmd_clr, triggers; 246 unsigned int baud; 247 u32 irq_mask; 248 249 uart_port_lock_irqsave(port, &flags); 250 251 baud = uart_get_baud_rate(port, termios, old, 9600, port->uartclk / 4); 252 rda_uart_change_baudrate(rda_port, baud); 253 254 ctrl = rda_uart_read(port, RDA_UART_CTRL); 255 cmd_set = rda_uart_read(port, RDA_UART_CMD_SET); 256 cmd_clr = rda_uart_read(port, RDA_UART_CMD_CLR); 257 258 switch (termios->c_cflag & CSIZE) { 259 case CS5: 260 case CS6: 261 dev_warn(port->dev, "bit size not supported, using 7 bits\n"); 262 fallthrough; 263 case CS7: 264 ctrl &= ~RDA_UART_DBITS_8; 265 termios->c_cflag &= ~CSIZE; 266 termios->c_cflag |= CS7; 267 break; 268 default: 269 ctrl |= RDA_UART_DBITS_8; 270 break; 271 } 272 273 /* stop bits */ 274 if (termios->c_cflag & CSTOPB) 275 ctrl |= RDA_UART_TX_SBITS_2; 276 else 277 ctrl &= ~RDA_UART_TX_SBITS_2; 278 279 /* parity check */ 280 if (termios->c_cflag & PARENB) { 281 ctrl |= RDA_UART_PARITY_EN; 282 283 /* Mark or Space parity */ 284 if (termios->c_cflag & CMSPAR) { 285 if (termios->c_cflag & PARODD) 286 ctrl |= RDA_UART_PARITY_MARK; 287 else 288 ctrl |= RDA_UART_PARITY_SPACE; 289 } else if (termios->c_cflag & PARODD) { 290 ctrl |= RDA_UART_PARITY_ODD; 291 } else { 292 ctrl |= RDA_UART_PARITY_EVEN; 293 } 294 } else { 295 ctrl &= ~RDA_UART_PARITY_EN; 296 } 297 298 /* Hardware handshake (RTS/CTS) */ 299 if (termios->c_cflag & CRTSCTS) { 300 ctrl |= RDA_UART_FLOW_CNT_EN; 301 cmd_set |= RDA_UART_RTS; 302 } else { 303 ctrl &= ~RDA_UART_FLOW_CNT_EN; 304 cmd_clr |= RDA_UART_RTS; 305 } 306 307 ctrl |= RDA_UART_ENABLE; 308 ctrl &= ~RDA_UART_DMA_EN; 309 310 triggers = (RDA_UART_AFC_LEVEL(20) | RDA_UART_RX_TRIGGER(16)); 311 irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK); 312 rda_uart_write(port, 0, RDA_UART_IRQ_MASK); 313 314 rda_uart_write(port, triggers, RDA_UART_IRQ_TRIGGERS); 315 rda_uart_write(port, ctrl, RDA_UART_CTRL); 316 rda_uart_write(port, cmd_set, RDA_UART_CMD_SET); 317 rda_uart_write(port, cmd_clr, RDA_UART_CMD_CLR); 318 319 rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK); 320 321 /* Don't rewrite B0 */ 322 if (tty_termios_baud_rate(termios)) 323 tty_termios_encode_baud_rate(termios, baud, baud); 324 325 /* update the per-port timeout */ 326 uart_update_timeout(port, termios->c_cflag, baud); 327 328 uart_port_unlock_irqrestore(port, flags); 329 } 330 331 static void rda_uart_send_chars(struct uart_port *port) 332 { 333 struct circ_buf *xmit = &port->state->xmit; 334 unsigned int ch; 335 u32 val; 336 337 if (uart_tx_stopped(port)) 338 return; 339 340 if (port->x_char) { 341 while (!(rda_uart_read(port, RDA_UART_STATUS) & 342 RDA_UART_TX_FIFO_MASK)) 343 cpu_relax(); 344 345 rda_uart_write(port, port->x_char, RDA_UART_RXTX_BUFFER); 346 port->icount.tx++; 347 port->x_char = 0; 348 } 349 350 while (rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK) { 351 if (uart_circ_empty(xmit)) 352 break; 353 354 ch = xmit->buf[xmit->tail]; 355 rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER); 356 uart_xmit_advance(port, 1); 357 } 358 359 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 360 uart_write_wakeup(port); 361 362 if (!uart_circ_empty(xmit)) { 363 /* Re-enable Tx FIFO interrupt */ 364 val = rda_uart_read(port, RDA_UART_IRQ_MASK); 365 val |= RDA_UART_TX_DATA_NEEDED; 366 rda_uart_write(port, val, RDA_UART_IRQ_MASK); 367 } 368 } 369 370 static void rda_uart_receive_chars(struct uart_port *port) 371 { 372 u32 status, val; 373 374 status = rda_uart_read(port, RDA_UART_STATUS); 375 while ((status & RDA_UART_RX_FIFO_MASK)) { 376 char flag = TTY_NORMAL; 377 378 if (status & RDA_UART_RX_PARITY_ERR) { 379 port->icount.parity++; 380 flag = TTY_PARITY; 381 } 382 383 if (status & RDA_UART_RX_FRAMING_ERR) { 384 port->icount.frame++; 385 flag = TTY_FRAME; 386 } 387 388 if (status & RDA_UART_RX_OVERFLOW_ERR) { 389 port->icount.overrun++; 390 flag = TTY_OVERRUN; 391 } 392 393 val = rda_uart_read(port, RDA_UART_RXTX_BUFFER); 394 val &= 0xff; 395 396 port->icount.rx++; 397 tty_insert_flip_char(&port->state->port, val, flag); 398 399 status = rda_uart_read(port, RDA_UART_STATUS); 400 } 401 402 tty_flip_buffer_push(&port->state->port); 403 } 404 405 static irqreturn_t rda_interrupt(int irq, void *dev_id) 406 { 407 struct uart_port *port = dev_id; 408 unsigned long flags; 409 u32 val, irq_mask; 410 411 uart_port_lock_irqsave(port, &flags); 412 413 /* Clear IRQ cause */ 414 val = rda_uart_read(port, RDA_UART_IRQ_CAUSE); 415 rda_uart_write(port, val, RDA_UART_IRQ_CAUSE); 416 417 if (val & (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT)) 418 rda_uart_receive_chars(port); 419 420 if (val & (RDA_UART_TX_DATA_NEEDED)) { 421 irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK); 422 irq_mask &= ~RDA_UART_TX_DATA_NEEDED; 423 rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK); 424 425 rda_uart_send_chars(port); 426 } 427 428 uart_port_unlock_irqrestore(port, flags); 429 430 return IRQ_HANDLED; 431 } 432 433 static int rda_uart_startup(struct uart_port *port) 434 { 435 unsigned long flags; 436 int ret; 437 u32 val; 438 439 uart_port_lock_irqsave(port, &flags); 440 rda_uart_write(port, 0, RDA_UART_IRQ_MASK); 441 uart_port_unlock_irqrestore(port, flags); 442 443 ret = request_irq(port->irq, rda_interrupt, IRQF_NO_SUSPEND, 444 "rda-uart", port); 445 if (ret) 446 return ret; 447 448 uart_port_lock_irqsave(port, &flags); 449 450 val = rda_uart_read(port, RDA_UART_CTRL); 451 val |= RDA_UART_ENABLE; 452 rda_uart_write(port, val, RDA_UART_CTRL); 453 454 /* enable rx interrupt */ 455 val = rda_uart_read(port, RDA_UART_IRQ_MASK); 456 val |= (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT); 457 rda_uart_write(port, val, RDA_UART_IRQ_MASK); 458 459 uart_port_unlock_irqrestore(port, flags); 460 461 return 0; 462 } 463 464 static void rda_uart_shutdown(struct uart_port *port) 465 { 466 unsigned long flags; 467 u32 val; 468 469 uart_port_lock_irqsave(port, &flags); 470 471 rda_uart_stop_tx(port); 472 rda_uart_stop_rx(port); 473 474 val = rda_uart_read(port, RDA_UART_CTRL); 475 val &= ~RDA_UART_ENABLE; 476 rda_uart_write(port, val, RDA_UART_CTRL); 477 478 uart_port_unlock_irqrestore(port, flags); 479 } 480 481 static const char *rda_uart_type(struct uart_port *port) 482 { 483 return (port->type == PORT_RDA) ? "rda-uart" : NULL; 484 } 485 486 static int rda_uart_request_port(struct uart_port *port) 487 { 488 struct platform_device *pdev = to_platform_device(port->dev); 489 struct resource *res; 490 491 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 492 if (!res) 493 return -ENXIO; 494 495 if (!devm_request_mem_region(port->dev, port->mapbase, 496 resource_size(res), dev_name(port->dev))) 497 return -EBUSY; 498 499 if (port->flags & UPF_IOREMAP) { 500 port->membase = devm_ioremap(port->dev, port->mapbase, 501 resource_size(res)); 502 if (!port->membase) 503 return -EBUSY; 504 } 505 506 return 0; 507 } 508 509 static void rda_uart_config_port(struct uart_port *port, int flags) 510 { 511 unsigned long irq_flags; 512 513 if (flags & UART_CONFIG_TYPE) { 514 port->type = PORT_RDA; 515 rda_uart_request_port(port); 516 } 517 518 uart_port_lock_irqsave(port, &irq_flags); 519 520 /* Clear mask, so no surprise interrupts. */ 521 rda_uart_write(port, 0, RDA_UART_IRQ_MASK); 522 523 /* Clear status register */ 524 rda_uart_write(port, 0, RDA_UART_STATUS); 525 526 uart_port_unlock_irqrestore(port, irq_flags); 527 } 528 529 static void rda_uart_release_port(struct uart_port *port) 530 { 531 struct platform_device *pdev = to_platform_device(port->dev); 532 struct resource *res; 533 534 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 535 if (!res) 536 return; 537 538 if (port->flags & UPF_IOREMAP) { 539 devm_release_mem_region(port->dev, port->mapbase, 540 resource_size(res)); 541 devm_iounmap(port->dev, port->membase); 542 port->membase = NULL; 543 } 544 } 545 546 static int rda_uart_verify_port(struct uart_port *port, 547 struct serial_struct *ser) 548 { 549 if (port->type != PORT_RDA) 550 return -EINVAL; 551 552 if (port->irq != ser->irq) 553 return -EINVAL; 554 555 return 0; 556 } 557 558 static const struct uart_ops rda_uart_ops = { 559 .tx_empty = rda_uart_tx_empty, 560 .get_mctrl = rda_uart_get_mctrl, 561 .set_mctrl = rda_uart_set_mctrl, 562 .start_tx = rda_uart_start_tx, 563 .stop_tx = rda_uart_stop_tx, 564 .stop_rx = rda_uart_stop_rx, 565 .startup = rda_uart_startup, 566 .shutdown = rda_uart_shutdown, 567 .set_termios = rda_uart_set_termios, 568 .type = rda_uart_type, 569 .request_port = rda_uart_request_port, 570 .release_port = rda_uart_release_port, 571 .config_port = rda_uart_config_port, 572 .verify_port = rda_uart_verify_port, 573 }; 574 575 #ifdef CONFIG_SERIAL_RDA_CONSOLE 576 577 static void rda_console_putchar(struct uart_port *port, unsigned char ch) 578 { 579 if (!port->membase) 580 return; 581 582 while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK)) 583 cpu_relax(); 584 585 rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER); 586 } 587 588 static void rda_uart_port_write(struct uart_port *port, const char *s, 589 u_int count) 590 { 591 u32 old_irq_mask; 592 unsigned long flags; 593 int locked; 594 595 local_irq_save(flags); 596 597 if (port->sysrq) { 598 locked = 0; 599 } else if (oops_in_progress) { 600 locked = uart_port_trylock(port); 601 } else { 602 uart_port_lock(port); 603 locked = 1; 604 } 605 606 old_irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK); 607 rda_uart_write(port, 0, RDA_UART_IRQ_MASK); 608 609 uart_console_write(port, s, count, rda_console_putchar); 610 611 /* wait until all contents have been sent out */ 612 while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK)) 613 cpu_relax(); 614 615 rda_uart_write(port, old_irq_mask, RDA_UART_IRQ_MASK); 616 617 if (locked) 618 uart_port_unlock(port); 619 620 local_irq_restore(flags); 621 } 622 623 static void rda_uart_console_write(struct console *co, const char *s, 624 u_int count) 625 { 626 struct rda_uart_port *rda_port; 627 628 rda_port = rda_uart_ports[co->index]; 629 if (!rda_port) 630 return; 631 632 rda_uart_port_write(&rda_port->port, s, count); 633 } 634 635 static int rda_uart_console_setup(struct console *co, char *options) 636 { 637 struct rda_uart_port *rda_port; 638 int baud = 921600; 639 int bits = 8; 640 int parity = 'n'; 641 int flow = 'n'; 642 643 if (co->index < 0 || co->index >= RDA_UART_PORT_NUM) 644 return -EINVAL; 645 646 rda_port = rda_uart_ports[co->index]; 647 if (!rda_port || !rda_port->port.membase) 648 return -ENODEV; 649 650 if (options) 651 uart_parse_options(options, &baud, &parity, &bits, &flow); 652 653 return uart_set_options(&rda_port->port, co, baud, parity, bits, flow); 654 } 655 656 static struct console rda_uart_console = { 657 .name = RDA_UART_DEV_NAME, 658 .write = rda_uart_console_write, 659 .device = uart_console_device, 660 .setup = rda_uart_console_setup, 661 .flags = CON_PRINTBUFFER, 662 .index = -1, 663 .data = &rda_uart_driver, 664 }; 665 666 static int __init rda_uart_console_init(void) 667 { 668 register_console(&rda_uart_console); 669 670 return 0; 671 } 672 console_initcall(rda_uart_console_init); 673 674 static void rda_uart_early_console_write(struct console *co, 675 const char *s, 676 u_int count) 677 { 678 struct earlycon_device *dev = co->data; 679 680 rda_uart_port_write(&dev->port, s, count); 681 } 682 683 static int __init 684 rda_uart_early_console_setup(struct earlycon_device *device, const char *opt) 685 { 686 if (!device->port.membase) 687 return -ENODEV; 688 689 device->con->write = rda_uart_early_console_write; 690 691 return 0; 692 } 693 694 OF_EARLYCON_DECLARE(rda, "rda,8810pl-uart", 695 rda_uart_early_console_setup); 696 697 #define RDA_UART_CONSOLE (&rda_uart_console) 698 #else 699 #define RDA_UART_CONSOLE NULL 700 #endif /* CONFIG_SERIAL_RDA_CONSOLE */ 701 702 static struct uart_driver rda_uart_driver = { 703 .owner = THIS_MODULE, 704 .driver_name = "rda-uart", 705 .dev_name = RDA_UART_DEV_NAME, 706 .nr = RDA_UART_PORT_NUM, 707 .cons = RDA_UART_CONSOLE, 708 }; 709 710 static const struct of_device_id rda_uart_dt_matches[] = { 711 { .compatible = "rda,8810pl-uart" }, 712 { } 713 }; 714 MODULE_DEVICE_TABLE(of, rda_uart_dt_matches); 715 716 static int rda_uart_probe(struct platform_device *pdev) 717 { 718 struct resource *res_mem; 719 struct rda_uart_port *rda_port; 720 int ret, irq; 721 722 if (pdev->dev.of_node) 723 pdev->id = of_alias_get_id(pdev->dev.of_node, "serial"); 724 725 if (pdev->id < 0 || pdev->id >= RDA_UART_PORT_NUM) { 726 dev_err(&pdev->dev, "id %d out of range\n", pdev->id); 727 return -EINVAL; 728 } 729 730 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 731 if (!res_mem) { 732 dev_err(&pdev->dev, "could not get mem\n"); 733 return -ENODEV; 734 } 735 736 irq = platform_get_irq(pdev, 0); 737 if (irq < 0) 738 return irq; 739 740 if (rda_uart_ports[pdev->id]) { 741 dev_err(&pdev->dev, "port %d already allocated\n", pdev->id); 742 return -EBUSY; 743 } 744 745 rda_port = devm_kzalloc(&pdev->dev, sizeof(*rda_port), GFP_KERNEL); 746 if (!rda_port) 747 return -ENOMEM; 748 749 rda_port->clk = devm_clk_get(&pdev->dev, NULL); 750 if (IS_ERR(rda_port->clk)) { 751 dev_err(&pdev->dev, "could not get clk\n"); 752 return PTR_ERR(rda_port->clk); 753 } 754 755 rda_port->port.dev = &pdev->dev; 756 rda_port->port.regshift = 0; 757 rda_port->port.line = pdev->id; 758 rda_port->port.type = PORT_RDA; 759 rda_port->port.iotype = UPIO_MEM; 760 rda_port->port.mapbase = res_mem->start; 761 rda_port->port.irq = irq; 762 rda_port->port.uartclk = clk_get_rate(rda_port->clk); 763 if (rda_port->port.uartclk == 0) { 764 dev_err(&pdev->dev, "clock rate is zero\n"); 765 return -EINVAL; 766 } 767 rda_port->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | 768 UPF_LOW_LATENCY; 769 rda_port->port.x_char = 0; 770 rda_port->port.fifosize = RDA_UART_TX_FIFO_SIZE; 771 rda_port->port.ops = &rda_uart_ops; 772 773 rda_uart_ports[pdev->id] = rda_port; 774 platform_set_drvdata(pdev, rda_port); 775 776 ret = uart_add_one_port(&rda_uart_driver, &rda_port->port); 777 if (ret) 778 rda_uart_ports[pdev->id] = NULL; 779 780 return ret; 781 } 782 783 static void rda_uart_remove(struct platform_device *pdev) 784 { 785 struct rda_uart_port *rda_port = platform_get_drvdata(pdev); 786 787 uart_remove_one_port(&rda_uart_driver, &rda_port->port); 788 rda_uart_ports[pdev->id] = NULL; 789 } 790 791 static struct platform_driver rda_uart_platform_driver = { 792 .probe = rda_uart_probe, 793 .remove_new = rda_uart_remove, 794 .driver = { 795 .name = "rda-uart", 796 .of_match_table = rda_uart_dt_matches, 797 }, 798 }; 799 800 static int __init rda_uart_init(void) 801 { 802 int ret; 803 804 ret = uart_register_driver(&rda_uart_driver); 805 if (ret) 806 return ret; 807 808 ret = platform_driver_register(&rda_uart_platform_driver); 809 if (ret) 810 uart_unregister_driver(&rda_uart_driver); 811 812 return ret; 813 } 814 815 static void __exit rda_uart_exit(void) 816 { 817 platform_driver_unregister(&rda_uart_platform_driver); 818 uart_unregister_driver(&rda_uart_driver); 819 } 820 821 module_init(rda_uart_init); 822 module_exit(rda_uart_exit); 823 824 MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>"); 825 MODULE_DESCRIPTION("RDA8810PL serial device driver"); 826 MODULE_LICENSE("GPL"); 827