xref: /linux/drivers/tty/serial/rda-uart.c (revision aaa44952bbd1d4db14a4d676bf9595bb5db7e7b0) 
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * RDA8810PL serial device driver
4  *
5  * Copyright RDA Microelectronics Company Limited
6  * Copyright (c) 2017 Andreas Färber
7  * Copyright (c) 2018 Manivannan Sadhasivam
8  */
9 
10 #include <linux/clk.h>
11 #include <linux/console.h>
12 #include <linux/delay.h>
13 #include <linux/io.h>
14 #include <linux/module.h>
15 #include <linux/of.h>
16 #include <linux/platform_device.h>
17 #include <linux/serial.h>
18 #include <linux/serial_core.h>
19 #include <linux/tty.h>
20 #include <linux/tty_flip.h>
21 
22 #define RDA_UART_PORT_NUM 3
23 #define RDA_UART_DEV_NAME "ttyRDA"
24 
25 #define RDA_UART_CTRL		0x00
26 #define RDA_UART_STATUS		0x04
27 #define RDA_UART_RXTX_BUFFER	0x08
28 #define RDA_UART_IRQ_MASK	0x0c
29 #define RDA_UART_IRQ_CAUSE	0x10
30 #define RDA_UART_IRQ_TRIGGERS	0x14
31 #define RDA_UART_CMD_SET	0x18
32 #define RDA_UART_CMD_CLR	0x1c
33 
34 /* UART_CTRL Bits */
35 #define RDA_UART_ENABLE			BIT(0)
36 #define RDA_UART_DBITS_8		BIT(1)
37 #define RDA_UART_TX_SBITS_2		BIT(2)
38 #define RDA_UART_PARITY_EN		BIT(3)
39 #define RDA_UART_PARITY(x)		(((x) & 0x3) << 4)
40 #define RDA_UART_PARITY_ODD		RDA_UART_PARITY(0)
41 #define RDA_UART_PARITY_EVEN		RDA_UART_PARITY(1)
42 #define RDA_UART_PARITY_SPACE		RDA_UART_PARITY(2)
43 #define RDA_UART_PARITY_MARK		RDA_UART_PARITY(3)
44 #define RDA_UART_DIV_MODE		BIT(20)
45 #define RDA_UART_IRDA_EN		BIT(21)
46 #define RDA_UART_DMA_EN			BIT(22)
47 #define RDA_UART_FLOW_CNT_EN		BIT(23)
48 #define RDA_UART_LOOP_BACK_EN		BIT(24)
49 #define RDA_UART_RX_LOCK_ERR		BIT(25)
50 #define RDA_UART_RX_BREAK_LEN(x)	(((x) & 0xf) << 28)
51 
52 /* UART_STATUS Bits */
53 #define RDA_UART_RX_FIFO(x)		(((x) & 0x7f) << 0)
54 #define RDA_UART_RX_FIFO_MASK		(0x7f << 0)
55 #define RDA_UART_TX_FIFO(x)		(((x) & 0x1f) << 8)
56 #define RDA_UART_TX_FIFO_MASK		(0x1f << 8)
57 #define RDA_UART_TX_ACTIVE		BIT(14)
58 #define RDA_UART_RX_ACTIVE		BIT(15)
59 #define RDA_UART_RX_OVERFLOW_ERR	BIT(16)
60 #define RDA_UART_TX_OVERFLOW_ERR	BIT(17)
61 #define RDA_UART_RX_PARITY_ERR		BIT(18)
62 #define RDA_UART_RX_FRAMING_ERR		BIT(19)
63 #define RDA_UART_RX_BREAK_INT		BIT(20)
64 #define RDA_UART_DCTS			BIT(24)
65 #define RDA_UART_CTS			BIT(25)
66 #define RDA_UART_DTR			BIT(28)
67 #define RDA_UART_CLK_ENABLED		BIT(31)
68 
69 /* UART_RXTX_BUFFER Bits */
70 #define RDA_UART_RX_DATA(x)		(((x) & 0xff) << 0)
71 #define RDA_UART_TX_DATA(x)		(((x) & 0xff) << 0)
72 
73 /* UART_IRQ_MASK Bits */
74 #define RDA_UART_TX_MODEM_STATUS	BIT(0)
75 #define RDA_UART_RX_DATA_AVAILABLE	BIT(1)
76 #define RDA_UART_TX_DATA_NEEDED		BIT(2)
77 #define RDA_UART_RX_TIMEOUT		BIT(3)
78 #define RDA_UART_RX_LINE_ERR		BIT(4)
79 #define RDA_UART_TX_DMA_DONE		BIT(5)
80 #define RDA_UART_RX_DMA_DONE		BIT(6)
81 #define RDA_UART_RX_DMA_TIMEOUT		BIT(7)
82 #define RDA_UART_DTR_RISE		BIT(8)
83 #define RDA_UART_DTR_FALL		BIT(9)
84 
85 /* UART_IRQ_CAUSE Bits */
86 #define RDA_UART_TX_MODEM_STATUS_U	BIT(16)
87 #define RDA_UART_RX_DATA_AVAILABLE_U	BIT(17)
88 #define RDA_UART_TX_DATA_NEEDED_U	BIT(18)
89 #define RDA_UART_RX_TIMEOUT_U		BIT(19)
90 #define RDA_UART_RX_LINE_ERR_U		BIT(20)
91 #define RDA_UART_TX_DMA_DONE_U		BIT(21)
92 #define RDA_UART_RX_DMA_DONE_U		BIT(22)
93 #define RDA_UART_RX_DMA_TIMEOUT_U	BIT(23)
94 #define RDA_UART_DTR_RISE_U		BIT(24)
95 #define RDA_UART_DTR_FALL_U		BIT(25)
96 
97 /* UART_TRIGGERS Bits */
98 #define RDA_UART_RX_TRIGGER(x)		(((x) & 0x1f) << 0)
99 #define RDA_UART_TX_TRIGGER(x)		(((x) & 0xf) << 8)
100 #define RDA_UART_AFC_LEVEL(x)		(((x) & 0x1f) << 16)
101 
102 /* UART_CMD_SET Bits */
103 #define RDA_UART_RI			BIT(0)
104 #define RDA_UART_DCD			BIT(1)
105 #define RDA_UART_DSR			BIT(2)
106 #define RDA_UART_TX_BREAK_CONTROL	BIT(3)
107 #define RDA_UART_TX_FINISH_N_WAIT	BIT(4)
108 #define RDA_UART_RTS			BIT(5)
109 #define RDA_UART_RX_FIFO_RESET		BIT(6)
110 #define RDA_UART_TX_FIFO_RESET		BIT(7)
111 
112 #define RDA_UART_TX_FIFO_SIZE	16
113 
114 static struct uart_driver rda_uart_driver;
115 
116 struct rda_uart_port {
117 	struct uart_port port;
118 	struct clk *clk;
119 };
120 
121 #define to_rda_uart_port(port) container_of(port, struct rda_uart_port, port)
122 
123 static struct rda_uart_port *rda_uart_ports[RDA_UART_PORT_NUM];
124 
125 static inline void rda_uart_write(struct uart_port *port, u32 val,
126 				  unsigned int off)
127 {
128 	writel(val, port->membase + off);
129 }
130 
131 static inline u32 rda_uart_read(struct uart_port *port, unsigned int off)
132 {
133 	return readl(port->membase + off);
134 }
135 
136 static unsigned int rda_uart_tx_empty(struct uart_port *port)
137 {
138 	unsigned long flags;
139 	unsigned int ret;
140 	u32 val;
141 
142 	spin_lock_irqsave(&port->lock, flags);
143 
144 	val = rda_uart_read(port, RDA_UART_STATUS);
145 	ret = (val & RDA_UART_TX_FIFO_MASK) ? TIOCSER_TEMT : 0;
146 
147 	spin_unlock_irqrestore(&port->lock, flags);
148 
149 	return ret;
150 }
151 
152 static unsigned int rda_uart_get_mctrl(struct uart_port *port)
153 {
154 	unsigned int mctrl = 0;
155 	u32 cmd_set, status;
156 
157 	cmd_set = rda_uart_read(port, RDA_UART_CMD_SET);
158 	status = rda_uart_read(port, RDA_UART_STATUS);
159 	if (cmd_set & RDA_UART_RTS)
160 		mctrl |= TIOCM_RTS;
161 	if (!(status & RDA_UART_CTS))
162 		mctrl |= TIOCM_CTS;
163 
164 	return mctrl;
165 }
166 
167 static void rda_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
168 {
169 	u32 val;
170 
171 	if (mctrl & TIOCM_RTS) {
172 		val = rda_uart_read(port, RDA_UART_CMD_SET);
173 		rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_SET);
174 	} else {
175 		/* Clear RTS to stop to receive. */
176 		val = rda_uart_read(port, RDA_UART_CMD_CLR);
177 		rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_CLR);
178 	}
179 
180 	val = rda_uart_read(port, RDA_UART_CTRL);
181 
182 	if (mctrl & TIOCM_LOOP)
183 		val |= RDA_UART_LOOP_BACK_EN;
184 	else
185 		val &= ~RDA_UART_LOOP_BACK_EN;
186 
187 	rda_uart_write(port, val, RDA_UART_CTRL);
188 }
189 
190 static void rda_uart_stop_tx(struct uart_port *port)
191 {
192 	u32 val;
193 
194 	val = rda_uart_read(port, RDA_UART_IRQ_MASK);
195 	val &= ~RDA_UART_TX_DATA_NEEDED;
196 	rda_uart_write(port, val, RDA_UART_IRQ_MASK);
197 
198 	val = rda_uart_read(port, RDA_UART_CMD_SET);
199 	val |= RDA_UART_TX_FIFO_RESET;
200 	rda_uart_write(port, val, RDA_UART_CMD_SET);
201 }
202 
203 static void rda_uart_stop_rx(struct uart_port *port)
204 {
205 	u32 val;
206 
207 	val = rda_uart_read(port, RDA_UART_IRQ_MASK);
208 	val &= ~(RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT);
209 	rda_uart_write(port, val, RDA_UART_IRQ_MASK);
210 
211 	/* Read Rx buffer before reset to avoid Rx timeout interrupt */
212 	val = rda_uart_read(port, RDA_UART_RXTX_BUFFER);
213 
214 	val = rda_uart_read(port, RDA_UART_CMD_SET);
215 	val |= RDA_UART_RX_FIFO_RESET;
216 	rda_uart_write(port, val, RDA_UART_CMD_SET);
217 }
218 
219 static void rda_uart_start_tx(struct uart_port *port)
220 {
221 	u32 val;
222 
223 	if (uart_tx_stopped(port)) {
224 		rda_uart_stop_tx(port);
225 		return;
226 	}
227 
228 	val = rda_uart_read(port, RDA_UART_IRQ_MASK);
229 	val |= RDA_UART_TX_DATA_NEEDED;
230 	rda_uart_write(port, val, RDA_UART_IRQ_MASK);
231 }
232 
233 static void rda_uart_change_baudrate(struct rda_uart_port *rda_port,
234 				     unsigned long baud)
235 {
236 	clk_set_rate(rda_port->clk, baud * 8);
237 }
238 
239 static void rda_uart_set_termios(struct uart_port *port,
240 				 struct ktermios *termios,
241 				 struct ktermios *old)
242 {
243 	struct rda_uart_port *rda_port = to_rda_uart_port(port);
244 	unsigned long flags;
245 	unsigned int ctrl, cmd_set, cmd_clr, triggers;
246 	unsigned int baud;
247 	u32 irq_mask;
248 
249 	spin_lock_irqsave(&port->lock, flags);
250 
251 	baud = uart_get_baud_rate(port, termios, old, 9600, port->uartclk / 4);
252 	rda_uart_change_baudrate(rda_port, baud);
253 
254 	ctrl = rda_uart_read(port, RDA_UART_CTRL);
255 	cmd_set = rda_uart_read(port, RDA_UART_CMD_SET);
256 	cmd_clr = rda_uart_read(port, RDA_UART_CMD_CLR);
257 
258 	switch (termios->c_cflag & CSIZE) {
259 	case CS5:
260 	case CS6:
261 		dev_warn(port->dev, "bit size not supported, using 7 bits\n");
262 		fallthrough;
263 	case CS7:
264 		ctrl &= ~RDA_UART_DBITS_8;
265 		break;
266 	default:
267 		ctrl |= RDA_UART_DBITS_8;
268 		break;
269 	}
270 
271 	/* stop bits */
272 	if (termios->c_cflag & CSTOPB)
273 		ctrl |= RDA_UART_TX_SBITS_2;
274 	else
275 		ctrl &= ~RDA_UART_TX_SBITS_2;
276 
277 	/* parity check */
278 	if (termios->c_cflag & PARENB) {
279 		ctrl |= RDA_UART_PARITY_EN;
280 
281 		/* Mark or Space parity */
282 		if (termios->c_cflag & CMSPAR) {
283 			if (termios->c_cflag & PARODD)
284 				ctrl |= RDA_UART_PARITY_MARK;
285 			else
286 				ctrl |= RDA_UART_PARITY_SPACE;
287 		} else if (termios->c_cflag & PARODD) {
288 			ctrl |= RDA_UART_PARITY_ODD;
289 		} else {
290 			ctrl |= RDA_UART_PARITY_EVEN;
291 		}
292 	} else {
293 		ctrl &= ~RDA_UART_PARITY_EN;
294 	}
295 
296 	/* Hardware handshake (RTS/CTS) */
297 	if (termios->c_cflag & CRTSCTS) {
298 		ctrl   |= RDA_UART_FLOW_CNT_EN;
299 		cmd_set |= RDA_UART_RTS;
300 	} else {
301 		ctrl   &= ~RDA_UART_FLOW_CNT_EN;
302 		cmd_clr |= RDA_UART_RTS;
303 	}
304 
305 	ctrl |= RDA_UART_ENABLE;
306 	ctrl &= ~RDA_UART_DMA_EN;
307 
308 	triggers  = (RDA_UART_AFC_LEVEL(20) | RDA_UART_RX_TRIGGER(16));
309 	irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
310 	rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
311 
312 	rda_uart_write(port, triggers, RDA_UART_IRQ_TRIGGERS);
313 	rda_uart_write(port, ctrl, RDA_UART_CTRL);
314 	rda_uart_write(port, cmd_set, RDA_UART_CMD_SET);
315 	rda_uart_write(port, cmd_clr, RDA_UART_CMD_CLR);
316 
317 	rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK);
318 
319 	/* Don't rewrite B0 */
320 	if (tty_termios_baud_rate(termios))
321 		tty_termios_encode_baud_rate(termios, baud, baud);
322 
323 	/* update the per-port timeout */
324 	uart_update_timeout(port, termios->c_cflag, baud);
325 
326 	spin_unlock_irqrestore(&port->lock, flags);
327 }
328 
329 static void rda_uart_send_chars(struct uart_port *port)
330 {
331 	struct circ_buf *xmit = &port->state->xmit;
332 	unsigned int ch;
333 	u32 val;
334 
335 	if (uart_tx_stopped(port))
336 		return;
337 
338 	if (port->x_char) {
339 		while (!(rda_uart_read(port, RDA_UART_STATUS) &
340 			 RDA_UART_TX_FIFO_MASK))
341 			cpu_relax();
342 
343 		rda_uart_write(port, port->x_char, RDA_UART_RXTX_BUFFER);
344 		port->icount.tx++;
345 		port->x_char = 0;
346 	}
347 
348 	while (rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK) {
349 		if (uart_circ_empty(xmit))
350 			break;
351 
352 		ch = xmit->buf[xmit->tail];
353 		rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER);
354 		xmit->tail = (xmit->tail + 1) & (SERIAL_XMIT_SIZE - 1);
355 		port->icount.tx++;
356 	}
357 
358 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
359 		uart_write_wakeup(port);
360 
361 	if (!uart_circ_empty(xmit)) {
362 		/* Re-enable Tx FIFO interrupt */
363 		val = rda_uart_read(port, RDA_UART_IRQ_MASK);
364 		val |= RDA_UART_TX_DATA_NEEDED;
365 		rda_uart_write(port, val, RDA_UART_IRQ_MASK);
366 	}
367 }
368 
369 static void rda_uart_receive_chars(struct uart_port *port)
370 {
371 	u32 status, val;
372 
373 	status = rda_uart_read(port, RDA_UART_STATUS);
374 	while ((status & RDA_UART_RX_FIFO_MASK)) {
375 		char flag = TTY_NORMAL;
376 
377 		if (status & RDA_UART_RX_PARITY_ERR) {
378 			port->icount.parity++;
379 			flag = TTY_PARITY;
380 		}
381 
382 		if (status & RDA_UART_RX_FRAMING_ERR) {
383 			port->icount.frame++;
384 			flag = TTY_FRAME;
385 		}
386 
387 		if (status & RDA_UART_RX_OVERFLOW_ERR) {
388 			port->icount.overrun++;
389 			flag = TTY_OVERRUN;
390 		}
391 
392 		val = rda_uart_read(port, RDA_UART_RXTX_BUFFER);
393 		val &= 0xff;
394 
395 		port->icount.rx++;
396 		tty_insert_flip_char(&port->state->port, val, flag);
397 
398 		status = rda_uart_read(port, RDA_UART_STATUS);
399 	}
400 
401 	tty_flip_buffer_push(&port->state->port);
402 }
403 
404 static irqreturn_t rda_interrupt(int irq, void *dev_id)
405 {
406 	struct uart_port *port = dev_id;
407 	unsigned long flags;
408 	u32 val, irq_mask;
409 
410 	spin_lock_irqsave(&port->lock, flags);
411 
412 	/* Clear IRQ cause */
413 	val = rda_uart_read(port, RDA_UART_IRQ_CAUSE);
414 	rda_uart_write(port, val, RDA_UART_IRQ_CAUSE);
415 
416 	if (val & (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT))
417 		rda_uart_receive_chars(port);
418 
419 	if (val & (RDA_UART_TX_DATA_NEEDED)) {
420 		irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
421 		irq_mask &= ~RDA_UART_TX_DATA_NEEDED;
422 		rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK);
423 
424 		rda_uart_send_chars(port);
425 	}
426 
427 	spin_unlock_irqrestore(&port->lock, flags);
428 
429 	return IRQ_HANDLED;
430 }
431 
432 static int rda_uart_startup(struct uart_port *port)
433 {
434 	unsigned long flags;
435 	int ret;
436 	u32 val;
437 
438 	spin_lock_irqsave(&port->lock, flags);
439 	rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
440 	spin_unlock_irqrestore(&port->lock, flags);
441 
442 	ret = request_irq(port->irq, rda_interrupt, IRQF_NO_SUSPEND,
443 			  "rda-uart", port);
444 	if (ret)
445 		return ret;
446 
447 	spin_lock_irqsave(&port->lock, flags);
448 
449 	val = rda_uart_read(port, RDA_UART_CTRL);
450 	val |= RDA_UART_ENABLE;
451 	rda_uart_write(port, val, RDA_UART_CTRL);
452 
453 	/* enable rx interrupt */
454 	val = rda_uart_read(port, RDA_UART_IRQ_MASK);
455 	val |= (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT);
456 	rda_uart_write(port, val, RDA_UART_IRQ_MASK);
457 
458 	spin_unlock_irqrestore(&port->lock, flags);
459 
460 	return 0;
461 }
462 
463 static void rda_uart_shutdown(struct uart_port *port)
464 {
465 	unsigned long flags;
466 	u32 val;
467 
468 	spin_lock_irqsave(&port->lock, flags);
469 
470 	rda_uart_stop_tx(port);
471 	rda_uart_stop_rx(port);
472 
473 	val = rda_uart_read(port, RDA_UART_CTRL);
474 	val &= ~RDA_UART_ENABLE;
475 	rda_uart_write(port, val, RDA_UART_CTRL);
476 
477 	spin_unlock_irqrestore(&port->lock, flags);
478 }
479 
480 static const char *rda_uart_type(struct uart_port *port)
481 {
482 	return (port->type == PORT_RDA) ? "rda-uart" : NULL;
483 }
484 
485 static int rda_uart_request_port(struct uart_port *port)
486 {
487 	struct platform_device *pdev = to_platform_device(port->dev);
488 	struct resource *res;
489 
490 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
491 	if (!res)
492 		return -ENXIO;
493 
494 	if (!devm_request_mem_region(port->dev, port->mapbase,
495 				     resource_size(res), dev_name(port->dev)))
496 		return -EBUSY;
497 
498 	if (port->flags & UPF_IOREMAP) {
499 		port->membase = devm_ioremap(port->dev, port->mapbase,
500 						     resource_size(res));
501 		if (!port->membase)
502 			return -EBUSY;
503 	}
504 
505 	return 0;
506 }
507 
508 static void rda_uart_config_port(struct uart_port *port, int flags)
509 {
510 	unsigned long irq_flags;
511 
512 	if (flags & UART_CONFIG_TYPE) {
513 		port->type = PORT_RDA;
514 		rda_uart_request_port(port);
515 	}
516 
517 	spin_lock_irqsave(&port->lock, irq_flags);
518 
519 	/* Clear mask, so no surprise interrupts. */
520 	rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
521 
522 	/* Clear status register */
523 	rda_uart_write(port, 0, RDA_UART_STATUS);
524 
525 	spin_unlock_irqrestore(&port->lock, irq_flags);
526 }
527 
528 static void rda_uart_release_port(struct uart_port *port)
529 {
530 	struct platform_device *pdev = to_platform_device(port->dev);
531 	struct resource *res;
532 
533 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
534 	if (!res)
535 		return;
536 
537 	if (port->flags & UPF_IOREMAP) {
538 		devm_release_mem_region(port->dev, port->mapbase,
539 					resource_size(res));
540 		devm_iounmap(port->dev, port->membase);
541 		port->membase = NULL;
542 	}
543 }
544 
545 static int rda_uart_verify_port(struct uart_port *port,
546 				struct serial_struct *ser)
547 {
548 	if (port->type != PORT_RDA)
549 		return -EINVAL;
550 
551 	if (port->irq != ser->irq)
552 		return -EINVAL;
553 
554 	return 0;
555 }
556 
557 static const struct uart_ops rda_uart_ops = {
558 	.tx_empty       = rda_uart_tx_empty,
559 	.get_mctrl      = rda_uart_get_mctrl,
560 	.set_mctrl      = rda_uart_set_mctrl,
561 	.start_tx       = rda_uart_start_tx,
562 	.stop_tx        = rda_uart_stop_tx,
563 	.stop_rx        = rda_uart_stop_rx,
564 	.startup        = rda_uart_startup,
565 	.shutdown       = rda_uart_shutdown,
566 	.set_termios    = rda_uart_set_termios,
567 	.type           = rda_uart_type,
568 	.request_port	= rda_uart_request_port,
569 	.release_port	= rda_uart_release_port,
570 	.config_port	= rda_uart_config_port,
571 	.verify_port	= rda_uart_verify_port,
572 };
573 
574 #ifdef CONFIG_SERIAL_RDA_CONSOLE
575 
576 static void rda_console_putchar(struct uart_port *port, int ch)
577 {
578 	if (!port->membase)
579 		return;
580 
581 	while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK))
582 		cpu_relax();
583 
584 	rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER);
585 }
586 
587 static void rda_uart_port_write(struct uart_port *port, const char *s,
588 				u_int count)
589 {
590 	u32 old_irq_mask;
591 	unsigned long flags;
592 	int locked;
593 
594 	local_irq_save(flags);
595 
596 	if (port->sysrq) {
597 		locked = 0;
598 	} else if (oops_in_progress) {
599 		locked = spin_trylock(&port->lock);
600 	} else {
601 		spin_lock(&port->lock);
602 		locked = 1;
603 	}
604 
605 	old_irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
606 	rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
607 
608 	uart_console_write(port, s, count, rda_console_putchar);
609 
610 	/* wait until all contents have been sent out */
611 	while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK))
612 		cpu_relax();
613 
614 	rda_uart_write(port, old_irq_mask, RDA_UART_IRQ_MASK);
615 
616 	if (locked)
617 		spin_unlock(&port->lock);
618 
619 	local_irq_restore(flags);
620 }
621 
622 static void rda_uart_console_write(struct console *co, const char *s,
623 				   u_int count)
624 {
625 	struct rda_uart_port *rda_port;
626 
627 	rda_port = rda_uart_ports[co->index];
628 	if (!rda_port)
629 		return;
630 
631 	rda_uart_port_write(&rda_port->port, s, count);
632 }
633 
634 static int rda_uart_console_setup(struct console *co, char *options)
635 {
636 	struct rda_uart_port *rda_port;
637 	int baud = 921600;
638 	int bits = 8;
639 	int parity = 'n';
640 	int flow = 'n';
641 
642 	if (co->index < 0 || co->index >= RDA_UART_PORT_NUM)
643 		return -EINVAL;
644 
645 	rda_port = rda_uart_ports[co->index];
646 	if (!rda_port || !rda_port->port.membase)
647 		return -ENODEV;
648 
649 	if (options)
650 		uart_parse_options(options, &baud, &parity, &bits, &flow);
651 
652 	return uart_set_options(&rda_port->port, co, baud, parity, bits, flow);
653 }
654 
655 static struct console rda_uart_console = {
656 	.name = RDA_UART_DEV_NAME,
657 	.write = rda_uart_console_write,
658 	.device = uart_console_device,
659 	.setup = rda_uart_console_setup,
660 	.flags = CON_PRINTBUFFER,
661 	.index = -1,
662 	.data = &rda_uart_driver,
663 };
664 
665 static int __init rda_uart_console_init(void)
666 {
667 	register_console(&rda_uart_console);
668 
669 	return 0;
670 }
671 console_initcall(rda_uart_console_init);
672 
673 static void rda_uart_early_console_write(struct console *co,
674 					 const char *s,
675 					 u_int count)
676 {
677 	struct earlycon_device *dev = co->data;
678 
679 	rda_uart_port_write(&dev->port, s, count);
680 }
681 
682 static int __init
683 rda_uart_early_console_setup(struct earlycon_device *device, const char *opt)
684 {
685 	if (!device->port.membase)
686 		return -ENODEV;
687 
688 	device->con->write = rda_uart_early_console_write;
689 
690 	return 0;
691 }
692 
693 OF_EARLYCON_DECLARE(rda, "rda,8810pl-uart",
694 		    rda_uart_early_console_setup);
695 
696 #define RDA_UART_CONSOLE (&rda_uart_console)
697 #else
698 #define RDA_UART_CONSOLE NULL
699 #endif /* CONFIG_SERIAL_RDA_CONSOLE */
700 
701 static struct uart_driver rda_uart_driver = {
702 	.owner = THIS_MODULE,
703 	.driver_name = "rda-uart",
704 	.dev_name = RDA_UART_DEV_NAME,
705 	.nr = RDA_UART_PORT_NUM,
706 	.cons = RDA_UART_CONSOLE,
707 };
708 
709 static const struct of_device_id rda_uart_dt_matches[] = {
710 	{ .compatible = "rda,8810pl-uart" },
711 	{ }
712 };
713 MODULE_DEVICE_TABLE(of, rda_uart_dt_matches);
714 
715 static int rda_uart_probe(struct platform_device *pdev)
716 {
717 	struct resource *res_mem;
718 	struct rda_uart_port *rda_port;
719 	int ret, irq;
720 
721 	if (pdev->dev.of_node)
722 		pdev->id = of_alias_get_id(pdev->dev.of_node, "serial");
723 
724 	if (pdev->id < 0 || pdev->id >= RDA_UART_PORT_NUM) {
725 		dev_err(&pdev->dev, "id %d out of range\n", pdev->id);
726 		return -EINVAL;
727 	}
728 
729 	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
730 	if (!res_mem) {
731 		dev_err(&pdev->dev, "could not get mem\n");
732 		return -ENODEV;
733 	}
734 
735 	irq = platform_get_irq(pdev, 0);
736 	if (irq < 0)
737 		return irq;
738 
739 	if (rda_uart_ports[pdev->id]) {
740 		dev_err(&pdev->dev, "port %d already allocated\n", pdev->id);
741 		return -EBUSY;
742 	}
743 
744 	rda_port = devm_kzalloc(&pdev->dev, sizeof(*rda_port), GFP_KERNEL);
745 	if (!rda_port)
746 		return -ENOMEM;
747 
748 	rda_port->clk = devm_clk_get(&pdev->dev, NULL);
749 	if (IS_ERR(rda_port->clk)) {
750 		dev_err(&pdev->dev, "could not get clk\n");
751 		return PTR_ERR(rda_port->clk);
752 	}
753 
754 	rda_port->port.dev = &pdev->dev;
755 	rda_port->port.regshift = 0;
756 	rda_port->port.line = pdev->id;
757 	rda_port->port.type = PORT_RDA;
758 	rda_port->port.iotype = UPIO_MEM;
759 	rda_port->port.mapbase = res_mem->start;
760 	rda_port->port.irq = irq;
761 	rda_port->port.uartclk = clk_get_rate(rda_port->clk);
762 	if (rda_port->port.uartclk == 0) {
763 		dev_err(&pdev->dev, "clock rate is zero\n");
764 		return -EINVAL;
765 	}
766 	rda_port->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
767 			       UPF_LOW_LATENCY;
768 	rda_port->port.x_char = 0;
769 	rda_port->port.fifosize = RDA_UART_TX_FIFO_SIZE;
770 	rda_port->port.ops = &rda_uart_ops;
771 
772 	rda_uart_ports[pdev->id] = rda_port;
773 	platform_set_drvdata(pdev, rda_port);
774 
775 	ret = uart_add_one_port(&rda_uart_driver, &rda_port->port);
776 	if (ret)
777 		rda_uart_ports[pdev->id] = NULL;
778 
779 	return ret;
780 }
781 
782 static int rda_uart_remove(struct platform_device *pdev)
783 {
784 	struct rda_uart_port *rda_port = platform_get_drvdata(pdev);
785 
786 	uart_remove_one_port(&rda_uart_driver, &rda_port->port);
787 	rda_uart_ports[pdev->id] = NULL;
788 
789 	return 0;
790 }
791 
792 static struct platform_driver rda_uart_platform_driver = {
793 	.probe = rda_uart_probe,
794 	.remove = rda_uart_remove,
795 	.driver = {
796 		.name = "rda-uart",
797 		.of_match_table = rda_uart_dt_matches,
798 	},
799 };
800 
801 static int __init rda_uart_init(void)
802 {
803 	int ret;
804 
805 	ret = uart_register_driver(&rda_uart_driver);
806 	if (ret)
807 		return ret;
808 
809 	ret = platform_driver_register(&rda_uart_platform_driver);
810 	if (ret)
811 		uart_unregister_driver(&rda_uart_driver);
812 
813 	return ret;
814 }
815 
816 static void __exit rda_uart_exit(void)
817 {
818 	platform_driver_unregister(&rda_uart_platform_driver);
819 	uart_unregister_driver(&rda_uart_driver);
820 }
821 
822 module_init(rda_uart_init);
823 module_exit(rda_uart_exit);
824 
825 MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
826 MODULE_DESCRIPTION("RDA8810PL serial device driver");
827 MODULE_LICENSE("GPL");
828