xref: /linux/drivers/tty/serial/rda-uart.c (revision 24168c5e6dfbdd5b414f048f47f75d64533296ca) 
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * RDA8810PL serial device driver
4  *
5  * Copyright RDA Microelectronics Company Limited
6  * Copyright (c) 2017 Andreas Färber
7  * Copyright (c) 2018 Manivannan Sadhasivam
8  */
9 
10 #include <linux/clk.h>
11 #include <linux/console.h>
12 #include <linux/delay.h>
13 #include <linux/io.h>
14 #include <linux/module.h>
15 #include <linux/of.h>
16 #include <linux/platform_device.h>
17 #include <linux/serial.h>
18 #include <linux/serial_core.h>
19 #include <linux/tty.h>
20 #include <linux/tty_flip.h>
21 
22 #define RDA_UART_PORT_NUM 3
23 #define RDA_UART_DEV_NAME "ttyRDA"
24 
25 #define RDA_UART_CTRL		0x00
26 #define RDA_UART_STATUS		0x04
27 #define RDA_UART_RXTX_BUFFER	0x08
28 #define RDA_UART_IRQ_MASK	0x0c
29 #define RDA_UART_IRQ_CAUSE	0x10
30 #define RDA_UART_IRQ_TRIGGERS	0x14
31 #define RDA_UART_CMD_SET	0x18
32 #define RDA_UART_CMD_CLR	0x1c
33 
34 /* UART_CTRL Bits */
35 #define RDA_UART_ENABLE			BIT(0)
36 #define RDA_UART_DBITS_8		BIT(1)
37 #define RDA_UART_TX_SBITS_2		BIT(2)
38 #define RDA_UART_PARITY_EN		BIT(3)
39 #define RDA_UART_PARITY(x)		(((x) & 0x3) << 4)
40 #define RDA_UART_PARITY_ODD		RDA_UART_PARITY(0)
41 #define RDA_UART_PARITY_EVEN		RDA_UART_PARITY(1)
42 #define RDA_UART_PARITY_SPACE		RDA_UART_PARITY(2)
43 #define RDA_UART_PARITY_MARK		RDA_UART_PARITY(3)
44 #define RDA_UART_DIV_MODE		BIT(20)
45 #define RDA_UART_IRDA_EN		BIT(21)
46 #define RDA_UART_DMA_EN			BIT(22)
47 #define RDA_UART_FLOW_CNT_EN		BIT(23)
48 #define RDA_UART_LOOP_BACK_EN		BIT(24)
49 #define RDA_UART_RX_LOCK_ERR		BIT(25)
50 #define RDA_UART_RX_BREAK_LEN(x)	(((x) & 0xf) << 28)
51 
52 /* UART_STATUS Bits */
53 #define RDA_UART_RX_FIFO(x)		(((x) & 0x7f) << 0)
54 #define RDA_UART_RX_FIFO_MASK		(0x7f << 0)
55 #define RDA_UART_TX_FIFO(x)		(((x) & 0x1f) << 8)
56 #define RDA_UART_TX_FIFO_MASK		(0x1f << 8)
57 #define RDA_UART_TX_ACTIVE		BIT(14)
58 #define RDA_UART_RX_ACTIVE		BIT(15)
59 #define RDA_UART_RX_OVERFLOW_ERR	BIT(16)
60 #define RDA_UART_TX_OVERFLOW_ERR	BIT(17)
61 #define RDA_UART_RX_PARITY_ERR		BIT(18)
62 #define RDA_UART_RX_FRAMING_ERR		BIT(19)
63 #define RDA_UART_RX_BREAK_INT		BIT(20)
64 #define RDA_UART_DCTS			BIT(24)
65 #define RDA_UART_CTS			BIT(25)
66 #define RDA_UART_DTR			BIT(28)
67 #define RDA_UART_CLK_ENABLED		BIT(31)
68 
69 /* UART_RXTX_BUFFER Bits */
70 #define RDA_UART_RX_DATA(x)		(((x) & 0xff) << 0)
71 #define RDA_UART_TX_DATA(x)		(((x) & 0xff) << 0)
72 
73 /* UART_IRQ_MASK Bits */
74 #define RDA_UART_TX_MODEM_STATUS	BIT(0)
75 #define RDA_UART_RX_DATA_AVAILABLE	BIT(1)
76 #define RDA_UART_TX_DATA_NEEDED		BIT(2)
77 #define RDA_UART_RX_TIMEOUT		BIT(3)
78 #define RDA_UART_RX_LINE_ERR		BIT(4)
79 #define RDA_UART_TX_DMA_DONE		BIT(5)
80 #define RDA_UART_RX_DMA_DONE		BIT(6)
81 #define RDA_UART_RX_DMA_TIMEOUT		BIT(7)
82 #define RDA_UART_DTR_RISE		BIT(8)
83 #define RDA_UART_DTR_FALL		BIT(9)
84 
85 /* UART_IRQ_CAUSE Bits */
86 #define RDA_UART_TX_MODEM_STATUS_U	BIT(16)
87 #define RDA_UART_RX_DATA_AVAILABLE_U	BIT(17)
88 #define RDA_UART_TX_DATA_NEEDED_U	BIT(18)
89 #define RDA_UART_RX_TIMEOUT_U		BIT(19)
90 #define RDA_UART_RX_LINE_ERR_U		BIT(20)
91 #define RDA_UART_TX_DMA_DONE_U		BIT(21)
92 #define RDA_UART_RX_DMA_DONE_U		BIT(22)
93 #define RDA_UART_RX_DMA_TIMEOUT_U	BIT(23)
94 #define RDA_UART_DTR_RISE_U		BIT(24)
95 #define RDA_UART_DTR_FALL_U		BIT(25)
96 
97 /* UART_TRIGGERS Bits */
98 #define RDA_UART_RX_TRIGGER(x)		(((x) & 0x1f) << 0)
99 #define RDA_UART_TX_TRIGGER(x)		(((x) & 0xf) << 8)
100 #define RDA_UART_AFC_LEVEL(x)		(((x) & 0x1f) << 16)
101 
102 /* UART_CMD_SET Bits */
103 #define RDA_UART_RI			BIT(0)
104 #define RDA_UART_DCD			BIT(1)
105 #define RDA_UART_DSR			BIT(2)
106 #define RDA_UART_TX_BREAK_CONTROL	BIT(3)
107 #define RDA_UART_TX_FINISH_N_WAIT	BIT(4)
108 #define RDA_UART_RTS			BIT(5)
109 #define RDA_UART_RX_FIFO_RESET		BIT(6)
110 #define RDA_UART_TX_FIFO_RESET		BIT(7)
111 
112 #define RDA_UART_TX_FIFO_SIZE	16
113 
114 static struct uart_driver rda_uart_driver;
115 
116 struct rda_uart_port {
117 	struct uart_port port;
118 	struct clk *clk;
119 };
120 
121 #define to_rda_uart_port(port) container_of(port, struct rda_uart_port, port)
122 
123 static struct rda_uart_port *rda_uart_ports[RDA_UART_PORT_NUM];
124 
125 static inline void rda_uart_write(struct uart_port *port, u32 val,
126 				  unsigned int off)
127 {
128 	writel(val, port->membase + off);
129 }
130 
131 static inline u32 rda_uart_read(struct uart_port *port, unsigned int off)
132 {
133 	return readl(port->membase + off);
134 }
135 
136 static unsigned int rda_uart_tx_empty(struct uart_port *port)
137 {
138 	unsigned long flags;
139 	unsigned int ret;
140 	u32 val;
141 
142 	uart_port_lock_irqsave(port, &flags);
143 
144 	val = rda_uart_read(port, RDA_UART_STATUS);
145 	ret = (val & RDA_UART_TX_FIFO_MASK) ? TIOCSER_TEMT : 0;
146 
147 	uart_port_unlock_irqrestore(port, flags);
148 
149 	return ret;
150 }
151 
152 static unsigned int rda_uart_get_mctrl(struct uart_port *port)
153 {
154 	unsigned int mctrl = 0;
155 	u32 cmd_set, status;
156 
157 	cmd_set = rda_uart_read(port, RDA_UART_CMD_SET);
158 	status = rda_uart_read(port, RDA_UART_STATUS);
159 	if (cmd_set & RDA_UART_RTS)
160 		mctrl |= TIOCM_RTS;
161 	if (!(status & RDA_UART_CTS))
162 		mctrl |= TIOCM_CTS;
163 
164 	return mctrl;
165 }
166 
167 static void rda_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
168 {
169 	u32 val;
170 
171 	if (mctrl & TIOCM_RTS) {
172 		val = rda_uart_read(port, RDA_UART_CMD_SET);
173 		rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_SET);
174 	} else {
175 		/* Clear RTS to stop to receive. */
176 		val = rda_uart_read(port, RDA_UART_CMD_CLR);
177 		rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_CLR);
178 	}
179 
180 	val = rda_uart_read(port, RDA_UART_CTRL);
181 
182 	if (mctrl & TIOCM_LOOP)
183 		val |= RDA_UART_LOOP_BACK_EN;
184 	else
185 		val &= ~RDA_UART_LOOP_BACK_EN;
186 
187 	rda_uart_write(port, val, RDA_UART_CTRL);
188 }
189 
190 static void rda_uart_stop_tx(struct uart_port *port)
191 {
192 	u32 val;
193 
194 	val = rda_uart_read(port, RDA_UART_IRQ_MASK);
195 	val &= ~RDA_UART_TX_DATA_NEEDED;
196 	rda_uart_write(port, val, RDA_UART_IRQ_MASK);
197 
198 	val = rda_uart_read(port, RDA_UART_CMD_SET);
199 	val |= RDA_UART_TX_FIFO_RESET;
200 	rda_uart_write(port, val, RDA_UART_CMD_SET);
201 }
202 
203 static void rda_uart_stop_rx(struct uart_port *port)
204 {
205 	u32 val;
206 
207 	val = rda_uart_read(port, RDA_UART_IRQ_MASK);
208 	val &= ~(RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT);
209 	rda_uart_write(port, val, RDA_UART_IRQ_MASK);
210 
211 	/* Read Rx buffer before reset to avoid Rx timeout interrupt */
212 	val = rda_uart_read(port, RDA_UART_RXTX_BUFFER);
213 
214 	val = rda_uart_read(port, RDA_UART_CMD_SET);
215 	val |= RDA_UART_RX_FIFO_RESET;
216 	rda_uart_write(port, val, RDA_UART_CMD_SET);
217 }
218 
219 static void rda_uart_start_tx(struct uart_port *port)
220 {
221 	u32 val;
222 
223 	if (uart_tx_stopped(port)) {
224 		rda_uart_stop_tx(port);
225 		return;
226 	}
227 
228 	val = rda_uart_read(port, RDA_UART_IRQ_MASK);
229 	val |= RDA_UART_TX_DATA_NEEDED;
230 	rda_uart_write(port, val, RDA_UART_IRQ_MASK);
231 }
232 
233 static void rda_uart_change_baudrate(struct rda_uart_port *rda_port,
234 				     unsigned long baud)
235 {
236 	clk_set_rate(rda_port->clk, baud * 8);
237 }
238 
239 static void rda_uart_set_termios(struct uart_port *port,
240 				 struct ktermios *termios,
241 				 const struct ktermios *old)
242 {
243 	struct rda_uart_port *rda_port = to_rda_uart_port(port);
244 	unsigned long flags;
245 	unsigned int ctrl, cmd_set, cmd_clr, triggers;
246 	unsigned int baud;
247 	u32 irq_mask;
248 
249 	uart_port_lock_irqsave(port, &flags);
250 
251 	baud = uart_get_baud_rate(port, termios, old, 9600, port->uartclk / 4);
252 	rda_uart_change_baudrate(rda_port, baud);
253 
254 	ctrl = rda_uart_read(port, RDA_UART_CTRL);
255 	cmd_set = rda_uart_read(port, RDA_UART_CMD_SET);
256 	cmd_clr = rda_uart_read(port, RDA_UART_CMD_CLR);
257 
258 	switch (termios->c_cflag & CSIZE) {
259 	case CS5:
260 	case CS6:
261 		dev_warn(port->dev, "bit size not supported, using 7 bits\n");
262 		fallthrough;
263 	case CS7:
264 		ctrl &= ~RDA_UART_DBITS_8;
265 		termios->c_cflag &= ~CSIZE;
266 		termios->c_cflag |= CS7;
267 		break;
268 	default:
269 		ctrl |= RDA_UART_DBITS_8;
270 		break;
271 	}
272 
273 	/* stop bits */
274 	if (termios->c_cflag & CSTOPB)
275 		ctrl |= RDA_UART_TX_SBITS_2;
276 	else
277 		ctrl &= ~RDA_UART_TX_SBITS_2;
278 
279 	/* parity check */
280 	if (termios->c_cflag & PARENB) {
281 		ctrl |= RDA_UART_PARITY_EN;
282 
283 		/* Mark or Space parity */
284 		if (termios->c_cflag & CMSPAR) {
285 			if (termios->c_cflag & PARODD)
286 				ctrl |= RDA_UART_PARITY_MARK;
287 			else
288 				ctrl |= RDA_UART_PARITY_SPACE;
289 		} else if (termios->c_cflag & PARODD) {
290 			ctrl |= RDA_UART_PARITY_ODD;
291 		} else {
292 			ctrl |= RDA_UART_PARITY_EVEN;
293 		}
294 	} else {
295 		ctrl &= ~RDA_UART_PARITY_EN;
296 	}
297 
298 	/* Hardware handshake (RTS/CTS) */
299 	if (termios->c_cflag & CRTSCTS) {
300 		ctrl   |= RDA_UART_FLOW_CNT_EN;
301 		cmd_set |= RDA_UART_RTS;
302 	} else {
303 		ctrl   &= ~RDA_UART_FLOW_CNT_EN;
304 		cmd_clr |= RDA_UART_RTS;
305 	}
306 
307 	ctrl |= RDA_UART_ENABLE;
308 	ctrl &= ~RDA_UART_DMA_EN;
309 
310 	triggers  = (RDA_UART_AFC_LEVEL(20) | RDA_UART_RX_TRIGGER(16));
311 	irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
312 	rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
313 
314 	rda_uart_write(port, triggers, RDA_UART_IRQ_TRIGGERS);
315 	rda_uart_write(port, ctrl, RDA_UART_CTRL);
316 	rda_uart_write(port, cmd_set, RDA_UART_CMD_SET);
317 	rda_uart_write(port, cmd_clr, RDA_UART_CMD_CLR);
318 
319 	rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK);
320 
321 	/* Don't rewrite B0 */
322 	if (tty_termios_baud_rate(termios))
323 		tty_termios_encode_baud_rate(termios, baud, baud);
324 
325 	/* update the per-port timeout */
326 	uart_update_timeout(port, termios->c_cflag, baud);
327 
328 	uart_port_unlock_irqrestore(port, flags);
329 }
330 
331 static void rda_uart_send_chars(struct uart_port *port)
332 {
333 	struct tty_port *tport = &port->state->port;
334 	unsigned char ch;
335 	u32 val;
336 
337 	if (uart_tx_stopped(port))
338 		return;
339 
340 	if (port->x_char) {
341 		while (!(rda_uart_read(port, RDA_UART_STATUS) &
342 			 RDA_UART_TX_FIFO_MASK))
343 			cpu_relax();
344 
345 		rda_uart_write(port, port->x_char, RDA_UART_RXTX_BUFFER);
346 		port->icount.tx++;
347 		port->x_char = 0;
348 	}
349 
350 	while ((rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK) &&
351 			uart_fifo_get(port, &ch))
352 		rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER);
353 
354 	if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)
355 		uart_write_wakeup(port);
356 
357 	if (!kfifo_is_empty(&tport->xmit_fifo)) {
358 		/* Re-enable Tx FIFO interrupt */
359 		val = rda_uart_read(port, RDA_UART_IRQ_MASK);
360 		val |= RDA_UART_TX_DATA_NEEDED;
361 		rda_uart_write(port, val, RDA_UART_IRQ_MASK);
362 	}
363 }
364 
365 static void rda_uart_receive_chars(struct uart_port *port)
366 {
367 	u32 status, val;
368 
369 	status = rda_uart_read(port, RDA_UART_STATUS);
370 	while ((status & RDA_UART_RX_FIFO_MASK)) {
371 		char flag = TTY_NORMAL;
372 
373 		if (status & RDA_UART_RX_PARITY_ERR) {
374 			port->icount.parity++;
375 			flag = TTY_PARITY;
376 		}
377 
378 		if (status & RDA_UART_RX_FRAMING_ERR) {
379 			port->icount.frame++;
380 			flag = TTY_FRAME;
381 		}
382 
383 		if (status & RDA_UART_RX_OVERFLOW_ERR) {
384 			port->icount.overrun++;
385 			flag = TTY_OVERRUN;
386 		}
387 
388 		val = rda_uart_read(port, RDA_UART_RXTX_BUFFER);
389 		val &= 0xff;
390 
391 		port->icount.rx++;
392 		if (!uart_prepare_sysrq_char(port, val))
393 			tty_insert_flip_char(&port->state->port, val, flag);
394 
395 		status = rda_uart_read(port, RDA_UART_STATUS);
396 	}
397 
398 	tty_flip_buffer_push(&port->state->port);
399 }
400 
401 static irqreturn_t rda_interrupt(int irq, void *dev_id)
402 {
403 	struct uart_port *port = dev_id;
404 	u32 val, irq_mask;
405 
406 	uart_port_lock(port);
407 
408 	/* Clear IRQ cause */
409 	val = rda_uart_read(port, RDA_UART_IRQ_CAUSE);
410 	rda_uart_write(port, val, RDA_UART_IRQ_CAUSE);
411 
412 	if (val & (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT))
413 		rda_uart_receive_chars(port);
414 
415 	if (val & (RDA_UART_TX_DATA_NEEDED)) {
416 		irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
417 		irq_mask &= ~RDA_UART_TX_DATA_NEEDED;
418 		rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK);
419 
420 		rda_uart_send_chars(port);
421 	}
422 
423 	uart_unlock_and_check_sysrq(port);
424 
425 	return IRQ_HANDLED;
426 }
427 
428 static int rda_uart_startup(struct uart_port *port)
429 {
430 	unsigned long flags;
431 	int ret;
432 	u32 val;
433 
434 	uart_port_lock_irqsave(port, &flags);
435 	rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
436 	uart_port_unlock_irqrestore(port, flags);
437 
438 	ret = request_irq(port->irq, rda_interrupt, IRQF_NO_SUSPEND,
439 			  "rda-uart", port);
440 	if (ret)
441 		return ret;
442 
443 	uart_port_lock_irqsave(port, &flags);
444 
445 	val = rda_uart_read(port, RDA_UART_CTRL);
446 	val |= RDA_UART_ENABLE;
447 	rda_uart_write(port, val, RDA_UART_CTRL);
448 
449 	/* enable rx interrupt */
450 	val = rda_uart_read(port, RDA_UART_IRQ_MASK);
451 	val |= (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT);
452 	rda_uart_write(port, val, RDA_UART_IRQ_MASK);
453 
454 	uart_port_unlock_irqrestore(port, flags);
455 
456 	return 0;
457 }
458 
459 static void rda_uart_shutdown(struct uart_port *port)
460 {
461 	unsigned long flags;
462 	u32 val;
463 
464 	uart_port_lock_irqsave(port, &flags);
465 
466 	rda_uart_stop_tx(port);
467 	rda_uart_stop_rx(port);
468 
469 	val = rda_uart_read(port, RDA_UART_CTRL);
470 	val &= ~RDA_UART_ENABLE;
471 	rda_uart_write(port, val, RDA_UART_CTRL);
472 
473 	uart_port_unlock_irqrestore(port, flags);
474 }
475 
476 static const char *rda_uart_type(struct uart_port *port)
477 {
478 	return (port->type == PORT_RDA) ? "rda-uart" : NULL;
479 }
480 
481 static int rda_uart_request_port(struct uart_port *port)
482 {
483 	struct platform_device *pdev = to_platform_device(port->dev);
484 	struct resource *res;
485 
486 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
487 	if (!res)
488 		return -ENXIO;
489 
490 	if (!devm_request_mem_region(port->dev, port->mapbase,
491 				     resource_size(res), dev_name(port->dev)))
492 		return -EBUSY;
493 
494 	if (port->flags & UPF_IOREMAP) {
495 		port->membase = devm_ioremap(port->dev, port->mapbase,
496 						     resource_size(res));
497 		if (!port->membase)
498 			return -EBUSY;
499 	}
500 
501 	return 0;
502 }
503 
504 static void rda_uart_config_port(struct uart_port *port, int flags)
505 {
506 	unsigned long irq_flags;
507 
508 	if (flags & UART_CONFIG_TYPE) {
509 		port->type = PORT_RDA;
510 		rda_uart_request_port(port);
511 	}
512 
513 	uart_port_lock_irqsave(port, &irq_flags);
514 
515 	/* Clear mask, so no surprise interrupts. */
516 	rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
517 
518 	/* Clear status register */
519 	rda_uart_write(port, 0, RDA_UART_STATUS);
520 
521 	uart_port_unlock_irqrestore(port, irq_flags);
522 }
523 
524 static void rda_uart_release_port(struct uart_port *port)
525 {
526 	struct platform_device *pdev = to_platform_device(port->dev);
527 	struct resource *res;
528 
529 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
530 	if (!res)
531 		return;
532 
533 	if (port->flags & UPF_IOREMAP) {
534 		devm_release_mem_region(port->dev, port->mapbase,
535 					resource_size(res));
536 		devm_iounmap(port->dev, port->membase);
537 		port->membase = NULL;
538 	}
539 }
540 
541 static int rda_uart_verify_port(struct uart_port *port,
542 				struct serial_struct *ser)
543 {
544 	if (port->type != PORT_RDA)
545 		return -EINVAL;
546 
547 	if (port->irq != ser->irq)
548 		return -EINVAL;
549 
550 	return 0;
551 }
552 
553 static const struct uart_ops rda_uart_ops = {
554 	.tx_empty       = rda_uart_tx_empty,
555 	.get_mctrl      = rda_uart_get_mctrl,
556 	.set_mctrl      = rda_uart_set_mctrl,
557 	.start_tx       = rda_uart_start_tx,
558 	.stop_tx        = rda_uart_stop_tx,
559 	.stop_rx        = rda_uart_stop_rx,
560 	.startup        = rda_uart_startup,
561 	.shutdown       = rda_uart_shutdown,
562 	.set_termios    = rda_uart_set_termios,
563 	.type           = rda_uart_type,
564 	.request_port	= rda_uart_request_port,
565 	.release_port	= rda_uart_release_port,
566 	.config_port	= rda_uart_config_port,
567 	.verify_port	= rda_uart_verify_port,
568 };
569 
570 #ifdef CONFIG_SERIAL_RDA_CONSOLE
571 
572 static void rda_console_putchar(struct uart_port *port, unsigned char ch)
573 {
574 	if (!port->membase)
575 		return;
576 
577 	while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK))
578 		cpu_relax();
579 
580 	rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER);
581 }
582 
583 static void rda_uart_port_write(struct uart_port *port, const char *s,
584 				u_int count)
585 {
586 	u32 old_irq_mask;
587 	unsigned long flags;
588 	int locked = 1;
589 
590 	if (oops_in_progress)
591 		locked = uart_port_trylock_irqsave(port, &flags);
592 	else
593 		uart_port_lock_irqsave(port, &flags);
594 
595 	old_irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
596 	rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
597 
598 	uart_console_write(port, s, count, rda_console_putchar);
599 
600 	/* wait until all contents have been sent out */
601 	while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK))
602 		cpu_relax();
603 
604 	rda_uart_write(port, old_irq_mask, RDA_UART_IRQ_MASK);
605 
606 	if (locked)
607 		uart_port_unlock_irqrestore(port, flags);
608 }
609 
610 static void rda_uart_console_write(struct console *co, const char *s,
611 				   u_int count)
612 {
613 	struct rda_uart_port *rda_port;
614 
615 	rda_port = rda_uart_ports[co->index];
616 	if (!rda_port)
617 		return;
618 
619 	rda_uart_port_write(&rda_port->port, s, count);
620 }
621 
622 static int rda_uart_console_setup(struct console *co, char *options)
623 {
624 	struct rda_uart_port *rda_port;
625 	int baud = 921600;
626 	int bits = 8;
627 	int parity = 'n';
628 	int flow = 'n';
629 
630 	if (co->index < 0 || co->index >= RDA_UART_PORT_NUM)
631 		return -EINVAL;
632 
633 	rda_port = rda_uart_ports[co->index];
634 	if (!rda_port || !rda_port->port.membase)
635 		return -ENODEV;
636 
637 	if (options)
638 		uart_parse_options(options, &baud, &parity, &bits, &flow);
639 
640 	return uart_set_options(&rda_port->port, co, baud, parity, bits, flow);
641 }
642 
643 static struct console rda_uart_console = {
644 	.name = RDA_UART_DEV_NAME,
645 	.write = rda_uart_console_write,
646 	.device = uart_console_device,
647 	.setup = rda_uart_console_setup,
648 	.flags = CON_PRINTBUFFER,
649 	.index = -1,
650 	.data = &rda_uart_driver,
651 };
652 
653 static int __init rda_uart_console_init(void)
654 {
655 	register_console(&rda_uart_console);
656 
657 	return 0;
658 }
659 console_initcall(rda_uart_console_init);
660 
661 static void rda_uart_early_console_write(struct console *co,
662 					 const char *s,
663 					 u_int count)
664 {
665 	struct earlycon_device *dev = co->data;
666 
667 	rda_uart_port_write(&dev->port, s, count);
668 }
669 
670 static int __init
671 rda_uart_early_console_setup(struct earlycon_device *device, const char *opt)
672 {
673 	if (!device->port.membase)
674 		return -ENODEV;
675 
676 	device->con->write = rda_uart_early_console_write;
677 
678 	return 0;
679 }
680 
681 OF_EARLYCON_DECLARE(rda, "rda,8810pl-uart",
682 		    rda_uart_early_console_setup);
683 
684 #define RDA_UART_CONSOLE (&rda_uart_console)
685 #else
686 #define RDA_UART_CONSOLE NULL
687 #endif /* CONFIG_SERIAL_RDA_CONSOLE */
688 
689 static struct uart_driver rda_uart_driver = {
690 	.owner = THIS_MODULE,
691 	.driver_name = "rda-uart",
692 	.dev_name = RDA_UART_DEV_NAME,
693 	.nr = RDA_UART_PORT_NUM,
694 	.cons = RDA_UART_CONSOLE,
695 };
696 
697 static const struct of_device_id rda_uart_dt_matches[] = {
698 	{ .compatible = "rda,8810pl-uart" },
699 	{ }
700 };
701 MODULE_DEVICE_TABLE(of, rda_uart_dt_matches);
702 
703 static int rda_uart_probe(struct platform_device *pdev)
704 {
705 	struct resource *res_mem;
706 	struct rda_uart_port *rda_port;
707 	int ret, irq;
708 
709 	if (pdev->dev.of_node)
710 		pdev->id = of_alias_get_id(pdev->dev.of_node, "serial");
711 
712 	if (pdev->id < 0 || pdev->id >= RDA_UART_PORT_NUM) {
713 		dev_err(&pdev->dev, "id %d out of range\n", pdev->id);
714 		return -EINVAL;
715 	}
716 
717 	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
718 	if (!res_mem) {
719 		dev_err(&pdev->dev, "could not get mem\n");
720 		return -ENODEV;
721 	}
722 
723 	irq = platform_get_irq(pdev, 0);
724 	if (irq < 0)
725 		return irq;
726 
727 	if (rda_uart_ports[pdev->id]) {
728 		dev_err(&pdev->dev, "port %d already allocated\n", pdev->id);
729 		return -EBUSY;
730 	}
731 
732 	rda_port = devm_kzalloc(&pdev->dev, sizeof(*rda_port), GFP_KERNEL);
733 	if (!rda_port)
734 		return -ENOMEM;
735 
736 	rda_port->clk = devm_clk_get(&pdev->dev, NULL);
737 	if (IS_ERR(rda_port->clk)) {
738 		dev_err(&pdev->dev, "could not get clk\n");
739 		return PTR_ERR(rda_port->clk);
740 	}
741 
742 	rda_port->port.dev = &pdev->dev;
743 	rda_port->port.regshift = 0;
744 	rda_port->port.line = pdev->id;
745 	rda_port->port.type = PORT_RDA;
746 	rda_port->port.iotype = UPIO_MEM;
747 	rda_port->port.mapbase = res_mem->start;
748 	rda_port->port.irq = irq;
749 	rda_port->port.uartclk = clk_get_rate(rda_port->clk);
750 	if (rda_port->port.uartclk == 0) {
751 		dev_err(&pdev->dev, "clock rate is zero\n");
752 		return -EINVAL;
753 	}
754 	rda_port->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
755 			       UPF_LOW_LATENCY;
756 	rda_port->port.x_char = 0;
757 	rda_port->port.fifosize = RDA_UART_TX_FIFO_SIZE;
758 	rda_port->port.ops = &rda_uart_ops;
759 
760 	rda_uart_ports[pdev->id] = rda_port;
761 	platform_set_drvdata(pdev, rda_port);
762 
763 	ret = uart_add_one_port(&rda_uart_driver, &rda_port->port);
764 	if (ret)
765 		rda_uart_ports[pdev->id] = NULL;
766 
767 	return ret;
768 }
769 
770 static void rda_uart_remove(struct platform_device *pdev)
771 {
772 	struct rda_uart_port *rda_port = platform_get_drvdata(pdev);
773 
774 	uart_remove_one_port(&rda_uart_driver, &rda_port->port);
775 	rda_uart_ports[pdev->id] = NULL;
776 }
777 
778 static struct platform_driver rda_uart_platform_driver = {
779 	.probe = rda_uart_probe,
780 	.remove_new = rda_uart_remove,
781 	.driver = {
782 		.name = "rda-uart",
783 		.of_match_table = rda_uart_dt_matches,
784 	},
785 };
786 
787 static int __init rda_uart_init(void)
788 {
789 	int ret;
790 
791 	ret = uart_register_driver(&rda_uart_driver);
792 	if (ret)
793 		return ret;
794 
795 	ret = platform_driver_register(&rda_uart_platform_driver);
796 	if (ret)
797 		uart_unregister_driver(&rda_uart_driver);
798 
799 	return ret;
800 }
801 
802 static void __exit rda_uart_exit(void)
803 {
804 	platform_driver_unregister(&rda_uart_platform_driver);
805 	uart_unregister_driver(&rda_uart_driver);
806 }
807 
808 module_init(rda_uart_init);
809 module_exit(rda_uart_exit);
810 
811 MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
812 MODULE_DESCRIPTION("RDA8810PL serial device driver");
813 MODULE_LICENSE("GPL");
814