1 /* 2 * linux/drivers/serial/pxa.c 3 * 4 * Based on drivers/serial/8250.c by Russell King. 5 * 6 * Author: Nicolas Pitre 7 * Created: Feb 20, 2003 8 * Copyright: (C) 2003 Monta Vista Software, Inc. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * Note 1: This driver is made separate from the already too overloaded 16 * 8250.c because it needs some kirks of its own and that'll make it 17 * easier to add DMA support. 18 * 19 * Note 2: I'm too sick of device allocation policies for serial ports. 20 * If someone else wants to request an "official" allocation of major/minor 21 * for this driver please be my guest. And don't forget that new hardware 22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's 23 * hope for a better port registration and dynamic device allocation scheme 24 * with the serial core maintainer satisfaction to appear soon. 25 */ 26 27 28 #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 29 #define SUPPORT_SYSRQ 30 #endif 31 32 #include <linux/module.h> 33 #include <linux/ioport.h> 34 #include <linux/init.h> 35 #include <linux/console.h> 36 #include <linux/sysrq.h> 37 #include <linux/serial_reg.h> 38 #include <linux/circ_buf.h> 39 #include <linux/delay.h> 40 #include <linux/interrupt.h> 41 #include <linux/platform_device.h> 42 #include <linux/tty.h> 43 #include <linux/tty_flip.h> 44 #include <linux/serial_core.h> 45 #include <linux/clk.h> 46 #include <linux/io.h> 47 #include <linux/slab.h> 48 49 struct uart_pxa_port { 50 struct uart_port port; 51 unsigned char ier; 52 unsigned char lcr; 53 unsigned char mcr; 54 unsigned int lsr_break_flag; 55 struct clk *clk; 56 char *name; 57 }; 58 59 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset) 60 { 61 offset <<= 2; 62 return readl(up->port.membase + offset); 63 } 64 65 static inline void serial_out(struct uart_pxa_port *up, int offset, int value) 66 { 67 offset <<= 2; 68 writel(value, up->port.membase + offset); 69 } 70 71 static void serial_pxa_enable_ms(struct uart_port *port) 72 { 73 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 74 75 up->ier |= UART_IER_MSI; 76 serial_out(up, UART_IER, up->ier); 77 } 78 79 static void serial_pxa_stop_tx(struct uart_port *port) 80 { 81 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 82 83 if (up->ier & UART_IER_THRI) { 84 up->ier &= ~UART_IER_THRI; 85 serial_out(up, UART_IER, up->ier); 86 } 87 } 88 89 static void serial_pxa_stop_rx(struct uart_port *port) 90 { 91 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 92 93 up->ier &= ~UART_IER_RLSI; 94 up->port.read_status_mask &= ~UART_LSR_DR; 95 serial_out(up, UART_IER, up->ier); 96 } 97 98 static inline void receive_chars(struct uart_pxa_port *up, int *status) 99 { 100 struct tty_struct *tty = up->port.state->port.tty; 101 unsigned int ch, flag; 102 int max_count = 256; 103 104 do { 105 ch = serial_in(up, UART_RX); 106 flag = TTY_NORMAL; 107 up->port.icount.rx++; 108 109 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE | 110 UART_LSR_FE | UART_LSR_OE))) { 111 /* 112 * For statistics only 113 */ 114 if (*status & UART_LSR_BI) { 115 *status &= ~(UART_LSR_FE | UART_LSR_PE); 116 up->port.icount.brk++; 117 /* 118 * We do the SysRQ and SAK checking 119 * here because otherwise the break 120 * may get masked by ignore_status_mask 121 * or read_status_mask. 122 */ 123 if (uart_handle_break(&up->port)) 124 goto ignore_char; 125 } else if (*status & UART_LSR_PE) 126 up->port.icount.parity++; 127 else if (*status & UART_LSR_FE) 128 up->port.icount.frame++; 129 if (*status & UART_LSR_OE) 130 up->port.icount.overrun++; 131 132 /* 133 * Mask off conditions which should be ignored. 134 */ 135 *status &= up->port.read_status_mask; 136 137 #ifdef CONFIG_SERIAL_PXA_CONSOLE 138 if (up->port.line == up->port.cons->index) { 139 /* Recover the break flag from console xmit */ 140 *status |= up->lsr_break_flag; 141 up->lsr_break_flag = 0; 142 } 143 #endif 144 if (*status & UART_LSR_BI) { 145 flag = TTY_BREAK; 146 } else if (*status & UART_LSR_PE) 147 flag = TTY_PARITY; 148 else if (*status & UART_LSR_FE) 149 flag = TTY_FRAME; 150 } 151 152 if (uart_handle_sysrq_char(&up->port, ch)) 153 goto ignore_char; 154 155 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag); 156 157 ignore_char: 158 *status = serial_in(up, UART_LSR); 159 } while ((*status & UART_LSR_DR) && (max_count-- > 0)); 160 tty_flip_buffer_push(tty); 161 } 162 163 static void transmit_chars(struct uart_pxa_port *up) 164 { 165 struct circ_buf *xmit = &up->port.state->xmit; 166 int count; 167 168 if (up->port.x_char) { 169 serial_out(up, UART_TX, up->port.x_char); 170 up->port.icount.tx++; 171 up->port.x_char = 0; 172 return; 173 } 174 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 175 serial_pxa_stop_tx(&up->port); 176 return; 177 } 178 179 count = up->port.fifosize / 2; 180 do { 181 serial_out(up, UART_TX, xmit->buf[xmit->tail]); 182 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 183 up->port.icount.tx++; 184 if (uart_circ_empty(xmit)) 185 break; 186 } while (--count > 0); 187 188 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 189 uart_write_wakeup(&up->port); 190 191 192 if (uart_circ_empty(xmit)) 193 serial_pxa_stop_tx(&up->port); 194 } 195 196 static void serial_pxa_start_tx(struct uart_port *port) 197 { 198 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 199 200 if (!(up->ier & UART_IER_THRI)) { 201 up->ier |= UART_IER_THRI; 202 serial_out(up, UART_IER, up->ier); 203 } 204 } 205 206 static inline void check_modem_status(struct uart_pxa_port *up) 207 { 208 int status; 209 210 status = serial_in(up, UART_MSR); 211 212 if ((status & UART_MSR_ANY_DELTA) == 0) 213 return; 214 215 if (status & UART_MSR_TERI) 216 up->port.icount.rng++; 217 if (status & UART_MSR_DDSR) 218 up->port.icount.dsr++; 219 if (status & UART_MSR_DDCD) 220 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD); 221 if (status & UART_MSR_DCTS) 222 uart_handle_cts_change(&up->port, status & UART_MSR_CTS); 223 224 wake_up_interruptible(&up->port.state->port.delta_msr_wait); 225 } 226 227 /* 228 * This handles the interrupt from one port. 229 */ 230 static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id) 231 { 232 struct uart_pxa_port *up = dev_id; 233 unsigned int iir, lsr; 234 235 iir = serial_in(up, UART_IIR); 236 if (iir & UART_IIR_NO_INT) 237 return IRQ_NONE; 238 lsr = serial_in(up, UART_LSR); 239 if (lsr & UART_LSR_DR) 240 receive_chars(up, &lsr); 241 check_modem_status(up); 242 if (lsr & UART_LSR_THRE) 243 transmit_chars(up); 244 return IRQ_HANDLED; 245 } 246 247 static unsigned int serial_pxa_tx_empty(struct uart_port *port) 248 { 249 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 250 unsigned long flags; 251 unsigned int ret; 252 253 spin_lock_irqsave(&up->port.lock, flags); 254 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 255 spin_unlock_irqrestore(&up->port.lock, flags); 256 257 return ret; 258 } 259 260 static unsigned int serial_pxa_get_mctrl(struct uart_port *port) 261 { 262 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 263 unsigned char status; 264 unsigned int ret; 265 266 status = serial_in(up, UART_MSR); 267 268 ret = 0; 269 if (status & UART_MSR_DCD) 270 ret |= TIOCM_CAR; 271 if (status & UART_MSR_RI) 272 ret |= TIOCM_RNG; 273 if (status & UART_MSR_DSR) 274 ret |= TIOCM_DSR; 275 if (status & UART_MSR_CTS) 276 ret |= TIOCM_CTS; 277 return ret; 278 } 279 280 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl) 281 { 282 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 283 unsigned char mcr = 0; 284 285 if (mctrl & TIOCM_RTS) 286 mcr |= UART_MCR_RTS; 287 if (mctrl & TIOCM_DTR) 288 mcr |= UART_MCR_DTR; 289 if (mctrl & TIOCM_OUT1) 290 mcr |= UART_MCR_OUT1; 291 if (mctrl & TIOCM_OUT2) 292 mcr |= UART_MCR_OUT2; 293 if (mctrl & TIOCM_LOOP) 294 mcr |= UART_MCR_LOOP; 295 296 mcr |= up->mcr; 297 298 serial_out(up, UART_MCR, mcr); 299 } 300 301 static void serial_pxa_break_ctl(struct uart_port *port, int break_state) 302 { 303 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 304 unsigned long flags; 305 306 spin_lock_irqsave(&up->port.lock, flags); 307 if (break_state == -1) 308 up->lcr |= UART_LCR_SBC; 309 else 310 up->lcr &= ~UART_LCR_SBC; 311 serial_out(up, UART_LCR, up->lcr); 312 spin_unlock_irqrestore(&up->port.lock, flags); 313 } 314 315 #if 0 316 static void serial_pxa_dma_init(struct pxa_uart *up) 317 { 318 up->rxdma = 319 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up); 320 if (up->rxdma < 0) 321 goto out; 322 up->txdma = 323 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up); 324 if (up->txdma < 0) 325 goto err_txdma; 326 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL); 327 if (!up->dmadesc) 328 goto err_alloc; 329 330 /* ... */ 331 err_alloc: 332 pxa_free_dma(up->txdma); 333 err_rxdma: 334 pxa_free_dma(up->rxdma); 335 out: 336 return; 337 } 338 #endif 339 340 static int serial_pxa_startup(struct uart_port *port) 341 { 342 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 343 unsigned long flags; 344 int retval; 345 346 if (port->line == 3) /* HWUART */ 347 up->mcr |= UART_MCR_AFE; 348 else 349 up->mcr = 0; 350 351 up->port.uartclk = clk_get_rate(up->clk); 352 353 /* 354 * Allocate the IRQ 355 */ 356 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up); 357 if (retval) 358 return retval; 359 360 /* 361 * Clear the FIFO buffers and disable them. 362 * (they will be reenabled in set_termios()) 363 */ 364 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 365 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 366 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 367 serial_out(up, UART_FCR, 0); 368 369 /* 370 * Clear the interrupt registers. 371 */ 372 (void) serial_in(up, UART_LSR); 373 (void) serial_in(up, UART_RX); 374 (void) serial_in(up, UART_IIR); 375 (void) serial_in(up, UART_MSR); 376 377 /* 378 * Now, initialize the UART 379 */ 380 serial_out(up, UART_LCR, UART_LCR_WLEN8); 381 382 spin_lock_irqsave(&up->port.lock, flags); 383 up->port.mctrl |= TIOCM_OUT2; 384 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 385 spin_unlock_irqrestore(&up->port.lock, flags); 386 387 /* 388 * Finally, enable interrupts. Note: Modem status interrupts 389 * are set via set_termios(), which will be occurring imminently 390 * anyway, so we don't enable them here. 391 */ 392 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE; 393 serial_out(up, UART_IER, up->ier); 394 395 /* 396 * And clear the interrupt registers again for luck. 397 */ 398 (void) serial_in(up, UART_LSR); 399 (void) serial_in(up, UART_RX); 400 (void) serial_in(up, UART_IIR); 401 (void) serial_in(up, UART_MSR); 402 403 return 0; 404 } 405 406 static void serial_pxa_shutdown(struct uart_port *port) 407 { 408 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 409 unsigned long flags; 410 411 free_irq(up->port.irq, up); 412 413 /* 414 * Disable interrupts from this port 415 */ 416 up->ier = 0; 417 serial_out(up, UART_IER, 0); 418 419 spin_lock_irqsave(&up->port.lock, flags); 420 up->port.mctrl &= ~TIOCM_OUT2; 421 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 422 spin_unlock_irqrestore(&up->port.lock, flags); 423 424 /* 425 * Disable break condition and FIFOs 426 */ 427 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 428 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 429 UART_FCR_CLEAR_RCVR | 430 UART_FCR_CLEAR_XMIT); 431 serial_out(up, UART_FCR, 0); 432 } 433 434 static void 435 serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios, 436 struct ktermios *old) 437 { 438 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 439 unsigned char cval, fcr = 0; 440 unsigned long flags; 441 unsigned int baud, quot; 442 unsigned int dll; 443 444 switch (termios->c_cflag & CSIZE) { 445 case CS5: 446 cval = UART_LCR_WLEN5; 447 break; 448 case CS6: 449 cval = UART_LCR_WLEN6; 450 break; 451 case CS7: 452 cval = UART_LCR_WLEN7; 453 break; 454 default: 455 case CS8: 456 cval = UART_LCR_WLEN8; 457 break; 458 } 459 460 if (termios->c_cflag & CSTOPB) 461 cval |= UART_LCR_STOP; 462 if (termios->c_cflag & PARENB) 463 cval |= UART_LCR_PARITY; 464 if (!(termios->c_cflag & PARODD)) 465 cval |= UART_LCR_EPAR; 466 467 /* 468 * Ask the core to calculate the divisor for us. 469 */ 470 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 471 quot = uart_get_divisor(port, baud); 472 473 if ((up->port.uartclk / quot) < (2400 * 16)) 474 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1; 475 else if ((up->port.uartclk / quot) < (230400 * 16)) 476 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8; 477 else 478 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32; 479 480 /* 481 * Ok, we're now changing the port state. Do it with 482 * interrupts disabled. 483 */ 484 spin_lock_irqsave(&up->port.lock, flags); 485 486 /* 487 * Ensure the port will be enabled. 488 * This is required especially for serial console. 489 */ 490 up->ier |= UART_IER_UUE; 491 492 /* 493 * Update the per-port timeout. 494 */ 495 uart_update_timeout(port, termios->c_cflag, baud); 496 497 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 498 if (termios->c_iflag & INPCK) 499 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 500 if (termios->c_iflag & (BRKINT | PARMRK)) 501 up->port.read_status_mask |= UART_LSR_BI; 502 503 /* 504 * Characters to ignore 505 */ 506 up->port.ignore_status_mask = 0; 507 if (termios->c_iflag & IGNPAR) 508 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 509 if (termios->c_iflag & IGNBRK) { 510 up->port.ignore_status_mask |= UART_LSR_BI; 511 /* 512 * If we're ignoring parity and break indicators, 513 * ignore overruns too (for real raw support). 514 */ 515 if (termios->c_iflag & IGNPAR) 516 up->port.ignore_status_mask |= UART_LSR_OE; 517 } 518 519 /* 520 * ignore all characters if CREAD is not set 521 */ 522 if ((termios->c_cflag & CREAD) == 0) 523 up->port.ignore_status_mask |= UART_LSR_DR; 524 525 /* 526 * CTS flow control flag and modem status interrupts 527 */ 528 up->ier &= ~UART_IER_MSI; 529 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 530 up->ier |= UART_IER_MSI; 531 532 serial_out(up, UART_IER, up->ier); 533 534 if (termios->c_cflag & CRTSCTS) 535 up->mcr |= UART_MCR_AFE; 536 else 537 up->mcr &= ~UART_MCR_AFE; 538 539 serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */ 540 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ 541 542 /* 543 * work around Errata #75 according to Intel(R) PXA27x Processor Family 544 * Specification Update (Nov 2005) 545 */ 546 dll = serial_in(up, UART_DLL); 547 WARN_ON(dll != (quot & 0xff)); 548 549 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ 550 serial_out(up, UART_LCR, cval); /* reset DLAB */ 551 up->lcr = cval; /* Save LCR */ 552 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 553 serial_out(up, UART_FCR, fcr); 554 spin_unlock_irqrestore(&up->port.lock, flags); 555 } 556 557 static void 558 serial_pxa_pm(struct uart_port *port, unsigned int state, 559 unsigned int oldstate) 560 { 561 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 562 563 if (!state) 564 clk_enable(up->clk); 565 else 566 clk_disable(up->clk); 567 } 568 569 static void serial_pxa_release_port(struct uart_port *port) 570 { 571 } 572 573 static int serial_pxa_request_port(struct uart_port *port) 574 { 575 return 0; 576 } 577 578 static void serial_pxa_config_port(struct uart_port *port, int flags) 579 { 580 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 581 up->port.type = PORT_PXA; 582 } 583 584 static int 585 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser) 586 { 587 /* we don't want the core code to modify any port params */ 588 return -EINVAL; 589 } 590 591 static const char * 592 serial_pxa_type(struct uart_port *port) 593 { 594 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 595 return up->name; 596 } 597 598 static struct uart_pxa_port *serial_pxa_ports[4]; 599 static struct uart_driver serial_pxa_reg; 600 601 #ifdef CONFIG_SERIAL_PXA_CONSOLE 602 603 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 604 605 /* 606 * Wait for transmitter & holding register to empty 607 */ 608 static inline void wait_for_xmitr(struct uart_pxa_port *up) 609 { 610 unsigned int status, tmout = 10000; 611 612 /* Wait up to 10ms for the character(s) to be sent. */ 613 do { 614 status = serial_in(up, UART_LSR); 615 616 if (status & UART_LSR_BI) 617 up->lsr_break_flag = UART_LSR_BI; 618 619 if (--tmout == 0) 620 break; 621 udelay(1); 622 } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 623 624 /* Wait up to 1s for flow control if necessary */ 625 if (up->port.flags & UPF_CONS_FLOW) { 626 tmout = 1000000; 627 while (--tmout && 628 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) 629 udelay(1); 630 } 631 } 632 633 static void serial_pxa_console_putchar(struct uart_port *port, int ch) 634 { 635 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 636 637 wait_for_xmitr(up); 638 serial_out(up, UART_TX, ch); 639 } 640 641 /* 642 * Print a string to the serial port trying not to disturb 643 * any possible real use of the port... 644 * 645 * The console_lock must be held when we get here. 646 */ 647 static void 648 serial_pxa_console_write(struct console *co, const char *s, unsigned int count) 649 { 650 struct uart_pxa_port *up = serial_pxa_ports[co->index]; 651 unsigned int ier; 652 653 clk_enable(up->clk); 654 655 /* 656 * First save the IER then disable the interrupts 657 */ 658 ier = serial_in(up, UART_IER); 659 serial_out(up, UART_IER, UART_IER_UUE); 660 661 uart_console_write(&up->port, s, count, serial_pxa_console_putchar); 662 663 /* 664 * Finally, wait for transmitter to become empty 665 * and restore the IER 666 */ 667 wait_for_xmitr(up); 668 serial_out(up, UART_IER, ier); 669 670 clk_disable(up->clk); 671 } 672 673 static int __init 674 serial_pxa_console_setup(struct console *co, char *options) 675 { 676 struct uart_pxa_port *up; 677 int baud = 9600; 678 int bits = 8; 679 int parity = 'n'; 680 int flow = 'n'; 681 682 if (co->index == -1 || co->index >= serial_pxa_reg.nr) 683 co->index = 0; 684 up = serial_pxa_ports[co->index]; 685 if (!up) 686 return -ENODEV; 687 688 if (options) 689 uart_parse_options(options, &baud, &parity, &bits, &flow); 690 691 return uart_set_options(&up->port, co, baud, parity, bits, flow); 692 } 693 694 static struct console serial_pxa_console = { 695 .name = "ttyS", 696 .write = serial_pxa_console_write, 697 .device = uart_console_device, 698 .setup = serial_pxa_console_setup, 699 .flags = CON_PRINTBUFFER, 700 .index = -1, 701 .data = &serial_pxa_reg, 702 }; 703 704 #define PXA_CONSOLE &serial_pxa_console 705 #else 706 #define PXA_CONSOLE NULL 707 #endif 708 709 struct uart_ops serial_pxa_pops = { 710 .tx_empty = serial_pxa_tx_empty, 711 .set_mctrl = serial_pxa_set_mctrl, 712 .get_mctrl = serial_pxa_get_mctrl, 713 .stop_tx = serial_pxa_stop_tx, 714 .start_tx = serial_pxa_start_tx, 715 .stop_rx = serial_pxa_stop_rx, 716 .enable_ms = serial_pxa_enable_ms, 717 .break_ctl = serial_pxa_break_ctl, 718 .startup = serial_pxa_startup, 719 .shutdown = serial_pxa_shutdown, 720 .set_termios = serial_pxa_set_termios, 721 .pm = serial_pxa_pm, 722 .type = serial_pxa_type, 723 .release_port = serial_pxa_release_port, 724 .request_port = serial_pxa_request_port, 725 .config_port = serial_pxa_config_port, 726 .verify_port = serial_pxa_verify_port, 727 }; 728 729 static struct uart_driver serial_pxa_reg = { 730 .owner = THIS_MODULE, 731 .driver_name = "PXA serial", 732 .dev_name = "ttyS", 733 .major = TTY_MAJOR, 734 .minor = 64, 735 .nr = 4, 736 .cons = PXA_CONSOLE, 737 }; 738 739 #ifdef CONFIG_PM 740 static int serial_pxa_suspend(struct device *dev) 741 { 742 struct uart_pxa_port *sport = dev_get_drvdata(dev); 743 744 if (sport) 745 uart_suspend_port(&serial_pxa_reg, &sport->port); 746 747 return 0; 748 } 749 750 static int serial_pxa_resume(struct device *dev) 751 { 752 struct uart_pxa_port *sport = dev_get_drvdata(dev); 753 754 if (sport) 755 uart_resume_port(&serial_pxa_reg, &sport->port); 756 757 return 0; 758 } 759 760 static const struct dev_pm_ops serial_pxa_pm_ops = { 761 .suspend = serial_pxa_suspend, 762 .resume = serial_pxa_resume, 763 }; 764 #endif 765 766 static int serial_pxa_probe(struct platform_device *dev) 767 { 768 struct uart_pxa_port *sport; 769 struct resource *mmres, *irqres; 770 int ret; 771 772 mmres = platform_get_resource(dev, IORESOURCE_MEM, 0); 773 irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0); 774 if (!mmres || !irqres) 775 return -ENODEV; 776 777 sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL); 778 if (!sport) 779 return -ENOMEM; 780 781 sport->clk = clk_get(&dev->dev, NULL); 782 if (IS_ERR(sport->clk)) { 783 ret = PTR_ERR(sport->clk); 784 goto err_free; 785 } 786 787 sport->port.type = PORT_PXA; 788 sport->port.iotype = UPIO_MEM; 789 sport->port.mapbase = mmres->start; 790 sport->port.irq = irqres->start; 791 sport->port.fifosize = 64; 792 sport->port.ops = &serial_pxa_pops; 793 sport->port.line = dev->id; 794 sport->port.dev = &dev->dev; 795 sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; 796 sport->port.uartclk = clk_get_rate(sport->clk); 797 798 switch (dev->id) { 799 case 0: sport->name = "FFUART"; break; 800 case 1: sport->name = "BTUART"; break; 801 case 2: sport->name = "STUART"; break; 802 case 3: sport->name = "HWUART"; break; 803 default: 804 sport->name = "???"; 805 break; 806 } 807 808 sport->port.membase = ioremap(mmres->start, mmres->end - mmres->start + 1); 809 if (!sport->port.membase) { 810 ret = -ENOMEM; 811 goto err_clk; 812 } 813 814 serial_pxa_ports[dev->id] = sport; 815 816 uart_add_one_port(&serial_pxa_reg, &sport->port); 817 platform_set_drvdata(dev, sport); 818 819 return 0; 820 821 err_clk: 822 clk_put(sport->clk); 823 err_free: 824 kfree(sport); 825 return ret; 826 } 827 828 static int serial_pxa_remove(struct platform_device *dev) 829 { 830 struct uart_pxa_port *sport = platform_get_drvdata(dev); 831 832 platform_set_drvdata(dev, NULL); 833 834 uart_remove_one_port(&serial_pxa_reg, &sport->port); 835 clk_put(sport->clk); 836 kfree(sport); 837 838 return 0; 839 } 840 841 static struct platform_driver serial_pxa_driver = { 842 .probe = serial_pxa_probe, 843 .remove = serial_pxa_remove, 844 845 .driver = { 846 .name = "pxa2xx-uart", 847 .owner = THIS_MODULE, 848 #ifdef CONFIG_PM 849 .pm = &serial_pxa_pm_ops, 850 #endif 851 }, 852 }; 853 854 int __init serial_pxa_init(void) 855 { 856 int ret; 857 858 ret = uart_register_driver(&serial_pxa_reg); 859 if (ret != 0) 860 return ret; 861 862 ret = platform_driver_register(&serial_pxa_driver); 863 if (ret != 0) 864 uart_unregister_driver(&serial_pxa_reg); 865 866 return ret; 867 } 868 869 void __exit serial_pxa_exit(void) 870 { 871 platform_driver_unregister(&serial_pxa_driver); 872 uart_unregister_driver(&serial_pxa_reg); 873 } 874 875 module_init(serial_pxa_init); 876 module_exit(serial_pxa_exit); 877 878 MODULE_LICENSE("GPL"); 879 MODULE_ALIAS("platform:pxa2xx-uart"); 880