1e3b3d0f5SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0+ 2157b9394SAndrei Pistirica /* 3157b9394SAndrei Pistirica * PIC32 Integrated Serial Driver. 4157b9394SAndrei Pistirica * 5157b9394SAndrei Pistirica * Copyright (C) 2015 Microchip Technology, Inc. 6157b9394SAndrei Pistirica * 7157b9394SAndrei Pistirica * Authors: 8157b9394SAndrei Pistirica * Sorin-Andrei Pistirica <andrei.pistirica@microchip.com> 9157b9394SAndrei Pistirica */ 10157b9394SAndrei Pistirica 11157b9394SAndrei Pistirica #include <linux/kernel.h> 12157b9394SAndrei Pistirica #include <linux/platform_device.h> 13157b9394SAndrei Pistirica #include <linux/of.h> 14157b9394SAndrei Pistirica #include <linux/of_device.h> 15157b9394SAndrei Pistirica #include <linux/of_irq.h> 16157b9394SAndrei Pistirica #include <linux/of_gpio.h> 17157b9394SAndrei Pistirica #include <linux/init.h> 18157b9394SAndrei Pistirica #include <linux/module.h> 19157b9394SAndrei Pistirica #include <linux/slab.h> 20157b9394SAndrei Pistirica #include <linux/console.h> 21157b9394SAndrei Pistirica #include <linux/clk.h> 22157b9394SAndrei Pistirica #include <linux/tty.h> 23157b9394SAndrei Pistirica #include <linux/tty_flip.h> 24157b9394SAndrei Pistirica #include <linux/serial_core.h> 25157b9394SAndrei Pistirica #include <linux/delay.h> 26157b9394SAndrei Pistirica 27157b9394SAndrei Pistirica #include <asm/mach-pic32/pic32.h> 28157b9394SAndrei Pistirica 29157b9394SAndrei Pistirica /* UART name and device definitions */ 30157b9394SAndrei Pistirica #define PIC32_DEV_NAME "pic32-uart" 31157b9394SAndrei Pistirica #define PIC32_MAX_UARTS 6 32157b9394SAndrei Pistirica #define PIC32_SDEV_NAME "ttyPIC" 33157b9394SAndrei Pistirica 3429574d0dSJiri Slaby #define PIC32_UART_DFLT_BRATE 9600 3529574d0dSJiri Slaby #define PIC32_UART_TX_FIFO_DEPTH 8 3629574d0dSJiri Slaby #define PIC32_UART_RX_FIFO_DEPTH 8 3729574d0dSJiri Slaby 3829574d0dSJiri Slaby #define PIC32_UART_MODE 0x00 3929574d0dSJiri Slaby #define PIC32_UART_STA 0x10 4029574d0dSJiri Slaby #define PIC32_UART_TX 0x20 4129574d0dSJiri Slaby #define PIC32_UART_RX 0x30 4229574d0dSJiri Slaby #define PIC32_UART_BRG 0x40 4329574d0dSJiri Slaby 4429574d0dSJiri Slaby /* struct pic32_sport - pic32 serial port descriptor 4529574d0dSJiri Slaby * @port: uart port descriptor 4629574d0dSJiri Slaby * @idx: port index 4729574d0dSJiri Slaby * @irq_fault: virtual fault interrupt number 4829574d0dSJiri Slaby * @irq_fault_name: irq fault name 4929574d0dSJiri Slaby * @irq_rx: virtual rx interrupt number 5029574d0dSJiri Slaby * @irq_rx_name: irq rx name 5129574d0dSJiri Slaby * @irq_tx: virtual tx interrupt number 5229574d0dSJiri Slaby * @irq_tx_name: irq tx name 53e9c9d3bbSAndy Shevchenko * @cts_gpiod: clear to send GPIO 5429574d0dSJiri Slaby * @dev: device descriptor 5529574d0dSJiri Slaby **/ 5629574d0dSJiri Slaby struct pic32_sport { 5729574d0dSJiri Slaby struct uart_port port; 5829574d0dSJiri Slaby int idx; 5929574d0dSJiri Slaby 6029574d0dSJiri Slaby int irq_fault; 6129574d0dSJiri Slaby const char *irq_fault_name; 6229574d0dSJiri Slaby int irq_rx; 6329574d0dSJiri Slaby const char *irq_rx_name; 6429574d0dSJiri Slaby int irq_tx; 6529574d0dSJiri Slaby const char *irq_tx_name; 66e8616bd0SJiri Slaby bool enable_tx_irq; 6729574d0dSJiri Slaby 68e9c9d3bbSAndy Shevchenko struct gpio_desc *cts_gpiod; 6929574d0dSJiri Slaby 7029574d0dSJiri Slaby struct clk *clk; 7129574d0dSJiri Slaby 7229574d0dSJiri Slaby struct device *dev; 7329574d0dSJiri Slaby }; 7441231472SJiri Slaby 7541231472SJiri Slaby static inline struct pic32_sport *to_pic32_sport(struct uart_port *port) 7641231472SJiri Slaby { 7741231472SJiri Slaby return container_of(port, struct pic32_sport, port); 7841231472SJiri Slaby } 7929574d0dSJiri Slaby 8029574d0dSJiri Slaby static inline void pic32_uart_writel(struct pic32_sport *sport, 8129574d0dSJiri Slaby u32 reg, u32 val) 8229574d0dSJiri Slaby { 83343f23cfSJiri Slaby __raw_writel(val, sport->port.membase + reg); 8429574d0dSJiri Slaby } 8529574d0dSJiri Slaby 8629574d0dSJiri Slaby static inline u32 pic32_uart_readl(struct pic32_sport *sport, u32 reg) 8729574d0dSJiri Slaby { 88343f23cfSJiri Slaby return __raw_readl(sport->port.membase + reg); 8929574d0dSJiri Slaby } 9029574d0dSJiri Slaby 9129574d0dSJiri Slaby /* pic32 uart mode register bits */ 9229574d0dSJiri Slaby #define PIC32_UART_MODE_ON BIT(15) 9329574d0dSJiri Slaby #define PIC32_UART_MODE_FRZ BIT(14) 9429574d0dSJiri Slaby #define PIC32_UART_MODE_SIDL BIT(13) 9529574d0dSJiri Slaby #define PIC32_UART_MODE_IREN BIT(12) 9629574d0dSJiri Slaby #define PIC32_UART_MODE_RTSMD BIT(11) 9729574d0dSJiri Slaby #define PIC32_UART_MODE_RESV1 BIT(10) 9829574d0dSJiri Slaby #define PIC32_UART_MODE_UEN1 BIT(9) 9929574d0dSJiri Slaby #define PIC32_UART_MODE_UEN0 BIT(8) 10029574d0dSJiri Slaby #define PIC32_UART_MODE_WAKE BIT(7) 10129574d0dSJiri Slaby #define PIC32_UART_MODE_LPBK BIT(6) 10229574d0dSJiri Slaby #define PIC32_UART_MODE_ABAUD BIT(5) 10329574d0dSJiri Slaby #define PIC32_UART_MODE_RXINV BIT(4) 10429574d0dSJiri Slaby #define PIC32_UART_MODE_BRGH BIT(3) 10529574d0dSJiri Slaby #define PIC32_UART_MODE_PDSEL1 BIT(2) 10629574d0dSJiri Slaby #define PIC32_UART_MODE_PDSEL0 BIT(1) 10729574d0dSJiri Slaby #define PIC32_UART_MODE_STSEL BIT(0) 10829574d0dSJiri Slaby 10929574d0dSJiri Slaby /* pic32 uart status register bits */ 11029574d0dSJiri Slaby #define PIC32_UART_STA_UTXISEL1 BIT(15) 11129574d0dSJiri Slaby #define PIC32_UART_STA_UTXISEL0 BIT(14) 11229574d0dSJiri Slaby #define PIC32_UART_STA_UTXINV BIT(13) 11329574d0dSJiri Slaby #define PIC32_UART_STA_URXEN BIT(12) 11429574d0dSJiri Slaby #define PIC32_UART_STA_UTXBRK BIT(11) 11529574d0dSJiri Slaby #define PIC32_UART_STA_UTXEN BIT(10) 11629574d0dSJiri Slaby #define PIC32_UART_STA_UTXBF BIT(9) 11729574d0dSJiri Slaby #define PIC32_UART_STA_TRMT BIT(8) 11829574d0dSJiri Slaby #define PIC32_UART_STA_URXISEL1 BIT(7) 11929574d0dSJiri Slaby #define PIC32_UART_STA_URXISEL0 BIT(6) 12029574d0dSJiri Slaby #define PIC32_UART_STA_ADDEN BIT(5) 12129574d0dSJiri Slaby #define PIC32_UART_STA_RIDLE BIT(4) 12229574d0dSJiri Slaby #define PIC32_UART_STA_PERR BIT(3) 12329574d0dSJiri Slaby #define PIC32_UART_STA_FERR BIT(2) 12429574d0dSJiri Slaby #define PIC32_UART_STA_OERR BIT(1) 12529574d0dSJiri Slaby #define PIC32_UART_STA_URXDA BIT(0) 12629574d0dSJiri Slaby 127157b9394SAndrei Pistirica /* pic32_sport pointer for console use */ 128157b9394SAndrei Pistirica static struct pic32_sport *pic32_sports[PIC32_MAX_UARTS]; 129157b9394SAndrei Pistirica 130157b9394SAndrei Pistirica static inline void pic32_wait_deplete_txbuf(struct pic32_sport *sport) 131157b9394SAndrei Pistirica { 132157b9394SAndrei Pistirica /* wait for tx empty, otherwise chars will be lost or corrupted */ 133157b9394SAndrei Pistirica while (!(pic32_uart_readl(sport, PIC32_UART_STA) & PIC32_UART_STA_TRMT)) 134157b9394SAndrei Pistirica udelay(1); 135157b9394SAndrei Pistirica } 136157b9394SAndrei Pistirica 137157b9394SAndrei Pistirica /* serial core request to check if uart tx buffer is empty */ 138157b9394SAndrei Pistirica static unsigned int pic32_uart_tx_empty(struct uart_port *port) 139157b9394SAndrei Pistirica { 140157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 141157b9394SAndrei Pistirica u32 val = pic32_uart_readl(sport, PIC32_UART_STA); 142157b9394SAndrei Pistirica 143157b9394SAndrei Pistirica return (val & PIC32_UART_STA_TRMT) ? 1 : 0; 144157b9394SAndrei Pistirica } 145157b9394SAndrei Pistirica 146157b9394SAndrei Pistirica /* serial core request to set UART outputs */ 147157b9394SAndrei Pistirica static void pic32_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) 148157b9394SAndrei Pistirica { 149157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 150157b9394SAndrei Pistirica 151157b9394SAndrei Pistirica /* set loopback mode */ 152157b9394SAndrei Pistirica if (mctrl & TIOCM_LOOP) 153157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), 154157b9394SAndrei Pistirica PIC32_UART_MODE_LPBK); 155157b9394SAndrei Pistirica else 156157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE), 157157b9394SAndrei Pistirica PIC32_UART_MODE_LPBK); 158157b9394SAndrei Pistirica } 159157b9394SAndrei Pistirica 160157b9394SAndrei Pistirica /* serial core request to return the state of misc UART input pins */ 161157b9394SAndrei Pistirica static unsigned int pic32_uart_get_mctrl(struct uart_port *port) 162157b9394SAndrei Pistirica { 163157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 164157b9394SAndrei Pistirica unsigned int mctrl = 0; 165157b9394SAndrei Pistirica 166e9c9d3bbSAndy Shevchenko /* get the state of CTS input pin for this port */ 167e9c9d3bbSAndy Shevchenko if (!sport->cts_gpiod) 168157b9394SAndrei Pistirica mctrl |= TIOCM_CTS; 169e9c9d3bbSAndy Shevchenko else if (gpiod_get_value(sport->cts_gpiod)) 170157b9394SAndrei Pistirica mctrl |= TIOCM_CTS; 171157b9394SAndrei Pistirica 172157b9394SAndrei Pistirica /* DSR and CD are not supported in PIC32, so return 1 173157b9394SAndrei Pistirica * RI is not supported in PIC32, so return 0 174157b9394SAndrei Pistirica */ 175157b9394SAndrei Pistirica mctrl |= TIOCM_CD; 176157b9394SAndrei Pistirica mctrl |= TIOCM_DSR; 177157b9394SAndrei Pistirica 178157b9394SAndrei Pistirica return mctrl; 179157b9394SAndrei Pistirica } 180157b9394SAndrei Pistirica 181157b9394SAndrei Pistirica /* stop tx and start tx are not called in pairs, therefore a flag indicates 182157b9394SAndrei Pistirica * the status of irq to control the irq-depth. 183157b9394SAndrei Pistirica */ 184157b9394SAndrei Pistirica static inline void pic32_uart_irqtxen(struct pic32_sport *sport, u8 en) 185157b9394SAndrei Pistirica { 186e8616bd0SJiri Slaby if (en && !sport->enable_tx_irq) { 187157b9394SAndrei Pistirica enable_irq(sport->irq_tx); 188e8616bd0SJiri Slaby sport->enable_tx_irq = true; 189e8616bd0SJiri Slaby } else if (!en && sport->enable_tx_irq) { 190157b9394SAndrei Pistirica /* use disable_irq_nosync() and not disable_irq() to avoid self 191157b9394SAndrei Pistirica * imposed deadlock by not waiting for irq handler to end, 192157b9394SAndrei Pistirica * since this callback is called from interrupt context. 193157b9394SAndrei Pistirica */ 194157b9394SAndrei Pistirica disable_irq_nosync(sport->irq_tx); 195e8616bd0SJiri Slaby sport->enable_tx_irq = false; 196157b9394SAndrei Pistirica } 197157b9394SAndrei Pistirica } 198157b9394SAndrei Pistirica 199157b9394SAndrei Pistirica /* serial core request to disable tx ASAP (used for flow control) */ 200157b9394SAndrei Pistirica static void pic32_uart_stop_tx(struct uart_port *port) 201157b9394SAndrei Pistirica { 202157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 203157b9394SAndrei Pistirica 204157b9394SAndrei Pistirica if (!(pic32_uart_readl(sport, PIC32_UART_MODE) & PIC32_UART_MODE_ON)) 205157b9394SAndrei Pistirica return; 206157b9394SAndrei Pistirica 207157b9394SAndrei Pistirica if (!(pic32_uart_readl(sport, PIC32_UART_STA) & PIC32_UART_STA_UTXEN)) 208157b9394SAndrei Pistirica return; 209157b9394SAndrei Pistirica 210157b9394SAndrei Pistirica /* wait for tx empty */ 211157b9394SAndrei Pistirica pic32_wait_deplete_txbuf(sport); 212157b9394SAndrei Pistirica 213157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA), 214157b9394SAndrei Pistirica PIC32_UART_STA_UTXEN); 215157b9394SAndrei Pistirica pic32_uart_irqtxen(sport, 0); 216157b9394SAndrei Pistirica } 217157b9394SAndrei Pistirica 218157b9394SAndrei Pistirica /* serial core request to (re)enable tx */ 219157b9394SAndrei Pistirica static void pic32_uart_start_tx(struct uart_port *port) 220157b9394SAndrei Pistirica { 221157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 222157b9394SAndrei Pistirica 223157b9394SAndrei Pistirica pic32_uart_irqtxen(sport, 1); 224157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_SET(PIC32_UART_STA), 225157b9394SAndrei Pistirica PIC32_UART_STA_UTXEN); 226157b9394SAndrei Pistirica } 227157b9394SAndrei Pistirica 228157b9394SAndrei Pistirica /* serial core request to stop rx, called before port shutdown */ 229157b9394SAndrei Pistirica static void pic32_uart_stop_rx(struct uart_port *port) 230157b9394SAndrei Pistirica { 231157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 232157b9394SAndrei Pistirica 233157b9394SAndrei Pistirica /* disable rx interrupts */ 234157b9394SAndrei Pistirica disable_irq(sport->irq_rx); 235157b9394SAndrei Pistirica 236157b9394SAndrei Pistirica /* receiver Enable bit OFF */ 237157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA), 238157b9394SAndrei Pistirica PIC32_UART_STA_URXEN); 239157b9394SAndrei Pistirica } 240157b9394SAndrei Pistirica 241157b9394SAndrei Pistirica /* serial core request to start/stop emitting break char */ 242157b9394SAndrei Pistirica static void pic32_uart_break_ctl(struct uart_port *port, int ctl) 243157b9394SAndrei Pistirica { 244157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 245157b9394SAndrei Pistirica unsigned long flags; 246157b9394SAndrei Pistirica 247157b9394SAndrei Pistirica spin_lock_irqsave(&port->lock, flags); 248157b9394SAndrei Pistirica 249157b9394SAndrei Pistirica if (ctl) 250157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_SET(PIC32_UART_STA), 251157b9394SAndrei Pistirica PIC32_UART_STA_UTXBRK); 252157b9394SAndrei Pistirica else 253157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA), 254157b9394SAndrei Pistirica PIC32_UART_STA_UTXBRK); 255157b9394SAndrei Pistirica 256157b9394SAndrei Pistirica spin_unlock_irqrestore(&port->lock, flags); 257157b9394SAndrei Pistirica } 258157b9394SAndrei Pistirica 259157b9394SAndrei Pistirica /* get port type in string format */ 260157b9394SAndrei Pistirica static const char *pic32_uart_type(struct uart_port *port) 261157b9394SAndrei Pistirica { 262157b9394SAndrei Pistirica return (port->type == PORT_PIC32) ? PIC32_DEV_NAME : NULL; 263157b9394SAndrei Pistirica } 264157b9394SAndrei Pistirica 265157b9394SAndrei Pistirica /* read all chars in rx fifo and send them to core */ 266157b9394SAndrei Pistirica static void pic32_uart_do_rx(struct uart_port *port) 267157b9394SAndrei Pistirica { 268157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 269157b9394SAndrei Pistirica struct tty_port *tty; 270157b9394SAndrei Pistirica unsigned int max_count; 271157b9394SAndrei Pistirica 272157b9394SAndrei Pistirica /* limit number of char read in interrupt, should not be 273157b9394SAndrei Pistirica * higher than fifo size anyway since we're much faster than 274157b9394SAndrei Pistirica * serial port 275157b9394SAndrei Pistirica */ 276157b9394SAndrei Pistirica max_count = PIC32_UART_RX_FIFO_DEPTH; 277157b9394SAndrei Pistirica 278157b9394SAndrei Pistirica spin_lock(&port->lock); 279157b9394SAndrei Pistirica 280157b9394SAndrei Pistirica tty = &port->state->port; 281157b9394SAndrei Pistirica 282157b9394SAndrei Pistirica do { 283157b9394SAndrei Pistirica u32 sta_reg, c; 284157b9394SAndrei Pistirica char flag; 285157b9394SAndrei Pistirica 286157b9394SAndrei Pistirica /* get overrun/fifo empty information from status register */ 287157b9394SAndrei Pistirica sta_reg = pic32_uart_readl(sport, PIC32_UART_STA); 288157b9394SAndrei Pistirica if (unlikely(sta_reg & PIC32_UART_STA_OERR)) { 289157b9394SAndrei Pistirica 290157b9394SAndrei Pistirica /* fifo reset is required to clear interrupt */ 291157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA), 292157b9394SAndrei Pistirica PIC32_UART_STA_OERR); 293157b9394SAndrei Pistirica 294157b9394SAndrei Pistirica port->icount.overrun++; 295157b9394SAndrei Pistirica tty_insert_flip_char(tty, 0, TTY_OVERRUN); 296157b9394SAndrei Pistirica } 297157b9394SAndrei Pistirica 298157b9394SAndrei Pistirica /* Can at least one more character can be read? */ 299157b9394SAndrei Pistirica if (!(sta_reg & PIC32_UART_STA_URXDA)) 300157b9394SAndrei Pistirica break; 301157b9394SAndrei Pistirica 302157b9394SAndrei Pistirica /* read the character and increment the rx counter */ 303157b9394SAndrei Pistirica c = pic32_uart_readl(sport, PIC32_UART_RX); 304157b9394SAndrei Pistirica 305157b9394SAndrei Pistirica port->icount.rx++; 306157b9394SAndrei Pistirica flag = TTY_NORMAL; 307157b9394SAndrei Pistirica c &= 0xff; 308157b9394SAndrei Pistirica 309157b9394SAndrei Pistirica if (unlikely((sta_reg & PIC32_UART_STA_PERR) || 310157b9394SAndrei Pistirica (sta_reg & PIC32_UART_STA_FERR))) { 311157b9394SAndrei Pistirica 312157b9394SAndrei Pistirica /* do stats first */ 313157b9394SAndrei Pistirica if (sta_reg & PIC32_UART_STA_PERR) 314157b9394SAndrei Pistirica port->icount.parity++; 315157b9394SAndrei Pistirica if (sta_reg & PIC32_UART_STA_FERR) 316157b9394SAndrei Pistirica port->icount.frame++; 317157b9394SAndrei Pistirica 318157b9394SAndrei Pistirica /* update flag wrt read_status_mask */ 319157b9394SAndrei Pistirica sta_reg &= port->read_status_mask; 320157b9394SAndrei Pistirica 321157b9394SAndrei Pistirica if (sta_reg & PIC32_UART_STA_FERR) 322157b9394SAndrei Pistirica flag = TTY_FRAME; 323157b9394SAndrei Pistirica if (sta_reg & PIC32_UART_STA_PERR) 324157b9394SAndrei Pistirica flag = TTY_PARITY; 325157b9394SAndrei Pistirica } 326157b9394SAndrei Pistirica 327157b9394SAndrei Pistirica if (uart_handle_sysrq_char(port, c)) 328157b9394SAndrei Pistirica continue; 329157b9394SAndrei Pistirica 330157b9394SAndrei Pistirica if ((sta_reg & port->ignore_status_mask) == 0) 331157b9394SAndrei Pistirica tty_insert_flip_char(tty, c, flag); 332157b9394SAndrei Pistirica 333157b9394SAndrei Pistirica } while (--max_count); 334157b9394SAndrei Pistirica 335157b9394SAndrei Pistirica spin_unlock(&port->lock); 336157b9394SAndrei Pistirica 337157b9394SAndrei Pistirica tty_flip_buffer_push(tty); 338157b9394SAndrei Pistirica } 339157b9394SAndrei Pistirica 340157b9394SAndrei Pistirica /* fill tx fifo with chars to send, stop when fifo is about to be full 341157b9394SAndrei Pistirica * or when all chars have been sent. 342157b9394SAndrei Pistirica */ 343157b9394SAndrei Pistirica static void pic32_uart_do_tx(struct uart_port *port) 344157b9394SAndrei Pistirica { 345157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 346157b9394SAndrei Pistirica struct circ_buf *xmit = &port->state->xmit; 347157b9394SAndrei Pistirica unsigned int max_count = PIC32_UART_TX_FIFO_DEPTH; 348157b9394SAndrei Pistirica 349157b9394SAndrei Pistirica if (port->x_char) { 350157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_UART_TX, port->x_char); 351157b9394SAndrei Pistirica port->icount.tx++; 352157b9394SAndrei Pistirica port->x_char = 0; 353157b9394SAndrei Pistirica return; 354157b9394SAndrei Pistirica } 355157b9394SAndrei Pistirica 356157b9394SAndrei Pistirica if (uart_tx_stopped(port)) { 357157b9394SAndrei Pistirica pic32_uart_stop_tx(port); 358157b9394SAndrei Pistirica return; 359157b9394SAndrei Pistirica } 360157b9394SAndrei Pistirica 361157b9394SAndrei Pistirica if (uart_circ_empty(xmit)) 362157b9394SAndrei Pistirica goto txq_empty; 363157b9394SAndrei Pistirica 364157b9394SAndrei Pistirica /* keep stuffing chars into uart tx buffer 365157b9394SAndrei Pistirica * 1) until uart fifo is full 366157b9394SAndrei Pistirica * or 367157b9394SAndrei Pistirica * 2) until the circ buffer is empty 368157b9394SAndrei Pistirica * (all chars have been sent) 369157b9394SAndrei Pistirica * or 370157b9394SAndrei Pistirica * 3) until the max count is reached 371157b9394SAndrei Pistirica * (prevents lingering here for too long in certain cases) 372157b9394SAndrei Pistirica */ 373157b9394SAndrei Pistirica while (!(PIC32_UART_STA_UTXBF & 374157b9394SAndrei Pistirica pic32_uart_readl(sport, PIC32_UART_STA))) { 375157b9394SAndrei Pistirica unsigned int c = xmit->buf[xmit->tail]; 376157b9394SAndrei Pistirica 377157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_UART_TX, c); 378157b9394SAndrei Pistirica 379157b9394SAndrei Pistirica xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 380157b9394SAndrei Pistirica port->icount.tx++; 381157b9394SAndrei Pistirica if (uart_circ_empty(xmit)) 382157b9394SAndrei Pistirica break; 383157b9394SAndrei Pistirica if (--max_count == 0) 384157b9394SAndrei Pistirica break; 385157b9394SAndrei Pistirica } 386157b9394SAndrei Pistirica 387157b9394SAndrei Pistirica if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 388157b9394SAndrei Pistirica uart_write_wakeup(port); 389157b9394SAndrei Pistirica 390157b9394SAndrei Pistirica if (uart_circ_empty(xmit)) 391157b9394SAndrei Pistirica goto txq_empty; 392157b9394SAndrei Pistirica 393157b9394SAndrei Pistirica return; 394157b9394SAndrei Pistirica 395157b9394SAndrei Pistirica txq_empty: 396157b9394SAndrei Pistirica pic32_uart_irqtxen(sport, 0); 397157b9394SAndrei Pistirica } 398157b9394SAndrei Pistirica 399157b9394SAndrei Pistirica /* RX interrupt handler */ 400157b9394SAndrei Pistirica static irqreturn_t pic32_uart_rx_interrupt(int irq, void *dev_id) 401157b9394SAndrei Pistirica { 402157b9394SAndrei Pistirica struct uart_port *port = dev_id; 403157b9394SAndrei Pistirica 404157b9394SAndrei Pistirica pic32_uart_do_rx(port); 405157b9394SAndrei Pistirica 406157b9394SAndrei Pistirica return IRQ_HANDLED; 407157b9394SAndrei Pistirica } 408157b9394SAndrei Pistirica 409157b9394SAndrei Pistirica /* TX interrupt handler */ 410157b9394SAndrei Pistirica static irqreturn_t pic32_uart_tx_interrupt(int irq, void *dev_id) 411157b9394SAndrei Pistirica { 412157b9394SAndrei Pistirica struct uart_port *port = dev_id; 413157b9394SAndrei Pistirica unsigned long flags; 414157b9394SAndrei Pistirica 415157b9394SAndrei Pistirica spin_lock_irqsave(&port->lock, flags); 416157b9394SAndrei Pistirica pic32_uart_do_tx(port); 417157b9394SAndrei Pistirica spin_unlock_irqrestore(&port->lock, flags); 418157b9394SAndrei Pistirica 419157b9394SAndrei Pistirica return IRQ_HANDLED; 420157b9394SAndrei Pistirica } 421157b9394SAndrei Pistirica 422157b9394SAndrei Pistirica /* FAULT interrupt handler */ 423157b9394SAndrei Pistirica static irqreturn_t pic32_uart_fault_interrupt(int irq, void *dev_id) 424157b9394SAndrei Pistirica { 425157b9394SAndrei Pistirica /* do nothing: pic32_uart_do_rx() handles faults. */ 426157b9394SAndrei Pistirica return IRQ_HANDLED; 427157b9394SAndrei Pistirica } 428157b9394SAndrei Pistirica 429157b9394SAndrei Pistirica /* enable rx & tx operation on uart */ 430157b9394SAndrei Pistirica static void pic32_uart_en_and_unmask(struct uart_port *port) 431157b9394SAndrei Pistirica { 432157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 433157b9394SAndrei Pistirica 434157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_SET(PIC32_UART_STA), 435157b9394SAndrei Pistirica PIC32_UART_STA_UTXEN | PIC32_UART_STA_URXEN); 436157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), 437157b9394SAndrei Pistirica PIC32_UART_MODE_ON); 438157b9394SAndrei Pistirica } 439157b9394SAndrei Pistirica 440157b9394SAndrei Pistirica /* disable rx & tx operation on uart */ 441157b9394SAndrei Pistirica static void pic32_uart_dsbl_and_mask(struct uart_port *port) 442157b9394SAndrei Pistirica { 443157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 444157b9394SAndrei Pistirica 445157b9394SAndrei Pistirica /* wait for tx empty, otherwise chars will be lost or corrupted */ 446157b9394SAndrei Pistirica pic32_wait_deplete_txbuf(sport); 447157b9394SAndrei Pistirica 448157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA), 449157b9394SAndrei Pistirica PIC32_UART_STA_UTXEN | PIC32_UART_STA_URXEN); 450157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE), 451157b9394SAndrei Pistirica PIC32_UART_MODE_ON); 452157b9394SAndrei Pistirica } 453157b9394SAndrei Pistirica 454157b9394SAndrei Pistirica /* serial core request to initialize uart and start rx operation */ 455157b9394SAndrei Pistirica static int pic32_uart_startup(struct uart_port *port) 456157b9394SAndrei Pistirica { 457157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 458157b9394SAndrei Pistirica u32 dflt_baud = (port->uartclk / PIC32_UART_DFLT_BRATE / 16) - 1; 459157b9394SAndrei Pistirica unsigned long flags; 460157b9394SAndrei Pistirica int ret; 461157b9394SAndrei Pistirica 462157b9394SAndrei Pistirica local_irq_save(flags); 463157b9394SAndrei Pistirica 464bb2cff41SJiri Slaby ret = clk_prepare_enable(sport->clk); 465157b9394SAndrei Pistirica if (ret) { 466157b9394SAndrei Pistirica local_irq_restore(flags); 467157b9394SAndrei Pistirica goto out_done; 468157b9394SAndrei Pistirica } 469157b9394SAndrei Pistirica 470157b9394SAndrei Pistirica /* clear status and mode registers */ 471157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_UART_MODE, 0); 472157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_UART_STA, 0); 473157b9394SAndrei Pistirica 474157b9394SAndrei Pistirica /* disable uart and mask all interrupts */ 475157b9394SAndrei Pistirica pic32_uart_dsbl_and_mask(port); 476157b9394SAndrei Pistirica 477157b9394SAndrei Pistirica /* set default baud */ 478157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_UART_BRG, dflt_baud); 479157b9394SAndrei Pistirica 480157b9394SAndrei Pistirica local_irq_restore(flags); 481157b9394SAndrei Pistirica 482157b9394SAndrei Pistirica /* Each UART of a PIC32 has three interrupts therefore, 483157b9394SAndrei Pistirica * we setup driver to register the 3 irqs for the device. 484157b9394SAndrei Pistirica * 485157b9394SAndrei Pistirica * For each irq request_irq() is called with interrupt disabled. 486157b9394SAndrei Pistirica * And the irq is enabled as soon as we are ready to handle them. 487157b9394SAndrei Pistirica */ 488e8616bd0SJiri Slaby sport->enable_tx_irq = false; 489157b9394SAndrei Pistirica 490157b9394SAndrei Pistirica sport->irq_fault_name = kasprintf(GFP_KERNEL, "%s%d-fault", 491157b9394SAndrei Pistirica pic32_uart_type(port), 492157b9394SAndrei Pistirica sport->idx); 493157b9394SAndrei Pistirica if (!sport->irq_fault_name) { 494157b9394SAndrei Pistirica dev_err(port->dev, "%s: kasprintf err!", __func__); 495157b9394SAndrei Pistirica ret = -ENOMEM; 4966f3cdf2bSYang Yingliang goto out_disable_clk; 497157b9394SAndrei Pistirica } 498157b9394SAndrei Pistirica irq_set_status_flags(sport->irq_fault, IRQ_NOAUTOEN); 499157b9394SAndrei Pistirica ret = request_irq(sport->irq_fault, pic32_uart_fault_interrupt, 50008f643e0SJiri Slaby IRQF_NO_THREAD, sport->irq_fault_name, port); 501157b9394SAndrei Pistirica if (ret) { 502157b9394SAndrei Pistirica dev_err(port->dev, "%s: request irq(%d) err! ret:%d name:%s\n", 503157b9394SAndrei Pistirica __func__, sport->irq_fault, ret, 504157b9394SAndrei Pistirica pic32_uart_type(port)); 505157b9394SAndrei Pistirica goto out_f; 506157b9394SAndrei Pistirica } 507157b9394SAndrei Pistirica 508157b9394SAndrei Pistirica sport->irq_rx_name = kasprintf(GFP_KERNEL, "%s%d-rx", 509157b9394SAndrei Pistirica pic32_uart_type(port), 510157b9394SAndrei Pistirica sport->idx); 511157b9394SAndrei Pistirica if (!sport->irq_rx_name) { 512157b9394SAndrei Pistirica dev_err(port->dev, "%s: kasprintf err!", __func__); 513157b9394SAndrei Pistirica ret = -ENOMEM; 514157b9394SAndrei Pistirica goto out_f; 515157b9394SAndrei Pistirica } 516157b9394SAndrei Pistirica irq_set_status_flags(sport->irq_rx, IRQ_NOAUTOEN); 517157b9394SAndrei Pistirica ret = request_irq(sport->irq_rx, pic32_uart_rx_interrupt, 51808f643e0SJiri Slaby IRQF_NO_THREAD, sport->irq_rx_name, port); 519157b9394SAndrei Pistirica if (ret) { 520157b9394SAndrei Pistirica dev_err(port->dev, "%s: request irq(%d) err! ret:%d name:%s\n", 521157b9394SAndrei Pistirica __func__, sport->irq_rx, ret, 522157b9394SAndrei Pistirica pic32_uart_type(port)); 523157b9394SAndrei Pistirica goto out_r; 524157b9394SAndrei Pistirica } 525157b9394SAndrei Pistirica 526157b9394SAndrei Pistirica sport->irq_tx_name = kasprintf(GFP_KERNEL, "%s%d-tx", 527157b9394SAndrei Pistirica pic32_uart_type(port), 528157b9394SAndrei Pistirica sport->idx); 529157b9394SAndrei Pistirica if (!sport->irq_tx_name) { 530157b9394SAndrei Pistirica dev_err(port->dev, "%s: kasprintf err!", __func__); 531157b9394SAndrei Pistirica ret = -ENOMEM; 532157b9394SAndrei Pistirica goto out_r; 533157b9394SAndrei Pistirica } 534157b9394SAndrei Pistirica irq_set_status_flags(sport->irq_tx, IRQ_NOAUTOEN); 535157b9394SAndrei Pistirica ret = request_irq(sport->irq_tx, pic32_uart_tx_interrupt, 53608f643e0SJiri Slaby IRQF_NO_THREAD, sport->irq_tx_name, port); 537157b9394SAndrei Pistirica if (ret) { 538157b9394SAndrei Pistirica dev_err(port->dev, "%s: request irq(%d) err! ret:%d name:%s\n", 539157b9394SAndrei Pistirica __func__, sport->irq_tx, ret, 540157b9394SAndrei Pistirica pic32_uart_type(port)); 541157b9394SAndrei Pistirica goto out_t; 542157b9394SAndrei Pistirica } 543157b9394SAndrei Pistirica 544157b9394SAndrei Pistirica local_irq_save(flags); 545157b9394SAndrei Pistirica 546157b9394SAndrei Pistirica /* set rx interrupt on first receive */ 547157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA), 548157b9394SAndrei Pistirica PIC32_UART_STA_URXISEL1 | PIC32_UART_STA_URXISEL0); 549157b9394SAndrei Pistirica 550157b9394SAndrei Pistirica /* set interrupt on empty */ 551157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA), 552157b9394SAndrei Pistirica PIC32_UART_STA_UTXISEL1); 553157b9394SAndrei Pistirica 554157b9394SAndrei Pistirica /* enable all interrupts and eanable uart */ 555157b9394SAndrei Pistirica pic32_uart_en_and_unmask(port); 556157b9394SAndrei Pistirica 557dfb9afb6SJiri Slaby local_irq_restore(flags); 558dfb9afb6SJiri Slaby 559157b9394SAndrei Pistirica enable_irq(sport->irq_rx); 560157b9394SAndrei Pistirica 561157b9394SAndrei Pistirica return 0; 562157b9394SAndrei Pistirica 563157b9394SAndrei Pistirica out_t: 5642aaa9573SChristophe JAILLET free_irq(sport->irq_tx, port); 565fe36fa18SJiri Slaby kfree(sport->irq_tx_name); 566157b9394SAndrei Pistirica out_r: 5672aaa9573SChristophe JAILLET free_irq(sport->irq_rx, port); 568fe36fa18SJiri Slaby kfree(sport->irq_rx_name); 569157b9394SAndrei Pistirica out_f: 5702aaa9573SChristophe JAILLET free_irq(sport->irq_fault, port); 571fe36fa18SJiri Slaby kfree(sport->irq_fault_name); 5726f3cdf2bSYang Yingliang out_disable_clk: 5736f3cdf2bSYang Yingliang clk_disable_unprepare(sport->clk); 574157b9394SAndrei Pistirica out_done: 575157b9394SAndrei Pistirica return ret; 576157b9394SAndrei Pistirica } 577157b9394SAndrei Pistirica 578157b9394SAndrei Pistirica /* serial core request to flush & disable uart */ 579157b9394SAndrei Pistirica static void pic32_uart_shutdown(struct uart_port *port) 580157b9394SAndrei Pistirica { 581157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 582157b9394SAndrei Pistirica unsigned long flags; 583157b9394SAndrei Pistirica 584157b9394SAndrei Pistirica /* disable uart */ 585157b9394SAndrei Pistirica spin_lock_irqsave(&port->lock, flags); 586157b9394SAndrei Pistirica pic32_uart_dsbl_and_mask(port); 587157b9394SAndrei Pistirica spin_unlock_irqrestore(&port->lock, flags); 588bb2cff41SJiri Slaby clk_disable_unprepare(sport->clk); 589157b9394SAndrei Pistirica 590157b9394SAndrei Pistirica /* free all 3 interrupts for this UART */ 591157b9394SAndrei Pistirica free_irq(sport->irq_fault, port); 592fe36fa18SJiri Slaby kfree(sport->irq_fault_name); 593157b9394SAndrei Pistirica free_irq(sport->irq_tx, port); 594fe36fa18SJiri Slaby kfree(sport->irq_tx_name); 595157b9394SAndrei Pistirica free_irq(sport->irq_rx, port); 596fe36fa18SJiri Slaby kfree(sport->irq_rx_name); 597157b9394SAndrei Pistirica } 598157b9394SAndrei Pistirica 599157b9394SAndrei Pistirica /* serial core request to change current uart setting */ 600157b9394SAndrei Pistirica static void pic32_uart_set_termios(struct uart_port *port, 601157b9394SAndrei Pistirica struct ktermios *new, 602*bec5b814SIlpo Järvinen const struct ktermios *old) 603157b9394SAndrei Pistirica { 604157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 605157b9394SAndrei Pistirica unsigned int baud; 606157b9394SAndrei Pistirica unsigned int quot; 607157b9394SAndrei Pistirica unsigned long flags; 608157b9394SAndrei Pistirica 609157b9394SAndrei Pistirica spin_lock_irqsave(&port->lock, flags); 610157b9394SAndrei Pistirica 611157b9394SAndrei Pistirica /* disable uart and mask all interrupts while changing speed */ 612157b9394SAndrei Pistirica pic32_uart_dsbl_and_mask(port); 613157b9394SAndrei Pistirica 614157b9394SAndrei Pistirica /* stop bit options */ 615157b9394SAndrei Pistirica if (new->c_cflag & CSTOPB) 616157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), 617157b9394SAndrei Pistirica PIC32_UART_MODE_STSEL); 618157b9394SAndrei Pistirica else 619157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE), 620157b9394SAndrei Pistirica PIC32_UART_MODE_STSEL); 621157b9394SAndrei Pistirica 622157b9394SAndrei Pistirica /* parity options */ 623157b9394SAndrei Pistirica if (new->c_cflag & PARENB) { 624157b9394SAndrei Pistirica if (new->c_cflag & PARODD) { 625157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), 626157b9394SAndrei Pistirica PIC32_UART_MODE_PDSEL1); 627157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE), 628157b9394SAndrei Pistirica PIC32_UART_MODE_PDSEL0); 629157b9394SAndrei Pistirica } else { 630157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), 631157b9394SAndrei Pistirica PIC32_UART_MODE_PDSEL0); 632157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE), 633157b9394SAndrei Pistirica PIC32_UART_MODE_PDSEL1); 634157b9394SAndrei Pistirica } 635157b9394SAndrei Pistirica } else { 636157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE), 637157b9394SAndrei Pistirica PIC32_UART_MODE_PDSEL1 | 638157b9394SAndrei Pistirica PIC32_UART_MODE_PDSEL0); 639157b9394SAndrei Pistirica } 640157b9394SAndrei Pistirica /* if hw flow ctrl, then the pins must be specified in device tree */ 641e9c9d3bbSAndy Shevchenko if ((new->c_cflag & CRTSCTS) && sport->cts_gpiod) { 642157b9394SAndrei Pistirica /* enable hardware flow control */ 643157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), 644157b9394SAndrei Pistirica PIC32_UART_MODE_UEN1); 645157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE), 646157b9394SAndrei Pistirica PIC32_UART_MODE_UEN0); 647157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE), 648157b9394SAndrei Pistirica PIC32_UART_MODE_RTSMD); 649157b9394SAndrei Pistirica } else { 650157b9394SAndrei Pistirica /* disable hardware flow control */ 651157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE), 652157b9394SAndrei Pistirica PIC32_UART_MODE_UEN1); 653157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE), 654157b9394SAndrei Pistirica PIC32_UART_MODE_UEN0); 655157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE), 656157b9394SAndrei Pistirica PIC32_UART_MODE_RTSMD); 657157b9394SAndrei Pistirica } 658157b9394SAndrei Pistirica 659157b9394SAndrei Pistirica /* Always 8-bit */ 660157b9394SAndrei Pistirica new->c_cflag |= CS8; 661157b9394SAndrei Pistirica 662157b9394SAndrei Pistirica /* Mark/Space parity is not supported */ 663157b9394SAndrei Pistirica new->c_cflag &= ~CMSPAR; 664157b9394SAndrei Pistirica 665157b9394SAndrei Pistirica /* update baud */ 666157b9394SAndrei Pistirica baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16); 667157b9394SAndrei Pistirica quot = uart_get_divisor(port, baud) - 1; 668157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_UART_BRG, quot); 669157b9394SAndrei Pistirica uart_update_timeout(port, new->c_cflag, baud); 670157b9394SAndrei Pistirica 671157b9394SAndrei Pistirica if (tty_termios_baud_rate(new)) 672157b9394SAndrei Pistirica tty_termios_encode_baud_rate(new, baud, baud); 673157b9394SAndrei Pistirica 674157b9394SAndrei Pistirica /* enable uart */ 675157b9394SAndrei Pistirica pic32_uart_en_and_unmask(port); 676157b9394SAndrei Pistirica 677157b9394SAndrei Pistirica spin_unlock_irqrestore(&port->lock, flags); 678157b9394SAndrei Pistirica } 679157b9394SAndrei Pistirica 680157b9394SAndrei Pistirica /* serial core request to claim uart iomem */ 681157b9394SAndrei Pistirica static int pic32_uart_request_port(struct uart_port *port) 682157b9394SAndrei Pistirica { 683157b9394SAndrei Pistirica struct platform_device *pdev = to_platform_device(port->dev); 684157b9394SAndrei Pistirica struct resource *res_mem; 685157b9394SAndrei Pistirica 686157b9394SAndrei Pistirica res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 687157b9394SAndrei Pistirica if (unlikely(!res_mem)) 688157b9394SAndrei Pistirica return -EINVAL; 689157b9394SAndrei Pistirica 690157b9394SAndrei Pistirica if (!request_mem_region(port->mapbase, resource_size(res_mem), 691157b9394SAndrei Pistirica "pic32_uart_mem")) 692157b9394SAndrei Pistirica return -EBUSY; 693157b9394SAndrei Pistirica 6944bdc0d67SChristoph Hellwig port->membase = devm_ioremap(port->dev, port->mapbase, 695157b9394SAndrei Pistirica resource_size(res_mem)); 696157b9394SAndrei Pistirica if (!port->membase) { 697157b9394SAndrei Pistirica dev_err(port->dev, "Unable to map registers\n"); 698157b9394SAndrei Pistirica release_mem_region(port->mapbase, resource_size(res_mem)); 699157b9394SAndrei Pistirica return -ENOMEM; 700157b9394SAndrei Pistirica } 701157b9394SAndrei Pistirica 702157b9394SAndrei Pistirica return 0; 703157b9394SAndrei Pistirica } 704157b9394SAndrei Pistirica 705157b9394SAndrei Pistirica /* serial core request to release uart iomem */ 706157b9394SAndrei Pistirica static void pic32_uart_release_port(struct uart_port *port) 707157b9394SAndrei Pistirica { 708157b9394SAndrei Pistirica struct platform_device *pdev = to_platform_device(port->dev); 709157b9394SAndrei Pistirica struct resource *res_mem; 710157b9394SAndrei Pistirica unsigned int res_size; 711157b9394SAndrei Pistirica 712157b9394SAndrei Pistirica res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 713157b9394SAndrei Pistirica if (unlikely(!res_mem)) 714157b9394SAndrei Pistirica return; 715157b9394SAndrei Pistirica res_size = resource_size(res_mem); 716157b9394SAndrei Pistirica 717157b9394SAndrei Pistirica release_mem_region(port->mapbase, res_size); 718157b9394SAndrei Pistirica } 719157b9394SAndrei Pistirica 720157b9394SAndrei Pistirica /* serial core request to do any port required auto-configuration */ 721157b9394SAndrei Pistirica static void pic32_uart_config_port(struct uart_port *port, int flags) 722157b9394SAndrei Pistirica { 723157b9394SAndrei Pistirica if (flags & UART_CONFIG_TYPE) { 724157b9394SAndrei Pistirica if (pic32_uart_request_port(port)) 725157b9394SAndrei Pistirica return; 726157b9394SAndrei Pistirica port->type = PORT_PIC32; 727157b9394SAndrei Pistirica } 728157b9394SAndrei Pistirica } 729157b9394SAndrei Pistirica 730157b9394SAndrei Pistirica /* serial core request to check that port information in serinfo are suitable */ 731157b9394SAndrei Pistirica static int pic32_uart_verify_port(struct uart_port *port, 732157b9394SAndrei Pistirica struct serial_struct *serinfo) 733157b9394SAndrei Pistirica { 734157b9394SAndrei Pistirica if (port->type != PORT_PIC32) 735157b9394SAndrei Pistirica return -EINVAL; 736157b9394SAndrei Pistirica if (port->irq != serinfo->irq) 737157b9394SAndrei Pistirica return -EINVAL; 738157b9394SAndrei Pistirica if (port->iotype != serinfo->io_type) 739157b9394SAndrei Pistirica return -EINVAL; 740157b9394SAndrei Pistirica if (port->mapbase != (unsigned long)serinfo->iomem_base) 741157b9394SAndrei Pistirica return -EINVAL; 742157b9394SAndrei Pistirica 743157b9394SAndrei Pistirica return 0; 744157b9394SAndrei Pistirica } 745157b9394SAndrei Pistirica 746157b9394SAndrei Pistirica /* serial core callbacks */ 747157b9394SAndrei Pistirica static const struct uart_ops pic32_uart_ops = { 748157b9394SAndrei Pistirica .tx_empty = pic32_uart_tx_empty, 749157b9394SAndrei Pistirica .get_mctrl = pic32_uart_get_mctrl, 750157b9394SAndrei Pistirica .set_mctrl = pic32_uart_set_mctrl, 751157b9394SAndrei Pistirica .start_tx = pic32_uart_start_tx, 752157b9394SAndrei Pistirica .stop_tx = pic32_uart_stop_tx, 753157b9394SAndrei Pistirica .stop_rx = pic32_uart_stop_rx, 754157b9394SAndrei Pistirica .break_ctl = pic32_uart_break_ctl, 755157b9394SAndrei Pistirica .startup = pic32_uart_startup, 756157b9394SAndrei Pistirica .shutdown = pic32_uart_shutdown, 757157b9394SAndrei Pistirica .set_termios = pic32_uart_set_termios, 758157b9394SAndrei Pistirica .type = pic32_uart_type, 759157b9394SAndrei Pistirica .release_port = pic32_uart_release_port, 760157b9394SAndrei Pistirica .request_port = pic32_uart_request_port, 761157b9394SAndrei Pistirica .config_port = pic32_uart_config_port, 762157b9394SAndrei Pistirica .verify_port = pic32_uart_verify_port, 763157b9394SAndrei Pistirica }; 764157b9394SAndrei Pistirica 765157b9394SAndrei Pistirica #ifdef CONFIG_SERIAL_PIC32_CONSOLE 766157b9394SAndrei Pistirica /* output given char */ 7673f8bab17SJiri Slaby static void pic32_console_putchar(struct uart_port *port, unsigned char ch) 768157b9394SAndrei Pistirica { 769157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 770157b9394SAndrei Pistirica 771157b9394SAndrei Pistirica if (!(pic32_uart_readl(sport, PIC32_UART_MODE) & PIC32_UART_MODE_ON)) 772157b9394SAndrei Pistirica return; 773157b9394SAndrei Pistirica 774157b9394SAndrei Pistirica if (!(pic32_uart_readl(sport, PIC32_UART_STA) & PIC32_UART_STA_UTXEN)) 775157b9394SAndrei Pistirica return; 776157b9394SAndrei Pistirica 777157b9394SAndrei Pistirica /* wait for tx empty */ 778157b9394SAndrei Pistirica pic32_wait_deplete_txbuf(sport); 779157b9394SAndrei Pistirica 780157b9394SAndrei Pistirica pic32_uart_writel(sport, PIC32_UART_TX, ch & 0xff); 781157b9394SAndrei Pistirica } 782157b9394SAndrei Pistirica 783157b9394SAndrei Pistirica /* console core request to output given string */ 784157b9394SAndrei Pistirica static void pic32_console_write(struct console *co, const char *s, 785157b9394SAndrei Pistirica unsigned int count) 786157b9394SAndrei Pistirica { 787157b9394SAndrei Pistirica struct pic32_sport *sport = pic32_sports[co->index]; 788157b9394SAndrei Pistirica 789157b9394SAndrei Pistirica /* call uart helper to deal with \r\n */ 790343f23cfSJiri Slaby uart_console_write(&sport->port, s, count, pic32_console_putchar); 791157b9394SAndrei Pistirica } 792157b9394SAndrei Pistirica 793157b9394SAndrei Pistirica /* console core request to setup given console, find matching uart 794157b9394SAndrei Pistirica * port and setup it. 795157b9394SAndrei Pistirica */ 796157b9394SAndrei Pistirica static int pic32_console_setup(struct console *co, char *options) 797157b9394SAndrei Pistirica { 798157b9394SAndrei Pistirica struct pic32_sport *sport; 799157b9394SAndrei Pistirica int baud = 115200; 800157b9394SAndrei Pistirica int bits = 8; 801157b9394SAndrei Pistirica int parity = 'n'; 802157b9394SAndrei Pistirica int flow = 'n'; 803157b9394SAndrei Pistirica int ret = 0; 804157b9394SAndrei Pistirica 805157b9394SAndrei Pistirica if (unlikely(co->index < 0 || co->index >= PIC32_MAX_UARTS)) 806157b9394SAndrei Pistirica return -ENODEV; 807157b9394SAndrei Pistirica 808157b9394SAndrei Pistirica sport = pic32_sports[co->index]; 809157b9394SAndrei Pistirica if (!sport) 810157b9394SAndrei Pistirica return -ENODEV; 811157b9394SAndrei Pistirica 812bb2cff41SJiri Slaby ret = clk_prepare_enable(sport->clk); 813157b9394SAndrei Pistirica if (ret) 814157b9394SAndrei Pistirica return ret; 815157b9394SAndrei Pistirica 816157b9394SAndrei Pistirica if (options) 817157b9394SAndrei Pistirica uart_parse_options(options, &baud, &parity, &bits, &flow); 818157b9394SAndrei Pistirica 819343f23cfSJiri Slaby return uart_set_options(&sport->port, co, baud, parity, bits, flow); 820157b9394SAndrei Pistirica } 821157b9394SAndrei Pistirica 822157b9394SAndrei Pistirica static struct uart_driver pic32_uart_driver; 823157b9394SAndrei Pistirica static struct console pic32_console = { 824157b9394SAndrei Pistirica .name = PIC32_SDEV_NAME, 825157b9394SAndrei Pistirica .write = pic32_console_write, 826157b9394SAndrei Pistirica .device = uart_console_device, 827157b9394SAndrei Pistirica .setup = pic32_console_setup, 828157b9394SAndrei Pistirica .flags = CON_PRINTBUFFER, 829157b9394SAndrei Pistirica .index = -1, 830157b9394SAndrei Pistirica .data = &pic32_uart_driver, 831157b9394SAndrei Pistirica }; 832157b9394SAndrei Pistirica #define PIC32_SCONSOLE (&pic32_console) 833157b9394SAndrei Pistirica 834157b9394SAndrei Pistirica static int __init pic32_console_init(void) 835157b9394SAndrei Pistirica { 836157b9394SAndrei Pistirica register_console(&pic32_console); 837157b9394SAndrei Pistirica return 0; 838157b9394SAndrei Pistirica } 839157b9394SAndrei Pistirica console_initcall(pic32_console_init); 840157b9394SAndrei Pistirica 841157b9394SAndrei Pistirica /* 842157b9394SAndrei Pistirica * Late console initialization. 843157b9394SAndrei Pistirica */ 844157b9394SAndrei Pistirica static int __init pic32_late_console_init(void) 845157b9394SAndrei Pistirica { 846157b9394SAndrei Pistirica if (!(pic32_console.flags & CON_ENABLED)) 847157b9394SAndrei Pistirica register_console(&pic32_console); 848157b9394SAndrei Pistirica 849157b9394SAndrei Pistirica return 0; 850157b9394SAndrei Pistirica } 851157b9394SAndrei Pistirica 852157b9394SAndrei Pistirica core_initcall(pic32_late_console_init); 853157b9394SAndrei Pistirica 854157b9394SAndrei Pistirica #else 855157b9394SAndrei Pistirica #define PIC32_SCONSOLE NULL 856157b9394SAndrei Pistirica #endif 857157b9394SAndrei Pistirica 858157b9394SAndrei Pistirica static struct uart_driver pic32_uart_driver = { 859157b9394SAndrei Pistirica .owner = THIS_MODULE, 860157b9394SAndrei Pistirica .driver_name = PIC32_DEV_NAME, 861157b9394SAndrei Pistirica .dev_name = PIC32_SDEV_NAME, 862157b9394SAndrei Pistirica .nr = PIC32_MAX_UARTS, 863157b9394SAndrei Pistirica .cons = PIC32_SCONSOLE, 864157b9394SAndrei Pistirica }; 865157b9394SAndrei Pistirica 866157b9394SAndrei Pistirica static int pic32_uart_probe(struct platform_device *pdev) 867157b9394SAndrei Pistirica { 868e9c9d3bbSAndy Shevchenko struct device *dev = &pdev->dev; 869e9c9d3bbSAndy Shevchenko struct device_node *np = dev->of_node; 870157b9394SAndrei Pistirica struct pic32_sport *sport; 871157b9394SAndrei Pistirica int uart_idx = 0; 872157b9394SAndrei Pistirica struct resource *res_mem; 873157b9394SAndrei Pistirica struct uart_port *port; 874157b9394SAndrei Pistirica int ret; 875157b9394SAndrei Pistirica 876157b9394SAndrei Pistirica uart_idx = of_alias_get_id(np, "serial"); 877157b9394SAndrei Pistirica if (uart_idx < 0 || uart_idx >= PIC32_MAX_UARTS) 878157b9394SAndrei Pistirica return -EINVAL; 879157b9394SAndrei Pistirica 880157b9394SAndrei Pistirica res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 881157b9394SAndrei Pistirica if (!res_mem) 882157b9394SAndrei Pistirica return -EINVAL; 883157b9394SAndrei Pistirica 884157b9394SAndrei Pistirica sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL); 885157b9394SAndrei Pistirica if (!sport) 886157b9394SAndrei Pistirica return -ENOMEM; 887157b9394SAndrei Pistirica 888157b9394SAndrei Pistirica sport->idx = uart_idx; 889157b9394SAndrei Pistirica sport->irq_fault = irq_of_parse_and_map(np, 0); 890157b9394SAndrei Pistirica sport->irq_rx = irq_of_parse_and_map(np, 1); 891157b9394SAndrei Pistirica sport->irq_tx = irq_of_parse_and_map(np, 2); 892157b9394SAndrei Pistirica sport->clk = devm_clk_get(&pdev->dev, NULL); 893157b9394SAndrei Pistirica sport->dev = &pdev->dev; 894157b9394SAndrei Pistirica 895157b9394SAndrei Pistirica /* Hardware flow control: gpios 896157b9394SAndrei Pistirica * !Note: Basically, CTS is needed for reading the status. 897157b9394SAndrei Pistirica */ 898e9c9d3bbSAndy Shevchenko sport->cts_gpiod = devm_gpiod_get_optional(dev, "cts", GPIOD_IN); 899e9c9d3bbSAndy Shevchenko if (IS_ERR(sport->cts_gpiod)) 900e9c9d3bbSAndy Shevchenko return dev_err_probe(dev, PTR_ERR(sport->cts_gpiod), "error requesting CTS GPIO\n"); 901e9c9d3bbSAndy Shevchenko gpiod_set_consumer_name(sport->cts_gpiod, "CTS"); 902157b9394SAndrei Pistirica 903157b9394SAndrei Pistirica pic32_sports[uart_idx] = sport; 904157b9394SAndrei Pistirica port = &sport->port; 905157b9394SAndrei Pistirica port->iotype = UPIO_MEM; 906157b9394SAndrei Pistirica port->mapbase = res_mem->start; 907157b9394SAndrei Pistirica port->ops = &pic32_uart_ops; 908157b9394SAndrei Pistirica port->flags = UPF_BOOT_AUTOCONF; 909157b9394SAndrei Pistirica port->dev = &pdev->dev; 910157b9394SAndrei Pistirica port->fifosize = PIC32_UART_TX_FIFO_DEPTH; 911157b9394SAndrei Pistirica port->uartclk = clk_get_rate(sport->clk); 912157b9394SAndrei Pistirica port->line = uart_idx; 913157b9394SAndrei Pistirica 914157b9394SAndrei Pistirica ret = uart_add_one_port(&pic32_uart_driver, port); 915157b9394SAndrei Pistirica if (ret) { 916157b9394SAndrei Pistirica port->membase = NULL; 917157b9394SAndrei Pistirica dev_err(port->dev, "%s: uart add port error!\n", __func__); 918157b9394SAndrei Pistirica goto err; 919157b9394SAndrei Pistirica } 920157b9394SAndrei Pistirica 921157b9394SAndrei Pistirica #ifdef CONFIG_SERIAL_PIC32_CONSOLE 922e68d5450SAndy Shevchenko if (uart_console_enabled(port)) { 923157b9394SAndrei Pistirica /* The peripheral clock has been enabled by console_setup, 924157b9394SAndrei Pistirica * so disable it till the port is used. 925157b9394SAndrei Pistirica */ 926bb2cff41SJiri Slaby clk_disable_unprepare(sport->clk); 927157b9394SAndrei Pistirica } 928157b9394SAndrei Pistirica #endif 929157b9394SAndrei Pistirica 930157b9394SAndrei Pistirica platform_set_drvdata(pdev, port); 931157b9394SAndrei Pistirica 932157b9394SAndrei Pistirica dev_info(&pdev->dev, "%s: uart(%d) driver initialized.\n", 933157b9394SAndrei Pistirica __func__, uart_idx); 934157b9394SAndrei Pistirica 935157b9394SAndrei Pistirica return 0; 936157b9394SAndrei Pistirica err: 937157b9394SAndrei Pistirica /* automatic unroll of sport and gpios */ 938157b9394SAndrei Pistirica return ret; 939157b9394SAndrei Pistirica } 940157b9394SAndrei Pistirica 941157b9394SAndrei Pistirica static int pic32_uart_remove(struct platform_device *pdev) 942157b9394SAndrei Pistirica { 943157b9394SAndrei Pistirica struct uart_port *port = platform_get_drvdata(pdev); 944157b9394SAndrei Pistirica struct pic32_sport *sport = to_pic32_sport(port); 945157b9394SAndrei Pistirica 946157b9394SAndrei Pistirica uart_remove_one_port(&pic32_uart_driver, port); 947bb2cff41SJiri Slaby clk_disable_unprepare(sport->clk); 948157b9394SAndrei Pistirica platform_set_drvdata(pdev, NULL); 949157b9394SAndrei Pistirica pic32_sports[sport->idx] = NULL; 950157b9394SAndrei Pistirica 951157b9394SAndrei Pistirica /* automatic unroll of sport and gpios */ 952157b9394SAndrei Pistirica return 0; 953157b9394SAndrei Pistirica } 954157b9394SAndrei Pistirica 955157b9394SAndrei Pistirica static const struct of_device_id pic32_serial_dt_ids[] = { 956157b9394SAndrei Pistirica { .compatible = "microchip,pic32mzda-uart" }, 957157b9394SAndrei Pistirica { /* sentinel */ } 958157b9394SAndrei Pistirica }; 959157b9394SAndrei Pistirica MODULE_DEVICE_TABLE(of, pic32_serial_dt_ids); 960157b9394SAndrei Pistirica 961157b9394SAndrei Pistirica static struct platform_driver pic32_uart_platform_driver = { 962157b9394SAndrei Pistirica .probe = pic32_uart_probe, 963157b9394SAndrei Pistirica .remove = pic32_uart_remove, 964157b9394SAndrei Pistirica .driver = { 965157b9394SAndrei Pistirica .name = PIC32_DEV_NAME, 966157b9394SAndrei Pistirica .of_match_table = of_match_ptr(pic32_serial_dt_ids), 96764609794SAnders Roxell .suppress_bind_attrs = IS_BUILTIN(CONFIG_SERIAL_PIC32), 968157b9394SAndrei Pistirica }, 969157b9394SAndrei Pistirica }; 970157b9394SAndrei Pistirica 971157b9394SAndrei Pistirica static int __init pic32_uart_init(void) 972157b9394SAndrei Pistirica { 973157b9394SAndrei Pistirica int ret; 974157b9394SAndrei Pistirica 975157b9394SAndrei Pistirica ret = uart_register_driver(&pic32_uart_driver); 976157b9394SAndrei Pistirica if (ret) { 977157b9394SAndrei Pistirica pr_err("failed to register %s:%d\n", 978157b9394SAndrei Pistirica pic32_uart_driver.driver_name, ret); 979157b9394SAndrei Pistirica return ret; 980157b9394SAndrei Pistirica } 981157b9394SAndrei Pistirica 982157b9394SAndrei Pistirica ret = platform_driver_register(&pic32_uart_platform_driver); 983157b9394SAndrei Pistirica if (ret) { 984157b9394SAndrei Pistirica pr_err("fail to register pic32 uart\n"); 985157b9394SAndrei Pistirica uart_unregister_driver(&pic32_uart_driver); 986157b9394SAndrei Pistirica } 987157b9394SAndrei Pistirica 988157b9394SAndrei Pistirica return ret; 989157b9394SAndrei Pistirica } 990157b9394SAndrei Pistirica arch_initcall(pic32_uart_init); 991157b9394SAndrei Pistirica 992157b9394SAndrei Pistirica static void __exit pic32_uart_exit(void) 993157b9394SAndrei Pistirica { 994157b9394SAndrei Pistirica #ifdef CONFIG_SERIAL_PIC32_CONSOLE 995157b9394SAndrei Pistirica unregister_console(&pic32_console); 996157b9394SAndrei Pistirica #endif 997157b9394SAndrei Pistirica platform_driver_unregister(&pic32_uart_platform_driver); 998157b9394SAndrei Pistirica uart_unregister_driver(&pic32_uart_driver); 999157b9394SAndrei Pistirica } 1000157b9394SAndrei Pistirica module_exit(pic32_uart_exit); 1001157b9394SAndrei Pistirica 1002157b9394SAndrei Pistirica MODULE_AUTHOR("Sorin-Andrei Pistirica <andrei.pistirica@microchip.com>"); 1003157b9394SAndrei Pistirica MODULE_DESCRIPTION("Microchip PIC32 integrated serial port driver"); 1004157b9394SAndrei Pistirica MODULE_LICENSE("GPL v2"); 1005