xref: /linux/drivers/tty/serial/liteuart.c (revision 662fa3d6099374c4615bf64d06895e3573b935b2) 
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * LiteUART serial controller (LiteX) Driver
4  *
5  * Copyright (C) 2019-2020 Antmicro <www.antmicro.com>
6  */
7 
8 #include <linux/console.h>
9 #include <linux/litex.h>
10 #include <linux/module.h>
11 #include <linux/of.h>
12 #include <linux/of_address.h>
13 #include <linux/of_platform.h>
14 #include <linux/serial.h>
15 #include <linux/serial_core.h>
16 #include <linux/slab.h>
17 #include <linux/timer.h>
18 #include <linux/tty_flip.h>
19 #include <linux/xarray.h>
20 
21 /*
22  * CSRs definitions (base address offsets + width)
23  *
24  * The definitions below are true for LiteX SoC configured for 8-bit CSR Bus,
25  * 32-bit aligned.
26  *
27  * Supporting other configurations might require new definitions or a more
28  * generic way of indexing the LiteX CSRs.
29  *
30  * For more details on how CSRs are defined and handled in LiteX, see comments
31  * in the LiteX SoC Driver: drivers/soc/litex/litex_soc_ctrl.c
32  */
33 #define OFF_RXTX	0x00
34 #define OFF_TXFULL	0x04
35 #define OFF_RXEMPTY	0x08
36 #define OFF_EV_STATUS	0x0c
37 #define OFF_EV_PENDING	0x10
38 #define OFF_EV_ENABLE	0x14
39 
40 /* events */
41 #define EV_TX		0x1
42 #define EV_RX		0x2
43 
44 struct liteuart_port {
45 	struct uart_port port;
46 	struct timer_list timer;
47 	u32 id;
48 };
49 
50 #define to_liteuart_port(port)	container_of(port, struct liteuart_port, port)
51 
52 static DEFINE_XARRAY_FLAGS(liteuart_array, XA_FLAGS_ALLOC);
53 
54 #ifdef CONFIG_SERIAL_LITEUART_CONSOLE
55 static struct console liteuart_console;
56 #endif
57 
58 static struct uart_driver liteuart_driver = {
59 	.owner = THIS_MODULE,
60 	.driver_name = "liteuart",
61 	.dev_name = "ttyLXU",
62 	.major = 0,
63 	.minor = 0,
64 	.nr = CONFIG_SERIAL_LITEUART_MAX_PORTS,
65 #ifdef CONFIG_SERIAL_LITEUART_CONSOLE
66 	.cons = &liteuart_console,
67 #endif
68 };
69 
70 static void liteuart_timer(struct timer_list *t)
71 {
72 	struct liteuart_port *uart = from_timer(uart, t, timer);
73 	struct uart_port *port = &uart->port;
74 	unsigned char __iomem *membase = port->membase;
75 	unsigned int flg = TTY_NORMAL;
76 	int ch;
77 	unsigned long status;
78 
79 	while ((status = !litex_read8(membase + OFF_RXEMPTY)) == 1) {
80 		ch = litex_read8(membase + OFF_RXTX);
81 		port->icount.rx++;
82 
83 		/* necessary for RXEMPTY to refresh its value */
84 		litex_write8(membase + OFF_EV_PENDING, EV_TX | EV_RX);
85 
86 		/* no overflow bits in status */
87 		if (!(uart_handle_sysrq_char(port, ch)))
88 			uart_insert_char(port, status, 0, ch, flg);
89 
90 		tty_flip_buffer_push(&port->state->port);
91 	}
92 
93 	mod_timer(&uart->timer, jiffies + uart_poll_timeout(port));
94 }
95 
96 static void liteuart_putchar(struct uart_port *port, int ch)
97 {
98 	while (litex_read8(port->membase + OFF_TXFULL))
99 		cpu_relax();
100 
101 	litex_write8(port->membase + OFF_RXTX, ch);
102 }
103 
104 static unsigned int liteuart_tx_empty(struct uart_port *port)
105 {
106 	/* not really tx empty, just checking if tx is not full */
107 	if (!litex_read8(port->membase + OFF_TXFULL))
108 		return TIOCSER_TEMT;
109 
110 	return 0;
111 }
112 
113 static void liteuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
114 {
115 	/* modem control register is not present in LiteUART */
116 }
117 
118 static unsigned int liteuart_get_mctrl(struct uart_port *port)
119 {
120 	return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
121 }
122 
123 static void liteuart_stop_tx(struct uart_port *port)
124 {
125 }
126 
127 static void liteuart_start_tx(struct uart_port *port)
128 {
129 	struct circ_buf *xmit = &port->state->xmit;
130 	unsigned char ch;
131 
132 	if (unlikely(port->x_char)) {
133 		litex_write8(port->membase + OFF_RXTX, port->x_char);
134 		port->icount.tx++;
135 		port->x_char = 0;
136 	} else if (!uart_circ_empty(xmit)) {
137 		while (xmit->head != xmit->tail) {
138 			ch = xmit->buf[xmit->tail];
139 			xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
140 			port->icount.tx++;
141 			liteuart_putchar(port, ch);
142 		}
143 	}
144 
145 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
146 		uart_write_wakeup(port);
147 }
148 
149 static void liteuart_stop_rx(struct uart_port *port)
150 {
151 	struct liteuart_port *uart = to_liteuart_port(port);
152 
153 	/* just delete timer */
154 	del_timer(&uart->timer);
155 }
156 
157 static void liteuart_break_ctl(struct uart_port *port, int break_state)
158 {
159 	/* LiteUART doesn't support sending break signal */
160 }
161 
162 static int liteuart_startup(struct uart_port *port)
163 {
164 	struct liteuart_port *uart = to_liteuart_port(port);
165 
166 	/* disable events */
167 	litex_write8(port->membase + OFF_EV_ENABLE, 0);
168 
169 	/* prepare timer for polling */
170 	timer_setup(&uart->timer, liteuart_timer, 0);
171 	mod_timer(&uart->timer, jiffies + uart_poll_timeout(port));
172 
173 	return 0;
174 }
175 
176 static void liteuart_shutdown(struct uart_port *port)
177 {
178 }
179 
180 static void liteuart_set_termios(struct uart_port *port, struct ktermios *new,
181 				 struct ktermios *old)
182 {
183 	unsigned int baud;
184 	unsigned long flags;
185 
186 	spin_lock_irqsave(&port->lock, flags);
187 
188 	/* update baudrate */
189 	baud = uart_get_baud_rate(port, new, old, 0, 460800);
190 	uart_update_timeout(port, new->c_cflag, baud);
191 
192 	spin_unlock_irqrestore(&port->lock, flags);
193 }
194 
195 static const char *liteuart_type(struct uart_port *port)
196 {
197 	return "liteuart";
198 }
199 
200 static void liteuart_release_port(struct uart_port *port)
201 {
202 }
203 
204 static int liteuart_request_port(struct uart_port *port)
205 {
206 	return 0;
207 }
208 
209 static void liteuart_config_port(struct uart_port *port, int flags)
210 {
211 	/*
212 	 * Driver core for serial ports forces a non-zero value for port type.
213 	 * Write an arbitrary value here to accommodate the serial core driver,
214 	 * as ID part of UAPI is redundant.
215 	 */
216 	port->type = 1;
217 }
218 
219 static int liteuart_verify_port(struct uart_port *port,
220 				struct serial_struct *ser)
221 {
222 	if (port->type != PORT_UNKNOWN && ser->type != 1)
223 		return -EINVAL;
224 
225 	return 0;
226 }
227 
228 static const struct uart_ops liteuart_ops = {
229 	.tx_empty	= liteuart_tx_empty,
230 	.set_mctrl	= liteuart_set_mctrl,
231 	.get_mctrl	= liteuart_get_mctrl,
232 	.stop_tx	= liteuart_stop_tx,
233 	.start_tx	= liteuart_start_tx,
234 	.stop_rx	= liteuart_stop_rx,
235 	.break_ctl	= liteuart_break_ctl,
236 	.startup	= liteuart_startup,
237 	.shutdown	= liteuart_shutdown,
238 	.set_termios	= liteuart_set_termios,
239 	.type		= liteuart_type,
240 	.release_port	= liteuart_release_port,
241 	.request_port	= liteuart_request_port,
242 	.config_port	= liteuart_config_port,
243 	.verify_port	= liteuart_verify_port,
244 };
245 
246 static int liteuart_probe(struct platform_device *pdev)
247 {
248 	struct liteuart_port *uart;
249 	struct uart_port *port;
250 	struct xa_limit limit;
251 	int dev_id, ret;
252 
253 	/* look for aliases; auto-enumerate for free index if not found */
254 	dev_id = of_alias_get_id(pdev->dev.of_node, "serial");
255 	if (dev_id < 0)
256 		limit = XA_LIMIT(0, CONFIG_SERIAL_LITEUART_MAX_PORTS);
257 	else
258 		limit = XA_LIMIT(dev_id, dev_id);
259 
260 	uart = devm_kzalloc(&pdev->dev, sizeof(struct liteuart_port), GFP_KERNEL);
261 	if (!uart)
262 		return -ENOMEM;
263 
264 	ret = xa_alloc(&liteuart_array, &dev_id, uart, limit, GFP_KERNEL);
265 	if (ret)
266 		return ret;
267 
268 	uart->id = dev_id;
269 	port = &uart->port;
270 
271 	/* get membase */
272 	port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
273 	if (IS_ERR(port->membase))
274 		return PTR_ERR(port->membase);
275 
276 	/* values not from device tree */
277 	port->dev = &pdev->dev;
278 	port->iotype = UPIO_MEM;
279 	port->flags = UPF_BOOT_AUTOCONF;
280 	port->ops = &liteuart_ops;
281 	port->regshift = 2;
282 	port->fifosize = 16;
283 	port->iobase = 1;
284 	port->type = PORT_UNKNOWN;
285 	port->line = dev_id;
286 	spin_lock_init(&port->lock);
287 
288 	return uart_add_one_port(&liteuart_driver, &uart->port);
289 }
290 
291 static int liteuart_remove(struct platform_device *pdev)
292 {
293 	struct uart_port *port = platform_get_drvdata(pdev);
294 	struct liteuart_port *uart = to_liteuart_port(port);
295 
296 	xa_erase(&liteuart_array, uart->id);
297 
298 	return 0;
299 }
300 
301 static const struct of_device_id liteuart_of_match[] = {
302 	{ .compatible = "litex,liteuart" },
303 	{}
304 };
305 MODULE_DEVICE_TABLE(of, liteuart_of_match);
306 
307 static struct platform_driver liteuart_platform_driver = {
308 	.probe = liteuart_probe,
309 	.remove = liteuart_remove,
310 	.driver = {
311 		.name = "liteuart",
312 		.of_match_table = liteuart_of_match,
313 	},
314 };
315 
316 #ifdef CONFIG_SERIAL_LITEUART_CONSOLE
317 
318 static void liteuart_console_write(struct console *co, const char *s,
319 	unsigned int count)
320 {
321 	struct liteuart_port *uart;
322 	struct uart_port *port;
323 	unsigned long flags;
324 
325 	uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index);
326 	port = &uart->port;
327 
328 	spin_lock_irqsave(&port->lock, flags);
329 	uart_console_write(port, s, count, liteuart_putchar);
330 	spin_unlock_irqrestore(&port->lock, flags);
331 }
332 
333 static int liteuart_console_setup(struct console *co, char *options)
334 {
335 	struct liteuart_port *uart;
336 	struct uart_port *port;
337 	int baud = 115200;
338 	int bits = 8;
339 	int parity = 'n';
340 	int flow = 'n';
341 
342 	uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index);
343 	if (!uart)
344 		return -ENODEV;
345 
346 	port = &uart->port;
347 	if (!port->membase)
348 		return -ENODEV;
349 
350 	if (options)
351 		uart_parse_options(options, &baud, &parity, &bits, &flow);
352 
353 	return uart_set_options(port, co, baud, parity, bits, flow);
354 }
355 
356 static struct console liteuart_console = {
357 	.name = "liteuart",
358 	.write = liteuart_console_write,
359 	.device = uart_console_device,
360 	.setup = liteuart_console_setup,
361 	.flags = CON_PRINTBUFFER,
362 	.index = -1,
363 	.data = &liteuart_driver,
364 };
365 
366 static int __init liteuart_console_init(void)
367 {
368 	register_console(&liteuart_console);
369 
370 	return 0;
371 }
372 console_initcall(liteuart_console_init);
373 
374 static void early_liteuart_write(struct console *console, const char *s,
375 				    unsigned int count)
376 {
377 	struct earlycon_device *device = console->data;
378 	struct uart_port *port = &device->port;
379 
380 	uart_console_write(port, s, count, liteuart_putchar);
381 }
382 
383 static int __init early_liteuart_setup(struct earlycon_device *device,
384 				       const char *options)
385 {
386 	if (!device->port.membase)
387 		return -ENODEV;
388 
389 	device->con->write = early_liteuart_write;
390 	return 0;
391 }
392 
393 OF_EARLYCON_DECLARE(liteuart, "litex,liteuart", early_liteuart_setup);
394 #endif /* CONFIG_SERIAL_LITEUART_CONSOLE */
395 
396 static int __init liteuart_init(void)
397 {
398 	int res;
399 
400 	res = uart_register_driver(&liteuart_driver);
401 	if (res)
402 		return res;
403 
404 	res = platform_driver_register(&liteuart_platform_driver);
405 	if (res) {
406 		uart_unregister_driver(&liteuart_driver);
407 		return res;
408 	}
409 
410 	return 0;
411 }
412 
413 static void __exit liteuart_exit(void)
414 {
415 	platform_driver_unregister(&liteuart_platform_driver);
416 	uart_unregister_driver(&liteuart_driver);
417 }
418 
419 module_init(liteuart_init);
420 module_exit(liteuart_exit);
421 
422 MODULE_AUTHOR("Antmicro <www.antmicro.com>");
423 MODULE_DESCRIPTION("LiteUART serial driver");
424 MODULE_LICENSE("GPL v2");
425 MODULE_ALIAS("platform: liteuart");
426