xref: /linux/drivers/tty/serial/icom.c (revision 4b132aacb0768ac1e652cf517097ea6f237214b9)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3   * icom.c
4   *
5   * Copyright (C) 2001 IBM Corporation. All rights reserved.
6   *
7   * Serial device driver.
8   *
9   * Based on code from serial.c
10   */
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/errno.h>
14 #include <linux/signal.h>
15 #include <linux/timer.h>
16 #include <linux/interrupt.h>
17 #include <linux/tty.h>
18 #include <linux/termios.h>
19 #include <linux/fs.h>
20 #include <linux/tty_flip.h>
21 #include <linux/serial.h>
22 #include <linux/serial_core.h>
23 #include <linux/serial_reg.h>
24 #include <linux/major.h>
25 #include <linux/string.h>
26 #include <linux/fcntl.h>
27 #include <linux/ptrace.h>
28 #include <linux/ioport.h>
29 #include <linux/mm.h>
30 #include <linux/slab.h>
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/pci.h>
34 #include <linux/vmalloc.h>
35 #include <linux/smp.h>
36 #include <linux/spinlock.h>
37 #include <linux/kref.h>
38 #include <linux/firmware.h>
39 #include <linux/bitops.h>
40 
41 #include <linux/io.h>
42 #include <asm/irq.h>
43 #include <linux/uaccess.h>
44 
45 /*#define ICOM_TRACE		 enable port trace capabilities */
46 
47 #define ICOM_DRIVER_NAME "icom"
48 #define NR_PORTS	       128
49 
50 static const unsigned int icom_acfg_baud[] = {
51 	300,
52 	600,
53 	900,
54 	1200,
55 	1800,
56 	2400,
57 	3600,
58 	4800,
59 	7200,
60 	9600,
61 	14400,
62 	19200,
63 	28800,
64 	38400,
65 	57600,
66 	76800,
67 	115200,
68 	153600,
69 	230400,
70 	307200,
71 	460800,
72 };
73 #define BAUD_TABLE_LIMIT	(ARRAY_SIZE(icom_acfg_baud) - 1)
74 
75 struct icom_regs {
76 	u32 control;		/* Adapter Control Register     */
77 	u32 interrupt;		/* Adapter Interrupt Register   */
78 	u32 int_mask;		/* Adapter Interrupt Mask Reg   */
79 	u32 int_pri;		/* Adapter Interrupt Priority r */
80 	u32 int_reg_b;		/* Adapter non-masked Interrupt */
81 	u32 resvd01;
82 	u32 resvd02;
83 	u32 resvd03;
84 	u32 control_2;		/* Adapter Control Register 2   */
85 	u32 interrupt_2;	/* Adapter Interrupt Register 2 */
86 	u32 int_mask_2;		/* Adapter Interrupt Mask 2     */
87 	u32 int_pri_2;		/* Adapter Interrupt Prior 2    */
88 	u32 int_reg_2b;		/* Adapter non-masked 2         */
89 };
90 
91 struct func_dram {
92 	u32 reserved[108];	/* 0-1B0   reserved by personality code */
93 	u32 RcvStatusAddr;	/* 1B0-1B3 Status Address for Next rcv */
94 	u8 RcvStnAddr;		/* 1B4     Receive Station Addr */
95 	u8 IdleState;		/* 1B5     Idle State */
96 	u8 IdleMonitor;		/* 1B6     Idle Monitor */
97 	u8 FlagFillIdleTimer;	/* 1B7     Flag Fill Idle Timer */
98 	u32 XmitStatusAddr;	/* 1B8-1BB Transmit Status Address */
99 	u8 StartXmitCmd;	/* 1BC     Start Xmit Command */
100 	u8 HDLCConfigReg;	/* 1BD     Reserved */
101 	u8 CauseCode;		/* 1BE     Cause code for fatal error */
102 	u8 xchar;		/* 1BF     High priority send */
103 	u32 reserved3;		/* 1C0-1C3 Reserved */
104 	u8 PrevCmdReg;		/* 1C4     Reserved */
105 	u8 CmdReg;		/* 1C5     Command Register */
106 	u8 async_config2;	/* 1C6     Async Config Byte 2 */
107 	u8 async_config3;	/* 1C7     Async Config Byte 3 */
108 	u8 dce_resvd[20];	/* 1C8-1DB DCE Rsvd           */
109 	u8 dce_resvd21;		/* 1DC     DCE Rsvd (21st byte */
110 	u8 misc_flags;		/* 1DD     misc flags         */
111 #define V2_HARDWARE     0x40
112 #define ICOM_HDW_ACTIVE 0x01
113 	u8 call_length;		/* 1DE     Phone #/CFI buff ln */
114 	u8 call_length2;	/* 1DF     Upper byte (unused) */
115 	u32 call_addr;		/* 1E0-1E3 Phn #/CFI buff addr */
116 	u16 timer_value;	/* 1E4-1E5 general timer value */
117 	u8 timer_command;	/* 1E6     general timer cmd  */
118 	u8 dce_command;		/* 1E7     dce command reg    */
119 	u8 dce_cmd_status;	/* 1E8     dce command stat   */
120 	u8 x21_r1_ioff;		/* 1E9     dce ready counter  */
121 	u8 x21_r0_ioff;		/* 1EA     dce not ready ctr  */
122 	u8 x21_ralt_ioff;	/* 1EB     dce CNR counter    */
123 	u8 x21_r1_ion;		/* 1EC     dce ready I on ctr */
124 	u8 rsvd_ier;		/* 1ED     Rsvd for IER (if ne */
125 	u8 ier;			/* 1EE     Interrupt Enable   */
126 	u8 isr;			/* 1EF     Input Signal Reg   */
127 	u8 osr;			/* 1F0     Output Signal Reg  */
128 	u8 reset;		/* 1F1     Reset/Reload Reg   */
129 	u8 disable;		/* 1F2     Disable Reg        */
130 	u8 sync;		/* 1F3     Sync Reg           */
131 	u8 error_stat;		/* 1F4     Error Status       */
132 	u8 cable_id;		/* 1F5     Cable ID           */
133 	u8 cs_length;		/* 1F6     CS Load Length     */
134 	u8 mac_length;		/* 1F7     Mac Load Length    */
135 	u32 cs_load_addr;	/* 1F8-1FB Call Load PCI Addr */
136 	u32 mac_load_addr;	/* 1FC-1FF Mac Load PCI Addr  */
137 };
138 
139 /*
140  * adapter defines and structures
141  */
142 #define ICOM_CONTROL_START_A         0x00000008
143 #define ICOM_CONTROL_STOP_A          0x00000004
144 #define ICOM_CONTROL_START_B         0x00000002
145 #define ICOM_CONTROL_STOP_B          0x00000001
146 #define ICOM_CONTROL_START_C         0x00000008
147 #define ICOM_CONTROL_STOP_C          0x00000004
148 #define ICOM_CONTROL_START_D         0x00000002
149 #define ICOM_CONTROL_STOP_D          0x00000001
150 #define ICOM_IRAM_OFFSET             0x1000
151 #define ICOM_IRAM_SIZE               0x0C00
152 #define ICOM_DCE_IRAM_OFFSET         0x0A00
153 #define ICOM_CABLE_ID_VALID          0x01
154 #define ICOM_CABLE_ID_MASK           0xF0
155 #define ICOM_DISABLE                 0x80
156 #define CMD_XMIT_RCV_ENABLE          0xC0
157 #define CMD_XMIT_ENABLE              0x40
158 #define CMD_RCV_DISABLE              0x00
159 #define CMD_RCV_ENABLE               0x80
160 #define CMD_RESTART                  0x01
161 #define CMD_HOLD_XMIT                0x02
162 #define CMD_SND_BREAK                0x04
163 #define RS232_CABLE                  0x06
164 #define V24_CABLE                    0x0E
165 #define V35_CABLE                    0x0C
166 #define V36_CABLE                    0x02
167 #define NO_CABLE                     0x00
168 #define START_DOWNLOAD               0x80
169 #define ICOM_INT_MASK_PRC_A          0x00003FFF
170 #define ICOM_INT_MASK_PRC_B          0x3FFF0000
171 #define ICOM_INT_MASK_PRC_C          0x00003FFF
172 #define ICOM_INT_MASK_PRC_D          0x3FFF0000
173 #define INT_RCV_COMPLETED            0x1000
174 #define INT_XMIT_COMPLETED           0x2000
175 #define INT_IDLE_DETECT              0x0800
176 #define INT_RCV_DISABLED             0x0400
177 #define INT_XMIT_DISABLED            0x0200
178 #define INT_RCV_XMIT_SHUTDOWN        0x0100
179 #define INT_FATAL_ERROR              0x0080
180 #define INT_CABLE_PULL               0x0020
181 #define INT_SIGNAL_CHANGE            0x0010
182 #define HDLC_PPP_PURE_ASYNC          0x02
183 #define HDLC_FF_FILL                 0x00
184 #define HDLC_HDW_FLOW                0x01
185 #define START_XMIT                   0x80
186 #define ICOM_ACFG_DRIVE1             0x20
187 #define ICOM_ACFG_NO_PARITY          0x00
188 #define ICOM_ACFG_PARITY_ENAB        0x02
189 #define ICOM_ACFG_PARITY_ODD         0x01
190 #define ICOM_ACFG_8BPC               0x00
191 #define ICOM_ACFG_7BPC               0x04
192 #define ICOM_ACFG_6BPC               0x08
193 #define ICOM_ACFG_5BPC               0x0C
194 #define ICOM_ACFG_1STOP_BIT          0x00
195 #define ICOM_ACFG_2STOP_BIT          0x10
196 #define ICOM_DTR                     0x80
197 #define ICOM_RTS                     0x40
198 #define ICOM_RI                      0x08
199 #define ICOM_DSR                     0x80
200 #define ICOM_DCD                     0x20
201 #define ICOM_CTS                     0x40
202 
203 #define NUM_XBUFFS 1
204 #define NUM_RBUFFS 2
205 #define RCV_BUFF_SZ 0x0200
206 #define XMIT_BUFF_SZ 0x1000
207 struct statusArea {
208     /**********************************************/
209 	/* Transmit Status Area                       */
210     /**********************************************/
211 	struct xmit_status_area{
212 		__le32 leNext;	/* Next entry in Little Endian on Adapter */
213 		__le32 leNextASD;
214 		__le32 leBuffer;	/* Buffer for entry in LE for Adapter */
215 		__le16 leLengthASD;
216 		__le16 leOffsetASD;
217 		__le16 leLength;	/* Length of data in segment */
218 		__le16 flags;
219 #define SA_FLAGS_DONE           0x0080	/* Done with Segment */
220 #define SA_FLAGS_CONTINUED      0x8000	/* More Segments */
221 #define SA_FLAGS_IDLE           0x4000	/* Mark IDLE after frm */
222 #define SA_FLAGS_READY_TO_XMIT  0x0800
223 #define SA_FLAGS_STAT_MASK      0x007F
224 	} xmit[NUM_XBUFFS];
225 
226     /**********************************************/
227 	/* Receive Status Area                        */
228     /**********************************************/
229 	struct {
230 		__le32 leNext;	/* Next entry in Little Endian on Adapter */
231 		__le32 leNextASD;
232 		__le32 leBuffer;	/* Buffer for entry in LE for Adapter */
233 		__le16 WorkingLength;	/* size of segment */
234 		__le16 reserv01;
235 		__le16 leLength;	/* Length of data in segment */
236 		__le16 flags;
237 #define SA_FL_RCV_DONE           0x0010	/* Data ready */
238 #define SA_FLAGS_OVERRUN         0x0040
239 #define SA_FLAGS_PARITY_ERROR    0x0080
240 #define SA_FLAGS_FRAME_ERROR     0x0001
241 #define SA_FLAGS_FRAME_TRUNC     0x0002
242 #define SA_FLAGS_BREAK_DET       0x0004	/* set conditionally by device driver, not hardware */
243 #define SA_FLAGS_RCV_MASK        0xFFE6
244 	} rcv[NUM_RBUFFS];
245 };
246 
247 struct icom_adapter;
248 
249 
250 #define ICOM_MAJOR       243
251 #define ICOM_MINOR_START 0
252 
253 struct icom_port {
254 	struct uart_port uart_port;
255 	unsigned char cable_id;
256 	unsigned char read_status_mask;
257 	unsigned char ignore_status_mask;
258 	void __iomem * int_reg;
259 	struct icom_regs __iomem *global_reg;
260 	struct func_dram __iomem *dram;
261 	int port;
262 	struct statusArea *statStg;
263 	dma_addr_t statStg_pci;
264 	__le32 *xmitRestart;
265 	dma_addr_t xmitRestart_pci;
266 	unsigned char *xmit_buf;
267 	dma_addr_t xmit_buf_pci;
268 	unsigned char *recv_buf;
269 	dma_addr_t recv_buf_pci;
270 	int next_rcv;
271 	int status;
272 #define ICOM_PORT_ACTIVE	1	/* Port exists. */
273 #define ICOM_PORT_OFF		0	/* Port does not exist. */
274 	struct icom_adapter *adapter;
275 };
276 
277 struct icom_adapter {
278 	void __iomem * base_addr;
279 	unsigned long base_addr_pci;
280 	struct pci_dev *pci_dev;
281 	struct icom_port port_info[4];
282 	int index;
283 	int version;
284 #define ADAPTER_V1	0x0001
285 #define ADAPTER_V2	0x0002
286 	u32 subsystem_id;
287 #define FOUR_PORT_MODEL				0x0252
288 #define V2_TWO_PORTS_RVX			0x021A
289 #define V2_ONE_PORT_RVX_ONE_PORT_IMBED_MDM	0x0251
290 	int numb_ports;
291 	struct list_head icom_adapter_entry;
292 	struct kref kref;
293 };
294 
295 /* prototype */
296 extern void iCom_sercons_init(void);
297 
298 struct lookup_proc_table {
299 	u32	__iomem *global_control_reg;
300 	unsigned long	processor_id;
301 };
302 
303 struct lookup_int_table {
304 	u32	__iomem *global_int_mask;
305 	unsigned long	processor_id;
306 };
307 
308 static inline struct icom_port *to_icom_port(struct uart_port *port)
309 {
310 	return container_of(port, struct icom_port, uart_port);
311 }
312 
313 static const struct pci_device_id icom_pci_table[] = {
314 	{
315 		.vendor = PCI_VENDOR_ID_IBM,
316 		.device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1,
317 		.subvendor = PCI_ANY_ID,
318 		.subdevice = PCI_ANY_ID,
319 		.driver_data = ADAPTER_V1,
320 	},
321 	{
322 		.vendor = PCI_VENDOR_ID_IBM,
323 		.device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2,
324 		.subvendor = PCI_VENDOR_ID_IBM,
325 		.subdevice = PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX,
326 		.driver_data = ADAPTER_V2,
327 	},
328 	{
329 		.vendor = PCI_VENDOR_ID_IBM,
330 		.device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2,
331 		.subvendor = PCI_VENDOR_ID_IBM,
332 		.subdevice = PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM,
333 		.driver_data = ADAPTER_V2,
334 	},
335 	{
336 		.vendor = PCI_VENDOR_ID_IBM,
337 		.device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2,
338 		.subvendor = PCI_VENDOR_ID_IBM,
339 		.subdevice = PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL,
340 		.driver_data = ADAPTER_V2,
341 	},
342 	{
343 		.vendor = PCI_VENDOR_ID_IBM,
344 		.device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2,
345 		.subvendor = PCI_VENDOR_ID_IBM,
346 		.subdevice = PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM_PCIE,
347 		.driver_data = ADAPTER_V2,
348 	},
349 	{}
350 };
351 
352 static struct lookup_proc_table start_proc[4] = {
353 	{NULL, ICOM_CONTROL_START_A},
354 	{NULL, ICOM_CONTROL_START_B},
355 	{NULL, ICOM_CONTROL_START_C},
356 	{NULL, ICOM_CONTROL_START_D}
357 };
358 
359 
360 static struct lookup_proc_table stop_proc[4] = {
361 	{NULL, ICOM_CONTROL_STOP_A},
362 	{NULL, ICOM_CONTROL_STOP_B},
363 	{NULL, ICOM_CONTROL_STOP_C},
364 	{NULL, ICOM_CONTROL_STOP_D}
365 };
366 
367 static struct lookup_int_table int_mask_tbl[4] = {
368 	{NULL, ICOM_INT_MASK_PRC_A},
369 	{NULL, ICOM_INT_MASK_PRC_B},
370 	{NULL, ICOM_INT_MASK_PRC_C},
371 	{NULL, ICOM_INT_MASK_PRC_D},
372 };
373 
374 
375 MODULE_DEVICE_TABLE(pci, icom_pci_table);
376 
377 static LIST_HEAD(icom_adapter_head);
378 
379 /* spinlock for adapter initialization and changing adapter operations */
380 static DEFINE_SPINLOCK(icom_lock);
381 
382 #ifdef ICOM_TRACE
383 static inline void trace(struct icom_port *icom_port, char *trace_pt,
384 			unsigned long trace_data)
385 {
386 	dev_info(&icom_port->adapter->pci_dev->dev, ":%d:%s - %lx\n",
387 	icom_port->port, trace_pt, trace_data);
388 }
389 #else
390 static inline void trace(struct icom_port *icom_port, char *trace_pt, unsigned long trace_data) {};
391 #endif
392 static void icom_kref_release(struct kref *kref);
393 
394 static void free_port_memory(struct icom_port *icom_port)
395 {
396 	struct pci_dev *dev = icom_port->adapter->pci_dev;
397 
398 	trace(icom_port, "RET_PORT_MEM", 0);
399 	if (icom_port->recv_buf) {
400 		dma_free_coherent(&dev->dev, 4096, icom_port->recv_buf,
401 				  icom_port->recv_buf_pci);
402 		icom_port->recv_buf = NULL;
403 	}
404 	if (icom_port->xmit_buf) {
405 		dma_free_coherent(&dev->dev, 4096, icom_port->xmit_buf,
406 				  icom_port->xmit_buf_pci);
407 		icom_port->xmit_buf = NULL;
408 	}
409 	if (icom_port->statStg) {
410 		dma_free_coherent(&dev->dev, 4096, icom_port->statStg,
411 				  icom_port->statStg_pci);
412 		icom_port->statStg = NULL;
413 	}
414 
415 	if (icom_port->xmitRestart) {
416 		dma_free_coherent(&dev->dev, 4096, icom_port->xmitRestart,
417 				  icom_port->xmitRestart_pci);
418 		icom_port->xmitRestart = NULL;
419 	}
420 }
421 
422 static int get_port_memory(struct icom_port *icom_port)
423 {
424 	int index;
425 	unsigned long stgAddr;
426 	unsigned long startStgAddr;
427 	unsigned long offset;
428 	struct pci_dev *dev = icom_port->adapter->pci_dev;
429 
430 	icom_port->xmit_buf =
431 	    dma_alloc_coherent(&dev->dev, 4096, &icom_port->xmit_buf_pci,
432 			       GFP_KERNEL);
433 	if (!icom_port->xmit_buf) {
434 		dev_err(&dev->dev, "Can not allocate Transmit buffer\n");
435 		return -ENOMEM;
436 	}
437 
438 	trace(icom_port, "GET_PORT_MEM",
439 	      (unsigned long) icom_port->xmit_buf);
440 
441 	icom_port->recv_buf =
442 	    dma_alloc_coherent(&dev->dev, 4096, &icom_port->recv_buf_pci,
443 			       GFP_KERNEL);
444 	if (!icom_port->recv_buf) {
445 		dev_err(&dev->dev, "Can not allocate Receive buffer\n");
446 		free_port_memory(icom_port);
447 		return -ENOMEM;
448 	}
449 	trace(icom_port, "GET_PORT_MEM",
450 	      (unsigned long) icom_port->recv_buf);
451 
452 	icom_port->statStg =
453 	    dma_alloc_coherent(&dev->dev, 4096, &icom_port->statStg_pci,
454 			       GFP_KERNEL);
455 	if (!icom_port->statStg) {
456 		dev_err(&dev->dev, "Can not allocate Status buffer\n");
457 		free_port_memory(icom_port);
458 		return -ENOMEM;
459 	}
460 	trace(icom_port, "GET_PORT_MEM",
461 	      (unsigned long) icom_port->statStg);
462 
463 	icom_port->xmitRestart =
464 	    dma_alloc_coherent(&dev->dev, 4096, &icom_port->xmitRestart_pci,
465 			       GFP_KERNEL);
466 	if (!icom_port->xmitRestart) {
467 		dev_err(&dev->dev,
468 			"Can not allocate xmit Restart buffer\n");
469 		free_port_memory(icom_port);
470 		return -ENOMEM;
471 	}
472 
473 	/* FODs: Frame Out Descriptor Queue, this is a FIFO queue that
474            indicates that frames are to be transmitted
475 	*/
476 
477 	stgAddr = (unsigned long) icom_port->statStg;
478 	for (index = 0; index < NUM_XBUFFS; index++) {
479 		trace(icom_port, "FOD_ADDR", stgAddr);
480 		stgAddr = stgAddr + sizeof(icom_port->statStg->xmit[0]);
481 		if (index < (NUM_XBUFFS - 1)) {
482 			memset(&icom_port->statStg->xmit[index], 0, sizeof(struct xmit_status_area));
483 			icom_port->statStg->xmit[index].leLengthASD =
484 			    cpu_to_le16(XMIT_BUFF_SZ);
485 			trace(icom_port, "FOD_ADDR", stgAddr);
486 			trace(icom_port, "FOD_XBUFF",
487 			      (unsigned long) icom_port->xmit_buf);
488 			icom_port->statStg->xmit[index].leBuffer =
489 			    cpu_to_le32(icom_port->xmit_buf_pci);
490 		} else if (index == (NUM_XBUFFS - 1)) {
491 			memset(&icom_port->statStg->xmit[index], 0, sizeof(struct xmit_status_area));
492 			icom_port->statStg->xmit[index].leLengthASD =
493 			    cpu_to_le16(XMIT_BUFF_SZ);
494 			trace(icom_port, "FOD_XBUFF",
495 			      (unsigned long) icom_port->xmit_buf);
496 			icom_port->statStg->xmit[index].leBuffer =
497 			    cpu_to_le32(icom_port->xmit_buf_pci);
498 		} else {
499 			memset(&icom_port->statStg->xmit[index], 0, sizeof(struct xmit_status_area));
500 		}
501 	}
502 	/* FIDs */
503 	startStgAddr = stgAddr;
504 
505 	/* fill in every entry, even if no buffer */
506 	for (index = 0; index <  NUM_RBUFFS; index++) {
507 		trace(icom_port, "FID_ADDR", stgAddr);
508 		stgAddr = stgAddr + sizeof(icom_port->statStg->rcv[0]);
509 		icom_port->statStg->rcv[index].leLength = 0;
510 		icom_port->statStg->rcv[index].WorkingLength =
511 		    cpu_to_le16(RCV_BUFF_SZ);
512 		if (index < (NUM_RBUFFS - 1) ) {
513 			offset = stgAddr - (unsigned long) icom_port->statStg;
514 			icom_port->statStg->rcv[index].leNext =
515 			      cpu_to_le32(icom_port-> statStg_pci + offset);
516 			trace(icom_port, "FID_RBUFF",
517 			      (unsigned long) icom_port->recv_buf);
518 			icom_port->statStg->rcv[index].leBuffer =
519 			    cpu_to_le32(icom_port->recv_buf_pci);
520 		} else if (index == (NUM_RBUFFS -1) ) {
521 			offset = startStgAddr - (unsigned long) icom_port->statStg;
522 			icom_port->statStg->rcv[index].leNext =
523 			    cpu_to_le32(icom_port-> statStg_pci + offset);
524 			trace(icom_port, "FID_RBUFF",
525 			      (unsigned long) icom_port->recv_buf + 2048);
526 			icom_port->statStg->rcv[index].leBuffer =
527 			    cpu_to_le32(icom_port->recv_buf_pci + 2048);
528 		} else {
529 			icom_port->statStg->rcv[index].leNext = 0;
530 			icom_port->statStg->rcv[index].leBuffer = 0;
531 		}
532 	}
533 
534 	return 0;
535 }
536 
537 static void stop_processor(struct icom_port *icom_port)
538 {
539 	unsigned long temp;
540 	unsigned long flags;
541 	int port;
542 
543 	spin_lock_irqsave(&icom_lock, flags);
544 
545 	port = icom_port->port;
546 	if (port >= ARRAY_SIZE(stop_proc)) {
547 		dev_err(&icom_port->adapter->pci_dev->dev,
548 			"Invalid port assignment\n");
549 		goto unlock;
550 	}
551 
552 	if (port == 0 || port == 1)
553 		stop_proc[port].global_control_reg = &icom_port->global_reg->control;
554 	else
555 		stop_proc[port].global_control_reg = &icom_port->global_reg->control_2;
556 
557 	temp = readl(stop_proc[port].global_control_reg);
558 	temp = (temp & ~start_proc[port].processor_id) | stop_proc[port].processor_id;
559 	writel(temp, stop_proc[port].global_control_reg);
560 
561 	/* write flush */
562 	readl(stop_proc[port].global_control_reg);
563 
564 unlock:
565 	spin_unlock_irqrestore(&icom_lock, flags);
566 }
567 
568 static void start_processor(struct icom_port *icom_port)
569 {
570 	unsigned long temp;
571 	unsigned long flags;
572 	int port;
573 
574 	spin_lock_irqsave(&icom_lock, flags);
575 
576 	port = icom_port->port;
577 	if (port >= ARRAY_SIZE(start_proc)) {
578 		dev_err(&icom_port->adapter->pci_dev->dev,
579 			"Invalid port assignment\n");
580 		goto unlock;
581 	}
582 
583 	if (port == 0 || port == 1)
584 		start_proc[port].global_control_reg = &icom_port->global_reg->control;
585 	else
586 		start_proc[port].global_control_reg = &icom_port->global_reg->control_2;
587 
588 	temp = readl(start_proc[port].global_control_reg);
589 	temp = (temp & ~stop_proc[port].processor_id) | start_proc[port].processor_id;
590 	writel(temp, start_proc[port].global_control_reg);
591 
592 	/* write flush */
593 	readl(start_proc[port].global_control_reg);
594 
595 unlock:
596 	spin_unlock_irqrestore(&icom_lock, flags);
597 }
598 
599 static void load_code(struct icom_port *icom_port)
600 {
601 	const struct firmware *fw;
602 	char __iomem *iram_ptr;
603 	int index;
604 	int status = 0;
605 	void __iomem *dram_ptr = icom_port->dram;
606 	dma_addr_t temp_pci;
607 	unsigned char *new_page = NULL;
608 	unsigned char cable_id = NO_CABLE;
609 	struct pci_dev *dev = icom_port->adapter->pci_dev;
610 
611 	/* Clear out any pending interrupts */
612 	writew(0x3FFF, icom_port->int_reg);
613 
614 	trace(icom_port, "CLEAR_INTERRUPTS", 0);
615 
616 	/* Stop processor */
617 	stop_processor(icom_port);
618 
619 	/* Zero out DRAM */
620 	memset_io(dram_ptr, 0, 512);
621 
622 	/* Load Call Setup into Adapter */
623 	if (request_firmware(&fw, "icom_call_setup.bin", &dev->dev) < 0) {
624 		dev_err(&dev->dev,"Unable to load icom_call_setup.bin firmware image\n");
625 		status = -1;
626 		goto load_code_exit;
627 	}
628 
629 	if (fw->size > ICOM_DCE_IRAM_OFFSET) {
630 		dev_err(&dev->dev, "Invalid firmware image for icom_call_setup.bin found.\n");
631 		release_firmware(fw);
632 		status = -1;
633 		goto load_code_exit;
634 	}
635 
636 	iram_ptr = (char __iomem *)icom_port->dram + ICOM_IRAM_OFFSET;
637 	for (index = 0; index < fw->size; index++)
638 		writeb(fw->data[index], &iram_ptr[index]);
639 
640 	release_firmware(fw);
641 
642 	/* Load Resident DCE portion of Adapter */
643 	if (request_firmware(&fw, "icom_res_dce.bin", &dev->dev) < 0) {
644 		dev_err(&dev->dev,"Unable to load icom_res_dce.bin firmware image\n");
645 		status = -1;
646 		goto load_code_exit;
647 	}
648 
649 	if (fw->size > ICOM_IRAM_SIZE) {
650 		dev_err(&dev->dev, "Invalid firmware image for icom_res_dce.bin found.\n");
651 		release_firmware(fw);
652 		status = -1;
653 		goto load_code_exit;
654 	}
655 
656 	iram_ptr = (char __iomem *) icom_port->dram + ICOM_IRAM_OFFSET;
657 	for (index = ICOM_DCE_IRAM_OFFSET; index < fw->size; index++)
658 		writeb(fw->data[index], &iram_ptr[index]);
659 
660 	release_firmware(fw);
661 
662 	/* Set Hardware level */
663 	if (icom_port->adapter->version == ADAPTER_V2)
664 		writeb(V2_HARDWARE, &(icom_port->dram->misc_flags));
665 
666 	/* Start the processor in Adapter */
667 	start_processor(icom_port);
668 
669 	writeb((HDLC_PPP_PURE_ASYNC | HDLC_FF_FILL),
670 	       &(icom_port->dram->HDLCConfigReg));
671 	writeb(0x04, &(icom_port->dram->FlagFillIdleTimer));	/* 0.5 seconds */
672 	writeb(0x00, &(icom_port->dram->CmdReg));
673 	writeb(0x10, &(icom_port->dram->async_config3));
674 	writeb((ICOM_ACFG_DRIVE1 | ICOM_ACFG_NO_PARITY | ICOM_ACFG_8BPC |
675 		ICOM_ACFG_1STOP_BIT), &(icom_port->dram->async_config2));
676 
677 	/*Set up data in icom DRAM to indicate where personality
678 	 *code is located and its length.
679 	 */
680 	new_page = dma_alloc_coherent(&dev->dev, 4096, &temp_pci, GFP_KERNEL);
681 
682 	if (!new_page) {
683 		dev_err(&dev->dev, "Can not allocate DMA buffer\n");
684 		status = -1;
685 		goto load_code_exit;
686 	}
687 
688 	if (request_firmware(&fw, "icom_asc.bin", &dev->dev) < 0) {
689 		dev_err(&dev->dev,"Unable to load icom_asc.bin firmware image\n");
690 		status = -1;
691 		goto load_code_exit;
692 	}
693 
694 	if (fw->size > ICOM_DCE_IRAM_OFFSET) {
695 		dev_err(&dev->dev, "Invalid firmware image for icom_asc.bin found.\n");
696 		release_firmware(fw);
697 		status = -1;
698 		goto load_code_exit;
699 	}
700 
701 	for (index = 0; index < fw->size; index++)
702 		new_page[index] = fw->data[index];
703 
704 	writeb((char) ((fw->size + 16)/16), &icom_port->dram->mac_length);
705 	writel(temp_pci, &icom_port->dram->mac_load_addr);
706 
707 	release_firmware(fw);
708 
709 	/*Setting the syncReg to 0x80 causes adapter to start downloading
710 	   the personality code into adapter instruction RAM.
711 	   Once code is loaded, it will begin executing and, based on
712 	   information provided above, will start DMAing data from
713 	   shared memory to adapter DRAM.
714 	 */
715 	/* the wait loop below verifies this write operation has been done
716 	   and processed
717 	*/
718 	writeb(START_DOWNLOAD, &icom_port->dram->sync);
719 
720 	/* Wait max 1 Sec for data download and processor to start */
721 	for (index = 0; index < 10; index++) {
722 		msleep(100);
723 		if (readb(&icom_port->dram->misc_flags) & ICOM_HDW_ACTIVE)
724 			break;
725 	}
726 
727 	if (index == 10)
728 		status = -1;
729 
730 	/*
731 	 * check Cable ID
732 	 */
733 	cable_id = readb(&icom_port->dram->cable_id);
734 
735 	if (cable_id & ICOM_CABLE_ID_VALID) {
736 		/* Get cable ID into the lower 4 bits (standard form) */
737 		cable_id = (cable_id & ICOM_CABLE_ID_MASK) >> 4;
738 		icom_port->cable_id = cable_id;
739 	} else {
740 		dev_err(&dev->dev,"Invalid or no cable attached\n");
741 		icom_port->cable_id = NO_CABLE;
742 	}
743 
744       load_code_exit:
745 
746 	if (status != 0) {
747 		/* Clear out any pending interrupts */
748 		writew(0x3FFF, icom_port->int_reg);
749 
750 		/* Turn off port */
751 		writeb(ICOM_DISABLE, &(icom_port->dram->disable));
752 
753 		/* Stop processor */
754 		stop_processor(icom_port);
755 
756 		dev_err(&icom_port->adapter->pci_dev->dev,"Port not operational\n");
757 	}
758 
759 	if (new_page != NULL)
760 		dma_free_coherent(&dev->dev, 4096, new_page, temp_pci);
761 }
762 
763 static int startup(struct icom_port *icom_port)
764 {
765 	unsigned long temp;
766 	unsigned char cable_id, raw_cable_id;
767 	unsigned long flags;
768 	int port;
769 
770 	trace(icom_port, "STARTUP", 0);
771 
772 	if (!icom_port->dram) {
773 		/* should NEVER be NULL */
774 		dev_err(&icom_port->adapter->pci_dev->dev,
775 			"Unusable Port, port configuration missing\n");
776 		return -ENODEV;
777 	}
778 
779 	/*
780 	 * check Cable ID
781 	 */
782 	raw_cable_id = readb(&icom_port->dram->cable_id);
783 	trace(icom_port, "CABLE_ID", raw_cable_id);
784 
785 	/* Get cable ID into the lower 4 bits (standard form) */
786 	cable_id = (raw_cable_id & ICOM_CABLE_ID_MASK) >> 4;
787 
788 	/* Check for valid Cable ID */
789 	if (!(raw_cable_id & ICOM_CABLE_ID_VALID) ||
790 	    (cable_id != icom_port->cable_id)) {
791 
792 		/* reload adapter code, pick up any potential changes in cable id */
793 		load_code(icom_port);
794 
795 		/* still no sign of cable, error out */
796 		raw_cable_id = readb(&icom_port->dram->cable_id);
797 		cable_id = (raw_cable_id & ICOM_CABLE_ID_MASK) >> 4;
798 		if (!(raw_cable_id & ICOM_CABLE_ID_VALID) ||
799 		    (icom_port->cable_id == NO_CABLE))
800 			return -EIO;
801 	}
802 
803 	/*
804 	 * Finally, clear and  enable interrupts
805 	 */
806 	spin_lock_irqsave(&icom_lock, flags);
807 	port = icom_port->port;
808 	if (port >= ARRAY_SIZE(int_mask_tbl)) {
809 		dev_err(&icom_port->adapter->pci_dev->dev,
810 			"Invalid port assignment\n");
811 		goto unlock;
812 	}
813 
814 	if (port == 0 || port == 1)
815 		int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask;
816 	else
817 		int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask_2;
818 
819 	if (port == 0 || port == 2)
820 		writew(0x00FF, icom_port->int_reg);
821 	else
822 		writew(0x3F00, icom_port->int_reg);
823 
824 	temp = readl(int_mask_tbl[port].global_int_mask);
825 	writel(temp & ~int_mask_tbl[port].processor_id, int_mask_tbl[port].global_int_mask);
826 
827 	/* write flush */
828 	readl(int_mask_tbl[port].global_int_mask);
829 
830 unlock:
831 	spin_unlock_irqrestore(&icom_lock, flags);
832 	return 0;
833 }
834 
835 static void shutdown(struct icom_port *icom_port)
836 {
837 	unsigned long temp;
838 	unsigned char cmdReg;
839 	unsigned long flags;
840 	int port;
841 
842 	spin_lock_irqsave(&icom_lock, flags);
843 	trace(icom_port, "SHUTDOWN", 0);
844 
845 	/*
846 	 * disable all interrupts
847 	 */
848 	port = icom_port->port;
849 	if (port >= ARRAY_SIZE(int_mask_tbl)) {
850 		dev_err(&icom_port->adapter->pci_dev->dev,
851 			"Invalid port assignment\n");
852 		goto unlock;
853 	}
854 	if (port == 0 || port == 1)
855 		int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask;
856 	else
857 		int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask_2;
858 
859 	temp = readl(int_mask_tbl[port].global_int_mask);
860 	writel(temp | int_mask_tbl[port].processor_id, int_mask_tbl[port].global_int_mask);
861 
862 	/* write flush */
863 	readl(int_mask_tbl[port].global_int_mask);
864 
865 unlock:
866 	spin_unlock_irqrestore(&icom_lock, flags);
867 
868 	/*
869 	 * disable break condition
870 	 */
871 	cmdReg = readb(&icom_port->dram->CmdReg);
872 	if (cmdReg & CMD_SND_BREAK) {
873 		writeb(cmdReg & ~CMD_SND_BREAK, &icom_port->dram->CmdReg);
874 	}
875 }
876 
877 static int icom_write(struct uart_port *port)
878 {
879 	struct icom_port *icom_port = to_icom_port(port);
880 	struct tty_port *tport = &port->state->port;
881 	unsigned long data_count;
882 	unsigned char cmdReg;
883 	unsigned long offset;
884 
885 	trace(icom_port, "WRITE", 0);
886 
887 	if (le16_to_cpu(icom_port->statStg->xmit[0].flags) &
888 	    SA_FLAGS_READY_TO_XMIT) {
889 		trace(icom_port, "WRITE_FULL", 0);
890 		return 0;
891 	}
892 
893 	data_count = kfifo_out_peek(&tport->xmit_fifo, icom_port->xmit_buf,
894 			XMIT_BUFF_SZ);
895 
896 	if (data_count) {
897 		icom_port->statStg->xmit[0].flags =
898 		    cpu_to_le16(SA_FLAGS_READY_TO_XMIT);
899 		icom_port->statStg->xmit[0].leLength =
900 		    cpu_to_le16(data_count);
901 		offset =
902 		    (unsigned long) &icom_port->statStg->xmit[0] -
903 		    (unsigned long) icom_port->statStg;
904 		*icom_port->xmitRestart =
905 		    cpu_to_le32(icom_port->statStg_pci + offset);
906 		cmdReg = readb(&icom_port->dram->CmdReg);
907 		writeb(cmdReg | CMD_XMIT_RCV_ENABLE,
908 		       &icom_port->dram->CmdReg);
909 		writeb(START_XMIT, &icom_port->dram->StartXmitCmd);
910 		trace(icom_port, "WRITE_START", data_count);
911 		/* write flush */
912 		readb(&icom_port->dram->StartXmitCmd);
913 	}
914 
915 	return data_count;
916 }
917 
918 static inline void check_modem_status(struct icom_port *icom_port)
919 {
920 	static char old_status = 0;
921 	char delta_status;
922 	unsigned char status;
923 
924 	uart_port_lock(&icom_port->uart_port);
925 
926 	/*modem input register */
927 	status = readb(&icom_port->dram->isr);
928 	trace(icom_port, "CHECK_MODEM", status);
929 	delta_status = status ^ old_status;
930 	if (delta_status) {
931 		if (delta_status & ICOM_RI)
932 			icom_port->uart_port.icount.rng++;
933 		if (delta_status & ICOM_DSR)
934 			icom_port->uart_port.icount.dsr++;
935 		if (delta_status & ICOM_DCD)
936 			uart_handle_dcd_change(&icom_port->uart_port,
937 					       delta_status & ICOM_DCD);
938 		if (delta_status & ICOM_CTS)
939 			uart_handle_cts_change(&icom_port->uart_port,
940 					       delta_status & ICOM_CTS);
941 
942 		wake_up_interruptible(&icom_port->uart_port.state->
943 				      port.delta_msr_wait);
944 		old_status = status;
945 	}
946 	uart_port_unlock(&icom_port->uart_port);
947 }
948 
949 static void xmit_interrupt(u16 port_int_reg, struct icom_port *icom_port)
950 {
951 	struct tty_port *tport = &icom_port->uart_port.state->port;
952 	u16 count;
953 
954 	if (port_int_reg & (INT_XMIT_COMPLETED)) {
955 		trace(icom_port, "XMIT_COMPLETE", 0);
956 
957 		/* clear buffer in use bit */
958 		icom_port->statStg->xmit[0].flags &=
959 			cpu_to_le16(~SA_FLAGS_READY_TO_XMIT);
960 
961 		count = le16_to_cpu(icom_port->statStg->xmit[0].leLength);
962 		icom_port->uart_port.icount.tx += count;
963 
964 		kfifo_skip_count(&tport->xmit_fifo, count);
965 
966 		if (!icom_write(&icom_port->uart_port))
967 			/* activate write queue */
968 			uart_write_wakeup(&icom_port->uart_port);
969 	} else
970 		trace(icom_port, "XMIT_DISABLED", 0);
971 }
972 
973 static void recv_interrupt(u16 port_int_reg, struct icom_port *icom_port)
974 {
975 	short int count, rcv_buff;
976 	struct tty_port *port = &icom_port->uart_port.state->port;
977 	u16 status;
978 	struct uart_icount *icount;
979 	unsigned long offset;
980 	unsigned char flag;
981 
982 	trace(icom_port, "RCV_COMPLETE", 0);
983 	rcv_buff = icom_port->next_rcv;
984 
985 	status = le16_to_cpu(icom_port->statStg->rcv[rcv_buff].flags);
986 	while (status & SA_FL_RCV_DONE) {
987 		int first = -1;
988 
989 		trace(icom_port, "FID_STATUS", status);
990 		count = le16_to_cpu(icom_port->statStg->rcv[rcv_buff].leLength);
991 
992 		trace(icom_port, "RCV_COUNT", count);
993 
994 		trace(icom_port, "REAL_COUNT", count);
995 
996 		offset = le32_to_cpu(icom_port->statStg->rcv[rcv_buff].leBuffer) -
997 			icom_port->recv_buf_pci;
998 
999 		/* Block copy all but the last byte as this may have status */
1000 		if (count > 0) {
1001 			first = icom_port->recv_buf[offset];
1002 			tty_insert_flip_string(port, icom_port->recv_buf + offset, count - 1);
1003 		}
1004 
1005 		icount = &icom_port->uart_port.icount;
1006 		icount->rx += count;
1007 
1008 		/* Break detect logic */
1009 		if ((status & SA_FLAGS_FRAME_ERROR)
1010 		    && first == 0) {
1011 			status &= ~SA_FLAGS_FRAME_ERROR;
1012 			status |= SA_FLAGS_BREAK_DET;
1013 			trace(icom_port, "BREAK_DET", 0);
1014 		}
1015 
1016 		flag = TTY_NORMAL;
1017 
1018 		if (status &
1019 		    (SA_FLAGS_BREAK_DET | SA_FLAGS_PARITY_ERROR |
1020 		     SA_FLAGS_FRAME_ERROR | SA_FLAGS_OVERRUN)) {
1021 
1022 			if (status & SA_FLAGS_BREAK_DET)
1023 				icount->brk++;
1024 			if (status & SA_FLAGS_PARITY_ERROR)
1025 				icount->parity++;
1026 			if (status & SA_FLAGS_FRAME_ERROR)
1027 				icount->frame++;
1028 			if (status & SA_FLAGS_OVERRUN)
1029 				icount->overrun++;
1030 
1031 			/*
1032 			 * Now check to see if character should be
1033 			 * ignored, and mask off conditions which
1034 			 * should be ignored.
1035 			 */
1036 			if (status & icom_port->ignore_status_mask) {
1037 				trace(icom_port, "IGNORE_CHAR", 0);
1038 				goto ignore_char;
1039 			}
1040 
1041 			status &= icom_port->read_status_mask;
1042 
1043 			if (status & SA_FLAGS_BREAK_DET) {
1044 				flag = TTY_BREAK;
1045 			} else if (status & SA_FLAGS_PARITY_ERROR) {
1046 				trace(icom_port, "PARITY_ERROR", 0);
1047 				flag = TTY_PARITY;
1048 			} else if (status & SA_FLAGS_FRAME_ERROR)
1049 				flag = TTY_FRAME;
1050 
1051 		}
1052 
1053 		tty_insert_flip_char(port, *(icom_port->recv_buf + offset + count - 1), flag);
1054 
1055 		if (status & SA_FLAGS_OVERRUN)
1056 			/*
1057 			 * Overrun is special, since it's
1058 			 * reported immediately, and doesn't
1059 			 * affect the current character
1060 			 */
1061 			tty_insert_flip_char(port, 0, TTY_OVERRUN);
1062 ignore_char:
1063 		icom_port->statStg->rcv[rcv_buff].flags = 0;
1064 		icom_port->statStg->rcv[rcv_buff].leLength = 0;
1065 		icom_port->statStg->rcv[rcv_buff].WorkingLength =
1066 			cpu_to_le16(RCV_BUFF_SZ);
1067 
1068 		rcv_buff++;
1069 		if (rcv_buff == NUM_RBUFFS)
1070 			rcv_buff = 0;
1071 
1072 		status = le16_to_cpu(icom_port->statStg->rcv[rcv_buff].flags);
1073 	}
1074 	icom_port->next_rcv = rcv_buff;
1075 
1076 	tty_flip_buffer_push(port);
1077 }
1078 
1079 static void process_interrupt(u16 port_int_reg,
1080 			      struct icom_port *icom_port)
1081 {
1082 
1083 	uart_port_lock(&icom_port->uart_port);
1084 	trace(icom_port, "INTERRUPT", port_int_reg);
1085 
1086 	if (port_int_reg & (INT_XMIT_COMPLETED | INT_XMIT_DISABLED))
1087 		xmit_interrupt(port_int_reg, icom_port);
1088 
1089 	if (port_int_reg & INT_RCV_COMPLETED)
1090 		recv_interrupt(port_int_reg, icom_port);
1091 
1092 	uart_port_unlock(&icom_port->uart_port);
1093 }
1094 
1095 static irqreturn_t icom_interrupt(int irq, void *dev_id)
1096 {
1097 	void __iomem * int_reg;
1098 	u32 adapter_interrupts;
1099 	u16 port_int_reg;
1100 	struct icom_adapter *icom_adapter;
1101 	struct icom_port *icom_port;
1102 
1103 	/* find icom_port for this interrupt */
1104 	icom_adapter = (struct icom_adapter *) dev_id;
1105 
1106 	if (icom_adapter->version == ADAPTER_V2) {
1107 		int_reg = icom_adapter->base_addr + 0x8024;
1108 
1109 		adapter_interrupts = readl(int_reg);
1110 
1111 		if (adapter_interrupts & 0x00003FFF) {
1112 			/* port 2 interrupt,  NOTE:  for all ADAPTER_V2, port 2 will be active */
1113 			icom_port = &icom_adapter->port_info[2];
1114 			port_int_reg = (u16) adapter_interrupts;
1115 			process_interrupt(port_int_reg, icom_port);
1116 			check_modem_status(icom_port);
1117 		}
1118 		if (adapter_interrupts & 0x3FFF0000) {
1119 			/* port 3 interrupt */
1120 			icom_port = &icom_adapter->port_info[3];
1121 			if (icom_port->status == ICOM_PORT_ACTIVE) {
1122 				port_int_reg =
1123 				    (u16) (adapter_interrupts >> 16);
1124 				process_interrupt(port_int_reg, icom_port);
1125 				check_modem_status(icom_port);
1126 			}
1127 		}
1128 
1129 		/* Clear out any pending interrupts */
1130 		writel(adapter_interrupts, int_reg);
1131 
1132 		int_reg = icom_adapter->base_addr + 0x8004;
1133 	} else {
1134 		int_reg = icom_adapter->base_addr + 0x4004;
1135 	}
1136 
1137 	adapter_interrupts = readl(int_reg);
1138 
1139 	if (adapter_interrupts & 0x00003FFF) {
1140 		/* port 0 interrupt, NOTE:  for all adapters, port 0 will be active */
1141 		icom_port = &icom_adapter->port_info[0];
1142 		port_int_reg = (u16) adapter_interrupts;
1143 		process_interrupt(port_int_reg, icom_port);
1144 		check_modem_status(icom_port);
1145 	}
1146 	if (adapter_interrupts & 0x3FFF0000) {
1147 		/* port 1 interrupt */
1148 		icom_port = &icom_adapter->port_info[1];
1149 		if (icom_port->status == ICOM_PORT_ACTIVE) {
1150 			port_int_reg = (u16) (adapter_interrupts >> 16);
1151 			process_interrupt(port_int_reg, icom_port);
1152 			check_modem_status(icom_port);
1153 		}
1154 	}
1155 
1156 	/* Clear out any pending interrupts */
1157 	writel(adapter_interrupts, int_reg);
1158 
1159 	/* flush the write */
1160 	adapter_interrupts = readl(int_reg);
1161 
1162 	return IRQ_HANDLED;
1163 }
1164 
1165 /*
1166  * ------------------------------------------------------------------
1167  * Begin serial-core API
1168  * ------------------------------------------------------------------
1169  */
1170 static unsigned int icom_tx_empty(struct uart_port *port)
1171 {
1172 	struct icom_port *icom_port = to_icom_port(port);
1173 	int ret;
1174 	unsigned long flags;
1175 
1176 	uart_port_lock_irqsave(port, &flags);
1177 	if (le16_to_cpu(icom_port->statStg->xmit[0].flags) &
1178 	    SA_FLAGS_READY_TO_XMIT)
1179 		ret = TIOCSER_TEMT;
1180 	else
1181 		ret = 0;
1182 
1183 	uart_port_unlock_irqrestore(port, flags);
1184 	return ret;
1185 }
1186 
1187 static void icom_set_mctrl(struct uart_port *port, unsigned int mctrl)
1188 {
1189 	struct icom_port *icom_port = to_icom_port(port);
1190 	unsigned char local_osr;
1191 
1192 	trace(icom_port, "SET_MODEM", 0);
1193 	local_osr = readb(&icom_port->dram->osr);
1194 
1195 	if (mctrl & TIOCM_RTS) {
1196 		trace(icom_port, "RAISE_RTS", 0);
1197 		local_osr |= ICOM_RTS;
1198 	} else {
1199 		trace(icom_port, "LOWER_RTS", 0);
1200 		local_osr &= ~ICOM_RTS;
1201 	}
1202 
1203 	if (mctrl & TIOCM_DTR) {
1204 		trace(icom_port, "RAISE_DTR", 0);
1205 		local_osr |= ICOM_DTR;
1206 	} else {
1207 		trace(icom_port, "LOWER_DTR", 0);
1208 		local_osr &= ~ICOM_DTR;
1209 	}
1210 
1211 	writeb(local_osr, &icom_port->dram->osr);
1212 }
1213 
1214 static unsigned int icom_get_mctrl(struct uart_port *port)
1215 {
1216 	struct icom_port *icom_port = to_icom_port(port);
1217 	unsigned char status;
1218 	unsigned int result;
1219 
1220 	trace(icom_port, "GET_MODEM", 0);
1221 
1222 	status = readb(&icom_port->dram->isr);
1223 
1224 	result = ((status & ICOM_DCD) ? TIOCM_CAR : 0)
1225 	    | ((status & ICOM_RI) ? TIOCM_RNG : 0)
1226 	    | ((status & ICOM_DSR) ? TIOCM_DSR : 0)
1227 	    | ((status & ICOM_CTS) ? TIOCM_CTS : 0);
1228 	return result;
1229 }
1230 
1231 static void icom_stop_tx(struct uart_port *port)
1232 {
1233 	struct icom_port *icom_port = to_icom_port(port);
1234 	unsigned char cmdReg;
1235 
1236 	trace(icom_port, "STOP", 0);
1237 	cmdReg = readb(&icom_port->dram->CmdReg);
1238 	writeb(cmdReg | CMD_HOLD_XMIT, &icom_port->dram->CmdReg);
1239 }
1240 
1241 static void icom_start_tx(struct uart_port *port)
1242 {
1243 	struct icom_port *icom_port = to_icom_port(port);
1244 	unsigned char cmdReg;
1245 
1246 	trace(icom_port, "START", 0);
1247 	cmdReg = readb(&icom_port->dram->CmdReg);
1248 	if ((cmdReg & CMD_HOLD_XMIT) == CMD_HOLD_XMIT)
1249 		writeb(cmdReg & ~CMD_HOLD_XMIT,
1250 		       &icom_port->dram->CmdReg);
1251 
1252 	icom_write(port);
1253 }
1254 
1255 static void icom_send_xchar(struct uart_port *port, char ch)
1256 {
1257 	struct icom_port *icom_port = to_icom_port(port);
1258 	unsigned char xdata;
1259 	int index;
1260 	unsigned long flags;
1261 
1262 	trace(icom_port, "SEND_XCHAR", ch);
1263 
1264 	/* wait .1 sec to send char */
1265 	for (index = 0; index < 10; index++) {
1266 		uart_port_lock_irqsave(port, &flags);
1267 		xdata = readb(&icom_port->dram->xchar);
1268 		if (xdata == 0x00) {
1269 			trace(icom_port, "QUICK_WRITE", 0);
1270 			writeb(ch, &icom_port->dram->xchar);
1271 
1272 			/* flush write operation */
1273 			xdata = readb(&icom_port->dram->xchar);
1274 			uart_port_unlock_irqrestore(port, flags);
1275 			break;
1276 		}
1277 		uart_port_unlock_irqrestore(port, flags);
1278 		msleep(10);
1279 	}
1280 }
1281 
1282 static void icom_stop_rx(struct uart_port *port)
1283 {
1284 	struct icom_port *icom_port = to_icom_port(port);
1285 	unsigned char cmdReg;
1286 
1287 	cmdReg = readb(&icom_port->dram->CmdReg);
1288 	writeb(cmdReg & ~CMD_RCV_ENABLE, &icom_port->dram->CmdReg);
1289 }
1290 
1291 static void icom_break(struct uart_port *port, int break_state)
1292 {
1293 	struct icom_port *icom_port = to_icom_port(port);
1294 	unsigned char cmdReg;
1295 	unsigned long flags;
1296 
1297 	uart_port_lock_irqsave(port, &flags);
1298 	trace(icom_port, "BREAK", 0);
1299 	cmdReg = readb(&icom_port->dram->CmdReg);
1300 	if (break_state == -1) {
1301 		writeb(cmdReg | CMD_SND_BREAK, &icom_port->dram->CmdReg);
1302 	} else {
1303 		writeb(cmdReg & ~CMD_SND_BREAK, &icom_port->dram->CmdReg);
1304 	}
1305 	uart_port_unlock_irqrestore(port, flags);
1306 }
1307 
1308 static int icom_open(struct uart_port *port)
1309 {
1310 	struct icom_port *icom_port = to_icom_port(port);
1311 	int retval;
1312 
1313 	kref_get(&icom_port->adapter->kref);
1314 	retval = startup(icom_port);
1315 
1316 	if (retval) {
1317 		kref_put(&icom_port->adapter->kref, icom_kref_release);
1318 		trace(icom_port, "STARTUP_ERROR", 0);
1319 		return retval;
1320 	}
1321 
1322 	return 0;
1323 }
1324 
1325 static void icom_close(struct uart_port *port)
1326 {
1327 	struct icom_port *icom_port = to_icom_port(port);
1328 	unsigned char cmdReg;
1329 
1330 	trace(icom_port, "CLOSE", 0);
1331 
1332 	/* stop receiver */
1333 	cmdReg = readb(&icom_port->dram->CmdReg);
1334 	writeb(cmdReg & ~CMD_RCV_ENABLE, &icom_port->dram->CmdReg);
1335 
1336 	shutdown(icom_port);
1337 
1338 	kref_put(&icom_port->adapter->kref, icom_kref_release);
1339 }
1340 
1341 static void icom_set_termios(struct uart_port *port, struct ktermios *termios,
1342 			     const struct ktermios *old_termios)
1343 {
1344 	struct icom_port *icom_port = to_icom_port(port);
1345 	int baud;
1346 	unsigned cflag, iflag;
1347 	char new_config2;
1348 	char new_config3 = 0;
1349 	char tmp_byte;
1350 	int index;
1351 	int rcv_buff, xmit_buff;
1352 	unsigned long offset;
1353 	unsigned long flags;
1354 
1355 	uart_port_lock_irqsave(port, &flags);
1356 	trace(icom_port, "CHANGE_SPEED", 0);
1357 
1358 	cflag = termios->c_cflag;
1359 	iflag = termios->c_iflag;
1360 
1361 	new_config2 = ICOM_ACFG_DRIVE1;
1362 
1363 	/* byte size and parity */
1364 	switch (cflag & CSIZE) {
1365 	case CS5:		/* 5 bits/char */
1366 		new_config2 |= ICOM_ACFG_5BPC;
1367 		break;
1368 	case CS6:		/* 6 bits/char */
1369 		new_config2 |= ICOM_ACFG_6BPC;
1370 		break;
1371 	case CS7:		/* 7 bits/char */
1372 		new_config2 |= ICOM_ACFG_7BPC;
1373 		break;
1374 	case CS8:		/* 8 bits/char */
1375 		new_config2 |= ICOM_ACFG_8BPC;
1376 		break;
1377 	default:
1378 		break;
1379 	}
1380 	if (cflag & CSTOPB) {
1381 		/* 2 stop bits */
1382 		new_config2 |= ICOM_ACFG_2STOP_BIT;
1383 	}
1384 	if (cflag & PARENB) {
1385 		/* parity bit enabled */
1386 		new_config2 |= ICOM_ACFG_PARITY_ENAB;
1387 		trace(icom_port, "PARENB", 0);
1388 	}
1389 	if (cflag & PARODD) {
1390 		/* odd parity */
1391 		new_config2 |= ICOM_ACFG_PARITY_ODD;
1392 		trace(icom_port, "PARODD", 0);
1393 	}
1394 
1395 	/* Determine divisor based on baud rate */
1396 	baud = uart_get_baud_rate(port, termios, old_termios,
1397 				  icom_acfg_baud[0],
1398 				  icom_acfg_baud[BAUD_TABLE_LIMIT]);
1399 	if (!baud)
1400 		baud = 9600;	/* B0 transition handled in rs_set_termios */
1401 
1402 	for (index = 0; index < BAUD_TABLE_LIMIT; index++) {
1403 		if (icom_acfg_baud[index] == baud) {
1404 			new_config3 = index;
1405 			break;
1406 		}
1407 	}
1408 
1409 	uart_update_timeout(port, cflag, baud);
1410 
1411 	/* CTS flow control flag and modem status interrupts */
1412 	tmp_byte = readb(&(icom_port->dram->HDLCConfigReg));
1413 	if (cflag & CRTSCTS)
1414 		tmp_byte |= HDLC_HDW_FLOW;
1415 	else
1416 		tmp_byte &= ~HDLC_HDW_FLOW;
1417 	writeb(tmp_byte, &(icom_port->dram->HDLCConfigReg));
1418 
1419 	/*
1420 	 * Set up parity check flag
1421 	 */
1422 	icom_port->read_status_mask = SA_FLAGS_OVERRUN | SA_FL_RCV_DONE;
1423 	if (iflag & INPCK)
1424 		icom_port->read_status_mask |=
1425 		    SA_FLAGS_FRAME_ERROR | SA_FLAGS_PARITY_ERROR;
1426 
1427 	if ((iflag & BRKINT) || (iflag & PARMRK))
1428 		icom_port->read_status_mask |= SA_FLAGS_BREAK_DET;
1429 
1430 	/*
1431 	 * Characters to ignore
1432 	 */
1433 	icom_port->ignore_status_mask = 0;
1434 	if (iflag & IGNPAR)
1435 		icom_port->ignore_status_mask |=
1436 		    SA_FLAGS_PARITY_ERROR | SA_FLAGS_FRAME_ERROR;
1437 	if (iflag & IGNBRK) {
1438 		icom_port->ignore_status_mask |= SA_FLAGS_BREAK_DET;
1439 		/*
1440 		 * If we're ignore parity and break indicators, ignore
1441 		 * overruns too.  (For real raw support).
1442 		 */
1443 		if (iflag & IGNPAR)
1444 			icom_port->ignore_status_mask |= SA_FLAGS_OVERRUN;
1445 	}
1446 
1447 	/*
1448 	 * !!! ignore all characters if CREAD is not set
1449 	 */
1450 	if ((cflag & CREAD) == 0)
1451 		icom_port->ignore_status_mask |= SA_FL_RCV_DONE;
1452 
1453 	/* Turn off Receiver to prepare for reset */
1454 	writeb(CMD_RCV_DISABLE, &icom_port->dram->CmdReg);
1455 
1456 	for (index = 0; index < 10; index++) {
1457 		if (readb(&icom_port->dram->PrevCmdReg) == 0x00) {
1458 			break;
1459 		}
1460 	}
1461 
1462 	/* clear all current buffers of data */
1463 	for (rcv_buff = 0; rcv_buff < NUM_RBUFFS; rcv_buff++) {
1464 		icom_port->statStg->rcv[rcv_buff].flags = 0;
1465 		icom_port->statStg->rcv[rcv_buff].leLength = 0;
1466 		icom_port->statStg->rcv[rcv_buff].WorkingLength =
1467 		    cpu_to_le16(RCV_BUFF_SZ);
1468 	}
1469 
1470 	for (xmit_buff = 0; xmit_buff < NUM_XBUFFS; xmit_buff++) {
1471 		icom_port->statStg->xmit[xmit_buff].flags = 0;
1472 	}
1473 
1474 	/* activate changes and start xmit and receiver here */
1475 	/* Enable the receiver */
1476 	writeb(new_config3, &(icom_port->dram->async_config3));
1477 	writeb(new_config2, &(icom_port->dram->async_config2));
1478 	tmp_byte = readb(&(icom_port->dram->HDLCConfigReg));
1479 	tmp_byte |= HDLC_PPP_PURE_ASYNC | HDLC_FF_FILL;
1480 	writeb(tmp_byte, &(icom_port->dram->HDLCConfigReg));
1481 	writeb(0x04, &(icom_port->dram->FlagFillIdleTimer));	/* 0.5 seconds */
1482 	writeb(0xFF, &(icom_port->dram->ier));	/* enable modem signal interrupts */
1483 
1484 	/* reset processor */
1485 	writeb(CMD_RESTART, &icom_port->dram->CmdReg);
1486 
1487 	for (index = 0; index < 10; index++) {
1488 		if (readb(&icom_port->dram->CmdReg) == 0x00) {
1489 			break;
1490 		}
1491 	}
1492 
1493 	/* Enable Transmitter and Receiver */
1494 	offset =
1495 	    (unsigned long) &icom_port->statStg->rcv[0] -
1496 	    (unsigned long) icom_port->statStg;
1497 	writel(icom_port->statStg_pci + offset,
1498 	       &icom_port->dram->RcvStatusAddr);
1499 	icom_port->next_rcv = 0;
1500 	*icom_port->xmitRestart = 0;
1501 	writel(icom_port->xmitRestart_pci,
1502 	       &icom_port->dram->XmitStatusAddr);
1503 	trace(icom_port, "XR_ENAB", 0);
1504 	writeb(CMD_XMIT_RCV_ENABLE, &icom_port->dram->CmdReg);
1505 
1506 	uart_port_unlock_irqrestore(port, flags);
1507 }
1508 
1509 static const char *icom_type(struct uart_port *port)
1510 {
1511 	return "icom";
1512 }
1513 
1514 static void icom_config_port(struct uart_port *port, int flags)
1515 {
1516 	port->type = PORT_ICOM;
1517 }
1518 
1519 static const struct uart_ops icom_ops = {
1520 	.tx_empty = icom_tx_empty,
1521 	.set_mctrl = icom_set_mctrl,
1522 	.get_mctrl = icom_get_mctrl,
1523 	.stop_tx = icom_stop_tx,
1524 	.start_tx = icom_start_tx,
1525 	.send_xchar = icom_send_xchar,
1526 	.stop_rx = icom_stop_rx,
1527 	.break_ctl = icom_break,
1528 	.startup = icom_open,
1529 	.shutdown = icom_close,
1530 	.set_termios = icom_set_termios,
1531 	.type = icom_type,
1532 	.config_port = icom_config_port,
1533 };
1534 
1535 #define ICOM_CONSOLE NULL
1536 
1537 static struct uart_driver icom_uart_driver = {
1538 	.owner = THIS_MODULE,
1539 	.driver_name = ICOM_DRIVER_NAME,
1540 	.dev_name = "ttyA",
1541 	.major = ICOM_MAJOR,
1542 	.minor = ICOM_MINOR_START,
1543 	.nr = NR_PORTS,
1544 	.cons = ICOM_CONSOLE,
1545 };
1546 
1547 static int icom_init_ports(struct icom_adapter *icom_adapter)
1548 {
1549 	u32 subsystem_id = icom_adapter->subsystem_id;
1550 	int i;
1551 	struct icom_port *icom_port;
1552 
1553 	if (icom_adapter->version == ADAPTER_V1) {
1554 		icom_adapter->numb_ports = 2;
1555 
1556 		for (i = 0; i < 2; i++) {
1557 			icom_port = &icom_adapter->port_info[i];
1558 			icom_port->port = i;
1559 			icom_port->status = ICOM_PORT_ACTIVE;
1560 		}
1561 	} else {
1562 		if (subsystem_id == PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL) {
1563 			icom_adapter->numb_ports = 4;
1564 
1565 			for (i = 0; i < 4; i++) {
1566 				icom_port = &icom_adapter->port_info[i];
1567 
1568 				icom_port->port = i;
1569 				icom_port->status = ICOM_PORT_ACTIVE;
1570 			}
1571 		} else {
1572 			icom_adapter->numb_ports = 4;
1573 
1574 			icom_adapter->port_info[0].port = 0;
1575 			icom_adapter->port_info[0].status = ICOM_PORT_ACTIVE;
1576 			icom_adapter->port_info[1].status = ICOM_PORT_OFF;
1577 			icom_adapter->port_info[2].port = 2;
1578 			icom_adapter->port_info[2].status = ICOM_PORT_ACTIVE;
1579 			icom_adapter->port_info[3].status = ICOM_PORT_OFF;
1580 		}
1581 	}
1582 
1583 	return 0;
1584 }
1585 
1586 static void icom_port_active(struct icom_port *icom_port, struct icom_adapter *icom_adapter, int port_num)
1587 {
1588 	if (icom_adapter->version == ADAPTER_V1) {
1589 		icom_port->global_reg = icom_adapter->base_addr + 0x4000;
1590 		icom_port->int_reg = icom_adapter->base_addr +
1591 		    0x4004 + 2 - 2 * port_num;
1592 	} else {
1593 		icom_port->global_reg = icom_adapter->base_addr + 0x8000;
1594 		if (icom_port->port < 2)
1595 			icom_port->int_reg = icom_adapter->base_addr +
1596 			    0x8004 + 2 - 2 * icom_port->port;
1597 		else
1598 			icom_port->int_reg = icom_adapter->base_addr +
1599 			    0x8024 + 2 - 2 * (icom_port->port - 2);
1600 	}
1601 }
1602 static int icom_load_ports(struct icom_adapter *icom_adapter)
1603 {
1604 	struct icom_port *icom_port;
1605 	int port_num;
1606 
1607 	for (port_num = 0; port_num < icom_adapter->numb_ports; port_num++) {
1608 
1609 		icom_port = &icom_adapter->port_info[port_num];
1610 
1611 		if (icom_port->status == ICOM_PORT_ACTIVE) {
1612 			icom_port_active(icom_port, icom_adapter, port_num);
1613 			icom_port->dram = icom_adapter->base_addr +
1614 					0x2000 * icom_port->port;
1615 
1616 			icom_port->adapter = icom_adapter;
1617 
1618 			/* get port memory */
1619 			if (get_port_memory(icom_port) != 0) {
1620 				dev_err(&icom_port->adapter->pci_dev->dev,
1621 					"Memory allocation for port FAILED\n");
1622 			}
1623 		}
1624 	}
1625 	return 0;
1626 }
1627 
1628 static int icom_alloc_adapter(struct icom_adapter
1629 					**icom_adapter_ref)
1630 {
1631 	int adapter_count = 0;
1632 	struct icom_adapter *icom_adapter;
1633 	struct icom_adapter *cur_adapter_entry;
1634 
1635 	icom_adapter = kzalloc(sizeof(struct icom_adapter), GFP_KERNEL);
1636 
1637 	if (!icom_adapter) {
1638 		return -ENOMEM;
1639 	}
1640 
1641 	list_for_each_entry(cur_adapter_entry, &icom_adapter_head,
1642 			icom_adapter_entry) {
1643 		if (cur_adapter_entry->index != adapter_count) {
1644 			break;
1645 		}
1646 		adapter_count++;
1647 	}
1648 
1649 	icom_adapter->index = adapter_count;
1650 	list_add_tail(&icom_adapter->icom_adapter_entry,
1651 			&cur_adapter_entry->icom_adapter_entry);
1652 
1653 	*icom_adapter_ref = icom_adapter;
1654 	return 0;
1655 }
1656 
1657 static void icom_free_adapter(struct icom_adapter *icom_adapter)
1658 {
1659 	list_del(&icom_adapter->icom_adapter_entry);
1660 	kfree(icom_adapter);
1661 }
1662 
1663 static void icom_kref_release(struct kref *kref)
1664 {
1665 	struct icom_adapter *icom_adapter = container_of(kref,
1666 			struct icom_adapter, kref);
1667 	struct icom_port *icom_port;
1668 	int index;
1669 
1670 	for (index = 0; index < icom_adapter->numb_ports; index++) {
1671 		icom_port = &icom_adapter->port_info[index];
1672 
1673 		if (icom_port->status == ICOM_PORT_ACTIVE) {
1674 			dev_info(&icom_adapter->pci_dev->dev,
1675 				 "Device removed\n");
1676 
1677 			uart_remove_one_port(&icom_uart_driver,
1678 					     &icom_port->uart_port);
1679 
1680 			/* be sure that DTR and RTS are dropped */
1681 			writeb(0x00, &icom_port->dram->osr);
1682 
1683 			/* Wait 0.1 Sec for simple Init to complete */
1684 			msleep(100);
1685 
1686 			/* Stop proccessor */
1687 			stop_processor(icom_port);
1688 
1689 			free_port_memory(icom_port);
1690 		}
1691 	}
1692 
1693 	free_irq(icom_adapter->pci_dev->irq, (void *) icom_adapter);
1694 	iounmap(icom_adapter->base_addr);
1695 	pci_release_regions(icom_adapter->pci_dev);
1696 	icom_free_adapter(icom_adapter);
1697 }
1698 
1699 static int icom_probe(struct pci_dev *dev,
1700 				const struct pci_device_id *ent)
1701 {
1702 	int index;
1703 	unsigned int command_reg;
1704 	int retval;
1705 	struct icom_adapter *icom_adapter;
1706 	struct icom_port *icom_port;
1707 
1708 	retval = pci_enable_device(dev);
1709 	if (retval) {
1710 		dev_err(&dev->dev, "Device enable FAILED\n");
1711 		return retval;
1712 	}
1713 
1714 	retval = pci_request_regions(dev, "icom");
1715 	if (retval) {
1716 		 dev_err(&dev->dev, "pci_request_regions FAILED\n");
1717 		 pci_disable_device(dev);
1718 		 return retval;
1719 	 }
1720 
1721 	pci_set_master(dev);
1722 
1723 	retval = pci_read_config_dword(dev, PCI_COMMAND, &command_reg);
1724 	if (retval) {
1725 		dev_err(&dev->dev, "PCI Config read FAILED\n");
1726 		goto probe_exit0;
1727 	}
1728 
1729 	pci_write_config_dword(dev, PCI_COMMAND,
1730 		command_reg | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
1731  		| PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1732 
1733 	if (ent->driver_data == ADAPTER_V1) {
1734 		pci_write_config_dword(dev, 0x44, 0x8300830A);
1735 	} else {
1736 		pci_write_config_dword(dev, 0x44, 0x42004200);
1737 		pci_write_config_dword(dev, 0x48, 0x42004200);
1738 	}
1739 
1740 
1741 	retval = icom_alloc_adapter(&icom_adapter);
1742 	if (retval) {
1743 		 dev_err(&dev->dev, "icom_alloc_adapter FAILED\n");
1744 		 retval = -EIO;
1745 		 goto probe_exit0;
1746 	}
1747 
1748 	icom_adapter->base_addr_pci = pci_resource_start(dev, 0);
1749 	icom_adapter->pci_dev = dev;
1750 	icom_adapter->version = ent->driver_data;
1751 	icom_adapter->subsystem_id = ent->subdevice;
1752 
1753 
1754 	retval = icom_init_ports(icom_adapter);
1755 	if (retval) {
1756 		dev_err(&dev->dev, "Port configuration failed\n");
1757 		goto probe_exit1;
1758 	}
1759 
1760 	icom_adapter->base_addr = pci_ioremap_bar(dev, 0);
1761 
1762 	if (!icom_adapter->base_addr) {
1763 		retval = -ENOMEM;
1764 		goto probe_exit1;
1765 	}
1766 
1767 	 /* save off irq and request irq line */
1768 	 retval = request_irq(dev->irq, icom_interrupt, IRQF_SHARED, ICOM_DRIVER_NAME, (void *)icom_adapter);
1769 	 if (retval) {
1770 		  goto probe_exit2;
1771 	 }
1772 
1773 	retval = icom_load_ports(icom_adapter);
1774 
1775 	for (index = 0; index < icom_adapter->numb_ports; index++) {
1776 		icom_port = &icom_adapter->port_info[index];
1777 
1778 		if (icom_port->status == ICOM_PORT_ACTIVE) {
1779 			icom_port->uart_port.irq = icom_port->adapter->pci_dev->irq;
1780 			icom_port->uart_port.type = PORT_ICOM;
1781 			icom_port->uart_port.iotype = UPIO_MEM;
1782 			icom_port->uart_port.membase =
1783 				(unsigned char __iomem *)icom_adapter->base_addr_pci;
1784 			icom_port->uart_port.fifosize = 16;
1785 			icom_port->uart_port.ops = &icom_ops;
1786 			icom_port->uart_port.line =
1787 		        icom_port->port + icom_adapter->index * 4;
1788 			if (uart_add_one_port (&icom_uart_driver, &icom_port->uart_port)) {
1789 				icom_port->status = ICOM_PORT_OFF;
1790 				dev_err(&dev->dev, "Device add failed\n");
1791 			 } else
1792 				dev_info(&dev->dev, "Device added\n");
1793 		}
1794 	}
1795 
1796 	kref_init(&icom_adapter->kref);
1797 	return 0;
1798 
1799 probe_exit2:
1800 	iounmap(icom_adapter->base_addr);
1801 probe_exit1:
1802 	icom_free_adapter(icom_adapter);
1803 
1804 probe_exit0:
1805 	pci_release_regions(dev);
1806 	pci_disable_device(dev);
1807 
1808 	return retval;
1809 }
1810 
1811 static void icom_remove(struct pci_dev *dev)
1812 {
1813 	struct icom_adapter *icom_adapter;
1814 
1815 	list_for_each_entry(icom_adapter, &icom_adapter_head,
1816 			icom_adapter_entry) {
1817 		if (icom_adapter->pci_dev == dev) {
1818 			kref_put(&icom_adapter->kref, icom_kref_release);
1819 			return;
1820 		}
1821 	}
1822 
1823 	dev_err(&dev->dev, "Unable to find device to remove\n");
1824 }
1825 
1826 static struct pci_driver icom_pci_driver = {
1827 	.name = ICOM_DRIVER_NAME,
1828 	.id_table = icom_pci_table,
1829 	.probe = icom_probe,
1830 	.remove = icom_remove,
1831 };
1832 
1833 static int __init icom_init(void)
1834 {
1835 	int ret;
1836 
1837 	ret = uart_register_driver(&icom_uart_driver);
1838 	if (ret)
1839 		return ret;
1840 
1841 	ret = pci_register_driver(&icom_pci_driver);
1842 
1843 	if (ret < 0)
1844 		uart_unregister_driver(&icom_uart_driver);
1845 
1846 	return ret;
1847 }
1848 
1849 static void __exit icom_exit(void)
1850 {
1851 	pci_unregister_driver(&icom_pci_driver);
1852 	uart_unregister_driver(&icom_uart_driver);
1853 }
1854 
1855 module_init(icom_init);
1856 module_exit(icom_exit);
1857 
1858 MODULE_AUTHOR("Michael Anderson <mjanders@us.ibm.com>");
1859 MODULE_DESCRIPTION("IBM iSeries Serial IOA driver");
1860 MODULE_LICENSE("GPL");
1861 MODULE_FIRMWARE("icom_call_setup.bin");
1862 MODULE_FIRMWARE("icom_res_dce.bin");
1863 MODULE_FIRMWARE("icom_asc.bin");
1864