1 /* 2 * Driver for Atmel AT91 / AT32 Serial ports 3 * Copyright (C) 2003 Rick Bronson 4 * 5 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd. 6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 7 * 8 * DMA support added by Chip Coldwell. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 */ 25 #include <linux/module.h> 26 #include <linux/tty.h> 27 #include <linux/ioport.h> 28 #include <linux/slab.h> 29 #include <linux/init.h> 30 #include <linux/serial.h> 31 #include <linux/clk.h> 32 #include <linux/console.h> 33 #include <linux/sysrq.h> 34 #include <linux/tty_flip.h> 35 #include <linux/platform_device.h> 36 #include <linux/of.h> 37 #include <linux/of_device.h> 38 #include <linux/dma-mapping.h> 39 #include <linux/atmel_pdc.h> 40 #include <linux/atmel_serial.h> 41 #include <linux/uaccess.h> 42 43 #include <asm/io.h> 44 #include <asm/ioctls.h> 45 46 #include <asm/mach/serial_at91.h> 47 #include <mach/board.h> 48 49 #ifdef CONFIG_ARM 50 #include <mach/cpu.h> 51 #include <asm/gpio.h> 52 #endif 53 54 #define PDC_BUFFER_SIZE 512 55 /* Revisit: We should calculate this based on the actual port settings */ 56 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */ 57 58 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 59 #define SUPPORT_SYSRQ 60 #endif 61 62 #include <linux/serial_core.h> 63 64 static void atmel_start_rx(struct uart_port *port); 65 static void atmel_stop_rx(struct uart_port *port); 66 67 #ifdef CONFIG_SERIAL_ATMEL_TTYAT 68 69 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we 70 * should coexist with the 8250 driver, such as if we have an external 16C550 71 * UART. */ 72 #define SERIAL_ATMEL_MAJOR 204 73 #define MINOR_START 154 74 #define ATMEL_DEVICENAME "ttyAT" 75 76 #else 77 78 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port 79 * name, but it is legally reserved for the 8250 driver. */ 80 #define SERIAL_ATMEL_MAJOR TTY_MAJOR 81 #define MINOR_START 64 82 #define ATMEL_DEVICENAME "ttyS" 83 84 #endif 85 86 #define ATMEL_ISR_PASS_LIMIT 256 87 88 /* UART registers. CR is write-only, hence no GET macro */ 89 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR) 90 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR) 91 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR) 92 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER) 93 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR) 94 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR) 95 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR) 96 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR) 97 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR) 98 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR) 99 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR) 100 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR) 101 #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR) 102 103 /* PDC registers */ 104 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR) 105 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR) 106 107 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR) 108 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR) 109 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR) 110 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR) 111 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR) 112 113 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR) 114 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR) 115 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR) 116 117 static int (*atmel_open_hook)(struct uart_port *); 118 static void (*atmel_close_hook)(struct uart_port *); 119 120 struct atmel_dma_buffer { 121 unsigned char *buf; 122 dma_addr_t dma_addr; 123 unsigned int dma_size; 124 unsigned int ofs; 125 }; 126 127 struct atmel_uart_char { 128 u16 status; 129 u16 ch; 130 }; 131 132 #define ATMEL_SERIAL_RINGSIZE 1024 133 134 /* 135 * We wrap our port structure around the generic uart_port. 136 */ 137 struct atmel_uart_port { 138 struct uart_port uart; /* uart */ 139 struct clk *clk; /* uart clock */ 140 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */ 141 u32 backup_imr; /* IMR saved during suspend */ 142 int break_active; /* break being received */ 143 144 short use_dma_rx; /* enable PDC receiver */ 145 short pdc_rx_idx; /* current PDC RX buffer */ 146 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */ 147 148 short use_dma_tx; /* enable PDC transmitter */ 149 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */ 150 151 struct tasklet_struct tasklet; 152 unsigned int irq_status; 153 unsigned int irq_status_prev; 154 155 struct circ_buf rx_ring; 156 157 struct serial_rs485 rs485; /* rs485 settings */ 158 unsigned int tx_done_mask; 159 }; 160 161 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART]; 162 static unsigned long atmel_ports_in_use; 163 164 #ifdef SUPPORT_SYSRQ 165 static struct console atmel_console; 166 #endif 167 168 #if defined(CONFIG_OF) 169 static const struct of_device_id atmel_serial_dt_ids[] = { 170 { .compatible = "atmel,at91rm9200-usart" }, 171 { .compatible = "atmel,at91sam9260-usart" }, 172 { /* sentinel */ } 173 }; 174 175 MODULE_DEVICE_TABLE(of, atmel_serial_dt_ids); 176 #endif 177 178 static inline struct atmel_uart_port * 179 to_atmel_uart_port(struct uart_port *uart) 180 { 181 return container_of(uart, struct atmel_uart_port, uart); 182 } 183 184 #ifdef CONFIG_SERIAL_ATMEL_PDC 185 static bool atmel_use_dma_rx(struct uart_port *port) 186 { 187 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 188 189 return atmel_port->use_dma_rx; 190 } 191 192 static bool atmel_use_dma_tx(struct uart_port *port) 193 { 194 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 195 196 return atmel_port->use_dma_tx; 197 } 198 #else 199 static bool atmel_use_dma_rx(struct uart_port *port) 200 { 201 return false; 202 } 203 204 static bool atmel_use_dma_tx(struct uart_port *port) 205 { 206 return false; 207 } 208 #endif 209 210 /* Enable or disable the rs485 support */ 211 void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf) 212 { 213 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 214 unsigned int mode; 215 unsigned long flags; 216 217 spin_lock_irqsave(&port->lock, flags); 218 219 /* Disable interrupts */ 220 UART_PUT_IDR(port, atmel_port->tx_done_mask); 221 222 mode = UART_GET_MR(port); 223 224 /* Resetting serial mode to RS232 (0x0) */ 225 mode &= ~ATMEL_US_USMODE; 226 227 atmel_port->rs485 = *rs485conf; 228 229 if (rs485conf->flags & SER_RS485_ENABLED) { 230 dev_dbg(port->dev, "Setting UART to RS485\n"); 231 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY; 232 if ((rs485conf->delay_rts_after_send) > 0) 233 UART_PUT_TTGR(port, rs485conf->delay_rts_after_send); 234 mode |= ATMEL_US_USMODE_RS485; 235 } else { 236 dev_dbg(port->dev, "Setting UART to RS232\n"); 237 if (atmel_use_dma_tx(port)) 238 atmel_port->tx_done_mask = ATMEL_US_ENDTX | 239 ATMEL_US_TXBUFE; 240 else 241 atmel_port->tx_done_mask = ATMEL_US_TXRDY; 242 } 243 UART_PUT_MR(port, mode); 244 245 /* Enable interrupts */ 246 UART_PUT_IER(port, atmel_port->tx_done_mask); 247 248 spin_unlock_irqrestore(&port->lock, flags); 249 250 } 251 252 /* 253 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty. 254 */ 255 static u_int atmel_tx_empty(struct uart_port *port) 256 { 257 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0; 258 } 259 260 /* 261 * Set state of the modem control output lines 262 */ 263 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl) 264 { 265 unsigned int control = 0; 266 unsigned int mode; 267 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 268 269 #ifdef CONFIG_ARCH_AT91RM9200 270 if (cpu_is_at91rm9200()) { 271 /* 272 * AT91RM9200 Errata #39: RTS0 is not internally connected 273 * to PA21. We need to drive the pin manually. 274 */ 275 if (port->mapbase == AT91RM9200_BASE_US0) { 276 if (mctrl & TIOCM_RTS) 277 at91_set_gpio_value(AT91_PIN_PA21, 0); 278 else 279 at91_set_gpio_value(AT91_PIN_PA21, 1); 280 } 281 } 282 #endif 283 284 if (mctrl & TIOCM_RTS) 285 control |= ATMEL_US_RTSEN; 286 else 287 control |= ATMEL_US_RTSDIS; 288 289 if (mctrl & TIOCM_DTR) 290 control |= ATMEL_US_DTREN; 291 else 292 control |= ATMEL_US_DTRDIS; 293 294 UART_PUT_CR(port, control); 295 296 /* Local loopback mode? */ 297 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE; 298 if (mctrl & TIOCM_LOOP) 299 mode |= ATMEL_US_CHMODE_LOC_LOOP; 300 else 301 mode |= ATMEL_US_CHMODE_NORMAL; 302 303 /* Resetting serial mode to RS232 (0x0) */ 304 mode &= ~ATMEL_US_USMODE; 305 306 if (atmel_port->rs485.flags & SER_RS485_ENABLED) { 307 dev_dbg(port->dev, "Setting UART to RS485\n"); 308 if ((atmel_port->rs485.delay_rts_after_send) > 0) 309 UART_PUT_TTGR(port, 310 atmel_port->rs485.delay_rts_after_send); 311 mode |= ATMEL_US_USMODE_RS485; 312 } else { 313 dev_dbg(port->dev, "Setting UART to RS232\n"); 314 } 315 UART_PUT_MR(port, mode); 316 } 317 318 /* 319 * Get state of the modem control input lines 320 */ 321 static u_int atmel_get_mctrl(struct uart_port *port) 322 { 323 unsigned int status, ret = 0; 324 325 status = UART_GET_CSR(port); 326 327 /* 328 * The control signals are active low. 329 */ 330 if (!(status & ATMEL_US_DCD)) 331 ret |= TIOCM_CD; 332 if (!(status & ATMEL_US_CTS)) 333 ret |= TIOCM_CTS; 334 if (!(status & ATMEL_US_DSR)) 335 ret |= TIOCM_DSR; 336 if (!(status & ATMEL_US_RI)) 337 ret |= TIOCM_RI; 338 339 return ret; 340 } 341 342 /* 343 * Stop transmitting. 344 */ 345 static void atmel_stop_tx(struct uart_port *port) 346 { 347 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 348 349 if (atmel_use_dma_tx(port)) { 350 /* disable PDC transmit */ 351 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); 352 } 353 /* Disable interrupts */ 354 UART_PUT_IDR(port, atmel_port->tx_done_mask); 355 356 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) && 357 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) 358 atmel_start_rx(port); 359 } 360 361 /* 362 * Start transmitting. 363 */ 364 static void atmel_start_tx(struct uart_port *port) 365 { 366 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 367 368 if (atmel_use_dma_tx(port)) { 369 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN) 370 /* The transmitter is already running. Yes, we 371 really need this.*/ 372 return; 373 374 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) && 375 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) 376 atmel_stop_rx(port); 377 378 /* re-enable PDC transmit */ 379 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); 380 } 381 /* Enable interrupts */ 382 UART_PUT_IER(port, atmel_port->tx_done_mask); 383 } 384 385 /* 386 * start receiving - port is in process of being opened. 387 */ 388 static void atmel_start_rx(struct uart_port *port) 389 { 390 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */ 391 392 if (atmel_use_dma_rx(port)) { 393 /* enable PDC controller */ 394 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT | 395 port->read_status_mask); 396 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN); 397 } else { 398 UART_PUT_IER(port, ATMEL_US_RXRDY); 399 } 400 } 401 402 /* 403 * Stop receiving - port is in process of being closed. 404 */ 405 static void atmel_stop_rx(struct uart_port *port) 406 { 407 if (atmel_use_dma_rx(port)) { 408 /* disable PDC receive */ 409 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS); 410 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT | 411 port->read_status_mask); 412 } else { 413 UART_PUT_IDR(port, ATMEL_US_RXRDY); 414 } 415 } 416 417 /* 418 * Enable modem status interrupts 419 */ 420 static void atmel_enable_ms(struct uart_port *port) 421 { 422 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC 423 | ATMEL_US_DCDIC | ATMEL_US_CTSIC); 424 } 425 426 /* 427 * Control the transmission of a break signal 428 */ 429 static void atmel_break_ctl(struct uart_port *port, int break_state) 430 { 431 if (break_state != 0) 432 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */ 433 else 434 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */ 435 } 436 437 /* 438 * Stores the incoming character in the ring buffer 439 */ 440 static void 441 atmel_buffer_rx_char(struct uart_port *port, unsigned int status, 442 unsigned int ch) 443 { 444 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 445 struct circ_buf *ring = &atmel_port->rx_ring; 446 struct atmel_uart_char *c; 447 448 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE)) 449 /* Buffer overflow, ignore char */ 450 return; 451 452 c = &((struct atmel_uart_char *)ring->buf)[ring->head]; 453 c->status = status; 454 c->ch = ch; 455 456 /* Make sure the character is stored before we update head. */ 457 smp_wmb(); 458 459 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1); 460 } 461 462 /* 463 * Deal with parity, framing and overrun errors. 464 */ 465 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status) 466 { 467 /* clear error */ 468 UART_PUT_CR(port, ATMEL_US_RSTSTA); 469 470 if (status & ATMEL_US_RXBRK) { 471 /* ignore side-effect */ 472 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); 473 port->icount.brk++; 474 } 475 if (status & ATMEL_US_PARE) 476 port->icount.parity++; 477 if (status & ATMEL_US_FRAME) 478 port->icount.frame++; 479 if (status & ATMEL_US_OVRE) 480 port->icount.overrun++; 481 } 482 483 /* 484 * Characters received (called from interrupt handler) 485 */ 486 static void atmel_rx_chars(struct uart_port *port) 487 { 488 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 489 unsigned int status, ch; 490 491 status = UART_GET_CSR(port); 492 while (status & ATMEL_US_RXRDY) { 493 ch = UART_GET_CHAR(port); 494 495 /* 496 * note that the error handling code is 497 * out of the main execution path 498 */ 499 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME 500 | ATMEL_US_OVRE | ATMEL_US_RXBRK) 501 || atmel_port->break_active)) { 502 503 /* clear error */ 504 UART_PUT_CR(port, ATMEL_US_RSTSTA); 505 506 if (status & ATMEL_US_RXBRK 507 && !atmel_port->break_active) { 508 atmel_port->break_active = 1; 509 UART_PUT_IER(port, ATMEL_US_RXBRK); 510 } else { 511 /* 512 * This is either the end-of-break 513 * condition or we've received at 514 * least one character without RXBRK 515 * being set. In both cases, the next 516 * RXBRK will indicate start-of-break. 517 */ 518 UART_PUT_IDR(port, ATMEL_US_RXBRK); 519 status &= ~ATMEL_US_RXBRK; 520 atmel_port->break_active = 0; 521 } 522 } 523 524 atmel_buffer_rx_char(port, status, ch); 525 status = UART_GET_CSR(port); 526 } 527 528 tasklet_schedule(&atmel_port->tasklet); 529 } 530 531 /* 532 * Transmit characters (called from tasklet with TXRDY interrupt 533 * disabled) 534 */ 535 static void atmel_tx_chars(struct uart_port *port) 536 { 537 struct circ_buf *xmit = &port->state->xmit; 538 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 539 540 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) { 541 UART_PUT_CHAR(port, port->x_char); 542 port->icount.tx++; 543 port->x_char = 0; 544 } 545 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) 546 return; 547 548 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) { 549 UART_PUT_CHAR(port, xmit->buf[xmit->tail]); 550 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 551 port->icount.tx++; 552 if (uart_circ_empty(xmit)) 553 break; 554 } 555 556 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 557 uart_write_wakeup(port); 558 559 if (!uart_circ_empty(xmit)) 560 /* Enable interrupts */ 561 UART_PUT_IER(port, atmel_port->tx_done_mask); 562 } 563 564 /* 565 * receive interrupt handler. 566 */ 567 static void 568 atmel_handle_receive(struct uart_port *port, unsigned int pending) 569 { 570 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 571 572 if (atmel_use_dma_rx(port)) { 573 /* 574 * PDC receive. Just schedule the tasklet and let it 575 * figure out the details. 576 * 577 * TODO: We're not handling error flags correctly at 578 * the moment. 579 */ 580 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) { 581 UART_PUT_IDR(port, (ATMEL_US_ENDRX 582 | ATMEL_US_TIMEOUT)); 583 tasklet_schedule(&atmel_port->tasklet); 584 } 585 586 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE | 587 ATMEL_US_FRAME | ATMEL_US_PARE)) 588 atmel_pdc_rxerr(port, pending); 589 } 590 591 /* Interrupt receive */ 592 if (pending & ATMEL_US_RXRDY) 593 atmel_rx_chars(port); 594 else if (pending & ATMEL_US_RXBRK) { 595 /* 596 * End of break detected. If it came along with a 597 * character, atmel_rx_chars will handle it. 598 */ 599 UART_PUT_CR(port, ATMEL_US_RSTSTA); 600 UART_PUT_IDR(port, ATMEL_US_RXBRK); 601 atmel_port->break_active = 0; 602 } 603 } 604 605 /* 606 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe) 607 */ 608 static void 609 atmel_handle_transmit(struct uart_port *port, unsigned int pending) 610 { 611 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 612 613 if (pending & atmel_port->tx_done_mask) { 614 /* Either PDC or interrupt transmission */ 615 UART_PUT_IDR(port, atmel_port->tx_done_mask); 616 tasklet_schedule(&atmel_port->tasklet); 617 } 618 } 619 620 /* 621 * status flags interrupt handler. 622 */ 623 static void 624 atmel_handle_status(struct uart_port *port, unsigned int pending, 625 unsigned int status) 626 { 627 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 628 629 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC 630 | ATMEL_US_CTSIC)) { 631 atmel_port->irq_status = status; 632 tasklet_schedule(&atmel_port->tasklet); 633 } 634 } 635 636 /* 637 * Interrupt handler 638 */ 639 static irqreturn_t atmel_interrupt(int irq, void *dev_id) 640 { 641 struct uart_port *port = dev_id; 642 unsigned int status, pending, pass_counter = 0; 643 644 do { 645 status = UART_GET_CSR(port); 646 pending = status & UART_GET_IMR(port); 647 if (!pending) 648 break; 649 650 atmel_handle_receive(port, pending); 651 atmel_handle_status(port, pending, status); 652 atmel_handle_transmit(port, pending); 653 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT); 654 655 return pass_counter ? IRQ_HANDLED : IRQ_NONE; 656 } 657 658 /* 659 * Called from tasklet with ENDTX and TXBUFE interrupts disabled. 660 */ 661 static void atmel_tx_dma(struct uart_port *port) 662 { 663 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 664 struct circ_buf *xmit = &port->state->xmit; 665 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; 666 int count; 667 668 /* nothing left to transmit? */ 669 if (UART_GET_TCR(port)) 670 return; 671 672 xmit->tail += pdc->ofs; 673 xmit->tail &= UART_XMIT_SIZE - 1; 674 675 port->icount.tx += pdc->ofs; 676 pdc->ofs = 0; 677 678 /* more to transmit - setup next transfer */ 679 680 /* disable PDC transmit */ 681 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); 682 683 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) { 684 dma_sync_single_for_device(port->dev, 685 pdc->dma_addr, 686 pdc->dma_size, 687 DMA_TO_DEVICE); 688 689 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); 690 pdc->ofs = count; 691 692 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail); 693 UART_PUT_TCR(port, count); 694 /* re-enable PDC transmit */ 695 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); 696 /* Enable interrupts */ 697 UART_PUT_IER(port, atmel_port->tx_done_mask); 698 } else { 699 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) && 700 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) { 701 /* DMA done, stop TX, start RX for RS485 */ 702 atmel_start_rx(port); 703 } 704 } 705 706 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 707 uart_write_wakeup(port); 708 } 709 710 static void atmel_rx_from_ring(struct uart_port *port) 711 { 712 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 713 struct circ_buf *ring = &atmel_port->rx_ring; 714 unsigned int flg; 715 unsigned int status; 716 717 while (ring->head != ring->tail) { 718 struct atmel_uart_char c; 719 720 /* Make sure c is loaded after head. */ 721 smp_rmb(); 722 723 c = ((struct atmel_uart_char *)ring->buf)[ring->tail]; 724 725 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1); 726 727 port->icount.rx++; 728 status = c.status; 729 flg = TTY_NORMAL; 730 731 /* 732 * note that the error handling code is 733 * out of the main execution path 734 */ 735 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME 736 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) { 737 if (status & ATMEL_US_RXBRK) { 738 /* ignore side-effect */ 739 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); 740 741 port->icount.brk++; 742 if (uart_handle_break(port)) 743 continue; 744 } 745 if (status & ATMEL_US_PARE) 746 port->icount.parity++; 747 if (status & ATMEL_US_FRAME) 748 port->icount.frame++; 749 if (status & ATMEL_US_OVRE) 750 port->icount.overrun++; 751 752 status &= port->read_status_mask; 753 754 if (status & ATMEL_US_RXBRK) 755 flg = TTY_BREAK; 756 else if (status & ATMEL_US_PARE) 757 flg = TTY_PARITY; 758 else if (status & ATMEL_US_FRAME) 759 flg = TTY_FRAME; 760 } 761 762 763 if (uart_handle_sysrq_char(port, c.ch)) 764 continue; 765 766 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg); 767 } 768 769 /* 770 * Drop the lock here since it might end up calling 771 * uart_start(), which takes the lock. 772 */ 773 spin_unlock(&port->lock); 774 tty_flip_buffer_push(port->state->port.tty); 775 spin_lock(&port->lock); 776 } 777 778 static void atmel_rx_from_dma(struct uart_port *port) 779 { 780 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 781 struct tty_struct *tty = port->state->port.tty; 782 struct atmel_dma_buffer *pdc; 783 int rx_idx = atmel_port->pdc_rx_idx; 784 unsigned int head; 785 unsigned int tail; 786 unsigned int count; 787 788 do { 789 /* Reset the UART timeout early so that we don't miss one */ 790 UART_PUT_CR(port, ATMEL_US_STTTO); 791 792 pdc = &atmel_port->pdc_rx[rx_idx]; 793 head = UART_GET_RPR(port) - pdc->dma_addr; 794 tail = pdc->ofs; 795 796 /* If the PDC has switched buffers, RPR won't contain 797 * any address within the current buffer. Since head 798 * is unsigned, we just need a one-way comparison to 799 * find out. 800 * 801 * In this case, we just need to consume the entire 802 * buffer and resubmit it for DMA. This will clear the 803 * ENDRX bit as well, so that we can safely re-enable 804 * all interrupts below. 805 */ 806 head = min(head, pdc->dma_size); 807 808 if (likely(head != tail)) { 809 dma_sync_single_for_cpu(port->dev, pdc->dma_addr, 810 pdc->dma_size, DMA_FROM_DEVICE); 811 812 /* 813 * head will only wrap around when we recycle 814 * the DMA buffer, and when that happens, we 815 * explicitly set tail to 0. So head will 816 * always be greater than tail. 817 */ 818 count = head - tail; 819 820 tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count); 821 822 dma_sync_single_for_device(port->dev, pdc->dma_addr, 823 pdc->dma_size, DMA_FROM_DEVICE); 824 825 port->icount.rx += count; 826 pdc->ofs = head; 827 } 828 829 /* 830 * If the current buffer is full, we need to check if 831 * the next one contains any additional data. 832 */ 833 if (head >= pdc->dma_size) { 834 pdc->ofs = 0; 835 UART_PUT_RNPR(port, pdc->dma_addr); 836 UART_PUT_RNCR(port, pdc->dma_size); 837 838 rx_idx = !rx_idx; 839 atmel_port->pdc_rx_idx = rx_idx; 840 } 841 } while (head >= pdc->dma_size); 842 843 /* 844 * Drop the lock here since it might end up calling 845 * uart_start(), which takes the lock. 846 */ 847 spin_unlock(&port->lock); 848 tty_flip_buffer_push(tty); 849 spin_lock(&port->lock); 850 851 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); 852 } 853 854 /* 855 * tasklet handling tty stuff outside the interrupt handler. 856 */ 857 static void atmel_tasklet_func(unsigned long data) 858 { 859 struct uart_port *port = (struct uart_port *)data; 860 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 861 unsigned int status; 862 unsigned int status_change; 863 864 /* The interrupt handler does not take the lock */ 865 spin_lock(&port->lock); 866 867 if (atmel_use_dma_tx(port)) 868 atmel_tx_dma(port); 869 else 870 atmel_tx_chars(port); 871 872 status = atmel_port->irq_status; 873 status_change = status ^ atmel_port->irq_status_prev; 874 875 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR 876 | ATMEL_US_DCD | ATMEL_US_CTS)) { 877 /* TODO: All reads to CSR will clear these interrupts! */ 878 if (status_change & ATMEL_US_RI) 879 port->icount.rng++; 880 if (status_change & ATMEL_US_DSR) 881 port->icount.dsr++; 882 if (status_change & ATMEL_US_DCD) 883 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD)); 884 if (status_change & ATMEL_US_CTS) 885 uart_handle_cts_change(port, !(status & ATMEL_US_CTS)); 886 887 wake_up_interruptible(&port->state->port.delta_msr_wait); 888 889 atmel_port->irq_status_prev = status; 890 } 891 892 if (atmel_use_dma_rx(port)) 893 atmel_rx_from_dma(port); 894 else 895 atmel_rx_from_ring(port); 896 897 spin_unlock(&port->lock); 898 } 899 900 /* 901 * Perform initialization and enable port for reception 902 */ 903 static int atmel_startup(struct uart_port *port) 904 { 905 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 906 struct tty_struct *tty = port->state->port.tty; 907 int retval; 908 909 /* 910 * Ensure that no interrupts are enabled otherwise when 911 * request_irq() is called we could get stuck trying to 912 * handle an unexpected interrupt 913 */ 914 UART_PUT_IDR(port, -1); 915 916 /* 917 * Allocate the IRQ 918 */ 919 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, 920 tty ? tty->name : "atmel_serial", port); 921 if (retval) { 922 printk("atmel_serial: atmel_startup - Can't get irq\n"); 923 return retval; 924 } 925 926 /* 927 * Initialize DMA (if necessary) 928 */ 929 if (atmel_use_dma_rx(port)) { 930 int i; 931 932 for (i = 0; i < 2; i++) { 933 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i]; 934 935 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL); 936 if (pdc->buf == NULL) { 937 if (i != 0) { 938 dma_unmap_single(port->dev, 939 atmel_port->pdc_rx[0].dma_addr, 940 PDC_BUFFER_SIZE, 941 DMA_FROM_DEVICE); 942 kfree(atmel_port->pdc_rx[0].buf); 943 } 944 free_irq(port->irq, port); 945 return -ENOMEM; 946 } 947 pdc->dma_addr = dma_map_single(port->dev, 948 pdc->buf, 949 PDC_BUFFER_SIZE, 950 DMA_FROM_DEVICE); 951 pdc->dma_size = PDC_BUFFER_SIZE; 952 pdc->ofs = 0; 953 } 954 955 atmel_port->pdc_rx_idx = 0; 956 957 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr); 958 UART_PUT_RCR(port, PDC_BUFFER_SIZE); 959 960 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr); 961 UART_PUT_RNCR(port, PDC_BUFFER_SIZE); 962 } 963 if (atmel_use_dma_tx(port)) { 964 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; 965 struct circ_buf *xmit = &port->state->xmit; 966 967 pdc->buf = xmit->buf; 968 pdc->dma_addr = dma_map_single(port->dev, 969 pdc->buf, 970 UART_XMIT_SIZE, 971 DMA_TO_DEVICE); 972 pdc->dma_size = UART_XMIT_SIZE; 973 pdc->ofs = 0; 974 } 975 976 /* 977 * If there is a specific "open" function (to register 978 * control line interrupts) 979 */ 980 if (atmel_open_hook) { 981 retval = atmel_open_hook(port); 982 if (retval) { 983 free_irq(port->irq, port); 984 return retval; 985 } 986 } 987 988 /* Save current CSR for comparison in atmel_tasklet_func() */ 989 atmel_port->irq_status_prev = UART_GET_CSR(port); 990 atmel_port->irq_status = atmel_port->irq_status_prev; 991 992 /* 993 * Finally, enable the serial port 994 */ 995 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); 996 /* enable xmit & rcvr */ 997 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); 998 999 if (atmel_use_dma_rx(port)) { 1000 /* set UART timeout */ 1001 UART_PUT_RTOR(port, PDC_RX_TIMEOUT); 1002 UART_PUT_CR(port, ATMEL_US_STTTO); 1003 1004 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); 1005 /* enable PDC controller */ 1006 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN); 1007 } else { 1008 /* enable receive only */ 1009 UART_PUT_IER(port, ATMEL_US_RXRDY); 1010 } 1011 1012 return 0; 1013 } 1014 1015 /* 1016 * Disable the port 1017 */ 1018 static void atmel_shutdown(struct uart_port *port) 1019 { 1020 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1021 /* 1022 * Ensure everything is stopped. 1023 */ 1024 atmel_stop_rx(port); 1025 atmel_stop_tx(port); 1026 1027 /* 1028 * Shut-down the DMA. 1029 */ 1030 if (atmel_use_dma_rx(port)) { 1031 int i; 1032 1033 for (i = 0; i < 2; i++) { 1034 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i]; 1035 1036 dma_unmap_single(port->dev, 1037 pdc->dma_addr, 1038 pdc->dma_size, 1039 DMA_FROM_DEVICE); 1040 kfree(pdc->buf); 1041 } 1042 } 1043 if (atmel_use_dma_tx(port)) { 1044 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; 1045 1046 dma_unmap_single(port->dev, 1047 pdc->dma_addr, 1048 pdc->dma_size, 1049 DMA_TO_DEVICE); 1050 } 1051 1052 /* 1053 * Disable all interrupts, port and break condition. 1054 */ 1055 UART_PUT_CR(port, ATMEL_US_RSTSTA); 1056 UART_PUT_IDR(port, -1); 1057 1058 /* 1059 * Free the interrupt 1060 */ 1061 free_irq(port->irq, port); 1062 1063 /* 1064 * If there is a specific "close" function (to unregister 1065 * control line interrupts) 1066 */ 1067 if (atmel_close_hook) 1068 atmel_close_hook(port); 1069 } 1070 1071 /* 1072 * Flush any TX data submitted for DMA. Called when the TX circular 1073 * buffer is reset. 1074 */ 1075 static void atmel_flush_buffer(struct uart_port *port) 1076 { 1077 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1078 1079 if (atmel_use_dma_tx(port)) { 1080 UART_PUT_TCR(port, 0); 1081 atmel_port->pdc_tx.ofs = 0; 1082 } 1083 } 1084 1085 /* 1086 * Power / Clock management. 1087 */ 1088 static void atmel_serial_pm(struct uart_port *port, unsigned int state, 1089 unsigned int oldstate) 1090 { 1091 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1092 1093 switch (state) { 1094 case 0: 1095 /* 1096 * Enable the peripheral clock for this serial port. 1097 * This is called on uart_open() or a resume event. 1098 */ 1099 clk_enable(atmel_port->clk); 1100 1101 /* re-enable interrupts if we disabled some on suspend */ 1102 UART_PUT_IER(port, atmel_port->backup_imr); 1103 break; 1104 case 3: 1105 /* Back up the interrupt mask and disable all interrupts */ 1106 atmel_port->backup_imr = UART_GET_IMR(port); 1107 UART_PUT_IDR(port, -1); 1108 1109 /* 1110 * Disable the peripheral clock for this serial port. 1111 * This is called on uart_close() or a suspend event. 1112 */ 1113 clk_disable(atmel_port->clk); 1114 break; 1115 default: 1116 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state); 1117 } 1118 } 1119 1120 /* 1121 * Change the port parameters 1122 */ 1123 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios, 1124 struct ktermios *old) 1125 { 1126 unsigned long flags; 1127 unsigned int mode, imr, quot, baud; 1128 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1129 1130 /* Get current mode register */ 1131 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL 1132 | ATMEL_US_NBSTOP | ATMEL_US_PAR 1133 | ATMEL_US_USMODE); 1134 1135 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16); 1136 quot = uart_get_divisor(port, baud); 1137 1138 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */ 1139 quot /= 8; 1140 mode |= ATMEL_US_USCLKS_MCK_DIV8; 1141 } 1142 1143 /* byte size */ 1144 switch (termios->c_cflag & CSIZE) { 1145 case CS5: 1146 mode |= ATMEL_US_CHRL_5; 1147 break; 1148 case CS6: 1149 mode |= ATMEL_US_CHRL_6; 1150 break; 1151 case CS7: 1152 mode |= ATMEL_US_CHRL_7; 1153 break; 1154 default: 1155 mode |= ATMEL_US_CHRL_8; 1156 break; 1157 } 1158 1159 /* stop bits */ 1160 if (termios->c_cflag & CSTOPB) 1161 mode |= ATMEL_US_NBSTOP_2; 1162 1163 /* parity */ 1164 if (termios->c_cflag & PARENB) { 1165 /* Mark or Space parity */ 1166 if (termios->c_cflag & CMSPAR) { 1167 if (termios->c_cflag & PARODD) 1168 mode |= ATMEL_US_PAR_MARK; 1169 else 1170 mode |= ATMEL_US_PAR_SPACE; 1171 } else if (termios->c_cflag & PARODD) 1172 mode |= ATMEL_US_PAR_ODD; 1173 else 1174 mode |= ATMEL_US_PAR_EVEN; 1175 } else 1176 mode |= ATMEL_US_PAR_NONE; 1177 1178 /* hardware handshake (RTS/CTS) */ 1179 if (termios->c_cflag & CRTSCTS) 1180 mode |= ATMEL_US_USMODE_HWHS; 1181 else 1182 mode |= ATMEL_US_USMODE_NORMAL; 1183 1184 spin_lock_irqsave(&port->lock, flags); 1185 1186 port->read_status_mask = ATMEL_US_OVRE; 1187 if (termios->c_iflag & INPCK) 1188 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE); 1189 if (termios->c_iflag & (BRKINT | PARMRK)) 1190 port->read_status_mask |= ATMEL_US_RXBRK; 1191 1192 if (atmel_use_dma_rx(port)) 1193 /* need to enable error interrupts */ 1194 UART_PUT_IER(port, port->read_status_mask); 1195 1196 /* 1197 * Characters to ignore 1198 */ 1199 port->ignore_status_mask = 0; 1200 if (termios->c_iflag & IGNPAR) 1201 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE); 1202 if (termios->c_iflag & IGNBRK) { 1203 port->ignore_status_mask |= ATMEL_US_RXBRK; 1204 /* 1205 * If we're ignoring parity and break indicators, 1206 * ignore overruns too (for real raw support). 1207 */ 1208 if (termios->c_iflag & IGNPAR) 1209 port->ignore_status_mask |= ATMEL_US_OVRE; 1210 } 1211 /* TODO: Ignore all characters if CREAD is set.*/ 1212 1213 /* update the per-port timeout */ 1214 uart_update_timeout(port, termios->c_cflag, baud); 1215 1216 /* 1217 * save/disable interrupts. The tty layer will ensure that the 1218 * transmitter is empty if requested by the caller, so there's 1219 * no need to wait for it here. 1220 */ 1221 imr = UART_GET_IMR(port); 1222 UART_PUT_IDR(port, -1); 1223 1224 /* disable receiver and transmitter */ 1225 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS); 1226 1227 /* Resetting serial mode to RS232 (0x0) */ 1228 mode &= ~ATMEL_US_USMODE; 1229 1230 if (atmel_port->rs485.flags & SER_RS485_ENABLED) { 1231 dev_dbg(port->dev, "Setting UART to RS485\n"); 1232 if ((atmel_port->rs485.delay_rts_after_send) > 0) 1233 UART_PUT_TTGR(port, 1234 atmel_port->rs485.delay_rts_after_send); 1235 mode |= ATMEL_US_USMODE_RS485; 1236 } else { 1237 dev_dbg(port->dev, "Setting UART to RS232\n"); 1238 } 1239 1240 /* set the parity, stop bits and data size */ 1241 UART_PUT_MR(port, mode); 1242 1243 /* set the baud rate */ 1244 UART_PUT_BRGR(port, quot); 1245 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); 1246 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); 1247 1248 /* restore interrupts */ 1249 UART_PUT_IER(port, imr); 1250 1251 /* CTS flow-control and modem-status interrupts */ 1252 if (UART_ENABLE_MS(port, termios->c_cflag)) 1253 port->ops->enable_ms(port); 1254 1255 spin_unlock_irqrestore(&port->lock, flags); 1256 } 1257 1258 static void atmel_set_ldisc(struct uart_port *port, int new) 1259 { 1260 if (new == N_PPS) { 1261 port->flags |= UPF_HARDPPS_CD; 1262 atmel_enable_ms(port); 1263 } else { 1264 port->flags &= ~UPF_HARDPPS_CD; 1265 } 1266 } 1267 1268 /* 1269 * Return string describing the specified port 1270 */ 1271 static const char *atmel_type(struct uart_port *port) 1272 { 1273 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL; 1274 } 1275 1276 /* 1277 * Release the memory region(s) being used by 'port'. 1278 */ 1279 static void atmel_release_port(struct uart_port *port) 1280 { 1281 struct platform_device *pdev = to_platform_device(port->dev); 1282 int size = pdev->resource[0].end - pdev->resource[0].start + 1; 1283 1284 release_mem_region(port->mapbase, size); 1285 1286 if (port->flags & UPF_IOREMAP) { 1287 iounmap(port->membase); 1288 port->membase = NULL; 1289 } 1290 } 1291 1292 /* 1293 * Request the memory region(s) being used by 'port'. 1294 */ 1295 static int atmel_request_port(struct uart_port *port) 1296 { 1297 struct platform_device *pdev = to_platform_device(port->dev); 1298 int size = pdev->resource[0].end - pdev->resource[0].start + 1; 1299 1300 if (!request_mem_region(port->mapbase, size, "atmel_serial")) 1301 return -EBUSY; 1302 1303 if (port->flags & UPF_IOREMAP) { 1304 port->membase = ioremap(port->mapbase, size); 1305 if (port->membase == NULL) { 1306 release_mem_region(port->mapbase, size); 1307 return -ENOMEM; 1308 } 1309 } 1310 1311 return 0; 1312 } 1313 1314 /* 1315 * Configure/autoconfigure the port. 1316 */ 1317 static void atmel_config_port(struct uart_port *port, int flags) 1318 { 1319 if (flags & UART_CONFIG_TYPE) { 1320 port->type = PORT_ATMEL; 1321 atmel_request_port(port); 1322 } 1323 } 1324 1325 /* 1326 * Verify the new serial_struct (for TIOCSSERIAL). 1327 */ 1328 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser) 1329 { 1330 int ret = 0; 1331 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL) 1332 ret = -EINVAL; 1333 if (port->irq != ser->irq) 1334 ret = -EINVAL; 1335 if (ser->io_type != SERIAL_IO_MEM) 1336 ret = -EINVAL; 1337 if (port->uartclk / 16 != ser->baud_base) 1338 ret = -EINVAL; 1339 if ((void *)port->mapbase != ser->iomem_base) 1340 ret = -EINVAL; 1341 if (port->iobase != ser->port) 1342 ret = -EINVAL; 1343 if (ser->hub6 != 0) 1344 ret = -EINVAL; 1345 return ret; 1346 } 1347 1348 #ifdef CONFIG_CONSOLE_POLL 1349 static int atmel_poll_get_char(struct uart_port *port) 1350 { 1351 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY)) 1352 cpu_relax(); 1353 1354 return UART_GET_CHAR(port); 1355 } 1356 1357 static void atmel_poll_put_char(struct uart_port *port, unsigned char ch) 1358 { 1359 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY)) 1360 cpu_relax(); 1361 1362 UART_PUT_CHAR(port, ch); 1363 } 1364 #endif 1365 1366 static int 1367 atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg) 1368 { 1369 struct serial_rs485 rs485conf; 1370 1371 switch (cmd) { 1372 case TIOCSRS485: 1373 if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg, 1374 sizeof(rs485conf))) 1375 return -EFAULT; 1376 1377 atmel_config_rs485(port, &rs485conf); 1378 break; 1379 1380 case TIOCGRS485: 1381 if (copy_to_user((struct serial_rs485 *) arg, 1382 &(to_atmel_uart_port(port)->rs485), 1383 sizeof(rs485conf))) 1384 return -EFAULT; 1385 break; 1386 1387 default: 1388 return -ENOIOCTLCMD; 1389 } 1390 return 0; 1391 } 1392 1393 1394 1395 static struct uart_ops atmel_pops = { 1396 .tx_empty = atmel_tx_empty, 1397 .set_mctrl = atmel_set_mctrl, 1398 .get_mctrl = atmel_get_mctrl, 1399 .stop_tx = atmel_stop_tx, 1400 .start_tx = atmel_start_tx, 1401 .stop_rx = atmel_stop_rx, 1402 .enable_ms = atmel_enable_ms, 1403 .break_ctl = atmel_break_ctl, 1404 .startup = atmel_startup, 1405 .shutdown = atmel_shutdown, 1406 .flush_buffer = atmel_flush_buffer, 1407 .set_termios = atmel_set_termios, 1408 .set_ldisc = atmel_set_ldisc, 1409 .type = atmel_type, 1410 .release_port = atmel_release_port, 1411 .request_port = atmel_request_port, 1412 .config_port = atmel_config_port, 1413 .verify_port = atmel_verify_port, 1414 .pm = atmel_serial_pm, 1415 .ioctl = atmel_ioctl, 1416 #ifdef CONFIG_CONSOLE_POLL 1417 .poll_get_char = atmel_poll_get_char, 1418 .poll_put_char = atmel_poll_put_char, 1419 #endif 1420 }; 1421 1422 static void __devinit atmel_of_init_port(struct atmel_uart_port *atmel_port, 1423 struct device_node *np) 1424 { 1425 u32 rs485_delay[2]; 1426 1427 /* DMA/PDC usage specification */ 1428 if (of_get_property(np, "atmel,use-dma-rx", NULL)) 1429 atmel_port->use_dma_rx = 1; 1430 else 1431 atmel_port->use_dma_rx = 0; 1432 if (of_get_property(np, "atmel,use-dma-tx", NULL)) 1433 atmel_port->use_dma_tx = 1; 1434 else 1435 atmel_port->use_dma_tx = 0; 1436 1437 /* rs485 properties */ 1438 if (of_property_read_u32_array(np, "rs485-rts-delay", 1439 rs485_delay, 2) == 0) { 1440 struct serial_rs485 *rs485conf = &atmel_port->rs485; 1441 1442 rs485conf->delay_rts_before_send = rs485_delay[0]; 1443 rs485conf->delay_rts_after_send = rs485_delay[1]; 1444 rs485conf->flags = 0; 1445 1446 if (of_get_property(np, "rs485-rx-during-tx", NULL)) 1447 rs485conf->flags |= SER_RS485_RX_DURING_TX; 1448 1449 if (of_get_property(np, "linux,rs485-enabled-at-boot-time", NULL)) 1450 rs485conf->flags |= SER_RS485_ENABLED; 1451 } 1452 } 1453 1454 /* 1455 * Configure the port from the platform device resource info. 1456 */ 1457 static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, 1458 struct platform_device *pdev) 1459 { 1460 struct uart_port *port = &atmel_port->uart; 1461 struct atmel_uart_data *pdata = pdev->dev.platform_data; 1462 1463 if (pdev->dev.of_node) { 1464 atmel_of_init_port(atmel_port, pdev->dev.of_node); 1465 } else { 1466 atmel_port->use_dma_rx = pdata->use_dma_rx; 1467 atmel_port->use_dma_tx = pdata->use_dma_tx; 1468 atmel_port->rs485 = pdata->rs485; 1469 } 1470 1471 port->iotype = UPIO_MEM; 1472 port->flags = UPF_BOOT_AUTOCONF; 1473 port->ops = &atmel_pops; 1474 port->fifosize = 1; 1475 port->dev = &pdev->dev; 1476 port->mapbase = pdev->resource[0].start; 1477 port->irq = pdev->resource[1].start; 1478 1479 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func, 1480 (unsigned long)port); 1481 1482 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring)); 1483 1484 if (pdata && pdata->regs) { 1485 /* Already mapped by setup code */ 1486 port->membase = pdata->regs; 1487 } else { 1488 port->flags |= UPF_IOREMAP; 1489 port->membase = NULL; 1490 } 1491 1492 /* for console, the clock could already be configured */ 1493 if (!atmel_port->clk) { 1494 atmel_port->clk = clk_get(&pdev->dev, "usart"); 1495 clk_enable(atmel_port->clk); 1496 port->uartclk = clk_get_rate(atmel_port->clk); 1497 clk_disable(atmel_port->clk); 1498 /* only enable clock when USART is in use */ 1499 } 1500 1501 /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */ 1502 if (atmel_port->rs485.flags & SER_RS485_ENABLED) 1503 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY; 1504 else if (atmel_use_dma_tx(port)) { 1505 port->fifosize = PDC_BUFFER_SIZE; 1506 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE; 1507 } else { 1508 atmel_port->tx_done_mask = ATMEL_US_TXRDY; 1509 } 1510 } 1511 1512 /* 1513 * Register board-specific modem-control line handlers. 1514 */ 1515 void __init atmel_register_uart_fns(struct atmel_port_fns *fns) 1516 { 1517 if (fns->enable_ms) 1518 atmel_pops.enable_ms = fns->enable_ms; 1519 if (fns->get_mctrl) 1520 atmel_pops.get_mctrl = fns->get_mctrl; 1521 if (fns->set_mctrl) 1522 atmel_pops.set_mctrl = fns->set_mctrl; 1523 atmel_open_hook = fns->open; 1524 atmel_close_hook = fns->close; 1525 atmel_pops.pm = fns->pm; 1526 atmel_pops.set_wake = fns->set_wake; 1527 } 1528 1529 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE 1530 static void atmel_console_putchar(struct uart_port *port, int ch) 1531 { 1532 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY)) 1533 cpu_relax(); 1534 UART_PUT_CHAR(port, ch); 1535 } 1536 1537 /* 1538 * Interrupts are disabled on entering 1539 */ 1540 static void atmel_console_write(struct console *co, const char *s, u_int count) 1541 { 1542 struct uart_port *port = &atmel_ports[co->index].uart; 1543 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1544 unsigned int status, imr; 1545 unsigned int pdc_tx; 1546 1547 /* 1548 * First, save IMR and then disable interrupts 1549 */ 1550 imr = UART_GET_IMR(port); 1551 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask); 1552 1553 /* Store PDC transmit status and disable it */ 1554 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN; 1555 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); 1556 1557 uart_console_write(port, s, count, atmel_console_putchar); 1558 1559 /* 1560 * Finally, wait for transmitter to become empty 1561 * and restore IMR 1562 */ 1563 do { 1564 status = UART_GET_CSR(port); 1565 } while (!(status & ATMEL_US_TXRDY)); 1566 1567 /* Restore PDC transmit status */ 1568 if (pdc_tx) 1569 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); 1570 1571 /* set interrupts back the way they were */ 1572 UART_PUT_IER(port, imr); 1573 } 1574 1575 /* 1576 * If the port was already initialised (eg, by a boot loader), 1577 * try to determine the current setup. 1578 */ 1579 static void __init atmel_console_get_options(struct uart_port *port, int *baud, 1580 int *parity, int *bits) 1581 { 1582 unsigned int mr, quot; 1583 1584 /* 1585 * If the baud rate generator isn't running, the port wasn't 1586 * initialized by the boot loader. 1587 */ 1588 quot = UART_GET_BRGR(port) & ATMEL_US_CD; 1589 if (!quot) 1590 return; 1591 1592 mr = UART_GET_MR(port) & ATMEL_US_CHRL; 1593 if (mr == ATMEL_US_CHRL_8) 1594 *bits = 8; 1595 else 1596 *bits = 7; 1597 1598 mr = UART_GET_MR(port) & ATMEL_US_PAR; 1599 if (mr == ATMEL_US_PAR_EVEN) 1600 *parity = 'e'; 1601 else if (mr == ATMEL_US_PAR_ODD) 1602 *parity = 'o'; 1603 1604 /* 1605 * The serial core only rounds down when matching this to a 1606 * supported baud rate. Make sure we don't end up slightly 1607 * lower than one of those, as it would make us fall through 1608 * to a much lower baud rate than we really want. 1609 */ 1610 *baud = port->uartclk / (16 * (quot - 1)); 1611 } 1612 1613 static int __init atmel_console_setup(struct console *co, char *options) 1614 { 1615 struct uart_port *port = &atmel_ports[co->index].uart; 1616 int baud = 115200; 1617 int bits = 8; 1618 int parity = 'n'; 1619 int flow = 'n'; 1620 1621 if (port->membase == NULL) { 1622 /* Port not initialized yet - delay setup */ 1623 return -ENODEV; 1624 } 1625 1626 clk_enable(atmel_ports[co->index].clk); 1627 1628 UART_PUT_IDR(port, -1); 1629 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); 1630 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); 1631 1632 if (options) 1633 uart_parse_options(options, &baud, &parity, &bits, &flow); 1634 else 1635 atmel_console_get_options(port, &baud, &parity, &bits); 1636 1637 return uart_set_options(port, co, baud, parity, bits, flow); 1638 } 1639 1640 static struct uart_driver atmel_uart; 1641 1642 static struct console atmel_console = { 1643 .name = ATMEL_DEVICENAME, 1644 .write = atmel_console_write, 1645 .device = uart_console_device, 1646 .setup = atmel_console_setup, 1647 .flags = CON_PRINTBUFFER, 1648 .index = -1, 1649 .data = &atmel_uart, 1650 }; 1651 1652 #define ATMEL_CONSOLE_DEVICE (&atmel_console) 1653 1654 /* 1655 * Early console initialization (before VM subsystem initialized). 1656 */ 1657 static int __init atmel_console_init(void) 1658 { 1659 if (atmel_default_console_device) { 1660 struct atmel_uart_data *pdata = 1661 atmel_default_console_device->dev.platform_data; 1662 int id = pdata->num; 1663 struct atmel_uart_port *port = &atmel_ports[id]; 1664 1665 port->backup_imr = 0; 1666 port->uart.line = id; 1667 1668 add_preferred_console(ATMEL_DEVICENAME, id, NULL); 1669 atmel_init_port(port, atmel_default_console_device); 1670 register_console(&atmel_console); 1671 } 1672 1673 return 0; 1674 } 1675 1676 console_initcall(atmel_console_init); 1677 1678 /* 1679 * Late console initialization. 1680 */ 1681 static int __init atmel_late_console_init(void) 1682 { 1683 if (atmel_default_console_device 1684 && !(atmel_console.flags & CON_ENABLED)) 1685 register_console(&atmel_console); 1686 1687 return 0; 1688 } 1689 1690 core_initcall(atmel_late_console_init); 1691 1692 static inline bool atmel_is_console_port(struct uart_port *port) 1693 { 1694 return port->cons && port->cons->index == port->line; 1695 } 1696 1697 #else 1698 #define ATMEL_CONSOLE_DEVICE NULL 1699 1700 static inline bool atmel_is_console_port(struct uart_port *port) 1701 { 1702 return false; 1703 } 1704 #endif 1705 1706 static struct uart_driver atmel_uart = { 1707 .owner = THIS_MODULE, 1708 .driver_name = "atmel_serial", 1709 .dev_name = ATMEL_DEVICENAME, 1710 .major = SERIAL_ATMEL_MAJOR, 1711 .minor = MINOR_START, 1712 .nr = ATMEL_MAX_UART, 1713 .cons = ATMEL_CONSOLE_DEVICE, 1714 }; 1715 1716 #ifdef CONFIG_PM 1717 static bool atmel_serial_clk_will_stop(void) 1718 { 1719 #ifdef CONFIG_ARCH_AT91 1720 return at91_suspend_entering_slow_clock(); 1721 #else 1722 return false; 1723 #endif 1724 } 1725 1726 static int atmel_serial_suspend(struct platform_device *pdev, 1727 pm_message_t state) 1728 { 1729 struct uart_port *port = platform_get_drvdata(pdev); 1730 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1731 1732 if (atmel_is_console_port(port) && console_suspend_enabled) { 1733 /* Drain the TX shifter */ 1734 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) 1735 cpu_relax(); 1736 } 1737 1738 /* we can not wake up if we're running on slow clock */ 1739 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev); 1740 if (atmel_serial_clk_will_stop()) 1741 device_set_wakeup_enable(&pdev->dev, 0); 1742 1743 uart_suspend_port(&atmel_uart, port); 1744 1745 return 0; 1746 } 1747 1748 static int atmel_serial_resume(struct platform_device *pdev) 1749 { 1750 struct uart_port *port = platform_get_drvdata(pdev); 1751 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1752 1753 uart_resume_port(&atmel_uart, port); 1754 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup); 1755 1756 return 0; 1757 } 1758 #else 1759 #define atmel_serial_suspend NULL 1760 #define atmel_serial_resume NULL 1761 #endif 1762 1763 static int __devinit atmel_serial_probe(struct platform_device *pdev) 1764 { 1765 struct atmel_uart_port *port; 1766 struct device_node *np = pdev->dev.of_node; 1767 struct atmel_uart_data *pdata = pdev->dev.platform_data; 1768 void *data; 1769 int ret = -ENODEV; 1770 1771 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1)); 1772 1773 if (np) 1774 ret = of_alias_get_id(np, "serial"); 1775 else 1776 if (pdata) 1777 ret = pdata->num; 1778 1779 if (ret < 0) 1780 /* port id not found in platform data nor device-tree aliases: 1781 * auto-enumerate it */ 1782 ret = find_first_zero_bit(&atmel_ports_in_use, 1783 sizeof(atmel_ports_in_use)); 1784 1785 if (ret > ATMEL_MAX_UART) { 1786 ret = -ENODEV; 1787 goto err; 1788 } 1789 1790 if (test_and_set_bit(ret, &atmel_ports_in_use)) { 1791 /* port already in use */ 1792 ret = -EBUSY; 1793 goto err; 1794 } 1795 1796 port = &atmel_ports[ret]; 1797 port->backup_imr = 0; 1798 port->uart.line = ret; 1799 1800 atmel_init_port(port, pdev); 1801 1802 if (!atmel_use_dma_rx(&port->uart)) { 1803 ret = -ENOMEM; 1804 data = kmalloc(sizeof(struct atmel_uart_char) 1805 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL); 1806 if (!data) 1807 goto err_alloc_ring; 1808 port->rx_ring.buf = data; 1809 } 1810 1811 ret = uart_add_one_port(&atmel_uart, &port->uart); 1812 if (ret) 1813 goto err_add_port; 1814 1815 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE 1816 if (atmel_is_console_port(&port->uart) 1817 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) { 1818 /* 1819 * The serial core enabled the clock for us, so undo 1820 * the clk_enable() in atmel_console_setup() 1821 */ 1822 clk_disable(port->clk); 1823 } 1824 #endif 1825 1826 device_init_wakeup(&pdev->dev, 1); 1827 platform_set_drvdata(pdev, port); 1828 1829 if (port->rs485.flags & SER_RS485_ENABLED) { 1830 UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL); 1831 UART_PUT_CR(&port->uart, ATMEL_US_RTSEN); 1832 } 1833 1834 return 0; 1835 1836 err_add_port: 1837 kfree(port->rx_ring.buf); 1838 port->rx_ring.buf = NULL; 1839 err_alloc_ring: 1840 if (!atmel_is_console_port(&port->uart)) { 1841 clk_put(port->clk); 1842 port->clk = NULL; 1843 } 1844 err: 1845 return ret; 1846 } 1847 1848 static int __devexit atmel_serial_remove(struct platform_device *pdev) 1849 { 1850 struct uart_port *port = platform_get_drvdata(pdev); 1851 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1852 int ret = 0; 1853 1854 device_init_wakeup(&pdev->dev, 0); 1855 platform_set_drvdata(pdev, NULL); 1856 1857 ret = uart_remove_one_port(&atmel_uart, port); 1858 1859 tasklet_kill(&atmel_port->tasklet); 1860 kfree(atmel_port->rx_ring.buf); 1861 1862 /* "port" is allocated statically, so we shouldn't free it */ 1863 1864 clear_bit(port->line, &atmel_ports_in_use); 1865 1866 clk_put(atmel_port->clk); 1867 1868 return ret; 1869 } 1870 1871 static struct platform_driver atmel_serial_driver = { 1872 .probe = atmel_serial_probe, 1873 .remove = __devexit_p(atmel_serial_remove), 1874 .suspend = atmel_serial_suspend, 1875 .resume = atmel_serial_resume, 1876 .driver = { 1877 .name = "atmel_usart", 1878 .owner = THIS_MODULE, 1879 .of_match_table = of_match_ptr(atmel_serial_dt_ids), 1880 }, 1881 }; 1882 1883 static int __init atmel_serial_init(void) 1884 { 1885 int ret; 1886 1887 ret = uart_register_driver(&atmel_uart); 1888 if (ret) 1889 return ret; 1890 1891 ret = platform_driver_register(&atmel_serial_driver); 1892 if (ret) 1893 uart_unregister_driver(&atmel_uart); 1894 1895 return ret; 1896 } 1897 1898 static void __exit atmel_serial_exit(void) 1899 { 1900 platform_driver_unregister(&atmel_serial_driver); 1901 uart_unregister_driver(&atmel_uart); 1902 } 1903 1904 module_init(atmel_serial_init); 1905 module_exit(atmel_serial_exit); 1906 1907 MODULE_AUTHOR("Rick Bronson"); 1908 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver"); 1909 MODULE_LICENSE("GPL"); 1910 MODULE_ALIAS("platform:atmel_usart"); 1911