1 /* 2 * Atheros AR933X SoC built-in UART driver 3 * 4 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> 5 * 6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License version 2 as published 10 * by the Free Software Foundation. 11 */ 12 13 #include <linux/module.h> 14 #include <linux/ioport.h> 15 #include <linux/init.h> 16 #include <linux/console.h> 17 #include <linux/sysrq.h> 18 #include <linux/delay.h> 19 #include <linux/platform_device.h> 20 #include <linux/of.h> 21 #include <linux/of_platform.h> 22 #include <linux/tty.h> 23 #include <linux/tty_flip.h> 24 #include <linux/serial_core.h> 25 #include <linux/serial.h> 26 #include <linux/slab.h> 27 #include <linux/io.h> 28 #include <linux/irq.h> 29 #include <linux/clk.h> 30 31 #include <asm/div64.h> 32 33 #include <asm/mach-ath79/ar933x_uart.h> 34 35 #define DRIVER_NAME "ar933x-uart" 36 37 #define AR933X_UART_MAX_SCALE 0xff 38 #define AR933X_UART_MAX_STEP 0xffff 39 40 #define AR933X_UART_MIN_BAUD 300 41 #define AR933X_UART_MAX_BAUD 3000000 42 43 #define AR933X_DUMMY_STATUS_RD 0x01 44 45 static struct uart_driver ar933x_uart_driver; 46 47 struct ar933x_uart_port { 48 struct uart_port port; 49 unsigned int ier; /* shadow Interrupt Enable Register */ 50 unsigned int min_baud; 51 unsigned int max_baud; 52 struct clk *clk; 53 }; 54 55 static inline bool ar933x_uart_console_enabled(void) 56 { 57 return config_enabled(CONFIG_SERIAL_AR933X_CONSOLE); 58 } 59 60 static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, 61 int offset) 62 { 63 return readl(up->port.membase + offset); 64 } 65 66 static inline void ar933x_uart_write(struct ar933x_uart_port *up, 67 int offset, unsigned int value) 68 { 69 writel(value, up->port.membase + offset); 70 } 71 72 static inline void ar933x_uart_rmw(struct ar933x_uart_port *up, 73 unsigned int offset, 74 unsigned int mask, 75 unsigned int val) 76 { 77 unsigned int t; 78 79 t = ar933x_uart_read(up, offset); 80 t &= ~mask; 81 t |= val; 82 ar933x_uart_write(up, offset, t); 83 } 84 85 static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up, 86 unsigned int offset, 87 unsigned int val) 88 { 89 ar933x_uart_rmw(up, offset, 0, val); 90 } 91 92 static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up, 93 unsigned int offset, 94 unsigned int val) 95 { 96 ar933x_uart_rmw(up, offset, val, 0); 97 } 98 99 static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up) 100 { 101 up->ier |= AR933X_UART_INT_TX_EMPTY; 102 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 103 } 104 105 static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up) 106 { 107 up->ier &= ~AR933X_UART_INT_TX_EMPTY; 108 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 109 } 110 111 static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch) 112 { 113 unsigned int rdata; 114 115 rdata = ch & AR933X_UART_DATA_TX_RX_MASK; 116 rdata |= AR933X_UART_DATA_TX_CSR; 117 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata); 118 } 119 120 static unsigned int ar933x_uart_tx_empty(struct uart_port *port) 121 { 122 struct ar933x_uart_port *up = 123 container_of(port, struct ar933x_uart_port, port); 124 unsigned long flags; 125 unsigned int rdata; 126 127 spin_lock_irqsave(&up->port.lock, flags); 128 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); 129 spin_unlock_irqrestore(&up->port.lock, flags); 130 131 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT; 132 } 133 134 static unsigned int ar933x_uart_get_mctrl(struct uart_port *port) 135 { 136 return TIOCM_CAR; 137 } 138 139 static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) 140 { 141 } 142 143 static void ar933x_uart_start_tx(struct uart_port *port) 144 { 145 struct ar933x_uart_port *up = 146 container_of(port, struct ar933x_uart_port, port); 147 148 ar933x_uart_start_tx_interrupt(up); 149 } 150 151 static void ar933x_uart_stop_tx(struct uart_port *port) 152 { 153 struct ar933x_uart_port *up = 154 container_of(port, struct ar933x_uart_port, port); 155 156 ar933x_uart_stop_tx_interrupt(up); 157 } 158 159 static void ar933x_uart_stop_rx(struct uart_port *port) 160 { 161 struct ar933x_uart_port *up = 162 container_of(port, struct ar933x_uart_port, port); 163 164 up->ier &= ~AR933X_UART_INT_RX_VALID; 165 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 166 } 167 168 static void ar933x_uart_break_ctl(struct uart_port *port, int break_state) 169 { 170 struct ar933x_uart_port *up = 171 container_of(port, struct ar933x_uart_port, port); 172 unsigned long flags; 173 174 spin_lock_irqsave(&up->port.lock, flags); 175 if (break_state == -1) 176 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, 177 AR933X_UART_CS_TX_BREAK); 178 else 179 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, 180 AR933X_UART_CS_TX_BREAK); 181 spin_unlock_irqrestore(&up->port.lock, flags); 182 } 183 184 /* 185 * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17)) 186 */ 187 static unsigned long ar933x_uart_get_baud(unsigned int clk, 188 unsigned int scale, 189 unsigned int step) 190 { 191 u64 t; 192 u32 div; 193 194 div = (2 << 16) * (scale + 1); 195 t = clk; 196 t *= step; 197 t += (div / 2); 198 do_div(t, div); 199 200 return t; 201 } 202 203 static void ar933x_uart_get_scale_step(unsigned int clk, 204 unsigned int baud, 205 unsigned int *scale, 206 unsigned int *step) 207 { 208 unsigned int tscale; 209 long min_diff; 210 211 *scale = 0; 212 *step = 0; 213 214 min_diff = baud; 215 for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) { 216 u64 tstep; 217 int diff; 218 219 tstep = baud * (tscale + 1); 220 tstep *= (2 << 16); 221 do_div(tstep, clk); 222 223 if (tstep > AR933X_UART_MAX_STEP) 224 break; 225 226 diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud); 227 if (diff < min_diff) { 228 min_diff = diff; 229 *scale = tscale; 230 *step = tstep; 231 } 232 } 233 } 234 235 static void ar933x_uart_set_termios(struct uart_port *port, 236 struct ktermios *new, 237 struct ktermios *old) 238 { 239 struct ar933x_uart_port *up = 240 container_of(port, struct ar933x_uart_port, port); 241 unsigned int cs; 242 unsigned long flags; 243 unsigned int baud, scale, step; 244 245 /* Only CS8 is supported */ 246 new->c_cflag &= ~CSIZE; 247 new->c_cflag |= CS8; 248 249 /* Only one stop bit is supported */ 250 new->c_cflag &= ~CSTOPB; 251 252 cs = 0; 253 if (new->c_cflag & PARENB) { 254 if (!(new->c_cflag & PARODD)) 255 cs |= AR933X_UART_CS_PARITY_EVEN; 256 else 257 cs |= AR933X_UART_CS_PARITY_ODD; 258 } else { 259 cs |= AR933X_UART_CS_PARITY_NONE; 260 } 261 262 /* Mark/space parity is not supported */ 263 new->c_cflag &= ~CMSPAR; 264 265 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud); 266 ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step); 267 268 /* 269 * Ok, we're now changing the port state. Do it with 270 * interrupts disabled. 271 */ 272 spin_lock_irqsave(&up->port.lock, flags); 273 274 /* disable the UART */ 275 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, 276 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S); 277 278 /* Update the per-port timeout. */ 279 uart_update_timeout(port, new->c_cflag, baud); 280 281 up->port.ignore_status_mask = 0; 282 283 /* ignore all characters if CREAD is not set */ 284 if ((new->c_cflag & CREAD) == 0) 285 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD; 286 287 ar933x_uart_write(up, AR933X_UART_CLOCK_REG, 288 scale << AR933X_UART_CLOCK_SCALE_S | step); 289 290 /* setup configuration register */ 291 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs); 292 293 /* enable host interrupt */ 294 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, 295 AR933X_UART_CS_HOST_INT_EN); 296 297 /* reenable the UART */ 298 ar933x_uart_rmw(up, AR933X_UART_CS_REG, 299 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S, 300 AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S); 301 302 spin_unlock_irqrestore(&up->port.lock, flags); 303 304 if (tty_termios_baud_rate(new)) 305 tty_termios_encode_baud_rate(new, baud, baud); 306 } 307 308 static void ar933x_uart_rx_chars(struct ar933x_uart_port *up) 309 { 310 struct tty_port *port = &up->port.state->port; 311 int max_count = 256; 312 313 do { 314 unsigned int rdata; 315 unsigned char ch; 316 317 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); 318 if ((rdata & AR933X_UART_DATA_RX_CSR) == 0) 319 break; 320 321 /* remove the character from the FIFO */ 322 ar933x_uart_write(up, AR933X_UART_DATA_REG, 323 AR933X_UART_DATA_RX_CSR); 324 325 up->port.icount.rx++; 326 ch = rdata & AR933X_UART_DATA_TX_RX_MASK; 327 328 if (uart_handle_sysrq_char(&up->port, ch)) 329 continue; 330 331 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0) 332 tty_insert_flip_char(port, ch, TTY_NORMAL); 333 } while (max_count-- > 0); 334 335 spin_unlock(&up->port.lock); 336 tty_flip_buffer_push(port); 337 spin_lock(&up->port.lock); 338 } 339 340 static void ar933x_uart_tx_chars(struct ar933x_uart_port *up) 341 { 342 struct circ_buf *xmit = &up->port.state->xmit; 343 int count; 344 345 if (uart_tx_stopped(&up->port)) 346 return; 347 348 count = up->port.fifosize; 349 do { 350 unsigned int rdata; 351 352 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); 353 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0) 354 break; 355 356 if (up->port.x_char) { 357 ar933x_uart_putc(up, up->port.x_char); 358 up->port.icount.tx++; 359 up->port.x_char = 0; 360 continue; 361 } 362 363 if (uart_circ_empty(xmit)) 364 break; 365 366 ar933x_uart_putc(up, xmit->buf[xmit->tail]); 367 368 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 369 up->port.icount.tx++; 370 } while (--count > 0); 371 372 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 373 uart_write_wakeup(&up->port); 374 375 if (!uart_circ_empty(xmit)) 376 ar933x_uart_start_tx_interrupt(up); 377 } 378 379 static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id) 380 { 381 struct ar933x_uart_port *up = dev_id; 382 unsigned int status; 383 384 status = ar933x_uart_read(up, AR933X_UART_CS_REG); 385 if ((status & AR933X_UART_CS_HOST_INT) == 0) 386 return IRQ_NONE; 387 388 spin_lock(&up->port.lock); 389 390 status = ar933x_uart_read(up, AR933X_UART_INT_REG); 391 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG); 392 393 if (status & AR933X_UART_INT_RX_VALID) { 394 ar933x_uart_write(up, AR933X_UART_INT_REG, 395 AR933X_UART_INT_RX_VALID); 396 ar933x_uart_rx_chars(up); 397 } 398 399 if (status & AR933X_UART_INT_TX_EMPTY) { 400 ar933x_uart_write(up, AR933X_UART_INT_REG, 401 AR933X_UART_INT_TX_EMPTY); 402 ar933x_uart_stop_tx_interrupt(up); 403 ar933x_uart_tx_chars(up); 404 } 405 406 spin_unlock(&up->port.lock); 407 408 return IRQ_HANDLED; 409 } 410 411 static int ar933x_uart_startup(struct uart_port *port) 412 { 413 struct ar933x_uart_port *up = 414 container_of(port, struct ar933x_uart_port, port); 415 unsigned long flags; 416 int ret; 417 418 ret = request_irq(up->port.irq, ar933x_uart_interrupt, 419 up->port.irqflags, dev_name(up->port.dev), up); 420 if (ret) 421 return ret; 422 423 spin_lock_irqsave(&up->port.lock, flags); 424 425 /* Enable HOST interrupts */ 426 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, 427 AR933X_UART_CS_HOST_INT_EN); 428 429 /* Enable RX interrupts */ 430 up->ier = AR933X_UART_INT_RX_VALID; 431 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 432 433 spin_unlock_irqrestore(&up->port.lock, flags); 434 435 return 0; 436 } 437 438 static void ar933x_uart_shutdown(struct uart_port *port) 439 { 440 struct ar933x_uart_port *up = 441 container_of(port, struct ar933x_uart_port, port); 442 443 /* Disable all interrupts */ 444 up->ier = 0; 445 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 446 447 /* Disable break condition */ 448 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, 449 AR933X_UART_CS_TX_BREAK); 450 451 free_irq(up->port.irq, up); 452 } 453 454 static const char *ar933x_uart_type(struct uart_port *port) 455 { 456 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL; 457 } 458 459 static void ar933x_uart_release_port(struct uart_port *port) 460 { 461 /* Nothing to release ... */ 462 } 463 464 static int ar933x_uart_request_port(struct uart_port *port) 465 { 466 /* UARTs always present */ 467 return 0; 468 } 469 470 static void ar933x_uart_config_port(struct uart_port *port, int flags) 471 { 472 if (flags & UART_CONFIG_TYPE) 473 port->type = PORT_AR933X; 474 } 475 476 static int ar933x_uart_verify_port(struct uart_port *port, 477 struct serial_struct *ser) 478 { 479 struct ar933x_uart_port *up = 480 container_of(port, struct ar933x_uart_port, port); 481 482 if (ser->type != PORT_UNKNOWN && 483 ser->type != PORT_AR933X) 484 return -EINVAL; 485 486 if (ser->irq < 0 || ser->irq >= NR_IRQS) 487 return -EINVAL; 488 489 if (ser->baud_base < up->min_baud || 490 ser->baud_base > up->max_baud) 491 return -EINVAL; 492 493 return 0; 494 } 495 496 static struct uart_ops ar933x_uart_ops = { 497 .tx_empty = ar933x_uart_tx_empty, 498 .set_mctrl = ar933x_uart_set_mctrl, 499 .get_mctrl = ar933x_uart_get_mctrl, 500 .stop_tx = ar933x_uart_stop_tx, 501 .start_tx = ar933x_uart_start_tx, 502 .stop_rx = ar933x_uart_stop_rx, 503 .break_ctl = ar933x_uart_break_ctl, 504 .startup = ar933x_uart_startup, 505 .shutdown = ar933x_uart_shutdown, 506 .set_termios = ar933x_uart_set_termios, 507 .type = ar933x_uart_type, 508 .release_port = ar933x_uart_release_port, 509 .request_port = ar933x_uart_request_port, 510 .config_port = ar933x_uart_config_port, 511 .verify_port = ar933x_uart_verify_port, 512 }; 513 514 static struct ar933x_uart_port * 515 ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS]; 516 517 static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up) 518 { 519 unsigned int status; 520 unsigned int timeout = 60000; 521 522 /* Wait up to 60ms for the character(s) to be sent. */ 523 do { 524 status = ar933x_uart_read(up, AR933X_UART_DATA_REG); 525 if (--timeout == 0) 526 break; 527 udelay(1); 528 } while ((status & AR933X_UART_DATA_TX_CSR) == 0); 529 } 530 531 static void ar933x_uart_console_putchar(struct uart_port *port, int ch) 532 { 533 struct ar933x_uart_port *up = 534 container_of(port, struct ar933x_uart_port, port); 535 536 ar933x_uart_wait_xmitr(up); 537 ar933x_uart_putc(up, ch); 538 } 539 540 static void ar933x_uart_console_write(struct console *co, const char *s, 541 unsigned int count) 542 { 543 struct ar933x_uart_port *up = ar933x_console_ports[co->index]; 544 unsigned long flags; 545 unsigned int int_en; 546 int locked = 1; 547 548 local_irq_save(flags); 549 550 if (up->port.sysrq) 551 locked = 0; 552 else if (oops_in_progress) 553 locked = spin_trylock(&up->port.lock); 554 else 555 spin_lock(&up->port.lock); 556 557 /* 558 * First save the IER then disable the interrupts 559 */ 560 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG); 561 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0); 562 563 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar); 564 565 /* 566 * Finally, wait for transmitter to become empty 567 * and restore the IER 568 */ 569 ar933x_uart_wait_xmitr(up); 570 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en); 571 572 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS); 573 574 if (locked) 575 spin_unlock(&up->port.lock); 576 577 local_irq_restore(flags); 578 } 579 580 static int ar933x_uart_console_setup(struct console *co, char *options) 581 { 582 struct ar933x_uart_port *up; 583 int baud = 115200; 584 int bits = 8; 585 int parity = 'n'; 586 int flow = 'n'; 587 588 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS) 589 return -EINVAL; 590 591 up = ar933x_console_ports[co->index]; 592 if (!up) 593 return -ENODEV; 594 595 if (options) 596 uart_parse_options(options, &baud, &parity, &bits, &flow); 597 598 return uart_set_options(&up->port, co, baud, parity, bits, flow); 599 } 600 601 static struct console ar933x_uart_console = { 602 .name = "ttyATH", 603 .write = ar933x_uart_console_write, 604 .device = uart_console_device, 605 .setup = ar933x_uart_console_setup, 606 .flags = CON_PRINTBUFFER, 607 .index = -1, 608 .data = &ar933x_uart_driver, 609 }; 610 611 static void ar933x_uart_add_console_port(struct ar933x_uart_port *up) 612 { 613 if (!ar933x_uart_console_enabled()) 614 return; 615 616 ar933x_console_ports[up->port.line] = up; 617 } 618 619 static struct uart_driver ar933x_uart_driver = { 620 .owner = THIS_MODULE, 621 .driver_name = DRIVER_NAME, 622 .dev_name = "ttyATH", 623 .nr = CONFIG_SERIAL_AR933X_NR_UARTS, 624 .cons = NULL, /* filled in runtime */ 625 }; 626 627 static int ar933x_uart_probe(struct platform_device *pdev) 628 { 629 struct ar933x_uart_port *up; 630 struct uart_port *port; 631 struct resource *mem_res; 632 struct resource *irq_res; 633 struct device_node *np; 634 unsigned int baud; 635 int id; 636 int ret; 637 638 np = pdev->dev.of_node; 639 if (config_enabled(CONFIG_OF) && np) { 640 id = of_alias_get_id(np, "serial"); 641 if (id < 0) { 642 dev_err(&pdev->dev, "unable to get alias id, err=%d\n", 643 id); 644 return id; 645 } 646 } else { 647 id = pdev->id; 648 if (id == -1) 649 id = 0; 650 } 651 652 if (id >= CONFIG_SERIAL_AR933X_NR_UARTS) 653 return -EINVAL; 654 655 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 656 if (!irq_res) { 657 dev_err(&pdev->dev, "no IRQ resource\n"); 658 return -EINVAL; 659 } 660 661 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port), 662 GFP_KERNEL); 663 if (!up) 664 return -ENOMEM; 665 666 up->clk = devm_clk_get(&pdev->dev, "uart"); 667 if (IS_ERR(up->clk)) { 668 dev_err(&pdev->dev, "unable to get UART clock\n"); 669 return PTR_ERR(up->clk); 670 } 671 672 port = &up->port; 673 674 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 675 port->membase = devm_ioremap_resource(&pdev->dev, mem_res); 676 if (IS_ERR(port->membase)) 677 return PTR_ERR(port->membase); 678 679 ret = clk_prepare_enable(up->clk); 680 if (ret) 681 return ret; 682 683 port->uartclk = clk_get_rate(up->clk); 684 if (!port->uartclk) { 685 ret = -EINVAL; 686 goto err_disable_clk; 687 } 688 689 port->mapbase = mem_res->start; 690 port->line = id; 691 port->irq = irq_res->start; 692 port->dev = &pdev->dev; 693 port->type = PORT_AR933X; 694 port->iotype = UPIO_MEM32; 695 696 port->regshift = 2; 697 port->fifosize = AR933X_UART_FIFO_SIZE; 698 port->ops = &ar933x_uart_ops; 699 700 baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1); 701 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD); 702 703 baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP); 704 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD); 705 706 ar933x_uart_add_console_port(up); 707 708 ret = uart_add_one_port(&ar933x_uart_driver, &up->port); 709 if (ret) 710 goto err_disable_clk; 711 712 platform_set_drvdata(pdev, up); 713 return 0; 714 715 err_disable_clk: 716 clk_disable_unprepare(up->clk); 717 return ret; 718 } 719 720 static int ar933x_uart_remove(struct platform_device *pdev) 721 { 722 struct ar933x_uart_port *up; 723 724 up = platform_get_drvdata(pdev); 725 726 if (up) { 727 uart_remove_one_port(&ar933x_uart_driver, &up->port); 728 clk_disable_unprepare(up->clk); 729 } 730 731 return 0; 732 } 733 734 #ifdef CONFIG_OF 735 static const struct of_device_id ar933x_uart_of_ids[] = { 736 { .compatible = "qca,ar9330-uart" }, 737 {}, 738 }; 739 MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids); 740 #endif 741 742 static struct platform_driver ar933x_uart_platform_driver = { 743 .probe = ar933x_uart_probe, 744 .remove = ar933x_uart_remove, 745 .driver = { 746 .name = DRIVER_NAME, 747 .of_match_table = of_match_ptr(ar933x_uart_of_ids), 748 }, 749 }; 750 751 static int __init ar933x_uart_init(void) 752 { 753 int ret; 754 755 if (ar933x_uart_console_enabled()) 756 ar933x_uart_driver.cons = &ar933x_uart_console; 757 758 ret = uart_register_driver(&ar933x_uart_driver); 759 if (ret) 760 goto err_out; 761 762 ret = platform_driver_register(&ar933x_uart_platform_driver); 763 if (ret) 764 goto err_unregister_uart_driver; 765 766 return 0; 767 768 err_unregister_uart_driver: 769 uart_unregister_driver(&ar933x_uart_driver); 770 err_out: 771 return ret; 772 } 773 774 static void __exit ar933x_uart_exit(void) 775 { 776 platform_driver_unregister(&ar933x_uart_platform_driver); 777 uart_unregister_driver(&ar933x_uart_driver); 778 } 779 780 module_init(ar933x_uart_init); 781 module_exit(ar933x_uart_exit); 782 783 MODULE_DESCRIPTION("Atheros AR933X UART driver"); 784 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); 785 MODULE_LICENSE("GPL v2"); 786 MODULE_ALIAS("platform:" DRIVER_NAME); 787