1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Serial Port driver for Open Firmware platform devices 4 * 5 * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp. 6 */ 7 8 #include <linux/bits.h> 9 #include <linux/console.h> 10 #include <linux/math.h> 11 #include <linux/module.h> 12 #include <linux/slab.h> 13 #include <linux/serial_core.h> 14 #include <linux/serial_reg.h> 15 #include <linux/of_address.h> 16 #include <linux/of_irq.h> 17 #include <linux/of_platform.h> 18 #include <linux/pm_runtime.h> 19 #include <linux/clk.h> 20 #include <linux/reset.h> 21 #include <linux/notifier.h> 22 23 #include "8250.h" 24 25 struct of_serial_info { 26 struct clk *clk; 27 struct reset_control *rst; 28 int type; 29 int line; 30 struct notifier_block clk_notifier; 31 }; 32 33 /* Nuvoton NPCM timeout register */ 34 #define UART_NPCM_TOR 7 35 #define UART_NPCM_TOIE BIT(7) /* Timeout Interrupt Enable */ 36 37 static int npcm_startup(struct uart_port *port) 38 { 39 /* 40 * Nuvoton calls the scratch register 'UART_TOR' (timeout 41 * register). Enable it, and set TIOC (timeout interrupt 42 * comparator) to be 0x20 for correct operation. 43 */ 44 serial_port_out(port, UART_NPCM_TOR, UART_NPCM_TOIE | 0x20); 45 46 return serial8250_do_startup(port); 47 } 48 49 /* Nuvoton NPCM UARTs have a custom divisor calculation */ 50 static unsigned int npcm_get_divisor(struct uart_port *port, unsigned int baud, 51 unsigned int *frac) 52 { 53 return DIV_ROUND_CLOSEST(port->uartclk, 16 * baud + 2) - 2; 54 } 55 56 static int npcm_setup(struct uart_port *port) 57 { 58 port->get_divisor = npcm_get_divisor; 59 port->startup = npcm_startup; 60 return 0; 61 } 62 63 static inline struct of_serial_info *clk_nb_to_info(struct notifier_block *nb) 64 { 65 return container_of(nb, struct of_serial_info, clk_notifier); 66 } 67 68 static int of_platform_serial_clk_notifier_cb(struct notifier_block *nb, unsigned long event, 69 void *data) 70 { 71 struct of_serial_info *info = clk_nb_to_info(nb); 72 struct uart_8250_port *port8250 = serial8250_get_port(info->line); 73 struct clk_notifier_data *ndata = data; 74 75 if (event == POST_RATE_CHANGE) { 76 serial8250_update_uartclk(&port8250->port, ndata->new_rate); 77 return NOTIFY_OK; 78 } 79 80 return NOTIFY_DONE; 81 } 82 83 /* 84 * Fill a struct uart_port for a given device node 85 */ 86 static int of_platform_serial_setup(struct platform_device *ofdev, 87 int type, struct uart_8250_port *up, 88 struct of_serial_info *info) 89 { 90 struct resource resource; 91 struct device *dev = &ofdev->dev; 92 struct device_node *np = dev->of_node; 93 struct uart_port *port = &up->port; 94 u32 spd; 95 int ret; 96 97 memset(port, 0, sizeof *port); 98 99 pm_runtime_enable(&ofdev->dev); 100 pm_runtime_get_sync(&ofdev->dev); 101 102 ret = of_address_to_resource(np, 0, &resource); 103 if (ret) { 104 dev_err_probe(dev, ret, "invalid address\n"); 105 goto err_pmruntime; 106 } 107 108 port->dev = &ofdev->dev; 109 port->flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_FIXED_TYPE; 110 spin_lock_init(&port->lock); 111 112 if (resource_type(&resource) == IORESOURCE_IO) { 113 port->iobase = resource.start; 114 } else { 115 port->mapbase = resource.start; 116 port->mapsize = resource_size(&resource); 117 port->flags |= UPF_IOREMAP; 118 } 119 120 ret = uart_read_and_validate_port_properties(port); 121 if (ret) 122 goto err_pmruntime; 123 124 /* Get clk rate through clk driver if present */ 125 if (!port->uartclk) { 126 info->clk = devm_clk_get_enabled(dev, NULL); 127 if (IS_ERR(info->clk)) { 128 ret = dev_err_probe(dev, PTR_ERR(info->clk), "failed to get clock\n"); 129 goto err_pmruntime; 130 } 131 132 port->uartclk = clk_get_rate(info->clk); 133 } 134 /* If current-speed was set, then try not to change it. */ 135 if (of_property_read_u32(np, "current-speed", &spd) == 0) 136 port->custom_divisor = port->uartclk / (16 * spd); 137 138 /* Compatibility with the deprecated pxa driver and 8250_pxa drivers. */ 139 if (of_device_is_compatible(np, "mrvl,mmp-uart")) 140 port->regshift = 2; 141 142 info->rst = devm_reset_control_get_optional_shared(&ofdev->dev, NULL); 143 if (IS_ERR(info->rst)) { 144 ret = PTR_ERR(info->rst); 145 goto err_pmruntime; 146 } 147 148 ret = reset_control_deassert(info->rst); 149 if (ret) 150 goto err_pmruntime; 151 152 port->type = type; 153 port->rs485_config = serial8250_em485_config; 154 port->rs485_supported = serial8250_em485_supported; 155 up->rs485_start_tx = serial8250_em485_start_tx; 156 up->rs485_stop_tx = serial8250_em485_stop_tx; 157 158 switch (type) { 159 case PORT_RT2880: 160 ret = rt288x_setup(port); 161 break; 162 case PORT_NPCM: 163 ret = npcm_setup(port); 164 break; 165 default: 166 /* Nothing to do */ 167 ret = 0; 168 break; 169 } 170 if (ret) 171 goto err_pmruntime; 172 173 if (IS_REACHABLE(CONFIG_SERIAL_8250_FSL) && 174 (of_device_is_compatible(np, "fsl,ns16550") || 175 of_device_is_compatible(np, "fsl,16550-FIFO64"))) { 176 port->handle_irq = fsl8250_handle_irq; 177 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE); 178 } 179 180 return 0; 181 err_pmruntime: 182 pm_runtime_put_sync(&ofdev->dev); 183 pm_runtime_disable(&ofdev->dev); 184 return ret; 185 } 186 187 /* 188 * Try to register a serial port 189 */ 190 static int of_platform_serial_probe(struct platform_device *ofdev) 191 { 192 struct of_serial_info *info; 193 struct uart_8250_port port8250; 194 unsigned int port_type; 195 u32 tx_threshold; 196 int ret; 197 198 if (IS_ENABLED(CONFIG_SERIAL_8250_BCM7271) && 199 of_device_is_compatible(ofdev->dev.of_node, "brcm,bcm7271-uart")) 200 return -ENODEV; 201 202 port_type = (unsigned long)of_device_get_match_data(&ofdev->dev); 203 if (port_type == PORT_UNKNOWN) 204 return -EINVAL; 205 206 if (of_property_read_bool(ofdev->dev.of_node, "used-by-rtas")) 207 return -EBUSY; 208 209 info = kzalloc(sizeof(*info), GFP_KERNEL); 210 if (info == NULL) 211 return -ENOMEM; 212 213 memset(&port8250, 0, sizeof(port8250)); 214 ret = of_platform_serial_setup(ofdev, port_type, &port8250, info); 215 if (ret) 216 goto err_free; 217 218 if (port8250.port.fifosize) 219 port8250.capabilities = UART_CAP_FIFO; 220 221 /* Check for TX FIFO threshold & set tx_loadsz */ 222 if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold", 223 &tx_threshold) == 0) && 224 (tx_threshold < port8250.port.fifosize)) 225 port8250.tx_loadsz = port8250.port.fifosize - tx_threshold; 226 227 if (of_property_read_bool(ofdev->dev.of_node, "auto-flow-control")) 228 port8250.capabilities |= UART_CAP_AFE; 229 230 if (of_property_read_u32(ofdev->dev.of_node, 231 "overrun-throttle-ms", 232 &port8250.overrun_backoff_time_ms) != 0) 233 port8250.overrun_backoff_time_ms = 0; 234 235 ret = serial8250_register_8250_port(&port8250); 236 if (ret < 0) 237 goto err_dispose; 238 239 info->type = port_type; 240 info->line = ret; 241 platform_set_drvdata(ofdev, info); 242 243 if (info->clk) { 244 info->clk_notifier.notifier_call = of_platform_serial_clk_notifier_cb; 245 ret = clk_notifier_register(info->clk, &info->clk_notifier); 246 if (ret) { 247 dev_err_probe(port8250.port.dev, ret, "Failed to set the clock notifier\n"); 248 goto err_unregister; 249 } 250 } 251 252 return 0; 253 err_unregister: 254 serial8250_unregister_port(info->line); 255 err_dispose: 256 pm_runtime_put_sync(&ofdev->dev); 257 pm_runtime_disable(&ofdev->dev); 258 err_free: 259 kfree(info); 260 return ret; 261 } 262 263 /* 264 * Release a line 265 */ 266 static void of_platform_serial_remove(struct platform_device *ofdev) 267 { 268 struct of_serial_info *info = platform_get_drvdata(ofdev); 269 270 if (info->clk) 271 clk_notifier_unregister(info->clk, &info->clk_notifier); 272 273 serial8250_unregister_port(info->line); 274 275 reset_control_assert(info->rst); 276 pm_runtime_put_sync(&ofdev->dev); 277 pm_runtime_disable(&ofdev->dev); 278 kfree(info); 279 } 280 281 #ifdef CONFIG_PM_SLEEP 282 static int of_serial_suspend(struct device *dev) 283 { 284 struct of_serial_info *info = dev_get_drvdata(dev); 285 struct uart_8250_port *port8250 = serial8250_get_port(info->line); 286 struct uart_port *port = &port8250->port; 287 288 serial8250_suspend_port(info->line); 289 290 if (!uart_console(port) || console_suspend_enabled) { 291 pm_runtime_put_sync(dev); 292 clk_disable_unprepare(info->clk); 293 } 294 return 0; 295 } 296 297 static int of_serial_resume(struct device *dev) 298 { 299 struct of_serial_info *info = dev_get_drvdata(dev); 300 struct uart_8250_port *port8250 = serial8250_get_port(info->line); 301 struct uart_port *port = &port8250->port; 302 303 if (!uart_console(port) || console_suspend_enabled) { 304 pm_runtime_get_sync(dev); 305 clk_prepare_enable(info->clk); 306 } 307 308 serial8250_resume_port(info->line); 309 310 return 0; 311 } 312 #endif 313 static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume); 314 315 /* 316 * A few common types, add more as needed. 317 */ 318 static const struct of_device_id of_platform_serial_table[] = { 319 { .compatible = "ns8250", .data = (void *)PORT_8250, }, 320 { .compatible = "ns16450", .data = (void *)PORT_16450, }, 321 { .compatible = "ns16550a", .data = (void *)PORT_16550A, }, 322 { .compatible = "ns16550", .data = (void *)PORT_16550, }, 323 { .compatible = "ns16750", .data = (void *)PORT_16750, }, 324 { .compatible = "ns16850", .data = (void *)PORT_16850, }, 325 { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, }, 326 { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, }, 327 { .compatible = "intel,xscale-uart", .data = (void *)PORT_XSCALE, }, 328 { .compatible = "altr,16550-FIFO32", 329 .data = (void *)PORT_ALTR_16550_F32, }, 330 { .compatible = "altr,16550-FIFO64", 331 .data = (void *)PORT_ALTR_16550_F64, }, 332 { .compatible = "altr,16550-FIFO128", 333 .data = (void *)PORT_ALTR_16550_F128, }, 334 { .compatible = "fsl,16550-FIFO64", 335 .data = (void *)PORT_16550A_FSL64, }, 336 { .compatible = "mediatek,mtk-btif", 337 .data = (void *)PORT_MTK_BTIF, }, 338 { .compatible = "mrvl,mmp-uart", 339 .data = (void *)PORT_XSCALE, }, 340 { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, }, 341 { .compatible = "nuvoton,wpcm450-uart", .data = (void *)PORT_NPCM, }, 342 { .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, }, 343 { /* end of list */ }, 344 }; 345 MODULE_DEVICE_TABLE(of, of_platform_serial_table); 346 347 static struct platform_driver of_platform_serial_driver = { 348 .driver = { 349 .name = "of_serial", 350 .of_match_table = of_platform_serial_table, 351 .pm = &of_serial_pm_ops, 352 }, 353 .probe = of_platform_serial_probe, 354 .remove = of_platform_serial_remove, 355 }; 356 357 module_platform_driver(of_platform_serial_driver); 358 359 MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>"); 360 MODULE_LICENSE("GPL"); 361 MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices"); 362