1 /* 2 * Mediatek 8250 driver. 3 * 4 * Copyright (c) 2014 MundoReader S.L. 5 * Author: Matthias Brugger <matthias.bgg@gmail.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 #include <linux/clk.h> 18 #include <linux/io.h> 19 #include <linux/module.h> 20 #include <linux/of_irq.h> 21 #include <linux/of_platform.h> 22 #include <linux/platform_device.h> 23 #include <linux/pm_runtime.h> 24 #include <linux/serial_8250.h> 25 #include <linux/serial_reg.h> 26 27 #include "8250.h" 28 29 #define UART_MTK_HIGHS 0x09 /* Highspeed register */ 30 #define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */ 31 #define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */ 32 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */ 33 34 struct mtk8250_data { 35 int line; 36 struct clk *uart_clk; 37 struct clk *bus_clk; 38 }; 39 40 static void 41 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios, 42 struct ktermios *old) 43 { 44 struct uart_8250_port *up = up_to_u8250p(port); 45 unsigned long flags; 46 unsigned int baud, quot; 47 48 serial8250_do_set_termios(port, termios, old); 49 50 /* 51 * Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS) 52 * 53 * We need to recalcualte the quot register, as the claculation depends 54 * on the vaule in the highspeed register. 55 * 56 * Some baudrates are not supported by the chip, so we use the next 57 * lower rate supported and update termios c_flag. 58 * 59 * If highspeed register is set to 3, we need to specify sample count 60 * and sample point to increase accuracy. If not, we reset the 61 * registers to their default values. 62 */ 63 baud = uart_get_baud_rate(port, termios, old, 64 port->uartclk / 16 / 0xffff, 65 port->uartclk / 16); 66 67 if (baud <= 115200) { 68 serial_port_out(port, UART_MTK_HIGHS, 0x0); 69 quot = uart_get_divisor(port, baud); 70 } else if (baud <= 576000) { 71 serial_port_out(port, UART_MTK_HIGHS, 0x2); 72 73 /* Set to next lower baudrate supported */ 74 if ((baud == 500000) || (baud == 576000)) 75 baud = 460800; 76 quot = DIV_ROUND_UP(port->uartclk, 4 * baud); 77 } else { 78 serial_port_out(port, UART_MTK_HIGHS, 0x3); 79 80 /* Set to highest baudrate supported */ 81 if (baud >= 1152000) 82 baud = 921600; 83 quot = DIV_ROUND_UP(port->uartclk, 256 * baud); 84 } 85 86 /* 87 * Ok, we're now changing the port state. Do it with 88 * interrupts disabled. 89 */ 90 spin_lock_irqsave(&port->lock, flags); 91 92 /* set DLAB we have cval saved in up->lcr from the call to the core */ 93 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB); 94 serial_dl_write(up, quot); 95 96 /* reset DLAB */ 97 serial_port_out(port, UART_LCR, up->lcr); 98 99 if (baud > 460800) { 100 unsigned int tmp; 101 102 tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud); 103 serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1); 104 serial_port_out(port, UART_MTK_SAMPLE_POINT, 105 (tmp - 2) >> 1); 106 } else { 107 serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00); 108 serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff); 109 } 110 111 spin_unlock_irqrestore(&port->lock, flags); 112 /* Don't rewrite B0 */ 113 if (tty_termios_baud_rate(termios)) 114 tty_termios_encode_baud_rate(termios, baud, baud); 115 } 116 117 static int __maybe_unused mtk8250_runtime_suspend(struct device *dev) 118 { 119 struct mtk8250_data *data = dev_get_drvdata(dev); 120 121 clk_disable_unprepare(data->uart_clk); 122 clk_disable_unprepare(data->bus_clk); 123 124 return 0; 125 } 126 127 static int __maybe_unused mtk8250_runtime_resume(struct device *dev) 128 { 129 struct mtk8250_data *data = dev_get_drvdata(dev); 130 int err; 131 132 err = clk_prepare_enable(data->uart_clk); 133 if (err) { 134 dev_warn(dev, "Can't enable clock\n"); 135 return err; 136 } 137 138 err = clk_prepare_enable(data->bus_clk); 139 if (err) { 140 dev_warn(dev, "Can't enable bus clock\n"); 141 return err; 142 } 143 144 return 0; 145 } 146 147 static void 148 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old) 149 { 150 if (!state) 151 pm_runtime_get_sync(port->dev); 152 153 serial8250_do_pm(port, state, old); 154 155 if (state) 156 pm_runtime_put_sync_suspend(port->dev); 157 } 158 159 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p, 160 struct mtk8250_data *data) 161 { 162 data->uart_clk = devm_clk_get(&pdev->dev, "baud"); 163 if (IS_ERR(data->uart_clk)) { 164 /* 165 * For compatibility with older device trees try unnamed 166 * clk when no baud clk can be found. 167 */ 168 data->uart_clk = devm_clk_get(&pdev->dev, NULL); 169 if (IS_ERR(data->uart_clk)) { 170 dev_warn(&pdev->dev, "Can't get uart clock\n"); 171 return PTR_ERR(data->uart_clk); 172 } 173 174 return 0; 175 } 176 177 data->bus_clk = devm_clk_get(&pdev->dev, "bus"); 178 if (IS_ERR(data->bus_clk)) 179 return PTR_ERR(data->bus_clk); 180 181 return 0; 182 } 183 184 static int mtk8250_probe(struct platform_device *pdev) 185 { 186 struct uart_8250_port uart = {}; 187 struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 188 struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 189 struct mtk8250_data *data; 190 int err; 191 192 if (!regs || !irq) { 193 dev_err(&pdev->dev, "no registers/irq defined\n"); 194 return -EINVAL; 195 } 196 197 uart.port.membase = devm_ioremap(&pdev->dev, regs->start, 198 resource_size(regs)); 199 if (!uart.port.membase) 200 return -ENOMEM; 201 202 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 203 if (!data) 204 return -ENOMEM; 205 206 if (pdev->dev.of_node) { 207 err = mtk8250_probe_of(pdev, &uart.port, data); 208 if (err) 209 return err; 210 } else 211 return -ENODEV; 212 213 spin_lock_init(&uart.port.lock); 214 uart.port.mapbase = regs->start; 215 uart.port.irq = irq->start; 216 uart.port.pm = mtk8250_do_pm; 217 uart.port.type = PORT_16550; 218 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; 219 uart.port.dev = &pdev->dev; 220 uart.port.iotype = UPIO_MEM32; 221 uart.port.regshift = 2; 222 uart.port.private_data = data; 223 uart.port.set_termios = mtk8250_set_termios; 224 uart.port.uartclk = clk_get_rate(data->uart_clk); 225 226 /* Disable Rate Fix function */ 227 writel(0x0, uart.port.membase + 228 (MTK_UART_RATE_FIX << uart.port.regshift)); 229 230 platform_set_drvdata(pdev, data); 231 232 pm_runtime_enable(&pdev->dev); 233 if (!pm_runtime_enabled(&pdev->dev)) { 234 err = mtk8250_runtime_resume(&pdev->dev); 235 if (err) 236 return err; 237 } 238 239 data->line = serial8250_register_8250_port(&uart); 240 if (data->line < 0) 241 return data->line; 242 243 return 0; 244 } 245 246 static int mtk8250_remove(struct platform_device *pdev) 247 { 248 struct mtk8250_data *data = platform_get_drvdata(pdev); 249 250 pm_runtime_get_sync(&pdev->dev); 251 252 serial8250_unregister_port(data->line); 253 254 pm_runtime_disable(&pdev->dev); 255 pm_runtime_put_noidle(&pdev->dev); 256 257 if (!pm_runtime_status_suspended(&pdev->dev)) 258 mtk8250_runtime_suspend(&pdev->dev); 259 260 return 0; 261 } 262 263 static int __maybe_unused mtk8250_suspend(struct device *dev) 264 { 265 struct mtk8250_data *data = dev_get_drvdata(dev); 266 267 serial8250_suspend_port(data->line); 268 269 return 0; 270 } 271 272 static int __maybe_unused mtk8250_resume(struct device *dev) 273 { 274 struct mtk8250_data *data = dev_get_drvdata(dev); 275 276 serial8250_resume_port(data->line); 277 278 return 0; 279 } 280 281 static const struct dev_pm_ops mtk8250_pm_ops = { 282 SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume) 283 SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume, 284 NULL) 285 }; 286 287 static const struct of_device_id mtk8250_of_match[] = { 288 { .compatible = "mediatek,mt6577-uart" }, 289 { /* Sentinel */ } 290 }; 291 MODULE_DEVICE_TABLE(of, mtk8250_of_match); 292 293 static struct platform_driver mtk8250_platform_driver = { 294 .driver = { 295 .name = "mt6577-uart", 296 .pm = &mtk8250_pm_ops, 297 .of_match_table = mtk8250_of_match, 298 }, 299 .probe = mtk8250_probe, 300 .remove = mtk8250_remove, 301 }; 302 module_platform_driver(mtk8250_platform_driver); 303 304 #if defined(CONFIG_SERIAL_8250_CONSOLE) && !defined(MODULE) 305 static int __init early_mtk8250_setup(struct earlycon_device *device, 306 const char *options) 307 { 308 if (!device->port.membase) 309 return -ENODEV; 310 311 device->port.iotype = UPIO_MEM32; 312 313 return early_serial8250_setup(device, NULL); 314 } 315 316 OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup); 317 #endif 318 319 MODULE_AUTHOR("Matthias Brugger"); 320 MODULE_LICENSE("GPL"); 321 MODULE_DESCRIPTION("Mediatek 8250 serial port driver"); 322