xref: /linux/drivers/tty/serial/8250/8250_mtk.c (revision 04eeb606a8383b306f4bc6991da8231b5f3924b0)
1 /*
2  * Mediatek 8250 driver.
3  *
4  * Copyright (c) 2014 MundoReader S.L.
5  * Author: Matthias Brugger <matthias.bgg@gmail.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  */
17 #include <linux/clk.h>
18 #include <linux/io.h>
19 #include <linux/module.h>
20 #include <linux/of_irq.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_device.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/serial_8250.h>
25 #include <linux/serial_reg.h>
26 
27 #include "8250.h"
28 
29 #define UART_MTK_HIGHS		0x09	/* Highspeed register */
30 #define UART_MTK_SAMPLE_COUNT	0x0a	/* Sample count register */
31 #define UART_MTK_SAMPLE_POINT	0x0b	/* Sample point register */
32 #define MTK_UART_RATE_FIX	0x0d	/* UART Rate Fix Register */
33 
34 struct mtk8250_data {
35 	int			line;
36 	struct clk		*uart_clk;
37 };
38 
39 static void
40 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
41 			struct ktermios *old)
42 {
43 	unsigned long flags;
44 	unsigned int baud, quot;
45 
46 	struct uart_8250_port *up =
47 		container_of(port, struct uart_8250_port, port);
48 
49 	serial8250_do_set_termios(port, termios, old);
50 
51 	/*
52 	 * Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS)
53 	 *
54 	 * We need to recalcualte the quot register, as the claculation depends
55 	 * on the vaule in the highspeed register.
56 	 *
57 	 * Some baudrates are not supported by the chip, so we use the next
58 	 * lower rate supported and update termios c_flag.
59 	 *
60 	 * If highspeed register is set to 3, we need to specify sample count
61 	 * and sample point to increase accuracy. If not, we reset the
62 	 * registers to their default values.
63 	 */
64 	baud = uart_get_baud_rate(port, termios, old,
65 				  port->uartclk / 16 / 0xffff,
66 				  port->uartclk / 16);
67 
68 	if (baud <= 115200) {
69 		serial_port_out(port, UART_MTK_HIGHS, 0x0);
70 		quot = uart_get_divisor(port, baud);
71 	} else if (baud <= 576000) {
72 		serial_port_out(port, UART_MTK_HIGHS, 0x2);
73 
74 		/* Set to next lower baudrate supported */
75 		if ((baud == 500000) || (baud == 576000))
76 			baud = 460800;
77 		quot = DIV_ROUND_CLOSEST(port->uartclk, 4 * baud);
78 	} else {
79 		serial_port_out(port, UART_MTK_HIGHS, 0x3);
80 
81 		/* Set to highest baudrate supported */
82 		if (baud >= 1152000)
83 			baud = 921600;
84 		quot = DIV_ROUND_CLOSEST(port->uartclk, 256 * baud);
85 	}
86 
87 	/*
88 	 * Ok, we're now changing the port state.  Do it with
89 	 * interrupts disabled.
90 	 */
91 	spin_lock_irqsave(&port->lock, flags);
92 
93 	/* set DLAB we have cval saved in up->lcr from the call to the core */
94 	serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
95 	serial_dl_write(up, quot);
96 
97 	/* reset DLAB */
98 	serial_port_out(port, UART_LCR, up->lcr);
99 
100 	if (baud > 460800) {
101 		unsigned int tmp;
102 
103 		tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud);
104 		serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1);
105 		serial_port_out(port, UART_MTK_SAMPLE_POINT,
106 					(tmp - 2) >> 1);
107 	} else {
108 		serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00);
109 		serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff);
110 	}
111 
112 	spin_unlock_irqrestore(&port->lock, flags);
113 	/* Don't rewrite B0 */
114 	if (tty_termios_baud_rate(termios))
115 		tty_termios_encode_baud_rate(termios, baud, baud);
116 }
117 
118 static void
119 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
120 {
121 	if (!state)
122 		pm_runtime_get_sync(port->dev);
123 
124 	serial8250_do_pm(port, state, old);
125 
126 	if (state)
127 		pm_runtime_put_sync_suspend(port->dev);
128 }
129 
130 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
131 			   struct mtk8250_data *data)
132 {
133 	int err;
134 	struct device_node *np = pdev->dev.of_node;
135 
136 	data->uart_clk = of_clk_get(np, 0);
137 	if (IS_ERR(data->uart_clk)) {
138 		dev_warn(&pdev->dev, "Can't get timer clock\n");
139 		return PTR_ERR(data->uart_clk);
140 	}
141 
142 	err = clk_prepare_enable(data->uart_clk);
143 	if (err) {
144 		dev_warn(&pdev->dev, "Can't prepare clock\n");
145 		clk_put(data->uart_clk);
146 		return err;
147 	}
148 	p->uartclk = clk_get_rate(data->uart_clk);
149 
150 	return 0;
151 }
152 
153 static int mtk8250_probe(struct platform_device *pdev)
154 {
155 	struct uart_8250_port uart = {};
156 	struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
157 	struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
158 	struct mtk8250_data *data;
159 	int err;
160 
161 	if (!regs || !irq) {
162 		dev_err(&pdev->dev, "no registers/irq defined\n");
163 		return -EINVAL;
164 	}
165 
166 	uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
167 					 resource_size(regs));
168 	if (!uart.port.membase)
169 		return -ENOMEM;
170 
171 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
172 	if (!data)
173 		return -ENOMEM;
174 
175 	if (pdev->dev.of_node) {
176 		err = mtk8250_probe_of(pdev, &uart.port, data);
177 		if (err)
178 			return err;
179 	} else
180 		return -ENODEV;
181 
182 	spin_lock_init(&uart.port.lock);
183 	uart.port.mapbase = regs->start;
184 	uart.port.irq = irq->start;
185 	uart.port.pm = mtk8250_do_pm;
186 	uart.port.type = PORT_16550;
187 	uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
188 	uart.port.dev = &pdev->dev;
189 	uart.port.iotype = UPIO_MEM32;
190 	uart.port.regshift = 2;
191 	uart.port.private_data = data;
192 	uart.port.set_termios = mtk8250_set_termios;
193 
194 	/* Disable Rate Fix function */
195 	writel(0x0, uart.port.membase +
196 			(MTK_UART_RATE_FIX << uart.port.regshift));
197 
198 	data->line = serial8250_register_8250_port(&uart);
199 	if (data->line < 0)
200 		return data->line;
201 
202 	platform_set_drvdata(pdev, data);
203 
204 	pm_runtime_set_active(&pdev->dev);
205 	pm_runtime_enable(&pdev->dev);
206 
207 	return 0;
208 }
209 
210 static int mtk8250_remove(struct platform_device *pdev)
211 {
212 	struct mtk8250_data *data = platform_get_drvdata(pdev);
213 
214 	pm_runtime_get_sync(&pdev->dev);
215 
216 	serial8250_unregister_port(data->line);
217 	if (!IS_ERR(data->uart_clk)) {
218 		clk_disable_unprepare(data->uart_clk);
219 		clk_put(data->uart_clk);
220 	}
221 
222 	pm_runtime_disable(&pdev->dev);
223 	pm_runtime_put_noidle(&pdev->dev);
224 	return 0;
225 }
226 
227 #ifdef CONFIG_PM_SLEEP
228 static int mtk8250_suspend(struct device *dev)
229 {
230 	struct mtk8250_data *data = dev_get_drvdata(dev);
231 
232 	serial8250_suspend_port(data->line);
233 
234 	return 0;
235 }
236 
237 static int mtk8250_resume(struct device *dev)
238 {
239 	struct mtk8250_data *data = dev_get_drvdata(dev);
240 
241 	serial8250_resume_port(data->line);
242 
243 	return 0;
244 }
245 #endif /* CONFIG_PM_SLEEP */
246 
247 #ifdef CONFIG_PM_RUNTIME
248 static int mtk8250_runtime_suspend(struct device *dev)
249 {
250 	struct mtk8250_data *data = dev_get_drvdata(dev);
251 
252 	if (!IS_ERR(data->uart_clk))
253 		clk_disable_unprepare(data->uart_clk);
254 
255 	return 0;
256 }
257 
258 static int mtk8250_runtime_resume(struct device *dev)
259 {
260 	struct mtk8250_data *data = dev_get_drvdata(dev);
261 
262 	if (!IS_ERR(data->uart_clk))
263 		clk_prepare_enable(data->uart_clk);
264 
265 	return 0;
266 }
267 #endif
268 
269 static const struct dev_pm_ops mtk8250_pm_ops = {
270 	SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
271 	SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
272 				NULL)
273 };
274 
275 static const struct of_device_id mtk8250_of_match[] = {
276 	{ .compatible = "mediatek,mt6577-uart" },
277 	{ /* Sentinel */ }
278 };
279 MODULE_DEVICE_TABLE(of, mtk8250_of_match);
280 
281 static struct platform_driver mtk8250_platform_driver = {
282 	.driver = {
283 		.name		= "mt6577-uart",
284 		.pm		= &mtk8250_pm_ops,
285 		.of_match_table	= mtk8250_of_match,
286 	},
287 	.probe			= mtk8250_probe,
288 	.remove			= mtk8250_remove,
289 };
290 module_platform_driver(mtk8250_platform_driver);
291 
292 MODULE_AUTHOR("Matthias Brugger");
293 MODULE_LICENSE("GPL");
294 MODULE_DESCRIPTION("Mediatek 8250 serial port driver");
295