xref: /linux/drivers/tty/serial/8250/8250_loongson.c (revision d30c1683aaecb93d2ab95685dc4300a33d3cea7a)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Serial Port driver for Loongson family chips
4  *
5  * Copyright (C) 2020-2025 Loongson Technology Corporation Limited
6  */
7 
8 #include <linux/bitfield.h>
9 #include <linux/bits.h>
10 #include <linux/clk.h>
11 #include <linux/console.h>
12 #include <linux/module.h>
13 #include <linux/io.h>
14 #include <linux/property.h>
15 #include <linux/math.h>
16 #include <linux/mod_devicetable.h>
17 #include <linux/pm.h>
18 #include <linux/reset.h>
19 
20 #include "8250.h"
21 
22 /* Divisor Latch Fraction Register */
23 #define LOONGSON_UART_DLF		0x2
24 
25 #define LOONGSON_QUOT_FRAC_MASK		GENMASK(7, 0)
26 #define LOONGSON_QUOT_DIV_MASK		GENMASK(15, 8)
27 
28 struct loongson_uart_ddata {
29 	bool has_frac;
30 	u8 mcr_invert;
31 	u8 msr_invert;
32 };
33 
34 static const struct loongson_uart_ddata ls2k0500_uart_data = {
35 	.has_frac = false,
36 	.mcr_invert = UART_MCR_RTS | UART_MCR_DTR,
37 	.msr_invert = UART_MSR_CTS | UART_MSR_DSR,
38 };
39 
40 static const struct loongson_uart_ddata ls2k1500_uart_data = {
41 	.has_frac = true,
42 	.mcr_invert = UART_MCR_RTS | UART_MCR_DTR,
43 	.msr_invert = 0,
44 };
45 
46 struct loongson_uart_priv {
47 	int line;
48 	struct clk *clk;
49 	struct resource *res;
50 	struct reset_control *rst;
51 	const struct loongson_uart_ddata *ddata;
52 };
53 
54 static u8 serial_fixup(struct uart_port *p, unsigned int offset, u8 val)
55 {
56 	struct loongson_uart_priv *priv = p->private_data;
57 
58 	switch (offset) {
59 	case UART_MCR:
60 		return val ^ priv->ddata->mcr_invert;
61 	case UART_MSR:
62 		return val ^ priv->ddata->msr_invert;
63 	default:
64 		return val;
65 	}
66 }
67 
68 static u32 loongson_serial_in(struct uart_port *p, unsigned int offset)
69 {
70 	u8 val;
71 
72 	val = readb(p->membase + (offset << p->regshift));
73 
74 	return serial_fixup(p, offset, val);
75 }
76 
77 static void loongson_serial_out(struct uart_port *p, unsigned int offset, unsigned int value)
78 {
79 	u8 val;
80 
81 	offset <<= p->regshift;
82 	val = serial_fixup(p, offset, value);
83 	writeb(val, p->membase + offset);
84 }
85 
86 static unsigned int loongson_frac_get_divisor(struct uart_port *port, unsigned int baud,
87 					      unsigned int *frac)
88 {
89 	unsigned int quot;
90 
91 	quot = DIV_ROUND_CLOSEST((port->uartclk << 4), baud);
92 	*frac = FIELD_GET(LOONGSON_QUOT_FRAC_MASK, quot);
93 
94 	return FIELD_GET(LOONGSON_QUOT_DIV_MASK, quot);
95 }
96 
97 static void loongson_frac_set_divisor(struct uart_port *port, unsigned int baud,
98 				      unsigned int quot, unsigned int quot_frac)
99 {
100 	struct uart_8250_port *up = up_to_u8250p(port);
101 
102 	serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
103 	serial_dl_write(up, quot);
104 	serial_port_out(port, LOONGSON_UART_DLF, quot_frac);
105 }
106 
107 static int loongson_uart_probe(struct platform_device *pdev)
108 {
109 	struct device *dev = &pdev->dev;
110 	struct uart_8250_port uart = {};
111 	struct loongson_uart_priv *priv;
112 	struct uart_port *port;
113 	int ret;
114 
115 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
116 	if (!priv)
117 		return -ENOMEM;
118 
119 	priv->ddata = device_get_match_data(dev);
120 
121 	port = &uart.port;
122 	spin_lock_init(&port->lock);
123 	port->flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE | UPF_IOREMAP;
124 	port->iotype = UPIO_MEM;
125 	port->regshift = 0;
126 	port->dev = dev;
127 	port->type = PORT_16550A;
128 	port->private_data = priv;
129 
130 	port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &priv->res);
131 	if (IS_ERR(port->membase))
132 		return PTR_ERR(port->membase);
133 
134 	port->mapbase = priv->res->start;
135 	port->mapsize = resource_size(priv->res);
136 	port->serial_in = loongson_serial_in;
137 	port->serial_out = loongson_serial_out;
138 
139 	if (priv->ddata->has_frac) {
140 		port->get_divisor = loongson_frac_get_divisor;
141 		port->set_divisor = loongson_frac_set_divisor;
142 	}
143 
144 	ret = uart_read_port_properties(port);
145 	if (ret)
146 		return ret;
147 
148 	if (!port->uartclk) {
149 		priv->clk = devm_clk_get_enabled(dev, NULL);
150 		if (IS_ERR(priv->clk))
151 			return dev_err_probe(dev, PTR_ERR(priv->clk),
152 					     "Unable to determine clock frequency!\n");
153 		port->uartclk = clk_get_rate(priv->clk);
154 	}
155 
156 	priv->rst = devm_reset_control_get_optional_shared(dev, NULL);
157 	if (IS_ERR(priv->rst))
158 		return PTR_ERR(priv->rst);
159 
160 	ret = reset_control_deassert(priv->rst);
161 	if (ret)
162 		return ret;
163 
164 	ret = serial8250_register_8250_port(&uart);
165 	if (ret < 0) {
166 		reset_control_assert(priv->rst);
167 		return ret;
168 	}
169 
170 	priv->line = ret;
171 	platform_set_drvdata(pdev, priv);
172 
173 	return 0;
174 }
175 
176 static void loongson_uart_remove(struct platform_device *pdev)
177 {
178 	struct loongson_uart_priv *priv = platform_get_drvdata(pdev);
179 
180 	serial8250_unregister_port(priv->line);
181 	reset_control_assert(priv->rst);
182 }
183 
184 static int loongson_uart_suspend(struct device *dev)
185 {
186 	struct loongson_uart_priv *priv = dev_get_drvdata(dev);
187 	struct uart_8250_port *up = serial8250_get_port(priv->line);
188 
189 	serial8250_suspend_port(priv->line);
190 
191 	if (!uart_console(&up->port) || console_suspend_enabled)
192 		clk_disable_unprepare(priv->clk);
193 
194 	return 0;
195 }
196 
197 static int loongson_uart_resume(struct device *dev)
198 {
199 	struct loongson_uart_priv *priv = dev_get_drvdata(dev);
200 	struct uart_8250_port *up = serial8250_get_port(priv->line);
201 	int ret;
202 
203 	if (!uart_console(&up->port) || console_suspend_enabled) {
204 		ret = clk_prepare_enable(priv->clk);
205 		if (ret)
206 			return ret;
207 	}
208 
209 	serial8250_resume_port(priv->line);
210 
211 	return 0;
212 }
213 
214 static DEFINE_SIMPLE_DEV_PM_OPS(loongson_uart_pm_ops, loongson_uart_suspend,
215 				loongson_uart_resume);
216 
217 static const struct of_device_id loongson_uart_of_ids[] = {
218 	{ .compatible = "loongson,ls2k0500-uart", .data = &ls2k0500_uart_data },
219 	{ .compatible = "loongson,ls2k1500-uart", .data = &ls2k1500_uart_data },
220 	{ },
221 };
222 MODULE_DEVICE_TABLE(of, loongson_uart_of_ids);
223 
224 static struct platform_driver loongson_uart_driver = {
225 	.probe = loongson_uart_probe,
226 	.remove = loongson_uart_remove,
227 	.driver = {
228 		.name = "loongson-uart",
229 		.pm = pm_ptr(&loongson_uart_pm_ops),
230 		.of_match_table = loongson_uart_of_ids,
231 	},
232 };
233 
234 module_platform_driver(loongson_uart_driver);
235 
236 MODULE_DESCRIPTION("Loongson UART driver");
237 MODULE_AUTHOR("Loongson Technology Corporation Limited.");
238 MODULE_LICENSE("GPL");
239