1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * 8250_dma.c - DMA Engine API support for 8250.c 4 * 5 * Copyright (C) 2013 Intel Corporation 6 */ 7 #include <linux/tty.h> 8 #include <linux/tty_flip.h> 9 #include <linux/serial_reg.h> 10 #include <linux/dma-mapping.h> 11 12 #include "8250.h" 13 14 static void __dma_tx_complete(void *param) 15 { 16 struct uart_8250_port *p = param; 17 struct uart_8250_dma *dma = p->dma; 18 struct tty_port *tport = &p->port.state->port; 19 unsigned long flags; 20 int ret; 21 22 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, 23 UART_XMIT_SIZE, DMA_TO_DEVICE); 24 25 uart_port_lock_irqsave(&p->port, &flags); 26 27 dma->tx_running = 0; 28 29 uart_xmit_advance(&p->port, dma->tx_size); 30 31 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) 32 uart_write_wakeup(&p->port); 33 34 ret = serial8250_tx_dma(p); 35 if (ret || !dma->tx_running) 36 serial8250_set_THRI(p); 37 38 uart_port_unlock_irqrestore(&p->port, flags); 39 } 40 41 static void __dma_rx_complete(struct uart_8250_port *p) 42 { 43 struct uart_8250_dma *dma = p->dma; 44 struct tty_port *tty_port = &p->port.state->port; 45 struct dma_tx_state state; 46 enum dma_status dma_status; 47 int count; 48 49 /* 50 * New DMA Rx can be started during the completion handler before it 51 * could acquire port's lock and it might still be ongoing. Don't to 52 * anything in such case. 53 */ 54 dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); 55 if (dma_status == DMA_IN_PROGRESS) 56 return; 57 58 count = dma->rx_size - state.residue; 59 60 tty_insert_flip_string(tty_port, dma->rx_buf, count); 61 p->port.icount.rx += count; 62 dma->rx_running = 0; 63 64 tty_flip_buffer_push(tty_port); 65 } 66 67 static void dma_rx_complete(void *param) 68 { 69 struct uart_8250_port *p = param; 70 struct uart_8250_dma *dma = p->dma; 71 unsigned long flags; 72 73 uart_port_lock_irqsave(&p->port, &flags); 74 if (dma->rx_running) 75 __dma_rx_complete(p); 76 77 /* 78 * Cannot be combined with the previous check because __dma_rx_complete() 79 * changes dma->rx_running. 80 */ 81 if (!dma->rx_running && (serial_lsr_in(p) & UART_LSR_DR)) 82 p->dma->rx_dma(p); 83 uart_port_unlock_irqrestore(&p->port, flags); 84 } 85 86 int serial8250_tx_dma(struct uart_8250_port *p) 87 { 88 struct uart_8250_dma *dma = p->dma; 89 struct tty_port *tport = &p->port.state->port; 90 struct dma_async_tx_descriptor *desc; 91 struct uart_port *up = &p->port; 92 struct scatterlist sg; 93 int ret; 94 95 if (dma->tx_running) { 96 if (up->x_char) { 97 dmaengine_pause(dma->txchan); 98 uart_xchar_out(up, UART_TX); 99 dmaengine_resume(dma->txchan); 100 } 101 return 0; 102 } else if (up->x_char) { 103 uart_xchar_out(up, UART_TX); 104 } 105 106 if (uart_tx_stopped(&p->port) || kfifo_is_empty(&tport->xmit_fifo)) { 107 /* We have been called from __dma_tx_complete() */ 108 return 0; 109 } 110 111 serial8250_do_prepare_tx_dma(p); 112 113 sg_init_table(&sg, 1); 114 /* kfifo can do more than one sg, we don't (quite yet) */ 115 ret = kfifo_dma_out_prepare_mapped(&tport->xmit_fifo, &sg, 1, 116 UART_XMIT_SIZE, dma->tx_addr); 117 118 /* we already checked empty fifo above, so there should be something */ 119 if (WARN_ON_ONCE(ret != 1)) 120 return 0; 121 122 dma->tx_size = sg_dma_len(&sg); 123 124 desc = dmaengine_prep_slave_sg(dma->txchan, &sg, 1, 125 DMA_MEM_TO_DEV, 126 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 127 if (!desc) { 128 ret = -EBUSY; 129 goto err; 130 } 131 132 dma->tx_running = 1; 133 desc->callback = __dma_tx_complete; 134 desc->callback_param = p; 135 136 dma->tx_cookie = dmaengine_submit(desc); 137 138 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr, 139 UART_XMIT_SIZE, DMA_TO_DEVICE); 140 141 dma_async_issue_pending(dma->txchan); 142 serial8250_clear_THRI(p); 143 dma->tx_err = 0; 144 145 return 0; 146 err: 147 dma->tx_err = 1; 148 return ret; 149 } 150 151 int serial8250_rx_dma(struct uart_8250_port *p) 152 { 153 struct uart_8250_dma *dma = p->dma; 154 struct dma_async_tx_descriptor *desc; 155 156 if (dma->rx_running) 157 return 0; 158 159 serial8250_do_prepare_rx_dma(p); 160 161 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, 162 dma->rx_size, DMA_DEV_TO_MEM, 163 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 164 if (!desc) 165 return -EBUSY; 166 167 dma->rx_running = 1; 168 desc->callback = dma_rx_complete; 169 desc->callback_param = p; 170 171 dma->rx_cookie = dmaengine_submit(desc); 172 173 dma_async_issue_pending(dma->rxchan); 174 175 return 0; 176 } 177 178 void serial8250_rx_dma_flush(struct uart_8250_port *p) 179 { 180 struct uart_8250_dma *dma = p->dma; 181 182 if (dma->rx_running) { 183 dmaengine_pause(dma->rxchan); 184 __dma_rx_complete(p); 185 dmaengine_terminate_async(dma->rxchan); 186 } 187 } 188 EXPORT_SYMBOL_GPL(serial8250_rx_dma_flush); 189 190 int serial8250_request_dma(struct uart_8250_port *p) 191 { 192 struct uart_8250_dma *dma = p->dma; 193 phys_addr_t rx_dma_addr = dma->rx_dma_addr ? 194 dma->rx_dma_addr : p->port.mapbase; 195 phys_addr_t tx_dma_addr = dma->tx_dma_addr ? 196 dma->tx_dma_addr : p->port.mapbase; 197 dma_cap_mask_t mask; 198 struct dma_slave_caps caps; 199 int ret; 200 201 /* Default slave configuration parameters */ 202 dma->rxconf.direction = DMA_DEV_TO_MEM; 203 dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 204 dma->rxconf.src_addr = rx_dma_addr + UART_RX; 205 206 dma->txconf.direction = DMA_MEM_TO_DEV; 207 dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 208 dma->txconf.dst_addr = tx_dma_addr + UART_TX; 209 210 dma_cap_zero(mask); 211 dma_cap_set(DMA_SLAVE, mask); 212 213 /* Get a channel for RX */ 214 dma->rxchan = dma_request_slave_channel_compat(mask, 215 dma->fn, dma->rx_param, 216 p->port.dev, "rx"); 217 if (!dma->rxchan) 218 return -ENODEV; 219 220 /* 8250 rx dma requires dmaengine driver to support pause/terminate */ 221 ret = dma_get_slave_caps(dma->rxchan, &caps); 222 if (ret) 223 goto release_rx; 224 if (!caps.cmd_pause || !caps.cmd_terminate || 225 caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR) { 226 ret = -EINVAL; 227 goto release_rx; 228 } 229 230 dmaengine_slave_config(dma->rxchan, &dma->rxconf); 231 232 /* Get a channel for TX */ 233 dma->txchan = dma_request_slave_channel_compat(mask, 234 dma->fn, dma->tx_param, 235 p->port.dev, "tx"); 236 if (!dma->txchan) { 237 ret = -ENODEV; 238 goto release_rx; 239 } 240 241 /* 8250 tx dma requires dmaengine driver to support terminate */ 242 ret = dma_get_slave_caps(dma->txchan, &caps); 243 if (ret) 244 goto err; 245 if (!caps.cmd_terminate) { 246 ret = -EINVAL; 247 goto err; 248 } 249 250 dmaengine_slave_config(dma->txchan, &dma->txconf); 251 252 /* RX buffer */ 253 if (!dma->rx_size) 254 dma->rx_size = PAGE_SIZE; 255 256 dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size, 257 &dma->rx_addr, GFP_KERNEL); 258 if (!dma->rx_buf) { 259 ret = -ENOMEM; 260 goto err; 261 } 262 263 /* TX buffer */ 264 dma->tx_addr = dma_map_single(dma->txchan->device->dev, 265 p->port.state->port.xmit_buf, 266 UART_XMIT_SIZE, 267 DMA_TO_DEVICE); 268 if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) { 269 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, 270 dma->rx_buf, dma->rx_addr); 271 ret = -ENOMEM; 272 goto err; 273 } 274 275 dev_dbg_ratelimited(p->port.dev, "got both dma channels\n"); 276 277 return 0; 278 err: 279 dma_release_channel(dma->txchan); 280 release_rx: 281 dma_release_channel(dma->rxchan); 282 return ret; 283 } 284 EXPORT_SYMBOL_GPL(serial8250_request_dma); 285 286 void serial8250_release_dma(struct uart_8250_port *p) 287 { 288 struct uart_8250_dma *dma = p->dma; 289 290 if (!dma) 291 return; 292 293 /* Release RX resources */ 294 dmaengine_terminate_sync(dma->rxchan); 295 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf, 296 dma->rx_addr); 297 dma_release_channel(dma->rxchan); 298 dma->rxchan = NULL; 299 300 /* Release TX resources */ 301 dmaengine_terminate_sync(dma->txchan); 302 dma_unmap_single(dma->txchan->device->dev, dma->tx_addr, 303 UART_XMIT_SIZE, DMA_TO_DEVICE); 304 dma_release_channel(dma->txchan); 305 dma->txchan = NULL; 306 dma->tx_running = 0; 307 308 dev_dbg_ratelimited(p->port.dev, "dma channels released\n"); 309 } 310 EXPORT_SYMBOL_GPL(serial8250_release_dma); 311