1 /* 2 * Driver for 8250/16550-type serial ports 3 * 4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 5 * 6 * Copyright (C) 2001 Russell King. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 */ 13 14 #include <linux/serial_8250.h> 15 #include <linux/serial_reg.h> 16 #include <linux/dmaengine.h> 17 18 struct uart_8250_dma { 19 int (*tx_dma)(struct uart_8250_port *p); 20 int (*rx_dma)(struct uart_8250_port *p, unsigned int iir); 21 22 /* Filter function */ 23 dma_filter_fn fn; 24 25 /* Parameter to the filter function */ 26 void *rx_param; 27 void *tx_param; 28 29 struct dma_slave_config rxconf; 30 struct dma_slave_config txconf; 31 32 struct dma_chan *rxchan; 33 struct dma_chan *txchan; 34 35 dma_addr_t rx_addr; 36 dma_addr_t tx_addr; 37 38 dma_cookie_t rx_cookie; 39 dma_cookie_t tx_cookie; 40 41 void *rx_buf; 42 43 size_t rx_size; 44 size_t tx_size; 45 46 unsigned char tx_running:1; 47 unsigned char tx_err: 1; 48 unsigned char rx_running:1; 49 }; 50 51 struct old_serial_port { 52 unsigned int uart; 53 unsigned int baud_base; 54 unsigned int port; 55 unsigned int irq; 56 unsigned int flags; 57 unsigned char hub6; 58 unsigned char io_type; 59 unsigned char __iomem *iomem_base; 60 unsigned short iomem_reg_shift; 61 unsigned long irqflags; 62 }; 63 64 struct serial8250_config { 65 const char *name; 66 unsigned short fifo_size; 67 unsigned short tx_loadsz; 68 unsigned char fcr; 69 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE]; 70 unsigned int flags; 71 }; 72 73 #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */ 74 #define UART_CAP_EFR (1 << 9) /* UART has EFR */ 75 #define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */ 76 #define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */ 77 #define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */ 78 #define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */ 79 #define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */ 80 #define UART_CAP_RPM (1 << 15) /* Runtime PM is active while idle */ 81 82 #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */ 83 #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */ 84 #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */ 85 #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */ 86 #define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */ 87 88 #define PROBE_RSA (1 << 0) 89 #define PROBE_ANY (~0) 90 91 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8) 92 93 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ 94 #define SERIAL8250_SHARE_IRQS 1 95 #else 96 #define SERIAL8250_SHARE_IRQS 0 97 #endif 98 99 static inline int serial_in(struct uart_8250_port *up, int offset) 100 { 101 return up->port.serial_in(&up->port, offset); 102 } 103 104 static inline void serial_out(struct uart_8250_port *up, int offset, int value) 105 { 106 up->port.serial_out(&up->port, offset, value); 107 } 108 109 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p); 110 111 static inline int serial_dl_read(struct uart_8250_port *up) 112 { 113 return up->dl_read(up); 114 } 115 116 static inline void serial_dl_write(struct uart_8250_port *up, int value) 117 { 118 up->dl_write(up, value); 119 } 120 121 struct uart_8250_port *serial8250_get_port(int line); 122 void serial8250_rpm_get(struct uart_8250_port *p); 123 void serial8250_rpm_put(struct uart_8250_port *p); 124 125 #if defined(__alpha__) && !defined(CONFIG_PCI) 126 /* 127 * Digital did something really horribly wrong with the OUT1 and OUT2 128 * lines on at least some ALPHA's. The failure mode is that if either 129 * is cleared, the machine locks up with endless interrupts. 130 */ 131 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1) 132 #else 133 #define ALPHA_KLUDGE_MCR 0 134 #endif 135 136 #ifdef CONFIG_SERIAL_8250_PNP 137 int serial8250_pnp_init(void); 138 void serial8250_pnp_exit(void); 139 #else 140 static inline int serial8250_pnp_init(void) { return 0; } 141 static inline void serial8250_pnp_exit(void) { } 142 #endif 143 144 #ifdef CONFIG_ARCH_OMAP1 145 static inline int is_omap1_8250(struct uart_8250_port *pt) 146 { 147 int res; 148 149 switch (pt->port.mapbase) { 150 case OMAP1_UART1_BASE: 151 case OMAP1_UART2_BASE: 152 case OMAP1_UART3_BASE: 153 res = 1; 154 break; 155 default: 156 res = 0; 157 break; 158 } 159 160 return res; 161 } 162 163 static inline int is_omap1510_8250(struct uart_8250_port *pt) 164 { 165 if (!cpu_is_omap1510()) 166 return 0; 167 168 return is_omap1_8250(pt); 169 } 170 #else 171 static inline int is_omap1_8250(struct uart_8250_port *pt) 172 { 173 return 0; 174 } 175 static inline int is_omap1510_8250(struct uart_8250_port *pt) 176 { 177 return 0; 178 } 179 #endif 180 181 #ifdef CONFIG_SERIAL_8250_DMA 182 extern int serial8250_tx_dma(struct uart_8250_port *); 183 extern int serial8250_rx_dma(struct uart_8250_port *, unsigned int iir); 184 extern int serial8250_request_dma(struct uart_8250_port *); 185 extern void serial8250_release_dma(struct uart_8250_port *); 186 #else 187 static inline int serial8250_tx_dma(struct uart_8250_port *p) 188 { 189 return -1; 190 } 191 static inline int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) 192 { 193 return -1; 194 } 195 static inline int serial8250_request_dma(struct uart_8250_port *p) 196 { 197 return -1; 198 } 199 static inline void serial8250_release_dma(struct uart_8250_port *p) { } 200 #endif 201