1 /* 2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver. 3 * 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com). 5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com> 6 * 7 * This code is loosely based on the 1.8 moxa driver which is based on 8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and 9 * others. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox 17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on 18 * www.moxa.com. 19 * - Fixed x86_64 cleanness 20 */ 21 22 #include <linux/module.h> 23 #include <linux/errno.h> 24 #include <linux/signal.h> 25 #include <linux/sched.h> 26 #include <linux/timer.h> 27 #include <linux/interrupt.h> 28 #include <linux/tty.h> 29 #include <linux/tty_flip.h> 30 #include <linux/serial.h> 31 #include <linux/serial_reg.h> 32 #include <linux/major.h> 33 #include <linux/string.h> 34 #include <linux/fcntl.h> 35 #include <linux/ptrace.h> 36 #include <linux/ioport.h> 37 #include <linux/mm.h> 38 #include <linux/delay.h> 39 #include <linux/pci.h> 40 #include <linux/bitops.h> 41 #include <linux/slab.h> 42 #include <linux/ratelimit.h> 43 44 #include <asm/system.h> 45 #include <asm/io.h> 46 #include <asm/irq.h> 47 #include <asm/uaccess.h> 48 49 #include "mxser.h" 50 51 #define MXSER_VERSION "2.0.5" /* 1.14 */ 52 #define MXSERMAJOR 174 53 54 #define MXSER_BOARDS 4 /* Max. boards */ 55 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */ 56 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD) 57 #define MXSER_ISR_PASS_LIMIT 100 58 59 /*CheckIsMoxaMust return value*/ 60 #define MOXA_OTHER_UART 0x00 61 #define MOXA_MUST_MU150_HWID 0x01 62 #define MOXA_MUST_MU860_HWID 0x02 63 64 #define WAKEUP_CHARS 256 65 66 #define UART_MCR_AFE 0x20 67 #define UART_LSR_SPECIAL 0x1E 68 69 #define PCI_DEVICE_ID_POS104UL 0x1044 70 #define PCI_DEVICE_ID_CB108 0x1080 71 #define PCI_DEVICE_ID_CP102UF 0x1023 72 #define PCI_DEVICE_ID_CP112UL 0x1120 73 #define PCI_DEVICE_ID_CB114 0x1142 74 #define PCI_DEVICE_ID_CP114UL 0x1143 75 #define PCI_DEVICE_ID_CB134I 0x1341 76 #define PCI_DEVICE_ID_CP138U 0x1380 77 78 79 #define C168_ASIC_ID 1 80 #define C104_ASIC_ID 2 81 #define C102_ASIC_ID 0xB 82 #define CI132_ASIC_ID 4 83 #define CI134_ASIC_ID 3 84 #define CI104J_ASIC_ID 5 85 86 #define MXSER_HIGHBAUD 1 87 #define MXSER_HAS2 2 88 89 /* This is only for PCI */ 90 static const struct { 91 int type; 92 int tx_fifo; 93 int rx_fifo; 94 int xmit_fifo_size; 95 int rx_high_water; 96 int rx_trigger; 97 int rx_low_water; 98 long max_baud; 99 } Gpci_uart_info[] = { 100 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L}, 101 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L}, 102 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L} 103 }; 104 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info) 105 106 struct mxser_cardinfo { 107 char *name; 108 unsigned int nports; 109 unsigned int flags; 110 }; 111 112 static const struct mxser_cardinfo mxser_cards[] = { 113 /* 0*/ { "C168 series", 8, }, 114 { "C104 series", 4, }, 115 { "CI-104J series", 4, }, 116 { "C168H/PCI series", 8, }, 117 { "C104H/PCI series", 4, }, 118 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */ 119 { "CI-132 series", 4, MXSER_HAS2 }, 120 { "CI-134 series", 4, }, 121 { "CP-132 series", 2, }, 122 { "CP-114 series", 4, }, 123 /*10*/ { "CT-114 series", 4, }, 124 { "CP-102 series", 2, MXSER_HIGHBAUD }, 125 { "CP-104U series", 4, }, 126 { "CP-168U series", 8, }, 127 { "CP-132U series", 2, }, 128 /*15*/ { "CP-134U series", 4, }, 129 { "CP-104JU series", 4, }, 130 { "Moxa UC7000 Serial", 8, }, /* RC7000 */ 131 { "CP-118U series", 8, }, 132 { "CP-102UL series", 2, }, 133 /*20*/ { "CP-102U series", 2, }, 134 { "CP-118EL series", 8, }, 135 { "CP-168EL series", 8, }, 136 { "CP-104EL series", 4, }, 137 { "CB-108 series", 8, }, 138 /*25*/ { "CB-114 series", 4, }, 139 { "CB-134I series", 4, }, 140 { "CP-138U series", 8, }, 141 { "POS-104UL series", 4, }, 142 { "CP-114UL series", 4, }, 143 /*30*/ { "CP-102UF series", 2, }, 144 { "CP-112UL series", 2, }, 145 }; 146 147 /* driver_data correspond to the lines in the structure above 148 see also ISA probe function before you change something */ 149 static struct pci_device_id mxser_pcibrds[] = { 150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 }, 151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 }, 152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 }, 153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 }, 154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 }, 155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 }, 156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 }, 157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 }, 158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 }, 159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 }, 160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 }, 161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 }, 162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 }, 163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 }, 164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 }, 165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 }, 166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 }, 167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 }, 168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 }, 169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 }, 170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 }, 171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 }, 172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, 173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 }, 174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 }, 175 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 }, 176 { } 177 }; 178 MODULE_DEVICE_TABLE(pci, mxser_pcibrds); 179 180 static unsigned long ioaddr[MXSER_BOARDS]; 181 static int ttymajor = MXSERMAJOR; 182 183 /* Variables for insmod */ 184 185 MODULE_AUTHOR("Casper Yang"); 186 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver"); 187 module_param_array(ioaddr, ulong, NULL, 0); 188 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board"); 189 module_param(ttymajor, int, 0); 190 MODULE_LICENSE("GPL"); 191 192 struct mxser_log { 193 int tick; 194 unsigned long rxcnt[MXSER_PORTS]; 195 unsigned long txcnt[MXSER_PORTS]; 196 }; 197 198 struct mxser_mon { 199 unsigned long rxcnt; 200 unsigned long txcnt; 201 unsigned long up_rxcnt; 202 unsigned long up_txcnt; 203 int modem_status; 204 unsigned char hold_reason; 205 }; 206 207 struct mxser_mon_ext { 208 unsigned long rx_cnt[32]; 209 unsigned long tx_cnt[32]; 210 unsigned long up_rxcnt[32]; 211 unsigned long up_txcnt[32]; 212 int modem_status[32]; 213 214 long baudrate[32]; 215 int databits[32]; 216 int stopbits[32]; 217 int parity[32]; 218 int flowctrl[32]; 219 int fifo[32]; 220 int iftype[32]; 221 }; 222 223 struct mxser_board; 224 225 struct mxser_port { 226 struct tty_port port; 227 struct mxser_board *board; 228 229 unsigned long ioaddr; 230 unsigned long opmode_ioaddr; 231 int max_baud; 232 233 int rx_high_water; 234 int rx_trigger; /* Rx fifo trigger level */ 235 int rx_low_water; 236 int baud_base; /* max. speed */ 237 int type; /* UART type */ 238 239 int x_char; /* xon/xoff character */ 240 int IER; /* Interrupt Enable Register */ 241 int MCR; /* Modem control register */ 242 243 unsigned char stop_rx; 244 unsigned char ldisc_stop_rx; 245 246 int custom_divisor; 247 unsigned char err_shadow; 248 249 struct async_icount icount; /* kernel counters for 4 input interrupts */ 250 int timeout; 251 252 int read_status_mask; 253 int ignore_status_mask; 254 int xmit_fifo_size; 255 int xmit_head; 256 int xmit_tail; 257 int xmit_cnt; 258 259 struct ktermios normal_termios; 260 261 struct mxser_mon mon_data; 262 263 spinlock_t slock; 264 }; 265 266 struct mxser_board { 267 unsigned int idx; 268 int irq; 269 const struct mxser_cardinfo *info; 270 unsigned long vector; 271 unsigned long vector_mask; 272 273 int chip_flag; 274 int uart_type; 275 276 struct mxser_port ports[MXSER_PORTS_PER_BOARD]; 277 }; 278 279 struct mxser_mstatus { 280 tcflag_t cflag; 281 int cts; 282 int dsr; 283 int ri; 284 int dcd; 285 }; 286 287 static struct mxser_board mxser_boards[MXSER_BOARDS]; 288 static struct tty_driver *mxvar_sdriver; 289 static struct mxser_log mxvar_log; 290 static int mxser_set_baud_method[MXSER_PORTS + 1]; 291 292 static void mxser_enable_must_enchance_mode(unsigned long baseio) 293 { 294 u8 oldlcr; 295 u8 efr; 296 297 oldlcr = inb(baseio + UART_LCR); 298 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 299 300 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 301 efr |= MOXA_MUST_EFR_EFRB_ENABLE; 302 303 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 304 outb(oldlcr, baseio + UART_LCR); 305 } 306 307 #ifdef CONFIG_PCI 308 static void mxser_disable_must_enchance_mode(unsigned long baseio) 309 { 310 u8 oldlcr; 311 u8 efr; 312 313 oldlcr = inb(baseio + UART_LCR); 314 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 315 316 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 317 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE; 318 319 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 320 outb(oldlcr, baseio + UART_LCR); 321 } 322 #endif 323 324 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value) 325 { 326 u8 oldlcr; 327 u8 efr; 328 329 oldlcr = inb(baseio + UART_LCR); 330 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 331 332 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 333 efr &= ~MOXA_MUST_EFR_BANK_MASK; 334 efr |= MOXA_MUST_EFR_BANK0; 335 336 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 337 outb(value, baseio + MOXA_MUST_XON1_REGISTER); 338 outb(oldlcr, baseio + UART_LCR); 339 } 340 341 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value) 342 { 343 u8 oldlcr; 344 u8 efr; 345 346 oldlcr = inb(baseio + UART_LCR); 347 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 348 349 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 350 efr &= ~MOXA_MUST_EFR_BANK_MASK; 351 efr |= MOXA_MUST_EFR_BANK0; 352 353 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 354 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER); 355 outb(oldlcr, baseio + UART_LCR); 356 } 357 358 static void mxser_set_must_fifo_value(struct mxser_port *info) 359 { 360 u8 oldlcr; 361 u8 efr; 362 363 oldlcr = inb(info->ioaddr + UART_LCR); 364 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR); 365 366 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER); 367 efr &= ~MOXA_MUST_EFR_BANK_MASK; 368 efr |= MOXA_MUST_EFR_BANK1; 369 370 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER); 371 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER); 372 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER); 373 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER); 374 outb(oldlcr, info->ioaddr + UART_LCR); 375 } 376 377 static void mxser_set_must_enum_value(unsigned long baseio, u8 value) 378 { 379 u8 oldlcr; 380 u8 efr; 381 382 oldlcr = inb(baseio + UART_LCR); 383 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 384 385 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 386 efr &= ~MOXA_MUST_EFR_BANK_MASK; 387 efr |= MOXA_MUST_EFR_BANK2; 388 389 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 390 outb(value, baseio + MOXA_MUST_ENUM_REGISTER); 391 outb(oldlcr, baseio + UART_LCR); 392 } 393 394 #ifdef CONFIG_PCI 395 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId) 396 { 397 u8 oldlcr; 398 u8 efr; 399 400 oldlcr = inb(baseio + UART_LCR); 401 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 402 403 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 404 efr &= ~MOXA_MUST_EFR_BANK_MASK; 405 efr |= MOXA_MUST_EFR_BANK2; 406 407 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 408 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER); 409 outb(oldlcr, baseio + UART_LCR); 410 } 411 #endif 412 413 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio) 414 { 415 u8 oldlcr; 416 u8 efr; 417 418 oldlcr = inb(baseio + UART_LCR); 419 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 420 421 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 422 efr &= ~MOXA_MUST_EFR_SF_MASK; 423 424 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 425 outb(oldlcr, baseio + UART_LCR); 426 } 427 428 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio) 429 { 430 u8 oldlcr; 431 u8 efr; 432 433 oldlcr = inb(baseio + UART_LCR); 434 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 435 436 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 437 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; 438 efr |= MOXA_MUST_EFR_SF_TX1; 439 440 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 441 outb(oldlcr, baseio + UART_LCR); 442 } 443 444 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio) 445 { 446 u8 oldlcr; 447 u8 efr; 448 449 oldlcr = inb(baseio + UART_LCR); 450 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 451 452 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 453 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; 454 455 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 456 outb(oldlcr, baseio + UART_LCR); 457 } 458 459 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio) 460 { 461 u8 oldlcr; 462 u8 efr; 463 464 oldlcr = inb(baseio + UART_LCR); 465 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 466 467 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 468 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; 469 efr |= MOXA_MUST_EFR_SF_RX1; 470 471 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 472 outb(oldlcr, baseio + UART_LCR); 473 } 474 475 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio) 476 { 477 u8 oldlcr; 478 u8 efr; 479 480 oldlcr = inb(baseio + UART_LCR); 481 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 482 483 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 484 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; 485 486 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 487 outb(oldlcr, baseio + UART_LCR); 488 } 489 490 #ifdef CONFIG_PCI 491 static int __devinit CheckIsMoxaMust(unsigned long io) 492 { 493 u8 oldmcr, hwid; 494 int i; 495 496 outb(0, io + UART_LCR); 497 mxser_disable_must_enchance_mode(io); 498 oldmcr = inb(io + UART_MCR); 499 outb(0, io + UART_MCR); 500 mxser_set_must_xon1_value(io, 0x11); 501 if ((hwid = inb(io + UART_MCR)) != 0) { 502 outb(oldmcr, io + UART_MCR); 503 return MOXA_OTHER_UART; 504 } 505 506 mxser_get_must_hardware_id(io, &hwid); 507 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */ 508 if (hwid == Gpci_uart_info[i].type) 509 return (int)hwid; 510 } 511 return MOXA_OTHER_UART; 512 } 513 #endif 514 515 static void process_txrx_fifo(struct mxser_port *info) 516 { 517 int i; 518 519 if ((info->type == PORT_16450) || (info->type == PORT_8250)) { 520 info->rx_trigger = 1; 521 info->rx_high_water = 1; 522 info->rx_low_water = 1; 523 info->xmit_fifo_size = 1; 524 } else 525 for (i = 0; i < UART_INFO_NUM; i++) 526 if (info->board->chip_flag == Gpci_uart_info[i].type) { 527 info->rx_trigger = Gpci_uart_info[i].rx_trigger; 528 info->rx_low_water = Gpci_uart_info[i].rx_low_water; 529 info->rx_high_water = Gpci_uart_info[i].rx_high_water; 530 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size; 531 break; 532 } 533 } 534 535 static unsigned char mxser_get_msr(int baseaddr, int mode, int port) 536 { 537 static unsigned char mxser_msr[MXSER_PORTS + 1]; 538 unsigned char status = 0; 539 540 status = inb(baseaddr + UART_MSR); 541 542 mxser_msr[port] &= 0x0F; 543 mxser_msr[port] |= status; 544 status = mxser_msr[port]; 545 if (mode) 546 mxser_msr[port] = 0; 547 548 return status; 549 } 550 551 static int mxser_carrier_raised(struct tty_port *port) 552 { 553 struct mxser_port *mp = container_of(port, struct mxser_port, port); 554 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0; 555 } 556 557 static void mxser_dtr_rts(struct tty_port *port, int on) 558 { 559 struct mxser_port *mp = container_of(port, struct mxser_port, port); 560 unsigned long flags; 561 562 spin_lock_irqsave(&mp->slock, flags); 563 if (on) 564 outb(inb(mp->ioaddr + UART_MCR) | 565 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR); 566 else 567 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS), 568 mp->ioaddr + UART_MCR); 569 spin_unlock_irqrestore(&mp->slock, flags); 570 } 571 572 static int mxser_set_baud(struct tty_struct *tty, long newspd) 573 { 574 struct mxser_port *info = tty->driver_data; 575 int quot = 0, baud; 576 unsigned char cval; 577 578 if (!info->ioaddr) 579 return -1; 580 581 if (newspd > info->max_baud) 582 return -1; 583 584 if (newspd == 134) { 585 quot = 2 * info->baud_base / 269; 586 tty_encode_baud_rate(tty, 134, 134); 587 } else if (newspd) { 588 quot = info->baud_base / newspd; 589 if (quot == 0) 590 quot = 1; 591 baud = info->baud_base/quot; 592 tty_encode_baud_rate(tty, baud, baud); 593 } else { 594 quot = 0; 595 } 596 597 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base); 598 info->timeout += HZ / 50; /* Add .02 seconds of slop */ 599 600 if (quot) { 601 info->MCR |= UART_MCR_DTR; 602 outb(info->MCR, info->ioaddr + UART_MCR); 603 } else { 604 info->MCR &= ~UART_MCR_DTR; 605 outb(info->MCR, info->ioaddr + UART_MCR); 606 return 0; 607 } 608 609 cval = inb(info->ioaddr + UART_LCR); 610 611 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */ 612 613 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */ 614 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */ 615 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */ 616 617 #ifdef BOTHER 618 if (C_BAUD(tty) == BOTHER) { 619 quot = info->baud_base % newspd; 620 quot *= 8; 621 if (quot % newspd > newspd / 2) { 622 quot /= newspd; 623 quot++; 624 } else 625 quot /= newspd; 626 627 mxser_set_must_enum_value(info->ioaddr, quot); 628 } else 629 #endif 630 mxser_set_must_enum_value(info->ioaddr, 0); 631 632 return 0; 633 } 634 635 /* 636 * This routine is called to set the UART divisor registers to match 637 * the specified baud rate for a serial port. 638 */ 639 static int mxser_change_speed(struct tty_struct *tty, 640 struct ktermios *old_termios) 641 { 642 struct mxser_port *info = tty->driver_data; 643 unsigned cflag, cval, fcr; 644 int ret = 0; 645 unsigned char status; 646 647 cflag = tty->termios->c_cflag; 648 if (!info->ioaddr) 649 return ret; 650 651 if (mxser_set_baud_method[tty->index] == 0) 652 mxser_set_baud(tty, tty_get_baud_rate(tty)); 653 654 /* byte size and parity */ 655 switch (cflag & CSIZE) { 656 case CS5: 657 cval = 0x00; 658 break; 659 case CS6: 660 cval = 0x01; 661 break; 662 case CS7: 663 cval = 0x02; 664 break; 665 case CS8: 666 cval = 0x03; 667 break; 668 default: 669 cval = 0x00; 670 break; /* too keep GCC shut... */ 671 } 672 if (cflag & CSTOPB) 673 cval |= 0x04; 674 if (cflag & PARENB) 675 cval |= UART_LCR_PARITY; 676 if (!(cflag & PARODD)) 677 cval |= UART_LCR_EPAR; 678 if (cflag & CMSPAR) 679 cval |= UART_LCR_SPAR; 680 681 if ((info->type == PORT_8250) || (info->type == PORT_16450)) { 682 if (info->board->chip_flag) { 683 fcr = UART_FCR_ENABLE_FIFO; 684 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; 685 mxser_set_must_fifo_value(info); 686 } else 687 fcr = 0; 688 } else { 689 fcr = UART_FCR_ENABLE_FIFO; 690 if (info->board->chip_flag) { 691 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; 692 mxser_set_must_fifo_value(info); 693 } else { 694 switch (info->rx_trigger) { 695 case 1: 696 fcr |= UART_FCR_TRIGGER_1; 697 break; 698 case 4: 699 fcr |= UART_FCR_TRIGGER_4; 700 break; 701 case 8: 702 fcr |= UART_FCR_TRIGGER_8; 703 break; 704 default: 705 fcr |= UART_FCR_TRIGGER_14; 706 break; 707 } 708 } 709 } 710 711 /* CTS flow control flag and modem status interrupts */ 712 info->IER &= ~UART_IER_MSI; 713 info->MCR &= ~UART_MCR_AFE; 714 if (cflag & CRTSCTS) { 715 info->port.flags |= ASYNC_CTS_FLOW; 716 info->IER |= UART_IER_MSI; 717 if ((info->type == PORT_16550A) || (info->board->chip_flag)) { 718 info->MCR |= UART_MCR_AFE; 719 } else { 720 status = inb(info->ioaddr + UART_MSR); 721 if (tty->hw_stopped) { 722 if (status & UART_MSR_CTS) { 723 tty->hw_stopped = 0; 724 if (info->type != PORT_16550A && 725 !info->board->chip_flag) { 726 outb(info->IER & ~UART_IER_THRI, 727 info->ioaddr + 728 UART_IER); 729 info->IER |= UART_IER_THRI; 730 outb(info->IER, info->ioaddr + 731 UART_IER); 732 } 733 tty_wakeup(tty); 734 } 735 } else { 736 if (!(status & UART_MSR_CTS)) { 737 tty->hw_stopped = 1; 738 if ((info->type != PORT_16550A) && 739 (!info->board->chip_flag)) { 740 info->IER &= ~UART_IER_THRI; 741 outb(info->IER, info->ioaddr + 742 UART_IER); 743 } 744 } 745 } 746 } 747 } else { 748 info->port.flags &= ~ASYNC_CTS_FLOW; 749 } 750 outb(info->MCR, info->ioaddr + UART_MCR); 751 if (cflag & CLOCAL) { 752 info->port.flags &= ~ASYNC_CHECK_CD; 753 } else { 754 info->port.flags |= ASYNC_CHECK_CD; 755 info->IER |= UART_IER_MSI; 756 } 757 outb(info->IER, info->ioaddr + UART_IER); 758 759 /* 760 * Set up parity check flag 761 */ 762 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 763 if (I_INPCK(tty)) 764 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE; 765 if (I_BRKINT(tty) || I_PARMRK(tty)) 766 info->read_status_mask |= UART_LSR_BI; 767 768 info->ignore_status_mask = 0; 769 770 if (I_IGNBRK(tty)) { 771 info->ignore_status_mask |= UART_LSR_BI; 772 info->read_status_mask |= UART_LSR_BI; 773 /* 774 * If we're ignore parity and break indicators, ignore 775 * overruns too. (For real raw support). 776 */ 777 if (I_IGNPAR(tty)) { 778 info->ignore_status_mask |= 779 UART_LSR_OE | 780 UART_LSR_PE | 781 UART_LSR_FE; 782 info->read_status_mask |= 783 UART_LSR_OE | 784 UART_LSR_PE | 785 UART_LSR_FE; 786 } 787 } 788 if (info->board->chip_flag) { 789 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty)); 790 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty)); 791 if (I_IXON(tty)) { 792 mxser_enable_must_rx_software_flow_control( 793 info->ioaddr); 794 } else { 795 mxser_disable_must_rx_software_flow_control( 796 info->ioaddr); 797 } 798 if (I_IXOFF(tty)) { 799 mxser_enable_must_tx_software_flow_control( 800 info->ioaddr); 801 } else { 802 mxser_disable_must_tx_software_flow_control( 803 info->ioaddr); 804 } 805 } 806 807 808 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */ 809 outb(cval, info->ioaddr + UART_LCR); 810 811 return ret; 812 } 813 814 static void mxser_check_modem_status(struct tty_struct *tty, 815 struct mxser_port *port, int status) 816 { 817 /* update input line counters */ 818 if (status & UART_MSR_TERI) 819 port->icount.rng++; 820 if (status & UART_MSR_DDSR) 821 port->icount.dsr++; 822 if (status & UART_MSR_DDCD) 823 port->icount.dcd++; 824 if (status & UART_MSR_DCTS) 825 port->icount.cts++; 826 port->mon_data.modem_status = status; 827 wake_up_interruptible(&port->port.delta_msr_wait); 828 829 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { 830 if (status & UART_MSR_DCD) 831 wake_up_interruptible(&port->port.open_wait); 832 } 833 834 if (port->port.flags & ASYNC_CTS_FLOW) { 835 if (tty->hw_stopped) { 836 if (status & UART_MSR_CTS) { 837 tty->hw_stopped = 0; 838 839 if ((port->type != PORT_16550A) && 840 (!port->board->chip_flag)) { 841 outb(port->IER & ~UART_IER_THRI, 842 port->ioaddr + UART_IER); 843 port->IER |= UART_IER_THRI; 844 outb(port->IER, port->ioaddr + 845 UART_IER); 846 } 847 tty_wakeup(tty); 848 } 849 } else { 850 if (!(status & UART_MSR_CTS)) { 851 tty->hw_stopped = 1; 852 if (port->type != PORT_16550A && 853 !port->board->chip_flag) { 854 port->IER &= ~UART_IER_THRI; 855 outb(port->IER, port->ioaddr + 856 UART_IER); 857 } 858 } 859 } 860 } 861 } 862 863 static int mxser_activate(struct tty_port *port, struct tty_struct *tty) 864 { 865 struct mxser_port *info = container_of(port, struct mxser_port, port); 866 unsigned long page; 867 unsigned long flags; 868 869 page = __get_free_page(GFP_KERNEL); 870 if (!page) 871 return -ENOMEM; 872 873 spin_lock_irqsave(&info->slock, flags); 874 875 if (!info->ioaddr || !info->type) { 876 set_bit(TTY_IO_ERROR, &tty->flags); 877 free_page(page); 878 spin_unlock_irqrestore(&info->slock, flags); 879 return 0; 880 } 881 info->port.xmit_buf = (unsigned char *) page; 882 883 /* 884 * Clear the FIFO buffers and disable them 885 * (they will be reenabled in mxser_change_speed()) 886 */ 887 if (info->board->chip_flag) 888 outb((UART_FCR_CLEAR_RCVR | 889 UART_FCR_CLEAR_XMIT | 890 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR); 891 else 892 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), 893 info->ioaddr + UART_FCR); 894 895 /* 896 * At this point there's no way the LSR could still be 0xFF; 897 * if it is, then bail out, because there's likely no UART 898 * here. 899 */ 900 if (inb(info->ioaddr + UART_LSR) == 0xff) { 901 spin_unlock_irqrestore(&info->slock, flags); 902 if (capable(CAP_SYS_ADMIN)) { 903 set_bit(TTY_IO_ERROR, &tty->flags); 904 return 0; 905 } else 906 return -ENODEV; 907 } 908 909 /* 910 * Clear the interrupt registers. 911 */ 912 (void) inb(info->ioaddr + UART_LSR); 913 (void) inb(info->ioaddr + UART_RX); 914 (void) inb(info->ioaddr + UART_IIR); 915 (void) inb(info->ioaddr + UART_MSR); 916 917 /* 918 * Now, initialize the UART 919 */ 920 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */ 921 info->MCR = UART_MCR_DTR | UART_MCR_RTS; 922 outb(info->MCR, info->ioaddr + UART_MCR); 923 924 /* 925 * Finally, enable interrupts 926 */ 927 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; 928 929 if (info->board->chip_flag) 930 info->IER |= MOXA_MUST_IER_EGDAI; 931 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */ 932 933 /* 934 * And clear the interrupt registers again for luck. 935 */ 936 (void) inb(info->ioaddr + UART_LSR); 937 (void) inb(info->ioaddr + UART_RX); 938 (void) inb(info->ioaddr + UART_IIR); 939 (void) inb(info->ioaddr + UART_MSR); 940 941 clear_bit(TTY_IO_ERROR, &tty->flags); 942 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; 943 944 /* 945 * and set the speed of the serial port 946 */ 947 mxser_change_speed(tty, NULL); 948 spin_unlock_irqrestore(&info->slock, flags); 949 950 return 0; 951 } 952 953 /* 954 * This routine will shutdown a serial port 955 */ 956 static void mxser_shutdown_port(struct tty_port *port) 957 { 958 struct mxser_port *info = container_of(port, struct mxser_port, port); 959 unsigned long flags; 960 961 spin_lock_irqsave(&info->slock, flags); 962 963 /* 964 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq 965 * here so the queue might never be waken up 966 */ 967 wake_up_interruptible(&info->port.delta_msr_wait); 968 969 /* 970 * Free the xmit buffer, if necessary 971 */ 972 if (info->port.xmit_buf) { 973 free_page((unsigned long) info->port.xmit_buf); 974 info->port.xmit_buf = NULL; 975 } 976 977 info->IER = 0; 978 outb(0x00, info->ioaddr + UART_IER); 979 980 /* clear Rx/Tx FIFO's */ 981 if (info->board->chip_flag) 982 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | 983 MOXA_MUST_FCR_GDA_MODE_ENABLE, 984 info->ioaddr + UART_FCR); 985 else 986 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, 987 info->ioaddr + UART_FCR); 988 989 /* read data port to reset things */ 990 (void) inb(info->ioaddr + UART_RX); 991 992 993 if (info->board->chip_flag) 994 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr); 995 996 spin_unlock_irqrestore(&info->slock, flags); 997 } 998 999 /* 1000 * This routine is called whenever a serial port is opened. It 1001 * enables interrupts for a serial port, linking in its async structure into 1002 * the IRQ chain. It also performs the serial-specific 1003 * initialization for the tty structure. 1004 */ 1005 static int mxser_open(struct tty_struct *tty, struct file *filp) 1006 { 1007 struct mxser_port *info; 1008 int line; 1009 1010 line = tty->index; 1011 if (line == MXSER_PORTS) 1012 return 0; 1013 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD]; 1014 if (!info->ioaddr) 1015 return -ENODEV; 1016 1017 tty->driver_data = info; 1018 return tty_port_open(&info->port, tty, filp); 1019 } 1020 1021 static void mxser_flush_buffer(struct tty_struct *tty) 1022 { 1023 struct mxser_port *info = tty->driver_data; 1024 char fcr; 1025 unsigned long flags; 1026 1027 1028 spin_lock_irqsave(&info->slock, flags); 1029 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; 1030 1031 fcr = inb(info->ioaddr + UART_FCR); 1032 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), 1033 info->ioaddr + UART_FCR); 1034 outb(fcr, info->ioaddr + UART_FCR); 1035 1036 spin_unlock_irqrestore(&info->slock, flags); 1037 1038 tty_wakeup(tty); 1039 } 1040 1041 1042 static void mxser_close_port(struct tty_port *port) 1043 { 1044 struct mxser_port *info = container_of(port, struct mxser_port, port); 1045 unsigned long timeout; 1046 /* 1047 * At this point we stop accepting input. To do this, we 1048 * disable the receive line status interrupts, and tell the 1049 * interrupt driver to stop checking the data ready bit in the 1050 * line status register. 1051 */ 1052 info->IER &= ~UART_IER_RLSI; 1053 if (info->board->chip_flag) 1054 info->IER &= ~MOXA_MUST_RECV_ISR; 1055 1056 outb(info->IER, info->ioaddr + UART_IER); 1057 /* 1058 * Before we drop DTR, make sure the UART transmitter 1059 * has completely drained; this is especially 1060 * important if there is a transmit FIFO! 1061 */ 1062 timeout = jiffies + HZ; 1063 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) { 1064 schedule_timeout_interruptible(5); 1065 if (time_after(jiffies, timeout)) 1066 break; 1067 } 1068 } 1069 1070 /* 1071 * This routine is called when the serial port gets closed. First, we 1072 * wait for the last remaining data to be sent. Then, we unlink its 1073 * async structure from the interrupt chain if necessary, and we free 1074 * that IRQ if nothing is left in the chain. 1075 */ 1076 static void mxser_close(struct tty_struct *tty, struct file *filp) 1077 { 1078 struct mxser_port *info = tty->driver_data; 1079 struct tty_port *port = &info->port; 1080 1081 if (tty->index == MXSER_PORTS || info == NULL) 1082 return; 1083 if (tty_port_close_start(port, tty, filp) == 0) 1084 return; 1085 mutex_lock(&port->mutex); 1086 mxser_close_port(port); 1087 mxser_flush_buffer(tty); 1088 mxser_shutdown_port(port); 1089 clear_bit(ASYNCB_INITIALIZED, &port->flags); 1090 mutex_unlock(&port->mutex); 1091 /* Right now the tty_port set is done outside of the close_end helper 1092 as we don't yet have everyone using refcounts */ 1093 tty_port_close_end(port, tty); 1094 tty_port_tty_set(port, NULL); 1095 } 1096 1097 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) 1098 { 1099 int c, total = 0; 1100 struct mxser_port *info = tty->driver_data; 1101 unsigned long flags; 1102 1103 if (!info->port.xmit_buf) 1104 return 0; 1105 1106 while (1) { 1107 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, 1108 SERIAL_XMIT_SIZE - info->xmit_head)); 1109 if (c <= 0) 1110 break; 1111 1112 memcpy(info->port.xmit_buf + info->xmit_head, buf, c); 1113 spin_lock_irqsave(&info->slock, flags); 1114 info->xmit_head = (info->xmit_head + c) & 1115 (SERIAL_XMIT_SIZE - 1); 1116 info->xmit_cnt += c; 1117 spin_unlock_irqrestore(&info->slock, flags); 1118 1119 buf += c; 1120 count -= c; 1121 total += c; 1122 } 1123 1124 if (info->xmit_cnt && !tty->stopped) { 1125 if (!tty->hw_stopped || 1126 (info->type == PORT_16550A) || 1127 (info->board->chip_flag)) { 1128 spin_lock_irqsave(&info->slock, flags); 1129 outb(info->IER & ~UART_IER_THRI, info->ioaddr + 1130 UART_IER); 1131 info->IER |= UART_IER_THRI; 1132 outb(info->IER, info->ioaddr + UART_IER); 1133 spin_unlock_irqrestore(&info->slock, flags); 1134 } 1135 } 1136 return total; 1137 } 1138 1139 static int mxser_put_char(struct tty_struct *tty, unsigned char ch) 1140 { 1141 struct mxser_port *info = tty->driver_data; 1142 unsigned long flags; 1143 1144 if (!info->port.xmit_buf) 1145 return 0; 1146 1147 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1) 1148 return 0; 1149 1150 spin_lock_irqsave(&info->slock, flags); 1151 info->port.xmit_buf[info->xmit_head++] = ch; 1152 info->xmit_head &= SERIAL_XMIT_SIZE - 1; 1153 info->xmit_cnt++; 1154 spin_unlock_irqrestore(&info->slock, flags); 1155 if (!tty->stopped) { 1156 if (!tty->hw_stopped || 1157 (info->type == PORT_16550A) || 1158 info->board->chip_flag) { 1159 spin_lock_irqsave(&info->slock, flags); 1160 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1161 info->IER |= UART_IER_THRI; 1162 outb(info->IER, info->ioaddr + UART_IER); 1163 spin_unlock_irqrestore(&info->slock, flags); 1164 } 1165 } 1166 return 1; 1167 } 1168 1169 1170 static void mxser_flush_chars(struct tty_struct *tty) 1171 { 1172 struct mxser_port *info = tty->driver_data; 1173 unsigned long flags; 1174 1175 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf || 1176 (tty->hw_stopped && info->type != PORT_16550A && 1177 !info->board->chip_flag)) 1178 return; 1179 1180 spin_lock_irqsave(&info->slock, flags); 1181 1182 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1183 info->IER |= UART_IER_THRI; 1184 outb(info->IER, info->ioaddr + UART_IER); 1185 1186 spin_unlock_irqrestore(&info->slock, flags); 1187 } 1188 1189 static int mxser_write_room(struct tty_struct *tty) 1190 { 1191 struct mxser_port *info = tty->driver_data; 1192 int ret; 1193 1194 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; 1195 return ret < 0 ? 0 : ret; 1196 } 1197 1198 static int mxser_chars_in_buffer(struct tty_struct *tty) 1199 { 1200 struct mxser_port *info = tty->driver_data; 1201 return info->xmit_cnt; 1202 } 1203 1204 /* 1205 * ------------------------------------------------------------ 1206 * friends of mxser_ioctl() 1207 * ------------------------------------------------------------ 1208 */ 1209 static int mxser_get_serial_info(struct tty_struct *tty, 1210 struct serial_struct __user *retinfo) 1211 { 1212 struct mxser_port *info = tty->driver_data; 1213 struct serial_struct tmp = { 1214 .type = info->type, 1215 .line = tty->index, 1216 .port = info->ioaddr, 1217 .irq = info->board->irq, 1218 .flags = info->port.flags, 1219 .baud_base = info->baud_base, 1220 .close_delay = info->port.close_delay, 1221 .closing_wait = info->port.closing_wait, 1222 .custom_divisor = info->custom_divisor, 1223 .hub6 = 0 1224 }; 1225 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) 1226 return -EFAULT; 1227 return 0; 1228 } 1229 1230 static int mxser_set_serial_info(struct tty_struct *tty, 1231 struct serial_struct __user *new_info) 1232 { 1233 struct mxser_port *info = tty->driver_data; 1234 struct tty_port *port = &info->port; 1235 struct serial_struct new_serial; 1236 speed_t baud; 1237 unsigned long sl_flags; 1238 unsigned int flags; 1239 int retval = 0; 1240 1241 if (!new_info || !info->ioaddr) 1242 return -ENODEV; 1243 if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) 1244 return -EFAULT; 1245 1246 if (new_serial.irq != info->board->irq || 1247 new_serial.port != info->ioaddr) 1248 return -EINVAL; 1249 1250 flags = port->flags & ASYNC_SPD_MASK; 1251 1252 if (!capable(CAP_SYS_ADMIN)) { 1253 if ((new_serial.baud_base != info->baud_base) || 1254 (new_serial.close_delay != info->port.close_delay) || 1255 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) 1256 return -EPERM; 1257 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) | 1258 (new_serial.flags & ASYNC_USR_MASK)); 1259 } else { 1260 /* 1261 * OK, past this point, all the error checking has been done. 1262 * At this point, we start making changes..... 1263 */ 1264 port->flags = ((port->flags & ~ASYNC_FLAGS) | 1265 (new_serial.flags & ASYNC_FLAGS)); 1266 port->close_delay = new_serial.close_delay * HZ / 100; 1267 port->closing_wait = new_serial.closing_wait * HZ / 100; 1268 tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0; 1269 if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST && 1270 (new_serial.baud_base != info->baud_base || 1271 new_serial.custom_divisor != 1272 info->custom_divisor)) { 1273 if (new_serial.custom_divisor == 0) 1274 return -EINVAL; 1275 baud = new_serial.baud_base / new_serial.custom_divisor; 1276 tty_encode_baud_rate(tty, baud, baud); 1277 } 1278 } 1279 1280 info->type = new_serial.type; 1281 1282 process_txrx_fifo(info); 1283 1284 if (test_bit(ASYNCB_INITIALIZED, &port->flags)) { 1285 if (flags != (port->flags & ASYNC_SPD_MASK)) { 1286 spin_lock_irqsave(&info->slock, sl_flags); 1287 mxser_change_speed(tty, NULL); 1288 spin_unlock_irqrestore(&info->slock, sl_flags); 1289 } 1290 } else { 1291 retval = mxser_activate(port, tty); 1292 if (retval == 0) 1293 set_bit(ASYNCB_INITIALIZED, &port->flags); 1294 } 1295 return retval; 1296 } 1297 1298 /* 1299 * mxser_get_lsr_info - get line status register info 1300 * 1301 * Purpose: Let user call ioctl() to get info when the UART physically 1302 * is emptied. On bus types like RS485, the transmitter must 1303 * release the bus after transmitting. This must be done when 1304 * the transmit shift register is empty, not be done when the 1305 * transmit holding register is empty. This functionality 1306 * allows an RS485 driver to be written in user space. 1307 */ 1308 static int mxser_get_lsr_info(struct mxser_port *info, 1309 unsigned int __user *value) 1310 { 1311 unsigned char status; 1312 unsigned int result; 1313 unsigned long flags; 1314 1315 spin_lock_irqsave(&info->slock, flags); 1316 status = inb(info->ioaddr + UART_LSR); 1317 spin_unlock_irqrestore(&info->slock, flags); 1318 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); 1319 return put_user(result, value); 1320 } 1321 1322 static int mxser_tiocmget(struct tty_struct *tty) 1323 { 1324 struct mxser_port *info = tty->driver_data; 1325 unsigned char control, status; 1326 unsigned long flags; 1327 1328 1329 if (tty->index == MXSER_PORTS) 1330 return -ENOIOCTLCMD; 1331 if (test_bit(TTY_IO_ERROR, &tty->flags)) 1332 return -EIO; 1333 1334 control = info->MCR; 1335 1336 spin_lock_irqsave(&info->slock, flags); 1337 status = inb(info->ioaddr + UART_MSR); 1338 if (status & UART_MSR_ANY_DELTA) 1339 mxser_check_modem_status(tty, info, status); 1340 spin_unlock_irqrestore(&info->slock, flags); 1341 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | 1342 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | 1343 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | 1344 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | 1345 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | 1346 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); 1347 } 1348 1349 static int mxser_tiocmset(struct tty_struct *tty, 1350 unsigned int set, unsigned int clear) 1351 { 1352 struct mxser_port *info = tty->driver_data; 1353 unsigned long flags; 1354 1355 1356 if (tty->index == MXSER_PORTS) 1357 return -ENOIOCTLCMD; 1358 if (test_bit(TTY_IO_ERROR, &tty->flags)) 1359 return -EIO; 1360 1361 spin_lock_irqsave(&info->slock, flags); 1362 1363 if (set & TIOCM_RTS) 1364 info->MCR |= UART_MCR_RTS; 1365 if (set & TIOCM_DTR) 1366 info->MCR |= UART_MCR_DTR; 1367 1368 if (clear & TIOCM_RTS) 1369 info->MCR &= ~UART_MCR_RTS; 1370 if (clear & TIOCM_DTR) 1371 info->MCR &= ~UART_MCR_DTR; 1372 1373 outb(info->MCR, info->ioaddr + UART_MCR); 1374 spin_unlock_irqrestore(&info->slock, flags); 1375 return 0; 1376 } 1377 1378 static int __init mxser_program_mode(int port) 1379 { 1380 int id, i, j, n; 1381 1382 outb(0, port); 1383 outb(0, port); 1384 outb(0, port); 1385 (void)inb(port); 1386 (void)inb(port); 1387 outb(0, port); 1388 (void)inb(port); 1389 1390 id = inb(port + 1) & 0x1F; 1391 if ((id != C168_ASIC_ID) && 1392 (id != C104_ASIC_ID) && 1393 (id != C102_ASIC_ID) && 1394 (id != CI132_ASIC_ID) && 1395 (id != CI134_ASIC_ID) && 1396 (id != CI104J_ASIC_ID)) 1397 return -1; 1398 for (i = 0, j = 0; i < 4; i++) { 1399 n = inb(port + 2); 1400 if (n == 'M') { 1401 j = 1; 1402 } else if ((j == 1) && (n == 1)) { 1403 j = 2; 1404 break; 1405 } else 1406 j = 0; 1407 } 1408 if (j != 2) 1409 id = -2; 1410 return id; 1411 } 1412 1413 static void __init mxser_normal_mode(int port) 1414 { 1415 int i, n; 1416 1417 outb(0xA5, port + 1); 1418 outb(0x80, port + 3); 1419 outb(12, port + 0); /* 9600 bps */ 1420 outb(0, port + 1); 1421 outb(0x03, port + 3); /* 8 data bits */ 1422 outb(0x13, port + 4); /* loop back mode */ 1423 for (i = 0; i < 16; i++) { 1424 n = inb(port + 5); 1425 if ((n & 0x61) == 0x60) 1426 break; 1427 if ((n & 1) == 1) 1428 (void)inb(port); 1429 } 1430 outb(0x00, port + 4); 1431 } 1432 1433 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */ 1434 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */ 1435 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */ 1436 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */ 1437 #define EN_CCMD 0x000 /* Chip's command register */ 1438 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */ 1439 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */ 1440 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */ 1441 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */ 1442 #define EN0_DCFG 0x00E /* Data configuration reg WR */ 1443 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */ 1444 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */ 1445 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */ 1446 static int __init mxser_read_register(int port, unsigned short *regs) 1447 { 1448 int i, k, value, id; 1449 unsigned int j; 1450 1451 id = mxser_program_mode(port); 1452 if (id < 0) 1453 return id; 1454 for (i = 0; i < 14; i++) { 1455 k = (i & 0x3F) | 0x180; 1456 for (j = 0x100; j > 0; j >>= 1) { 1457 outb(CHIP_CS, port); 1458 if (k & j) { 1459 outb(CHIP_CS | CHIP_DO, port); 1460 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */ 1461 } else { 1462 outb(CHIP_CS, port); 1463 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */ 1464 } 1465 } 1466 (void)inb(port); 1467 value = 0; 1468 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) { 1469 outb(CHIP_CS, port); 1470 outb(CHIP_CS | CHIP_SK, port); 1471 if (inb(port) & CHIP_DI) 1472 value |= j; 1473 } 1474 regs[i] = value; 1475 outb(0, port); 1476 } 1477 mxser_normal_mode(port); 1478 return id; 1479 } 1480 1481 static int mxser_ioctl_special(unsigned int cmd, void __user *argp) 1482 { 1483 struct mxser_port *ip; 1484 struct tty_port *port; 1485 struct tty_struct *tty; 1486 int result, status; 1487 unsigned int i, j; 1488 int ret = 0; 1489 1490 switch (cmd) { 1491 case MOXA_GET_MAJOR: 1492 printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl " 1493 "%x (GET_MAJOR), fix your userspace\n", 1494 current->comm, cmd); 1495 return put_user(ttymajor, (int __user *)argp); 1496 1497 case MOXA_CHKPORTENABLE: 1498 result = 0; 1499 for (i = 0; i < MXSER_BOARDS; i++) 1500 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) 1501 if (mxser_boards[i].ports[j].ioaddr) 1502 result |= (1 << i); 1503 return put_user(result, (unsigned long __user *)argp); 1504 case MOXA_GETDATACOUNT: 1505 /* The receive side is locked by port->slock but it isn't 1506 clear that an exact snapshot is worth copying here */ 1507 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log))) 1508 ret = -EFAULT; 1509 return ret; 1510 case MOXA_GETMSTATUS: { 1511 struct mxser_mstatus ms, __user *msu = argp; 1512 for (i = 0; i < MXSER_BOARDS; i++) 1513 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { 1514 ip = &mxser_boards[i].ports[j]; 1515 port = &ip->port; 1516 memset(&ms, 0, sizeof(ms)); 1517 1518 mutex_lock(&port->mutex); 1519 if (!ip->ioaddr) 1520 goto copy; 1521 1522 tty = tty_port_tty_get(port); 1523 1524 if (!tty || !tty->termios) 1525 ms.cflag = ip->normal_termios.c_cflag; 1526 else 1527 ms.cflag = tty->termios->c_cflag; 1528 tty_kref_put(tty); 1529 spin_lock_irq(&ip->slock); 1530 status = inb(ip->ioaddr + UART_MSR); 1531 spin_unlock_irq(&ip->slock); 1532 if (status & UART_MSR_DCD) 1533 ms.dcd = 1; 1534 if (status & UART_MSR_DSR) 1535 ms.dsr = 1; 1536 if (status & UART_MSR_CTS) 1537 ms.cts = 1; 1538 copy: 1539 mutex_unlock(&port->mutex); 1540 if (copy_to_user(msu, &ms, sizeof(ms))) 1541 return -EFAULT; 1542 msu++; 1543 } 1544 return 0; 1545 } 1546 case MOXA_ASPP_MON_EXT: { 1547 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */ 1548 unsigned int cflag, iflag, p; 1549 u8 opmode; 1550 1551 me = kzalloc(sizeof(*me), GFP_KERNEL); 1552 if (!me) 1553 return -ENOMEM; 1554 1555 for (i = 0, p = 0; i < MXSER_BOARDS; i++) { 1556 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) { 1557 if (p >= ARRAY_SIZE(me->rx_cnt)) { 1558 i = MXSER_BOARDS; 1559 break; 1560 } 1561 ip = &mxser_boards[i].ports[j]; 1562 port = &ip->port; 1563 1564 mutex_lock(&port->mutex); 1565 if (!ip->ioaddr) { 1566 mutex_unlock(&port->mutex); 1567 continue; 1568 } 1569 1570 spin_lock_irq(&ip->slock); 1571 status = mxser_get_msr(ip->ioaddr, 0, p); 1572 1573 if (status & UART_MSR_TERI) 1574 ip->icount.rng++; 1575 if (status & UART_MSR_DDSR) 1576 ip->icount.dsr++; 1577 if (status & UART_MSR_DDCD) 1578 ip->icount.dcd++; 1579 if (status & UART_MSR_DCTS) 1580 ip->icount.cts++; 1581 1582 ip->mon_data.modem_status = status; 1583 me->rx_cnt[p] = ip->mon_data.rxcnt; 1584 me->tx_cnt[p] = ip->mon_data.txcnt; 1585 me->up_rxcnt[p] = ip->mon_data.up_rxcnt; 1586 me->up_txcnt[p] = ip->mon_data.up_txcnt; 1587 me->modem_status[p] = 1588 ip->mon_data.modem_status; 1589 spin_unlock_irq(&ip->slock); 1590 1591 tty = tty_port_tty_get(&ip->port); 1592 1593 if (!tty || !tty->termios) { 1594 cflag = ip->normal_termios.c_cflag; 1595 iflag = ip->normal_termios.c_iflag; 1596 me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios); 1597 } else { 1598 cflag = tty->termios->c_cflag; 1599 iflag = tty->termios->c_iflag; 1600 me->baudrate[p] = tty_get_baud_rate(tty); 1601 } 1602 tty_kref_put(tty); 1603 1604 me->databits[p] = cflag & CSIZE; 1605 me->stopbits[p] = cflag & CSTOPB; 1606 me->parity[p] = cflag & (PARENB | PARODD | 1607 CMSPAR); 1608 1609 if (cflag & CRTSCTS) 1610 me->flowctrl[p] |= 0x03; 1611 1612 if (iflag & (IXON | IXOFF)) 1613 me->flowctrl[p] |= 0x0C; 1614 1615 if (ip->type == PORT_16550A) 1616 me->fifo[p] = 1; 1617 1618 opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2); 1619 opmode &= OP_MODE_MASK; 1620 me->iftype[p] = opmode; 1621 mutex_unlock(&port->mutex); 1622 } 1623 } 1624 if (copy_to_user(argp, me, sizeof(*me))) 1625 ret = -EFAULT; 1626 kfree(me); 1627 return ret; 1628 } 1629 default: 1630 return -ENOIOCTLCMD; 1631 } 1632 return 0; 1633 } 1634 1635 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg, 1636 struct async_icount *cprev) 1637 { 1638 struct async_icount cnow; 1639 unsigned long flags; 1640 int ret; 1641 1642 spin_lock_irqsave(&info->slock, flags); 1643 cnow = info->icount; /* atomic copy */ 1644 spin_unlock_irqrestore(&info->slock, flags); 1645 1646 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) || 1647 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) || 1648 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) || 1649 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts)); 1650 1651 *cprev = cnow; 1652 1653 return ret; 1654 } 1655 1656 static int mxser_ioctl(struct tty_struct *tty, 1657 unsigned int cmd, unsigned long arg) 1658 { 1659 struct mxser_port *info = tty->driver_data; 1660 struct tty_port *port = &info->port; 1661 struct async_icount cnow; 1662 unsigned long flags; 1663 void __user *argp = (void __user *)arg; 1664 int retval; 1665 1666 if (tty->index == MXSER_PORTS) 1667 return mxser_ioctl_special(cmd, argp); 1668 1669 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) { 1670 int p; 1671 unsigned long opmode; 1672 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f }; 1673 int shiftbit; 1674 unsigned char val, mask; 1675 1676 p = tty->index % 4; 1677 if (cmd == MOXA_SET_OP_MODE) { 1678 if (get_user(opmode, (int __user *) argp)) 1679 return -EFAULT; 1680 if (opmode != RS232_MODE && 1681 opmode != RS485_2WIRE_MODE && 1682 opmode != RS422_MODE && 1683 opmode != RS485_4WIRE_MODE) 1684 return -EFAULT; 1685 mask = ModeMask[p]; 1686 shiftbit = p * 2; 1687 spin_lock_irq(&info->slock); 1688 val = inb(info->opmode_ioaddr); 1689 val &= mask; 1690 val |= (opmode << shiftbit); 1691 outb(val, info->opmode_ioaddr); 1692 spin_unlock_irq(&info->slock); 1693 } else { 1694 shiftbit = p * 2; 1695 spin_lock_irq(&info->slock); 1696 opmode = inb(info->opmode_ioaddr) >> shiftbit; 1697 spin_unlock_irq(&info->slock); 1698 opmode &= OP_MODE_MASK; 1699 if (put_user(opmode, (int __user *)argp)) 1700 return -EFAULT; 1701 } 1702 return 0; 1703 } 1704 1705 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && 1706 test_bit(TTY_IO_ERROR, &tty->flags)) 1707 return -EIO; 1708 1709 switch (cmd) { 1710 case TIOCGSERIAL: 1711 mutex_lock(&port->mutex); 1712 retval = mxser_get_serial_info(tty, argp); 1713 mutex_unlock(&port->mutex); 1714 return retval; 1715 case TIOCSSERIAL: 1716 mutex_lock(&port->mutex); 1717 retval = mxser_set_serial_info(tty, argp); 1718 mutex_unlock(&port->mutex); 1719 return retval; 1720 case TIOCSERGETLSR: /* Get line status register */ 1721 return mxser_get_lsr_info(info, argp); 1722 /* 1723 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change 1724 * - mask passed in arg for lines of interest 1725 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) 1726 * Caller should use TIOCGICOUNT to see which one it was 1727 */ 1728 case TIOCMIWAIT: 1729 spin_lock_irqsave(&info->slock, flags); 1730 cnow = info->icount; /* note the counters on entry */ 1731 spin_unlock_irqrestore(&info->slock, flags); 1732 1733 return wait_event_interruptible(info->port.delta_msr_wait, 1734 mxser_cflags_changed(info, arg, &cnow)); 1735 case MOXA_HighSpeedOn: 1736 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); 1737 case MOXA_SDS_RSTICOUNTER: 1738 spin_lock_irq(&info->slock); 1739 info->mon_data.rxcnt = 0; 1740 info->mon_data.txcnt = 0; 1741 spin_unlock_irq(&info->slock); 1742 return 0; 1743 1744 case MOXA_ASPP_OQUEUE:{ 1745 int len, lsr; 1746 1747 len = mxser_chars_in_buffer(tty); 1748 spin_lock_irq(&info->slock); 1749 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE; 1750 spin_unlock_irq(&info->slock); 1751 len += (lsr ? 0 : 1); 1752 1753 return put_user(len, (int __user *)argp); 1754 } 1755 case MOXA_ASPP_MON: { 1756 int mcr, status; 1757 1758 spin_lock_irq(&info->slock); 1759 status = mxser_get_msr(info->ioaddr, 1, tty->index); 1760 mxser_check_modem_status(tty, info, status); 1761 1762 mcr = inb(info->ioaddr + UART_MCR); 1763 spin_unlock_irq(&info->slock); 1764 1765 if (mcr & MOXA_MUST_MCR_XON_FLAG) 1766 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD; 1767 else 1768 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD; 1769 1770 if (mcr & MOXA_MUST_MCR_TX_XON) 1771 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT; 1772 else 1773 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT; 1774 1775 if (tty->hw_stopped) 1776 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD; 1777 else 1778 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD; 1779 1780 if (copy_to_user(argp, &info->mon_data, 1781 sizeof(struct mxser_mon))) 1782 return -EFAULT; 1783 1784 return 0; 1785 } 1786 case MOXA_ASPP_LSTATUS: { 1787 if (put_user(info->err_shadow, (unsigned char __user *)argp)) 1788 return -EFAULT; 1789 1790 info->err_shadow = 0; 1791 return 0; 1792 } 1793 case MOXA_SET_BAUD_METHOD: { 1794 int method; 1795 1796 if (get_user(method, (int __user *)argp)) 1797 return -EFAULT; 1798 mxser_set_baud_method[tty->index] = method; 1799 return put_user(method, (int __user *)argp); 1800 } 1801 default: 1802 return -ENOIOCTLCMD; 1803 } 1804 return 0; 1805 } 1806 1807 /* 1808 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) 1809 * Return: write counters to the user passed counter struct 1810 * NB: both 1->0 and 0->1 transitions are counted except for 1811 * RI where only 0->1 is counted. 1812 */ 1813 1814 static int mxser_get_icount(struct tty_struct *tty, 1815 struct serial_icounter_struct *icount) 1816 1817 { 1818 struct mxser_port *info = tty->driver_data; 1819 struct async_icount cnow; 1820 unsigned long flags; 1821 1822 spin_lock_irqsave(&info->slock, flags); 1823 cnow = info->icount; 1824 spin_unlock_irqrestore(&info->slock, flags); 1825 1826 icount->frame = cnow.frame; 1827 icount->brk = cnow.brk; 1828 icount->overrun = cnow.overrun; 1829 icount->buf_overrun = cnow.buf_overrun; 1830 icount->parity = cnow.parity; 1831 icount->rx = cnow.rx; 1832 icount->tx = cnow.tx; 1833 icount->cts = cnow.cts; 1834 icount->dsr = cnow.dsr; 1835 icount->rng = cnow.rng; 1836 icount->dcd = cnow.dcd; 1837 return 0; 1838 } 1839 1840 static void mxser_stoprx(struct tty_struct *tty) 1841 { 1842 struct mxser_port *info = tty->driver_data; 1843 1844 info->ldisc_stop_rx = 1; 1845 if (I_IXOFF(tty)) { 1846 if (info->board->chip_flag) { 1847 info->IER &= ~MOXA_MUST_RECV_ISR; 1848 outb(info->IER, info->ioaddr + UART_IER); 1849 } else { 1850 info->x_char = STOP_CHAR(tty); 1851 outb(0, info->ioaddr + UART_IER); 1852 info->IER |= UART_IER_THRI; 1853 outb(info->IER, info->ioaddr + UART_IER); 1854 } 1855 } 1856 1857 if (tty->termios->c_cflag & CRTSCTS) { 1858 info->MCR &= ~UART_MCR_RTS; 1859 outb(info->MCR, info->ioaddr + UART_MCR); 1860 } 1861 } 1862 1863 /* 1864 * This routine is called by the upper-layer tty layer to signal that 1865 * incoming characters should be throttled. 1866 */ 1867 static void mxser_throttle(struct tty_struct *tty) 1868 { 1869 mxser_stoprx(tty); 1870 } 1871 1872 static void mxser_unthrottle(struct tty_struct *tty) 1873 { 1874 struct mxser_port *info = tty->driver_data; 1875 1876 /* startrx */ 1877 info->ldisc_stop_rx = 0; 1878 if (I_IXOFF(tty)) { 1879 if (info->x_char) 1880 info->x_char = 0; 1881 else { 1882 if (info->board->chip_flag) { 1883 info->IER |= MOXA_MUST_RECV_ISR; 1884 outb(info->IER, info->ioaddr + UART_IER); 1885 } else { 1886 info->x_char = START_CHAR(tty); 1887 outb(0, info->ioaddr + UART_IER); 1888 info->IER |= UART_IER_THRI; 1889 outb(info->IER, info->ioaddr + UART_IER); 1890 } 1891 } 1892 } 1893 1894 if (tty->termios->c_cflag & CRTSCTS) { 1895 info->MCR |= UART_MCR_RTS; 1896 outb(info->MCR, info->ioaddr + UART_MCR); 1897 } 1898 } 1899 1900 /* 1901 * mxser_stop() and mxser_start() 1902 * 1903 * This routines are called before setting or resetting tty->stopped. 1904 * They enable or disable transmitter interrupts, as necessary. 1905 */ 1906 static void mxser_stop(struct tty_struct *tty) 1907 { 1908 struct mxser_port *info = tty->driver_data; 1909 unsigned long flags; 1910 1911 spin_lock_irqsave(&info->slock, flags); 1912 if (info->IER & UART_IER_THRI) { 1913 info->IER &= ~UART_IER_THRI; 1914 outb(info->IER, info->ioaddr + UART_IER); 1915 } 1916 spin_unlock_irqrestore(&info->slock, flags); 1917 } 1918 1919 static void mxser_start(struct tty_struct *tty) 1920 { 1921 struct mxser_port *info = tty->driver_data; 1922 unsigned long flags; 1923 1924 spin_lock_irqsave(&info->slock, flags); 1925 if (info->xmit_cnt && info->port.xmit_buf) { 1926 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1927 info->IER |= UART_IER_THRI; 1928 outb(info->IER, info->ioaddr + UART_IER); 1929 } 1930 spin_unlock_irqrestore(&info->slock, flags); 1931 } 1932 1933 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios) 1934 { 1935 struct mxser_port *info = tty->driver_data; 1936 unsigned long flags; 1937 1938 spin_lock_irqsave(&info->slock, flags); 1939 mxser_change_speed(tty, old_termios); 1940 spin_unlock_irqrestore(&info->slock, flags); 1941 1942 if ((old_termios->c_cflag & CRTSCTS) && 1943 !(tty->termios->c_cflag & CRTSCTS)) { 1944 tty->hw_stopped = 0; 1945 mxser_start(tty); 1946 } 1947 1948 /* Handle sw stopped */ 1949 if ((old_termios->c_iflag & IXON) && 1950 !(tty->termios->c_iflag & IXON)) { 1951 tty->stopped = 0; 1952 1953 if (info->board->chip_flag) { 1954 spin_lock_irqsave(&info->slock, flags); 1955 mxser_disable_must_rx_software_flow_control( 1956 info->ioaddr); 1957 spin_unlock_irqrestore(&info->slock, flags); 1958 } 1959 1960 mxser_start(tty); 1961 } 1962 } 1963 1964 /* 1965 * mxser_wait_until_sent() --- wait until the transmitter is empty 1966 */ 1967 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout) 1968 { 1969 struct mxser_port *info = tty->driver_data; 1970 unsigned long orig_jiffies, char_time; 1971 unsigned long flags; 1972 int lsr; 1973 1974 if (info->type == PORT_UNKNOWN) 1975 return; 1976 1977 if (info->xmit_fifo_size == 0) 1978 return; /* Just in case.... */ 1979 1980 orig_jiffies = jiffies; 1981 /* 1982 * Set the check interval to be 1/5 of the estimated time to 1983 * send a single character, and make it at least 1. The check 1984 * interval should also be less than the timeout. 1985 * 1986 * Note: we have to use pretty tight timings here to satisfy 1987 * the NIST-PCTS. 1988 */ 1989 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size; 1990 char_time = char_time / 5; 1991 if (char_time == 0) 1992 char_time = 1; 1993 if (timeout && timeout < char_time) 1994 char_time = timeout; 1995 /* 1996 * If the transmitter hasn't cleared in twice the approximate 1997 * amount of time to send the entire FIFO, it probably won't 1998 * ever clear. This assumes the UART isn't doing flow 1999 * control, which is currently the case. Hence, if it ever 2000 * takes longer than info->timeout, this is probably due to a 2001 * UART bug of some kind. So, we clamp the timeout parameter at 2002 * 2*info->timeout. 2003 */ 2004 if (!timeout || timeout > 2 * info->timeout) 2005 timeout = 2 * info->timeout; 2006 2007 spin_lock_irqsave(&info->slock, flags); 2008 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) { 2009 spin_unlock_irqrestore(&info->slock, flags); 2010 schedule_timeout_interruptible(char_time); 2011 spin_lock_irqsave(&info->slock, flags); 2012 if (signal_pending(current)) 2013 break; 2014 if (timeout && time_after(jiffies, orig_jiffies + timeout)) 2015 break; 2016 } 2017 spin_unlock_irqrestore(&info->slock, flags); 2018 set_current_state(TASK_RUNNING); 2019 } 2020 2021 /* 2022 * This routine is called by tty_hangup() when a hangup is signaled. 2023 */ 2024 static void mxser_hangup(struct tty_struct *tty) 2025 { 2026 struct mxser_port *info = tty->driver_data; 2027 2028 mxser_flush_buffer(tty); 2029 tty_port_hangup(&info->port); 2030 } 2031 2032 /* 2033 * mxser_rs_break() --- routine which turns the break handling on or off 2034 */ 2035 static int mxser_rs_break(struct tty_struct *tty, int break_state) 2036 { 2037 struct mxser_port *info = tty->driver_data; 2038 unsigned long flags; 2039 2040 spin_lock_irqsave(&info->slock, flags); 2041 if (break_state == -1) 2042 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, 2043 info->ioaddr + UART_LCR); 2044 else 2045 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, 2046 info->ioaddr + UART_LCR); 2047 spin_unlock_irqrestore(&info->slock, flags); 2048 return 0; 2049 } 2050 2051 static void mxser_receive_chars(struct tty_struct *tty, 2052 struct mxser_port *port, int *status) 2053 { 2054 unsigned char ch, gdl; 2055 int ignored = 0; 2056 int cnt = 0; 2057 int recv_room; 2058 int max = 256; 2059 2060 recv_room = tty->receive_room; 2061 if (recv_room == 0 && !port->ldisc_stop_rx) 2062 mxser_stoprx(tty); 2063 if (port->board->chip_flag != MOXA_OTHER_UART) { 2064 2065 if (*status & UART_LSR_SPECIAL) 2066 goto intr_old; 2067 if (port->board->chip_flag == MOXA_MUST_MU860_HWID && 2068 (*status & MOXA_MUST_LSR_RERR)) 2069 goto intr_old; 2070 if (*status & MOXA_MUST_LSR_RERR) 2071 goto intr_old; 2072 2073 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER); 2074 2075 if (port->board->chip_flag == MOXA_MUST_MU150_HWID) 2076 gdl &= MOXA_MUST_GDL_MASK; 2077 if (gdl >= recv_room) { 2078 if (!port->ldisc_stop_rx) 2079 mxser_stoprx(tty); 2080 } 2081 while (gdl--) { 2082 ch = inb(port->ioaddr + UART_RX); 2083 tty_insert_flip_char(tty, ch, 0); 2084 cnt++; 2085 } 2086 goto end_intr; 2087 } 2088 intr_old: 2089 2090 do { 2091 if (max-- < 0) 2092 break; 2093 2094 ch = inb(port->ioaddr + UART_RX); 2095 if (port->board->chip_flag && (*status & UART_LSR_OE)) 2096 outb(0x23, port->ioaddr + UART_FCR); 2097 *status &= port->read_status_mask; 2098 if (*status & port->ignore_status_mask) { 2099 if (++ignored > 100) 2100 break; 2101 } else { 2102 char flag = 0; 2103 if (*status & UART_LSR_SPECIAL) { 2104 if (*status & UART_LSR_BI) { 2105 flag = TTY_BREAK; 2106 port->icount.brk++; 2107 2108 if (port->port.flags & ASYNC_SAK) 2109 do_SAK(tty); 2110 } else if (*status & UART_LSR_PE) { 2111 flag = TTY_PARITY; 2112 port->icount.parity++; 2113 } else if (*status & UART_LSR_FE) { 2114 flag = TTY_FRAME; 2115 port->icount.frame++; 2116 } else if (*status & UART_LSR_OE) { 2117 flag = TTY_OVERRUN; 2118 port->icount.overrun++; 2119 } else 2120 flag = TTY_BREAK; 2121 } 2122 tty_insert_flip_char(tty, ch, flag); 2123 cnt++; 2124 if (cnt >= recv_room) { 2125 if (!port->ldisc_stop_rx) 2126 mxser_stoprx(tty); 2127 break; 2128 } 2129 2130 } 2131 2132 if (port->board->chip_flag) 2133 break; 2134 2135 *status = inb(port->ioaddr + UART_LSR); 2136 } while (*status & UART_LSR_DR); 2137 2138 end_intr: 2139 mxvar_log.rxcnt[tty->index] += cnt; 2140 port->mon_data.rxcnt += cnt; 2141 port->mon_data.up_rxcnt += cnt; 2142 2143 /* 2144 * We are called from an interrupt context with &port->slock 2145 * being held. Drop it temporarily in order to prevent 2146 * recursive locking. 2147 */ 2148 spin_unlock(&port->slock); 2149 tty_flip_buffer_push(tty); 2150 spin_lock(&port->slock); 2151 } 2152 2153 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port) 2154 { 2155 int count, cnt; 2156 2157 if (port->x_char) { 2158 outb(port->x_char, port->ioaddr + UART_TX); 2159 port->x_char = 0; 2160 mxvar_log.txcnt[tty->index]++; 2161 port->mon_data.txcnt++; 2162 port->mon_data.up_txcnt++; 2163 port->icount.tx++; 2164 return; 2165 } 2166 2167 if (port->port.xmit_buf == NULL) 2168 return; 2169 2170 if (port->xmit_cnt <= 0 || tty->stopped || 2171 (tty->hw_stopped && 2172 (port->type != PORT_16550A) && 2173 (!port->board->chip_flag))) { 2174 port->IER &= ~UART_IER_THRI; 2175 outb(port->IER, port->ioaddr + UART_IER); 2176 return; 2177 } 2178 2179 cnt = port->xmit_cnt; 2180 count = port->xmit_fifo_size; 2181 do { 2182 outb(port->port.xmit_buf[port->xmit_tail++], 2183 port->ioaddr + UART_TX); 2184 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1); 2185 if (--port->xmit_cnt <= 0) 2186 break; 2187 } while (--count > 0); 2188 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt); 2189 2190 port->mon_data.txcnt += (cnt - port->xmit_cnt); 2191 port->mon_data.up_txcnt += (cnt - port->xmit_cnt); 2192 port->icount.tx += (cnt - port->xmit_cnt); 2193 2194 if (port->xmit_cnt < WAKEUP_CHARS) 2195 tty_wakeup(tty); 2196 2197 if (port->xmit_cnt <= 0) { 2198 port->IER &= ~UART_IER_THRI; 2199 outb(port->IER, port->ioaddr + UART_IER); 2200 } 2201 } 2202 2203 /* 2204 * This is the serial driver's generic interrupt routine 2205 */ 2206 static irqreturn_t mxser_interrupt(int irq, void *dev_id) 2207 { 2208 int status, iir, i; 2209 struct mxser_board *brd = NULL; 2210 struct mxser_port *port; 2211 int max, irqbits, bits, msr; 2212 unsigned int int_cnt, pass_counter = 0; 2213 int handled = IRQ_NONE; 2214 struct tty_struct *tty; 2215 2216 for (i = 0; i < MXSER_BOARDS; i++) 2217 if (dev_id == &mxser_boards[i]) { 2218 brd = dev_id; 2219 break; 2220 } 2221 2222 if (i == MXSER_BOARDS) 2223 goto irq_stop; 2224 if (brd == NULL) 2225 goto irq_stop; 2226 max = brd->info->nports; 2227 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) { 2228 irqbits = inb(brd->vector) & brd->vector_mask; 2229 if (irqbits == brd->vector_mask) 2230 break; 2231 2232 handled = IRQ_HANDLED; 2233 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) { 2234 if (irqbits == brd->vector_mask) 2235 break; 2236 if (bits & irqbits) 2237 continue; 2238 port = &brd->ports[i]; 2239 2240 int_cnt = 0; 2241 spin_lock(&port->slock); 2242 do { 2243 iir = inb(port->ioaddr + UART_IIR); 2244 if (iir & UART_IIR_NO_INT) 2245 break; 2246 iir &= MOXA_MUST_IIR_MASK; 2247 tty = tty_port_tty_get(&port->port); 2248 if (!tty || 2249 (port->port.flags & ASYNC_CLOSING) || 2250 !(port->port.flags & 2251 ASYNC_INITIALIZED)) { 2252 status = inb(port->ioaddr + UART_LSR); 2253 outb(0x27, port->ioaddr + UART_FCR); 2254 inb(port->ioaddr + UART_MSR); 2255 tty_kref_put(tty); 2256 break; 2257 } 2258 2259 status = inb(port->ioaddr + UART_LSR); 2260 2261 if (status & UART_LSR_PE) 2262 port->err_shadow |= NPPI_NOTIFY_PARITY; 2263 if (status & UART_LSR_FE) 2264 port->err_shadow |= NPPI_NOTIFY_FRAMING; 2265 if (status & UART_LSR_OE) 2266 port->err_shadow |= 2267 NPPI_NOTIFY_HW_OVERRUN; 2268 if (status & UART_LSR_BI) 2269 port->err_shadow |= NPPI_NOTIFY_BREAK; 2270 2271 if (port->board->chip_flag) { 2272 if (iir == MOXA_MUST_IIR_GDA || 2273 iir == MOXA_MUST_IIR_RDA || 2274 iir == MOXA_MUST_IIR_RTO || 2275 iir == MOXA_MUST_IIR_LSR) 2276 mxser_receive_chars(tty, port, 2277 &status); 2278 2279 } else { 2280 status &= port->read_status_mask; 2281 if (status & UART_LSR_DR) 2282 mxser_receive_chars(tty, port, 2283 &status); 2284 } 2285 msr = inb(port->ioaddr + UART_MSR); 2286 if (msr & UART_MSR_ANY_DELTA) 2287 mxser_check_modem_status(tty, port, msr); 2288 2289 if (port->board->chip_flag) { 2290 if (iir == 0x02 && (status & 2291 UART_LSR_THRE)) 2292 mxser_transmit_chars(tty, port); 2293 } else { 2294 if (status & UART_LSR_THRE) 2295 mxser_transmit_chars(tty, port); 2296 } 2297 tty_kref_put(tty); 2298 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT); 2299 spin_unlock(&port->slock); 2300 } 2301 } 2302 2303 irq_stop: 2304 return handled; 2305 } 2306 2307 static const struct tty_operations mxser_ops = { 2308 .open = mxser_open, 2309 .close = mxser_close, 2310 .write = mxser_write, 2311 .put_char = mxser_put_char, 2312 .flush_chars = mxser_flush_chars, 2313 .write_room = mxser_write_room, 2314 .chars_in_buffer = mxser_chars_in_buffer, 2315 .flush_buffer = mxser_flush_buffer, 2316 .ioctl = mxser_ioctl, 2317 .throttle = mxser_throttle, 2318 .unthrottle = mxser_unthrottle, 2319 .set_termios = mxser_set_termios, 2320 .stop = mxser_stop, 2321 .start = mxser_start, 2322 .hangup = mxser_hangup, 2323 .break_ctl = mxser_rs_break, 2324 .wait_until_sent = mxser_wait_until_sent, 2325 .tiocmget = mxser_tiocmget, 2326 .tiocmset = mxser_tiocmset, 2327 .get_icount = mxser_get_icount, 2328 }; 2329 2330 struct tty_port_operations mxser_port_ops = { 2331 .carrier_raised = mxser_carrier_raised, 2332 .dtr_rts = mxser_dtr_rts, 2333 .activate = mxser_activate, 2334 .shutdown = mxser_shutdown_port, 2335 }; 2336 2337 /* 2338 * The MOXA Smartio/Industio serial driver boot-time initialization code! 2339 */ 2340 2341 static void mxser_release_ISA_res(struct mxser_board *brd) 2342 { 2343 free_irq(brd->irq, brd); 2344 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); 2345 release_region(brd->vector, 1); 2346 } 2347 2348 static int __devinit mxser_initbrd(struct mxser_board *brd, 2349 struct pci_dev *pdev) 2350 { 2351 struct mxser_port *info; 2352 unsigned int i; 2353 int retval; 2354 2355 printk(KERN_INFO "mxser: max. baud rate = %d bps\n", 2356 brd->ports[0].max_baud); 2357 2358 for (i = 0; i < brd->info->nports; i++) { 2359 info = &brd->ports[i]; 2360 tty_port_init(&info->port); 2361 info->port.ops = &mxser_port_ops; 2362 info->board = brd; 2363 info->stop_rx = 0; 2364 info->ldisc_stop_rx = 0; 2365 2366 /* Enhance mode enabled here */ 2367 if (brd->chip_flag != MOXA_OTHER_UART) 2368 mxser_enable_must_enchance_mode(info->ioaddr); 2369 2370 info->port.flags = ASYNC_SHARE_IRQ; 2371 info->type = brd->uart_type; 2372 2373 process_txrx_fifo(info); 2374 2375 info->custom_divisor = info->baud_base * 16; 2376 info->port.close_delay = 5 * HZ / 10; 2377 info->port.closing_wait = 30 * HZ; 2378 info->normal_termios = mxvar_sdriver->init_termios; 2379 memset(&info->mon_data, 0, sizeof(struct mxser_mon)); 2380 info->err_shadow = 0; 2381 spin_lock_init(&info->slock); 2382 2383 /* before set INT ISR, disable all int */ 2384 outb(inb(info->ioaddr + UART_IER) & 0xf0, 2385 info->ioaddr + UART_IER); 2386 } 2387 2388 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser", 2389 brd); 2390 if (retval) 2391 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may " 2392 "conflict with another device.\n", 2393 brd->info->name, brd->irq); 2394 2395 return retval; 2396 } 2397 2398 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd) 2399 { 2400 int id, i, bits; 2401 unsigned short regs[16], irq; 2402 unsigned char scratch, scratch2; 2403 2404 brd->chip_flag = MOXA_OTHER_UART; 2405 2406 id = mxser_read_register(cap, regs); 2407 switch (id) { 2408 case C168_ASIC_ID: 2409 brd->info = &mxser_cards[0]; 2410 break; 2411 case C104_ASIC_ID: 2412 brd->info = &mxser_cards[1]; 2413 break; 2414 case CI104J_ASIC_ID: 2415 brd->info = &mxser_cards[2]; 2416 break; 2417 case C102_ASIC_ID: 2418 brd->info = &mxser_cards[5]; 2419 break; 2420 case CI132_ASIC_ID: 2421 brd->info = &mxser_cards[6]; 2422 break; 2423 case CI134_ASIC_ID: 2424 brd->info = &mxser_cards[7]; 2425 break; 2426 default: 2427 return 0; 2428 } 2429 2430 irq = 0; 2431 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?) 2432 Flag-hack checks if configuration should be read as 2-port here. */ 2433 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) { 2434 irq = regs[9] & 0xF000; 2435 irq = irq | (irq >> 4); 2436 if (irq != (regs[9] & 0xFF00)) 2437 goto err_irqconflict; 2438 } else if (brd->info->nports == 4) { 2439 irq = regs[9] & 0xF000; 2440 irq = irq | (irq >> 4); 2441 irq = irq | (irq >> 8); 2442 if (irq != regs[9]) 2443 goto err_irqconflict; 2444 } else if (brd->info->nports == 8) { 2445 irq = regs[9] & 0xF000; 2446 irq = irq | (irq >> 4); 2447 irq = irq | (irq >> 8); 2448 if ((irq != regs[9]) || (irq != regs[10])) 2449 goto err_irqconflict; 2450 } 2451 2452 if (!irq) { 2453 printk(KERN_ERR "mxser: interrupt number unset\n"); 2454 return -EIO; 2455 } 2456 brd->irq = ((int)(irq & 0xF000) >> 12); 2457 for (i = 0; i < 8; i++) 2458 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8; 2459 if ((regs[12] & 0x80) == 0) { 2460 printk(KERN_ERR "mxser: invalid interrupt vector\n"); 2461 return -EIO; 2462 } 2463 brd->vector = (int)regs[11]; /* interrupt vector */ 2464 if (id == 1) 2465 brd->vector_mask = 0x00FF; 2466 else 2467 brd->vector_mask = 0x000F; 2468 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) { 2469 if (regs[12] & bits) { 2470 brd->ports[i].baud_base = 921600; 2471 brd->ports[i].max_baud = 921600; 2472 } else { 2473 brd->ports[i].baud_base = 115200; 2474 brd->ports[i].max_baud = 115200; 2475 } 2476 } 2477 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB); 2478 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR); 2479 outb(0, cap + UART_EFR); /* EFR is the same as FCR */ 2480 outb(scratch2, cap + UART_LCR); 2481 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR); 2482 scratch = inb(cap + UART_IIR); 2483 2484 if (scratch & 0xC0) 2485 brd->uart_type = PORT_16550A; 2486 else 2487 brd->uart_type = PORT_16450; 2488 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports, 2489 "mxser(IO)")) { 2490 printk(KERN_ERR "mxser: can't request ports I/O region: " 2491 "0x%.8lx-0x%.8lx\n", 2492 brd->ports[0].ioaddr, brd->ports[0].ioaddr + 2493 8 * brd->info->nports - 1); 2494 return -EIO; 2495 } 2496 if (!request_region(brd->vector, 1, "mxser(vector)")) { 2497 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); 2498 printk(KERN_ERR "mxser: can't request interrupt vector region: " 2499 "0x%.8lx-0x%.8lx\n", 2500 brd->ports[0].ioaddr, brd->ports[0].ioaddr + 2501 8 * brd->info->nports - 1); 2502 return -EIO; 2503 } 2504 return brd->info->nports; 2505 2506 err_irqconflict: 2507 printk(KERN_ERR "mxser: invalid interrupt number\n"); 2508 return -EIO; 2509 } 2510 2511 static int __devinit mxser_probe(struct pci_dev *pdev, 2512 const struct pci_device_id *ent) 2513 { 2514 #ifdef CONFIG_PCI 2515 struct mxser_board *brd; 2516 unsigned int i, j; 2517 unsigned long ioaddress; 2518 int retval = -EINVAL; 2519 2520 for (i = 0; i < MXSER_BOARDS; i++) 2521 if (mxser_boards[i].info == NULL) 2522 break; 2523 2524 if (i >= MXSER_BOARDS) { 2525 dev_err(&pdev->dev, "too many boards found (maximum %d), board " 2526 "not configured\n", MXSER_BOARDS); 2527 goto err; 2528 } 2529 2530 brd = &mxser_boards[i]; 2531 brd->idx = i * MXSER_PORTS_PER_BOARD; 2532 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n", 2533 mxser_cards[ent->driver_data].name, 2534 pdev->bus->number, PCI_SLOT(pdev->devfn)); 2535 2536 retval = pci_enable_device(pdev); 2537 if (retval) { 2538 dev_err(&pdev->dev, "PCI enable failed\n"); 2539 goto err; 2540 } 2541 2542 /* io address */ 2543 ioaddress = pci_resource_start(pdev, 2); 2544 retval = pci_request_region(pdev, 2, "mxser(IO)"); 2545 if (retval) 2546 goto err_dis; 2547 2548 brd->info = &mxser_cards[ent->driver_data]; 2549 for (i = 0; i < brd->info->nports; i++) 2550 brd->ports[i].ioaddr = ioaddress + 8 * i; 2551 2552 /* vector */ 2553 ioaddress = pci_resource_start(pdev, 3); 2554 retval = pci_request_region(pdev, 3, "mxser(vector)"); 2555 if (retval) 2556 goto err_zero; 2557 brd->vector = ioaddress; 2558 2559 /* irq */ 2560 brd->irq = pdev->irq; 2561 2562 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr); 2563 brd->uart_type = PORT_16550A; 2564 brd->vector_mask = 0; 2565 2566 for (i = 0; i < brd->info->nports; i++) { 2567 for (j = 0; j < UART_INFO_NUM; j++) { 2568 if (Gpci_uart_info[j].type == brd->chip_flag) { 2569 brd->ports[i].max_baud = 2570 Gpci_uart_info[j].max_baud; 2571 2572 /* exception....CP-102 */ 2573 if (brd->info->flags & MXSER_HIGHBAUD) 2574 brd->ports[i].max_baud = 921600; 2575 break; 2576 } 2577 } 2578 } 2579 2580 if (brd->chip_flag == MOXA_MUST_MU860_HWID) { 2581 for (i = 0; i < brd->info->nports; i++) { 2582 if (i < 4) 2583 brd->ports[i].opmode_ioaddr = ioaddress + 4; 2584 else 2585 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c; 2586 } 2587 outb(0, ioaddress + 4); /* default set to RS232 mode */ 2588 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */ 2589 } 2590 2591 for (i = 0; i < brd->info->nports; i++) { 2592 brd->vector_mask |= (1 << i); 2593 brd->ports[i].baud_base = 921600; 2594 } 2595 2596 /* mxser_initbrd will hook ISR. */ 2597 retval = mxser_initbrd(brd, pdev); 2598 if (retval) 2599 goto err_rel3; 2600 2601 for (i = 0; i < brd->info->nports; i++) 2602 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev); 2603 2604 pci_set_drvdata(pdev, brd); 2605 2606 return 0; 2607 err_rel3: 2608 pci_release_region(pdev, 3); 2609 err_zero: 2610 brd->info = NULL; 2611 pci_release_region(pdev, 2); 2612 err_dis: 2613 pci_disable_device(pdev); 2614 err: 2615 return retval; 2616 #else 2617 return -ENODEV; 2618 #endif 2619 } 2620 2621 static void __devexit mxser_remove(struct pci_dev *pdev) 2622 { 2623 #ifdef CONFIG_PCI 2624 struct mxser_board *brd = pci_get_drvdata(pdev); 2625 unsigned int i; 2626 2627 for (i = 0; i < brd->info->nports; i++) 2628 tty_unregister_device(mxvar_sdriver, brd->idx + i); 2629 2630 free_irq(pdev->irq, brd); 2631 pci_release_region(pdev, 2); 2632 pci_release_region(pdev, 3); 2633 pci_disable_device(pdev); 2634 brd->info = NULL; 2635 #endif 2636 } 2637 2638 static struct pci_driver mxser_driver = { 2639 .name = "mxser", 2640 .id_table = mxser_pcibrds, 2641 .probe = mxser_probe, 2642 .remove = __devexit_p(mxser_remove) 2643 }; 2644 2645 static int __init mxser_module_init(void) 2646 { 2647 struct mxser_board *brd; 2648 unsigned int b, i, m; 2649 int retval; 2650 2651 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1); 2652 if (!mxvar_sdriver) 2653 return -ENOMEM; 2654 2655 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", 2656 MXSER_VERSION); 2657 2658 /* Initialize the tty_driver structure */ 2659 mxvar_sdriver->name = "ttyMI"; 2660 mxvar_sdriver->major = ttymajor; 2661 mxvar_sdriver->minor_start = 0; 2662 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL; 2663 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL; 2664 mxvar_sdriver->init_termios = tty_std_termios; 2665 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; 2666 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV; 2667 tty_set_operations(mxvar_sdriver, &mxser_ops); 2668 2669 retval = tty_register_driver(mxvar_sdriver); 2670 if (retval) { 2671 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family " 2672 "tty driver !\n"); 2673 goto err_put; 2674 } 2675 2676 /* Start finding ISA boards here */ 2677 for (m = 0, b = 0; b < MXSER_BOARDS; b++) { 2678 if (!ioaddr[b]) 2679 continue; 2680 2681 brd = &mxser_boards[m]; 2682 retval = mxser_get_ISA_conf(ioaddr[b], brd); 2683 if (retval <= 0) { 2684 brd->info = NULL; 2685 continue; 2686 } 2687 2688 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n", 2689 brd->info->name, ioaddr[b]); 2690 2691 /* mxser_initbrd will hook ISR. */ 2692 if (mxser_initbrd(brd, NULL) < 0) { 2693 brd->info = NULL; 2694 continue; 2695 } 2696 2697 brd->idx = m * MXSER_PORTS_PER_BOARD; 2698 for (i = 0; i < brd->info->nports; i++) 2699 tty_register_device(mxvar_sdriver, brd->idx + i, NULL); 2700 2701 m++; 2702 } 2703 2704 retval = pci_register_driver(&mxser_driver); 2705 if (retval) { 2706 printk(KERN_ERR "mxser: can't register pci driver\n"); 2707 if (!m) { 2708 retval = -ENODEV; 2709 goto err_unr; 2710 } /* else: we have some ISA cards under control */ 2711 } 2712 2713 return 0; 2714 err_unr: 2715 tty_unregister_driver(mxvar_sdriver); 2716 err_put: 2717 put_tty_driver(mxvar_sdriver); 2718 return retval; 2719 } 2720 2721 static void __exit mxser_module_exit(void) 2722 { 2723 unsigned int i, j; 2724 2725 pci_unregister_driver(&mxser_driver); 2726 2727 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */ 2728 if (mxser_boards[i].info != NULL) 2729 for (j = 0; j < mxser_boards[i].info->nports; j++) 2730 tty_unregister_device(mxvar_sdriver, 2731 mxser_boards[i].idx + j); 2732 tty_unregister_driver(mxvar_sdriver); 2733 put_tty_driver(mxvar_sdriver); 2734 2735 for (i = 0; i < MXSER_BOARDS; i++) 2736 if (mxser_boards[i].info != NULL) 2737 mxser_release_ISA_res(&mxser_boards[i]); 2738 } 2739 2740 module_init(mxser_module_init); 2741 module_exit(mxser_module_exit); 2742