1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * mxser.c -- MOXA Smartio/Industio family multiport serial driver. 4 * 5 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com). 6 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com> 7 * 8 * This code is loosely based on the 1.8 moxa driver which is based on 9 * Linux serial driver, written by Linus Torvalds, Theodore T'so and 10 * others. 11 * 12 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox 13 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on 14 * www.moxa.com. 15 * - Fixed x86_64 cleanness 16 */ 17 18 #include <linux/module.h> 19 #include <linux/errno.h> 20 #include <linux/signal.h> 21 #include <linux/sched.h> 22 #include <linux/timer.h> 23 #include <linux/interrupt.h> 24 #include <linux/tty.h> 25 #include <linux/tty_flip.h> 26 #include <linux/serial.h> 27 #include <linux/serial_reg.h> 28 #include <linux/major.h> 29 #include <linux/string.h> 30 #include <linux/fcntl.h> 31 #include <linux/ptrace.h> 32 #include <linux/ioport.h> 33 #include <linux/mm.h> 34 #include <linux/delay.h> 35 #include <linux/pci.h> 36 #include <linux/bitops.h> 37 #include <linux/slab.h> 38 #include <linux/ratelimit.h> 39 40 #include <asm/io.h> 41 #include <asm/irq.h> 42 #include <linux/uaccess.h> 43 44 #include "mxser.h" 45 46 #define MXSER_VERSION "2.0.5" /* 1.14 */ 47 #define MXSERMAJOR 174 48 49 #define MXSER_BOARDS 4 /* Max. boards */ 50 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */ 51 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD) 52 #define MXSER_ISR_PASS_LIMIT 100 53 54 /*CheckIsMoxaMust return value*/ 55 #define MOXA_OTHER_UART 0x00 56 #define MOXA_MUST_MU150_HWID 0x01 57 #define MOXA_MUST_MU860_HWID 0x02 58 59 #define WAKEUP_CHARS 256 60 61 #define UART_MCR_AFE 0x20 62 #define UART_LSR_SPECIAL 0x1E 63 64 #define PCI_DEVICE_ID_POS104UL 0x1044 65 #define PCI_DEVICE_ID_CB108 0x1080 66 #define PCI_DEVICE_ID_CP102UF 0x1023 67 #define PCI_DEVICE_ID_CP112UL 0x1120 68 #define PCI_DEVICE_ID_CB114 0x1142 69 #define PCI_DEVICE_ID_CP114UL 0x1143 70 #define PCI_DEVICE_ID_CB134I 0x1341 71 #define PCI_DEVICE_ID_CP138U 0x1380 72 73 74 #define C168_ASIC_ID 1 75 #define C104_ASIC_ID 2 76 #define C102_ASIC_ID 0xB 77 #define CI132_ASIC_ID 4 78 #define CI134_ASIC_ID 3 79 #define CI104J_ASIC_ID 5 80 81 #define MXSER_HIGHBAUD 1 82 #define MXSER_HAS2 2 83 84 /* This is only for PCI */ 85 static const struct { 86 int type; 87 int tx_fifo; 88 int rx_fifo; 89 int xmit_fifo_size; 90 int rx_high_water; 91 int rx_trigger; 92 int rx_low_water; 93 long max_baud; 94 } Gpci_uart_info[] = { 95 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L}, 96 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L}, 97 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L} 98 }; 99 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info) 100 101 struct mxser_cardinfo { 102 char *name; 103 unsigned int nports; 104 unsigned int flags; 105 }; 106 107 static const struct mxser_cardinfo mxser_cards[] = { 108 /* 0*/ { "C168 series", 8, }, 109 { "C104 series", 4, }, 110 { "CI-104J series", 4, }, 111 { "C168H/PCI series", 8, }, 112 { "C104H/PCI series", 4, }, 113 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */ 114 { "CI-132 series", 4, MXSER_HAS2 }, 115 { "CI-134 series", 4, }, 116 { "CP-132 series", 2, }, 117 { "CP-114 series", 4, }, 118 /*10*/ { "CT-114 series", 4, }, 119 { "CP-102 series", 2, MXSER_HIGHBAUD }, 120 { "CP-104U series", 4, }, 121 { "CP-168U series", 8, }, 122 { "CP-132U series", 2, }, 123 /*15*/ { "CP-134U series", 4, }, 124 { "CP-104JU series", 4, }, 125 { "Moxa UC7000 Serial", 8, }, /* RC7000 */ 126 { "CP-118U series", 8, }, 127 { "CP-102UL series", 2, }, 128 /*20*/ { "CP-102U series", 2, }, 129 { "CP-118EL series", 8, }, 130 { "CP-168EL series", 8, }, 131 { "CP-104EL series", 4, }, 132 { "CB-108 series", 8, }, 133 /*25*/ { "CB-114 series", 4, }, 134 { "CB-134I series", 4, }, 135 { "CP-138U series", 8, }, 136 { "POS-104UL series", 4, }, 137 { "CP-114UL series", 4, }, 138 /*30*/ { "CP-102UF series", 2, }, 139 { "CP-112UL series", 2, }, 140 }; 141 142 /* driver_data correspond to the lines in the structure above 143 see also ISA probe function before you change something */ 144 static const struct pci_device_id mxser_pcibrds[] = { 145 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 }, 146 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 }, 147 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 }, 148 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 }, 149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 }, 150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 }, 151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 }, 152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 }, 153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 }, 154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 }, 155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 }, 156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 }, 157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 }, 158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 }, 159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 }, 160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 }, 161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 }, 162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 }, 163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 }, 164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 }, 165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 }, 166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 }, 167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, 168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 }, 169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 }, 170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 }, 171 { } 172 }; 173 MODULE_DEVICE_TABLE(pci, mxser_pcibrds); 174 175 static unsigned long ioaddr[MXSER_BOARDS]; 176 static int ttymajor = MXSERMAJOR; 177 178 /* Variables for insmod */ 179 180 MODULE_AUTHOR("Casper Yang"); 181 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver"); 182 module_param_hw_array(ioaddr, ulong, ioport, NULL, 0); 183 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board"); 184 module_param(ttymajor, int, 0); 185 MODULE_LICENSE("GPL"); 186 187 struct mxser_log { 188 int tick; 189 unsigned long rxcnt[MXSER_PORTS]; 190 unsigned long txcnt[MXSER_PORTS]; 191 }; 192 193 struct mxser_mon { 194 unsigned long rxcnt; 195 unsigned long txcnt; 196 unsigned long up_rxcnt; 197 unsigned long up_txcnt; 198 int modem_status; 199 unsigned char hold_reason; 200 }; 201 202 struct mxser_mon_ext { 203 unsigned long rx_cnt[32]; 204 unsigned long tx_cnt[32]; 205 unsigned long up_rxcnt[32]; 206 unsigned long up_txcnt[32]; 207 int modem_status[32]; 208 209 long baudrate[32]; 210 int databits[32]; 211 int stopbits[32]; 212 int parity[32]; 213 int flowctrl[32]; 214 int fifo[32]; 215 int iftype[32]; 216 }; 217 218 struct mxser_board; 219 220 struct mxser_port { 221 struct tty_port port; 222 struct mxser_board *board; 223 224 unsigned long ioaddr; 225 unsigned long opmode_ioaddr; 226 int max_baud; 227 228 int rx_high_water; 229 int rx_trigger; /* Rx fifo trigger level */ 230 int rx_low_water; 231 int baud_base; /* max. speed */ 232 int type; /* UART type */ 233 234 int x_char; /* xon/xoff character */ 235 int IER; /* Interrupt Enable Register */ 236 int MCR; /* Modem control register */ 237 238 unsigned char stop_rx; 239 unsigned char ldisc_stop_rx; 240 241 int custom_divisor; 242 unsigned char err_shadow; 243 244 struct async_icount icount; /* kernel counters for 4 input interrupts */ 245 unsigned int timeout; 246 247 int read_status_mask; 248 int ignore_status_mask; 249 unsigned int xmit_fifo_size; 250 int xmit_head; 251 int xmit_tail; 252 int xmit_cnt; 253 int closing; 254 255 struct ktermios normal_termios; 256 257 struct mxser_mon mon_data; 258 259 spinlock_t slock; 260 }; 261 262 struct mxser_board { 263 unsigned int idx; 264 int irq; 265 const struct mxser_cardinfo *info; 266 unsigned long vector; 267 unsigned long vector_mask; 268 269 int chip_flag; 270 int uart_type; 271 272 struct mxser_port ports[MXSER_PORTS_PER_BOARD]; 273 }; 274 275 struct mxser_mstatus { 276 tcflag_t cflag; 277 int cts; 278 int dsr; 279 int ri; 280 int dcd; 281 }; 282 283 static struct mxser_board mxser_boards[MXSER_BOARDS]; 284 static struct tty_driver *mxvar_sdriver; 285 static struct mxser_log mxvar_log; 286 static int mxser_set_baud_method[MXSER_PORTS + 1]; 287 288 static void mxser_enable_must_enchance_mode(unsigned long baseio) 289 { 290 u8 oldlcr; 291 u8 efr; 292 293 oldlcr = inb(baseio + UART_LCR); 294 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 295 296 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 297 efr |= MOXA_MUST_EFR_EFRB_ENABLE; 298 299 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 300 outb(oldlcr, baseio + UART_LCR); 301 } 302 303 #ifdef CONFIG_PCI 304 static void mxser_disable_must_enchance_mode(unsigned long baseio) 305 { 306 u8 oldlcr; 307 u8 efr; 308 309 oldlcr = inb(baseio + UART_LCR); 310 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 311 312 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 313 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE; 314 315 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 316 outb(oldlcr, baseio + UART_LCR); 317 } 318 #endif 319 320 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value) 321 { 322 u8 oldlcr; 323 u8 efr; 324 325 oldlcr = inb(baseio + UART_LCR); 326 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 327 328 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 329 efr &= ~MOXA_MUST_EFR_BANK_MASK; 330 efr |= MOXA_MUST_EFR_BANK0; 331 332 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 333 outb(value, baseio + MOXA_MUST_XON1_REGISTER); 334 outb(oldlcr, baseio + UART_LCR); 335 } 336 337 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value) 338 { 339 u8 oldlcr; 340 u8 efr; 341 342 oldlcr = inb(baseio + UART_LCR); 343 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 344 345 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 346 efr &= ~MOXA_MUST_EFR_BANK_MASK; 347 efr |= MOXA_MUST_EFR_BANK0; 348 349 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 350 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER); 351 outb(oldlcr, baseio + UART_LCR); 352 } 353 354 static void mxser_set_must_fifo_value(struct mxser_port *info) 355 { 356 u8 oldlcr; 357 u8 efr; 358 359 oldlcr = inb(info->ioaddr + UART_LCR); 360 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR); 361 362 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER); 363 efr &= ~MOXA_MUST_EFR_BANK_MASK; 364 efr |= MOXA_MUST_EFR_BANK1; 365 366 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER); 367 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER); 368 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER); 369 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER); 370 outb(oldlcr, info->ioaddr + UART_LCR); 371 } 372 373 static void mxser_set_must_enum_value(unsigned long baseio, u8 value) 374 { 375 u8 oldlcr; 376 u8 efr; 377 378 oldlcr = inb(baseio + UART_LCR); 379 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 380 381 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 382 efr &= ~MOXA_MUST_EFR_BANK_MASK; 383 efr |= MOXA_MUST_EFR_BANK2; 384 385 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 386 outb(value, baseio + MOXA_MUST_ENUM_REGISTER); 387 outb(oldlcr, baseio + UART_LCR); 388 } 389 390 #ifdef CONFIG_PCI 391 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId) 392 { 393 u8 oldlcr; 394 u8 efr; 395 396 oldlcr = inb(baseio + UART_LCR); 397 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 398 399 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 400 efr &= ~MOXA_MUST_EFR_BANK_MASK; 401 efr |= MOXA_MUST_EFR_BANK2; 402 403 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 404 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER); 405 outb(oldlcr, baseio + UART_LCR); 406 } 407 #endif 408 409 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio) 410 { 411 u8 oldlcr; 412 u8 efr; 413 414 oldlcr = inb(baseio + UART_LCR); 415 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 416 417 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 418 efr &= ~MOXA_MUST_EFR_SF_MASK; 419 420 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 421 outb(oldlcr, baseio + UART_LCR); 422 } 423 424 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio) 425 { 426 u8 oldlcr; 427 u8 efr; 428 429 oldlcr = inb(baseio + UART_LCR); 430 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 431 432 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 433 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; 434 efr |= MOXA_MUST_EFR_SF_TX1; 435 436 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 437 outb(oldlcr, baseio + UART_LCR); 438 } 439 440 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio) 441 { 442 u8 oldlcr; 443 u8 efr; 444 445 oldlcr = inb(baseio + UART_LCR); 446 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 447 448 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 449 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; 450 451 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 452 outb(oldlcr, baseio + UART_LCR); 453 } 454 455 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio) 456 { 457 u8 oldlcr; 458 u8 efr; 459 460 oldlcr = inb(baseio + UART_LCR); 461 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 462 463 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 464 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; 465 efr |= MOXA_MUST_EFR_SF_RX1; 466 467 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 468 outb(oldlcr, baseio + UART_LCR); 469 } 470 471 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio) 472 { 473 u8 oldlcr; 474 u8 efr; 475 476 oldlcr = inb(baseio + UART_LCR); 477 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 478 479 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 480 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; 481 482 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 483 outb(oldlcr, baseio + UART_LCR); 484 } 485 486 #ifdef CONFIG_PCI 487 static int CheckIsMoxaMust(unsigned long io) 488 { 489 u8 oldmcr, hwid; 490 int i; 491 492 outb(0, io + UART_LCR); 493 mxser_disable_must_enchance_mode(io); 494 oldmcr = inb(io + UART_MCR); 495 outb(0, io + UART_MCR); 496 mxser_set_must_xon1_value(io, 0x11); 497 if ((hwid = inb(io + UART_MCR)) != 0) { 498 outb(oldmcr, io + UART_MCR); 499 return MOXA_OTHER_UART; 500 } 501 502 mxser_get_must_hardware_id(io, &hwid); 503 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */ 504 if (hwid == Gpci_uart_info[i].type) 505 return (int)hwid; 506 } 507 return MOXA_OTHER_UART; 508 } 509 #endif 510 511 static void process_txrx_fifo(struct mxser_port *info) 512 { 513 int i; 514 515 if ((info->type == PORT_16450) || (info->type == PORT_8250)) { 516 info->rx_trigger = 1; 517 info->rx_high_water = 1; 518 info->rx_low_water = 1; 519 info->xmit_fifo_size = 1; 520 } else 521 for (i = 0; i < UART_INFO_NUM; i++) 522 if (info->board->chip_flag == Gpci_uart_info[i].type) { 523 info->rx_trigger = Gpci_uart_info[i].rx_trigger; 524 info->rx_low_water = Gpci_uart_info[i].rx_low_water; 525 info->rx_high_water = Gpci_uart_info[i].rx_high_water; 526 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size; 527 break; 528 } 529 } 530 531 static unsigned char mxser_get_msr(int baseaddr, int mode, int port) 532 { 533 static unsigned char mxser_msr[MXSER_PORTS + 1]; 534 unsigned char status = 0; 535 536 status = inb(baseaddr + UART_MSR); 537 538 mxser_msr[port] &= 0x0F; 539 mxser_msr[port] |= status; 540 status = mxser_msr[port]; 541 if (mode) 542 mxser_msr[port] = 0; 543 544 return status; 545 } 546 547 static int mxser_carrier_raised(struct tty_port *port) 548 { 549 struct mxser_port *mp = container_of(port, struct mxser_port, port); 550 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0; 551 } 552 553 static void mxser_dtr_rts(struct tty_port *port, int on) 554 { 555 struct mxser_port *mp = container_of(port, struct mxser_port, port); 556 unsigned long flags; 557 558 spin_lock_irqsave(&mp->slock, flags); 559 if (on) 560 outb(inb(mp->ioaddr + UART_MCR) | 561 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR); 562 else 563 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS), 564 mp->ioaddr + UART_MCR); 565 spin_unlock_irqrestore(&mp->slock, flags); 566 } 567 568 static int mxser_set_baud(struct tty_struct *tty, long newspd) 569 { 570 struct mxser_port *info = tty->driver_data; 571 unsigned int quot = 0, baud; 572 unsigned char cval; 573 u64 timeout; 574 575 if (!info->ioaddr) 576 return -1; 577 578 if (newspd > info->max_baud) 579 return -1; 580 581 if (newspd == 134) { 582 quot = 2 * info->baud_base / 269; 583 tty_encode_baud_rate(tty, 134, 134); 584 } else if (newspd) { 585 quot = info->baud_base / newspd; 586 if (quot == 0) 587 quot = 1; 588 baud = info->baud_base/quot; 589 tty_encode_baud_rate(tty, baud, baud); 590 } else { 591 quot = 0; 592 } 593 594 /* 595 * worst case (128 * 1000 * 10 * 18432) needs 35 bits, so divide in the 596 * u64 domain 597 */ 598 timeout = (u64)info->xmit_fifo_size * HZ * 10 * quot; 599 do_div(timeout, info->baud_base); 600 info->timeout = timeout + HZ / 50; /* Add .02 seconds of slop */ 601 602 if (quot) { 603 info->MCR |= UART_MCR_DTR; 604 outb(info->MCR, info->ioaddr + UART_MCR); 605 } else { 606 info->MCR &= ~UART_MCR_DTR; 607 outb(info->MCR, info->ioaddr + UART_MCR); 608 return 0; 609 } 610 611 cval = inb(info->ioaddr + UART_LCR); 612 613 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */ 614 615 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */ 616 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */ 617 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */ 618 619 #ifdef BOTHER 620 if (C_BAUD(tty) == BOTHER) { 621 quot = info->baud_base % newspd; 622 quot *= 8; 623 if (quot % newspd > newspd / 2) { 624 quot /= newspd; 625 quot++; 626 } else 627 quot /= newspd; 628 629 mxser_set_must_enum_value(info->ioaddr, quot); 630 } else 631 #endif 632 mxser_set_must_enum_value(info->ioaddr, 0); 633 634 return 0; 635 } 636 637 /* 638 * This routine is called to set the UART divisor registers to match 639 * the specified baud rate for a serial port. 640 */ 641 static int mxser_change_speed(struct tty_struct *tty) 642 { 643 struct mxser_port *info = tty->driver_data; 644 unsigned cflag, cval, fcr; 645 int ret = 0; 646 unsigned char status; 647 648 cflag = tty->termios.c_cflag; 649 if (!info->ioaddr) 650 return ret; 651 652 if (mxser_set_baud_method[tty->index] == 0) 653 mxser_set_baud(tty, tty_get_baud_rate(tty)); 654 655 /* byte size and parity */ 656 switch (cflag & CSIZE) { 657 case CS5: 658 cval = 0x00; 659 break; 660 case CS6: 661 cval = 0x01; 662 break; 663 case CS7: 664 cval = 0x02; 665 break; 666 case CS8: 667 cval = 0x03; 668 break; 669 default: 670 cval = 0x00; 671 break; /* too keep GCC shut... */ 672 } 673 if (cflag & CSTOPB) 674 cval |= 0x04; 675 if (cflag & PARENB) 676 cval |= UART_LCR_PARITY; 677 if (!(cflag & PARODD)) 678 cval |= UART_LCR_EPAR; 679 if (cflag & CMSPAR) 680 cval |= UART_LCR_SPAR; 681 682 if ((info->type == PORT_8250) || (info->type == PORT_16450)) { 683 if (info->board->chip_flag) { 684 fcr = UART_FCR_ENABLE_FIFO; 685 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; 686 mxser_set_must_fifo_value(info); 687 } else 688 fcr = 0; 689 } else { 690 fcr = UART_FCR_ENABLE_FIFO; 691 if (info->board->chip_flag) { 692 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; 693 mxser_set_must_fifo_value(info); 694 } else { 695 switch (info->rx_trigger) { 696 case 1: 697 fcr |= UART_FCR_TRIGGER_1; 698 break; 699 case 4: 700 fcr |= UART_FCR_TRIGGER_4; 701 break; 702 case 8: 703 fcr |= UART_FCR_TRIGGER_8; 704 break; 705 default: 706 fcr |= UART_FCR_TRIGGER_14; 707 break; 708 } 709 } 710 } 711 712 /* CTS flow control flag and modem status interrupts */ 713 info->IER &= ~UART_IER_MSI; 714 info->MCR &= ~UART_MCR_AFE; 715 tty_port_set_cts_flow(&info->port, cflag & CRTSCTS); 716 if (cflag & CRTSCTS) { 717 info->IER |= UART_IER_MSI; 718 if ((info->type == PORT_16550A) || (info->board->chip_flag)) { 719 info->MCR |= UART_MCR_AFE; 720 } else { 721 status = inb(info->ioaddr + UART_MSR); 722 if (tty->hw_stopped) { 723 if (status & UART_MSR_CTS) { 724 tty->hw_stopped = 0; 725 if (info->type != PORT_16550A && 726 !info->board->chip_flag) { 727 outb(info->IER & ~UART_IER_THRI, 728 info->ioaddr + 729 UART_IER); 730 info->IER |= UART_IER_THRI; 731 outb(info->IER, info->ioaddr + 732 UART_IER); 733 } 734 tty_wakeup(tty); 735 } 736 } else { 737 if (!(status & UART_MSR_CTS)) { 738 tty->hw_stopped = 1; 739 if ((info->type != PORT_16550A) && 740 (!info->board->chip_flag)) { 741 info->IER &= ~UART_IER_THRI; 742 outb(info->IER, info->ioaddr + 743 UART_IER); 744 } 745 } 746 } 747 } 748 } 749 outb(info->MCR, info->ioaddr + UART_MCR); 750 tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL); 751 if (~cflag & CLOCAL) 752 info->IER |= UART_IER_MSI; 753 outb(info->IER, info->ioaddr + UART_IER); 754 755 /* 756 * Set up parity check flag 757 */ 758 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 759 if (I_INPCK(tty)) 760 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE; 761 if (I_BRKINT(tty) || I_PARMRK(tty)) 762 info->read_status_mask |= UART_LSR_BI; 763 764 info->ignore_status_mask = 0; 765 766 if (I_IGNBRK(tty)) { 767 info->ignore_status_mask |= UART_LSR_BI; 768 info->read_status_mask |= UART_LSR_BI; 769 /* 770 * If we're ignore parity and break indicators, ignore 771 * overruns too. (For real raw support). 772 */ 773 if (I_IGNPAR(tty)) { 774 info->ignore_status_mask |= 775 UART_LSR_OE | 776 UART_LSR_PE | 777 UART_LSR_FE; 778 info->read_status_mask |= 779 UART_LSR_OE | 780 UART_LSR_PE | 781 UART_LSR_FE; 782 } 783 } 784 if (info->board->chip_flag) { 785 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty)); 786 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty)); 787 if (I_IXON(tty)) { 788 mxser_enable_must_rx_software_flow_control( 789 info->ioaddr); 790 } else { 791 mxser_disable_must_rx_software_flow_control( 792 info->ioaddr); 793 } 794 if (I_IXOFF(tty)) { 795 mxser_enable_must_tx_software_flow_control( 796 info->ioaddr); 797 } else { 798 mxser_disable_must_tx_software_flow_control( 799 info->ioaddr); 800 } 801 } 802 803 804 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */ 805 outb(cval, info->ioaddr + UART_LCR); 806 807 return ret; 808 } 809 810 static void mxser_check_modem_status(struct tty_struct *tty, 811 struct mxser_port *port, int status) 812 { 813 /* update input line counters */ 814 if (status & UART_MSR_TERI) 815 port->icount.rng++; 816 if (status & UART_MSR_DDSR) 817 port->icount.dsr++; 818 if (status & UART_MSR_DDCD) 819 port->icount.dcd++; 820 if (status & UART_MSR_DCTS) 821 port->icount.cts++; 822 port->mon_data.modem_status = status; 823 wake_up_interruptible(&port->port.delta_msr_wait); 824 825 if (tty_port_check_carrier(&port->port) && (status & UART_MSR_DDCD)) { 826 if (status & UART_MSR_DCD) 827 wake_up_interruptible(&port->port.open_wait); 828 } 829 830 if (tty_port_cts_enabled(&port->port)) { 831 if (tty->hw_stopped) { 832 if (status & UART_MSR_CTS) { 833 tty->hw_stopped = 0; 834 835 if ((port->type != PORT_16550A) && 836 (!port->board->chip_flag)) { 837 outb(port->IER & ~UART_IER_THRI, 838 port->ioaddr + UART_IER); 839 port->IER |= UART_IER_THRI; 840 outb(port->IER, port->ioaddr + 841 UART_IER); 842 } 843 tty_wakeup(tty); 844 } 845 } else { 846 if (!(status & UART_MSR_CTS)) { 847 tty->hw_stopped = 1; 848 if (port->type != PORT_16550A && 849 !port->board->chip_flag) { 850 port->IER &= ~UART_IER_THRI; 851 outb(port->IER, port->ioaddr + 852 UART_IER); 853 } 854 } 855 } 856 } 857 } 858 859 static int mxser_activate(struct tty_port *port, struct tty_struct *tty) 860 { 861 struct mxser_port *info = container_of(port, struct mxser_port, port); 862 unsigned long page; 863 unsigned long flags; 864 865 page = __get_free_page(GFP_KERNEL); 866 if (!page) 867 return -ENOMEM; 868 869 spin_lock_irqsave(&info->slock, flags); 870 871 if (!info->ioaddr || !info->type) { 872 set_bit(TTY_IO_ERROR, &tty->flags); 873 free_page(page); 874 spin_unlock_irqrestore(&info->slock, flags); 875 return 0; 876 } 877 info->port.xmit_buf = (unsigned char *) page; 878 879 /* 880 * Clear the FIFO buffers and disable them 881 * (they will be reenabled in mxser_change_speed()) 882 */ 883 if (info->board->chip_flag) 884 outb((UART_FCR_CLEAR_RCVR | 885 UART_FCR_CLEAR_XMIT | 886 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR); 887 else 888 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), 889 info->ioaddr + UART_FCR); 890 891 /* 892 * At this point there's no way the LSR could still be 0xFF; 893 * if it is, then bail out, because there's likely no UART 894 * here. 895 */ 896 if (inb(info->ioaddr + UART_LSR) == 0xff) { 897 spin_unlock_irqrestore(&info->slock, flags); 898 if (capable(CAP_SYS_ADMIN)) { 899 set_bit(TTY_IO_ERROR, &tty->flags); 900 return 0; 901 } else 902 return -ENODEV; 903 } 904 905 /* 906 * Clear the interrupt registers. 907 */ 908 (void) inb(info->ioaddr + UART_LSR); 909 (void) inb(info->ioaddr + UART_RX); 910 (void) inb(info->ioaddr + UART_IIR); 911 (void) inb(info->ioaddr + UART_MSR); 912 913 /* 914 * Now, initialize the UART 915 */ 916 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */ 917 info->MCR = UART_MCR_DTR | UART_MCR_RTS; 918 outb(info->MCR, info->ioaddr + UART_MCR); 919 920 /* 921 * Finally, enable interrupts 922 */ 923 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; 924 925 if (info->board->chip_flag) 926 info->IER |= MOXA_MUST_IER_EGDAI; 927 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */ 928 929 /* 930 * And clear the interrupt registers again for luck. 931 */ 932 (void) inb(info->ioaddr + UART_LSR); 933 (void) inb(info->ioaddr + UART_RX); 934 (void) inb(info->ioaddr + UART_IIR); 935 (void) inb(info->ioaddr + UART_MSR); 936 937 clear_bit(TTY_IO_ERROR, &tty->flags); 938 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; 939 940 /* 941 * and set the speed of the serial port 942 */ 943 mxser_change_speed(tty); 944 spin_unlock_irqrestore(&info->slock, flags); 945 946 return 0; 947 } 948 949 /* 950 * This routine will shutdown a serial port 951 */ 952 static void mxser_shutdown_port(struct tty_port *port) 953 { 954 struct mxser_port *info = container_of(port, struct mxser_port, port); 955 unsigned long flags; 956 957 spin_lock_irqsave(&info->slock, flags); 958 959 /* 960 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq 961 * here so the queue might never be waken up 962 */ 963 wake_up_interruptible(&info->port.delta_msr_wait); 964 965 /* 966 * Free the xmit buffer, if necessary 967 */ 968 if (info->port.xmit_buf) { 969 free_page((unsigned long) info->port.xmit_buf); 970 info->port.xmit_buf = NULL; 971 } 972 973 info->IER = 0; 974 outb(0x00, info->ioaddr + UART_IER); 975 976 /* clear Rx/Tx FIFO's */ 977 if (info->board->chip_flag) 978 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | 979 MOXA_MUST_FCR_GDA_MODE_ENABLE, 980 info->ioaddr + UART_FCR); 981 else 982 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, 983 info->ioaddr + UART_FCR); 984 985 /* read data port to reset things */ 986 (void) inb(info->ioaddr + UART_RX); 987 988 989 if (info->board->chip_flag) 990 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr); 991 992 spin_unlock_irqrestore(&info->slock, flags); 993 } 994 995 /* 996 * This routine is called whenever a serial port is opened. It 997 * enables interrupts for a serial port, linking in its async structure into 998 * the IRQ chain. It also performs the serial-specific 999 * initialization for the tty structure. 1000 */ 1001 static int mxser_open(struct tty_struct *tty, struct file *filp) 1002 { 1003 struct mxser_port *info; 1004 int line; 1005 1006 line = tty->index; 1007 if (line == MXSER_PORTS) 1008 return 0; 1009 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD]; 1010 if (!info->ioaddr) 1011 return -ENODEV; 1012 1013 tty->driver_data = info; 1014 return tty_port_open(&info->port, tty, filp); 1015 } 1016 1017 static void mxser_flush_buffer(struct tty_struct *tty) 1018 { 1019 struct mxser_port *info = tty->driver_data; 1020 char fcr; 1021 unsigned long flags; 1022 1023 1024 spin_lock_irqsave(&info->slock, flags); 1025 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; 1026 1027 fcr = inb(info->ioaddr + UART_FCR); 1028 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), 1029 info->ioaddr + UART_FCR); 1030 outb(fcr, info->ioaddr + UART_FCR); 1031 1032 spin_unlock_irqrestore(&info->slock, flags); 1033 1034 tty_wakeup(tty); 1035 } 1036 1037 1038 static void mxser_close_port(struct tty_port *port) 1039 { 1040 struct mxser_port *info = container_of(port, struct mxser_port, port); 1041 unsigned long timeout; 1042 /* 1043 * At this point we stop accepting input. To do this, we 1044 * disable the receive line status interrupts, and tell the 1045 * interrupt driver to stop checking the data ready bit in the 1046 * line status register. 1047 */ 1048 info->IER &= ~UART_IER_RLSI; 1049 if (info->board->chip_flag) 1050 info->IER &= ~MOXA_MUST_RECV_ISR; 1051 1052 outb(info->IER, info->ioaddr + UART_IER); 1053 /* 1054 * Before we drop DTR, make sure the UART transmitter 1055 * has completely drained; this is especially 1056 * important if there is a transmit FIFO! 1057 */ 1058 timeout = jiffies + HZ; 1059 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) { 1060 schedule_timeout_interruptible(5); 1061 if (time_after(jiffies, timeout)) 1062 break; 1063 } 1064 } 1065 1066 /* 1067 * This routine is called when the serial port gets closed. First, we 1068 * wait for the last remaining data to be sent. Then, we unlink its 1069 * async structure from the interrupt chain if necessary, and we free 1070 * that IRQ if nothing is left in the chain. 1071 */ 1072 static void mxser_close(struct tty_struct *tty, struct file *filp) 1073 { 1074 struct mxser_port *info = tty->driver_data; 1075 struct tty_port *port = &info->port; 1076 1077 if (tty->index == MXSER_PORTS || info == NULL) 1078 return; 1079 if (tty_port_close_start(port, tty, filp) == 0) 1080 return; 1081 info->closing = 1; 1082 mutex_lock(&port->mutex); 1083 mxser_close_port(port); 1084 mxser_flush_buffer(tty); 1085 if (tty_port_initialized(port) && C_HUPCL(tty)) 1086 tty_port_lower_dtr_rts(port); 1087 mxser_shutdown_port(port); 1088 tty_port_set_initialized(port, 0); 1089 mutex_unlock(&port->mutex); 1090 info->closing = 0; 1091 /* Right now the tty_port set is done outside of the close_end helper 1092 as we don't yet have everyone using refcounts */ 1093 tty_port_close_end(port, tty); 1094 tty_port_tty_set(port, NULL); 1095 } 1096 1097 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) 1098 { 1099 int c, total = 0; 1100 struct mxser_port *info = tty->driver_data; 1101 unsigned long flags; 1102 1103 if (!info->port.xmit_buf) 1104 return 0; 1105 1106 while (1) { 1107 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, 1108 SERIAL_XMIT_SIZE - info->xmit_head)); 1109 if (c <= 0) 1110 break; 1111 1112 memcpy(info->port.xmit_buf + info->xmit_head, buf, c); 1113 spin_lock_irqsave(&info->slock, flags); 1114 info->xmit_head = (info->xmit_head + c) & 1115 (SERIAL_XMIT_SIZE - 1); 1116 info->xmit_cnt += c; 1117 spin_unlock_irqrestore(&info->slock, flags); 1118 1119 buf += c; 1120 count -= c; 1121 total += c; 1122 } 1123 1124 if (info->xmit_cnt && !tty->stopped) { 1125 if (!tty->hw_stopped || 1126 (info->type == PORT_16550A) || 1127 (info->board->chip_flag)) { 1128 spin_lock_irqsave(&info->slock, flags); 1129 outb(info->IER & ~UART_IER_THRI, info->ioaddr + 1130 UART_IER); 1131 info->IER |= UART_IER_THRI; 1132 outb(info->IER, info->ioaddr + UART_IER); 1133 spin_unlock_irqrestore(&info->slock, flags); 1134 } 1135 } 1136 return total; 1137 } 1138 1139 static int mxser_put_char(struct tty_struct *tty, unsigned char ch) 1140 { 1141 struct mxser_port *info = tty->driver_data; 1142 unsigned long flags; 1143 1144 if (!info->port.xmit_buf) 1145 return 0; 1146 1147 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1) 1148 return 0; 1149 1150 spin_lock_irqsave(&info->slock, flags); 1151 info->port.xmit_buf[info->xmit_head++] = ch; 1152 info->xmit_head &= SERIAL_XMIT_SIZE - 1; 1153 info->xmit_cnt++; 1154 spin_unlock_irqrestore(&info->slock, flags); 1155 if (!tty->stopped) { 1156 if (!tty->hw_stopped || 1157 (info->type == PORT_16550A) || 1158 info->board->chip_flag) { 1159 spin_lock_irqsave(&info->slock, flags); 1160 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1161 info->IER |= UART_IER_THRI; 1162 outb(info->IER, info->ioaddr + UART_IER); 1163 spin_unlock_irqrestore(&info->slock, flags); 1164 } 1165 } 1166 return 1; 1167 } 1168 1169 1170 static void mxser_flush_chars(struct tty_struct *tty) 1171 { 1172 struct mxser_port *info = tty->driver_data; 1173 unsigned long flags; 1174 1175 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf || 1176 (tty->hw_stopped && info->type != PORT_16550A && 1177 !info->board->chip_flag)) 1178 return; 1179 1180 spin_lock_irqsave(&info->slock, flags); 1181 1182 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1183 info->IER |= UART_IER_THRI; 1184 outb(info->IER, info->ioaddr + UART_IER); 1185 1186 spin_unlock_irqrestore(&info->slock, flags); 1187 } 1188 1189 static int mxser_write_room(struct tty_struct *tty) 1190 { 1191 struct mxser_port *info = tty->driver_data; 1192 int ret; 1193 1194 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; 1195 return ret < 0 ? 0 : ret; 1196 } 1197 1198 static int mxser_chars_in_buffer(struct tty_struct *tty) 1199 { 1200 struct mxser_port *info = tty->driver_data; 1201 return info->xmit_cnt; 1202 } 1203 1204 /* 1205 * ------------------------------------------------------------ 1206 * friends of mxser_ioctl() 1207 * ------------------------------------------------------------ 1208 */ 1209 static int mxser_get_serial_info(struct tty_struct *tty, 1210 struct serial_struct *ss) 1211 { 1212 struct mxser_port *info = tty->driver_data; 1213 struct tty_port *port = &info->port; 1214 1215 if (tty->index == MXSER_PORTS) 1216 return -ENOTTY; 1217 1218 mutex_lock(&port->mutex); 1219 ss->type = info->type, 1220 ss->line = tty->index, 1221 ss->port = info->ioaddr, 1222 ss->irq = info->board->irq, 1223 ss->flags = info->port.flags, 1224 ss->baud_base = info->baud_base, 1225 ss->close_delay = info->port.close_delay, 1226 ss->closing_wait = info->port.closing_wait, 1227 ss->custom_divisor = info->custom_divisor, 1228 mutex_unlock(&port->mutex); 1229 return 0; 1230 } 1231 1232 static int mxser_set_serial_info(struct tty_struct *tty, 1233 struct serial_struct *ss) 1234 { 1235 struct mxser_port *info = tty->driver_data; 1236 struct tty_port *port = &info->port; 1237 speed_t baud; 1238 unsigned long sl_flags; 1239 unsigned int flags; 1240 int retval = 0; 1241 1242 if (tty->index == MXSER_PORTS) 1243 return -ENOTTY; 1244 if (tty_io_error(tty)) 1245 return -EIO; 1246 1247 mutex_lock(&port->mutex); 1248 if (!info->ioaddr) { 1249 mutex_unlock(&port->mutex); 1250 return -ENODEV; 1251 } 1252 1253 if (ss->irq != info->board->irq || 1254 ss->port != info->ioaddr) { 1255 mutex_unlock(&port->mutex); 1256 return -EINVAL; 1257 } 1258 1259 flags = port->flags & ASYNC_SPD_MASK; 1260 1261 if (!capable(CAP_SYS_ADMIN)) { 1262 if ((ss->baud_base != info->baud_base) || 1263 (ss->close_delay != info->port.close_delay) || 1264 ((ss->flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) { 1265 mutex_unlock(&port->mutex); 1266 return -EPERM; 1267 } 1268 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) | 1269 (ss->flags & ASYNC_USR_MASK)); 1270 } else { 1271 /* 1272 * OK, past this point, all the error checking has been done. 1273 * At this point, we start making changes..... 1274 */ 1275 port->flags = ((port->flags & ~ASYNC_FLAGS) | 1276 (ss->flags & ASYNC_FLAGS)); 1277 port->close_delay = ss->close_delay * HZ / 100; 1278 port->closing_wait = ss->closing_wait * HZ / 100; 1279 port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0; 1280 if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST && 1281 (ss->baud_base != info->baud_base || 1282 ss->custom_divisor != 1283 info->custom_divisor)) { 1284 if (ss->custom_divisor == 0) { 1285 mutex_unlock(&port->mutex); 1286 return -EINVAL; 1287 } 1288 baud = ss->baud_base / ss->custom_divisor; 1289 tty_encode_baud_rate(tty, baud, baud); 1290 } 1291 } 1292 1293 info->type = ss->type; 1294 1295 process_txrx_fifo(info); 1296 1297 if (tty_port_initialized(port)) { 1298 if (flags != (port->flags & ASYNC_SPD_MASK)) { 1299 spin_lock_irqsave(&info->slock, sl_flags); 1300 mxser_change_speed(tty); 1301 spin_unlock_irqrestore(&info->slock, sl_flags); 1302 } 1303 } else { 1304 retval = mxser_activate(port, tty); 1305 if (retval == 0) 1306 tty_port_set_initialized(port, 1); 1307 } 1308 mutex_unlock(&port->mutex); 1309 return retval; 1310 } 1311 1312 /* 1313 * mxser_get_lsr_info - get line status register info 1314 * 1315 * Purpose: Let user call ioctl() to get info when the UART physically 1316 * is emptied. On bus types like RS485, the transmitter must 1317 * release the bus after transmitting. This must be done when 1318 * the transmit shift register is empty, not be done when the 1319 * transmit holding register is empty. This functionality 1320 * allows an RS485 driver to be written in user space. 1321 */ 1322 static int mxser_get_lsr_info(struct mxser_port *info, 1323 unsigned int __user *value) 1324 { 1325 unsigned char status; 1326 unsigned int result; 1327 unsigned long flags; 1328 1329 spin_lock_irqsave(&info->slock, flags); 1330 status = inb(info->ioaddr + UART_LSR); 1331 spin_unlock_irqrestore(&info->slock, flags); 1332 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); 1333 return put_user(result, value); 1334 } 1335 1336 static int mxser_tiocmget(struct tty_struct *tty) 1337 { 1338 struct mxser_port *info = tty->driver_data; 1339 unsigned char control, status; 1340 unsigned long flags; 1341 1342 1343 if (tty->index == MXSER_PORTS) 1344 return -ENOIOCTLCMD; 1345 if (tty_io_error(tty)) 1346 return -EIO; 1347 1348 control = info->MCR; 1349 1350 spin_lock_irqsave(&info->slock, flags); 1351 status = inb(info->ioaddr + UART_MSR); 1352 if (status & UART_MSR_ANY_DELTA) 1353 mxser_check_modem_status(tty, info, status); 1354 spin_unlock_irqrestore(&info->slock, flags); 1355 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | 1356 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | 1357 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | 1358 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | 1359 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | 1360 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); 1361 } 1362 1363 static int mxser_tiocmset(struct tty_struct *tty, 1364 unsigned int set, unsigned int clear) 1365 { 1366 struct mxser_port *info = tty->driver_data; 1367 unsigned long flags; 1368 1369 1370 if (tty->index == MXSER_PORTS) 1371 return -ENOIOCTLCMD; 1372 if (tty_io_error(tty)) 1373 return -EIO; 1374 1375 spin_lock_irqsave(&info->slock, flags); 1376 1377 if (set & TIOCM_RTS) 1378 info->MCR |= UART_MCR_RTS; 1379 if (set & TIOCM_DTR) 1380 info->MCR |= UART_MCR_DTR; 1381 1382 if (clear & TIOCM_RTS) 1383 info->MCR &= ~UART_MCR_RTS; 1384 if (clear & TIOCM_DTR) 1385 info->MCR &= ~UART_MCR_DTR; 1386 1387 outb(info->MCR, info->ioaddr + UART_MCR); 1388 spin_unlock_irqrestore(&info->slock, flags); 1389 return 0; 1390 } 1391 1392 static int __init mxser_program_mode(int port) 1393 { 1394 int id, i, j, n; 1395 1396 outb(0, port); 1397 outb(0, port); 1398 outb(0, port); 1399 (void)inb(port); 1400 (void)inb(port); 1401 outb(0, port); 1402 (void)inb(port); 1403 1404 id = inb(port + 1) & 0x1F; 1405 if ((id != C168_ASIC_ID) && 1406 (id != C104_ASIC_ID) && 1407 (id != C102_ASIC_ID) && 1408 (id != CI132_ASIC_ID) && 1409 (id != CI134_ASIC_ID) && 1410 (id != CI104J_ASIC_ID)) 1411 return -1; 1412 for (i = 0, j = 0; i < 4; i++) { 1413 n = inb(port + 2); 1414 if (n == 'M') { 1415 j = 1; 1416 } else if ((j == 1) && (n == 1)) { 1417 j = 2; 1418 break; 1419 } else 1420 j = 0; 1421 } 1422 if (j != 2) 1423 id = -2; 1424 return id; 1425 } 1426 1427 static void __init mxser_normal_mode(int port) 1428 { 1429 int i, n; 1430 1431 outb(0xA5, port + 1); 1432 outb(0x80, port + 3); 1433 outb(12, port + 0); /* 9600 bps */ 1434 outb(0, port + 1); 1435 outb(0x03, port + 3); /* 8 data bits */ 1436 outb(0x13, port + 4); /* loop back mode */ 1437 for (i = 0; i < 16; i++) { 1438 n = inb(port + 5); 1439 if ((n & 0x61) == 0x60) 1440 break; 1441 if ((n & 1) == 1) 1442 (void)inb(port); 1443 } 1444 outb(0x00, port + 4); 1445 } 1446 1447 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */ 1448 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */ 1449 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */ 1450 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */ 1451 #define EN_CCMD 0x000 /* Chip's command register */ 1452 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */ 1453 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */ 1454 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */ 1455 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */ 1456 #define EN0_DCFG 0x00E /* Data configuration reg WR */ 1457 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */ 1458 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */ 1459 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */ 1460 static int __init mxser_read_register(int port, unsigned short *regs) 1461 { 1462 int i, k, value, id; 1463 unsigned int j; 1464 1465 id = mxser_program_mode(port); 1466 if (id < 0) 1467 return id; 1468 for (i = 0; i < 14; i++) { 1469 k = (i & 0x3F) | 0x180; 1470 for (j = 0x100; j > 0; j >>= 1) { 1471 outb(CHIP_CS, port); 1472 if (k & j) { 1473 outb(CHIP_CS | CHIP_DO, port); 1474 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */ 1475 } else { 1476 outb(CHIP_CS, port); 1477 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */ 1478 } 1479 } 1480 (void)inb(port); 1481 value = 0; 1482 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) { 1483 outb(CHIP_CS, port); 1484 outb(CHIP_CS | CHIP_SK, port); 1485 if (inb(port) & CHIP_DI) 1486 value |= j; 1487 } 1488 regs[i] = value; 1489 outb(0, port); 1490 } 1491 mxser_normal_mode(port); 1492 return id; 1493 } 1494 1495 static int mxser_ioctl_special(unsigned int cmd, void __user *argp) 1496 { 1497 struct mxser_port *ip; 1498 struct tty_port *port; 1499 struct tty_struct *tty; 1500 int result, status; 1501 unsigned int i, j; 1502 int ret = 0; 1503 1504 switch (cmd) { 1505 case MOXA_GET_MAJOR: 1506 printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl " 1507 "%x (GET_MAJOR), fix your userspace\n", 1508 current->comm, cmd); 1509 return put_user(ttymajor, (int __user *)argp); 1510 1511 case MOXA_CHKPORTENABLE: 1512 result = 0; 1513 for (i = 0; i < MXSER_BOARDS; i++) 1514 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) 1515 if (mxser_boards[i].ports[j].ioaddr) 1516 result |= (1 << i); 1517 return put_user(result, (unsigned long __user *)argp); 1518 case MOXA_GETDATACOUNT: 1519 /* The receive side is locked by port->slock but it isn't 1520 clear that an exact snapshot is worth copying here */ 1521 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log))) 1522 ret = -EFAULT; 1523 return ret; 1524 case MOXA_GETMSTATUS: { 1525 struct mxser_mstatus ms, __user *msu = argp; 1526 for (i = 0; i < MXSER_BOARDS; i++) 1527 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { 1528 ip = &mxser_boards[i].ports[j]; 1529 port = &ip->port; 1530 memset(&ms, 0, sizeof(ms)); 1531 1532 mutex_lock(&port->mutex); 1533 if (!ip->ioaddr) 1534 goto copy; 1535 1536 tty = tty_port_tty_get(port); 1537 1538 if (!tty) 1539 ms.cflag = ip->normal_termios.c_cflag; 1540 else 1541 ms.cflag = tty->termios.c_cflag; 1542 tty_kref_put(tty); 1543 spin_lock_irq(&ip->slock); 1544 status = inb(ip->ioaddr + UART_MSR); 1545 spin_unlock_irq(&ip->slock); 1546 if (status & UART_MSR_DCD) 1547 ms.dcd = 1; 1548 if (status & UART_MSR_DSR) 1549 ms.dsr = 1; 1550 if (status & UART_MSR_CTS) 1551 ms.cts = 1; 1552 copy: 1553 mutex_unlock(&port->mutex); 1554 if (copy_to_user(msu, &ms, sizeof(ms))) 1555 return -EFAULT; 1556 msu++; 1557 } 1558 return 0; 1559 } 1560 case MOXA_ASPP_MON_EXT: { 1561 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */ 1562 unsigned int cflag, iflag, p; 1563 u8 opmode; 1564 1565 me = kzalloc(sizeof(*me), GFP_KERNEL); 1566 if (!me) 1567 return -ENOMEM; 1568 1569 for (i = 0, p = 0; i < MXSER_BOARDS; i++) { 1570 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) { 1571 if (p >= ARRAY_SIZE(me->rx_cnt)) { 1572 i = MXSER_BOARDS; 1573 break; 1574 } 1575 ip = &mxser_boards[i].ports[j]; 1576 port = &ip->port; 1577 1578 mutex_lock(&port->mutex); 1579 if (!ip->ioaddr) { 1580 mutex_unlock(&port->mutex); 1581 continue; 1582 } 1583 1584 spin_lock_irq(&ip->slock); 1585 status = mxser_get_msr(ip->ioaddr, 0, p); 1586 1587 if (status & UART_MSR_TERI) 1588 ip->icount.rng++; 1589 if (status & UART_MSR_DDSR) 1590 ip->icount.dsr++; 1591 if (status & UART_MSR_DDCD) 1592 ip->icount.dcd++; 1593 if (status & UART_MSR_DCTS) 1594 ip->icount.cts++; 1595 1596 ip->mon_data.modem_status = status; 1597 me->rx_cnt[p] = ip->mon_data.rxcnt; 1598 me->tx_cnt[p] = ip->mon_data.txcnt; 1599 me->up_rxcnt[p] = ip->mon_data.up_rxcnt; 1600 me->up_txcnt[p] = ip->mon_data.up_txcnt; 1601 me->modem_status[p] = 1602 ip->mon_data.modem_status; 1603 spin_unlock_irq(&ip->slock); 1604 1605 tty = tty_port_tty_get(&ip->port); 1606 1607 if (!tty) { 1608 cflag = ip->normal_termios.c_cflag; 1609 iflag = ip->normal_termios.c_iflag; 1610 me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios); 1611 } else { 1612 cflag = tty->termios.c_cflag; 1613 iflag = tty->termios.c_iflag; 1614 me->baudrate[p] = tty_get_baud_rate(tty); 1615 } 1616 tty_kref_put(tty); 1617 1618 me->databits[p] = cflag & CSIZE; 1619 me->stopbits[p] = cflag & CSTOPB; 1620 me->parity[p] = cflag & (PARENB | PARODD | 1621 CMSPAR); 1622 1623 if (cflag & CRTSCTS) 1624 me->flowctrl[p] |= 0x03; 1625 1626 if (iflag & (IXON | IXOFF)) 1627 me->flowctrl[p] |= 0x0C; 1628 1629 if (ip->type == PORT_16550A) 1630 me->fifo[p] = 1; 1631 1632 if (ip->board->chip_flag == MOXA_MUST_MU860_HWID) { 1633 opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2); 1634 opmode &= OP_MODE_MASK; 1635 } else { 1636 opmode = RS232_MODE; 1637 } 1638 me->iftype[p] = opmode; 1639 mutex_unlock(&port->mutex); 1640 } 1641 } 1642 if (copy_to_user(argp, me, sizeof(*me))) 1643 ret = -EFAULT; 1644 kfree(me); 1645 return ret; 1646 } 1647 default: 1648 return -ENOIOCTLCMD; 1649 } 1650 return 0; 1651 } 1652 1653 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg, 1654 struct async_icount *cprev) 1655 { 1656 struct async_icount cnow; 1657 unsigned long flags; 1658 int ret; 1659 1660 spin_lock_irqsave(&info->slock, flags); 1661 cnow = info->icount; /* atomic copy */ 1662 spin_unlock_irqrestore(&info->slock, flags); 1663 1664 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) || 1665 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) || 1666 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) || 1667 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts)); 1668 1669 *cprev = cnow; 1670 1671 return ret; 1672 } 1673 1674 static int mxser_ioctl(struct tty_struct *tty, 1675 unsigned int cmd, unsigned long arg) 1676 { 1677 struct mxser_port *info = tty->driver_data; 1678 struct async_icount cnow; 1679 unsigned long flags; 1680 void __user *argp = (void __user *)arg; 1681 1682 if (tty->index == MXSER_PORTS) 1683 return mxser_ioctl_special(cmd, argp); 1684 1685 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) { 1686 int p; 1687 unsigned long opmode; 1688 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f }; 1689 int shiftbit; 1690 unsigned char val, mask; 1691 1692 if (info->board->chip_flag != MOXA_MUST_MU860_HWID) 1693 return -EFAULT; 1694 1695 p = tty->index % 4; 1696 if (cmd == MOXA_SET_OP_MODE) { 1697 if (get_user(opmode, (int __user *) argp)) 1698 return -EFAULT; 1699 if (opmode != RS232_MODE && 1700 opmode != RS485_2WIRE_MODE && 1701 opmode != RS422_MODE && 1702 opmode != RS485_4WIRE_MODE) 1703 return -EFAULT; 1704 mask = ModeMask[p]; 1705 shiftbit = p * 2; 1706 spin_lock_irq(&info->slock); 1707 val = inb(info->opmode_ioaddr); 1708 val &= mask; 1709 val |= (opmode << shiftbit); 1710 outb(val, info->opmode_ioaddr); 1711 spin_unlock_irq(&info->slock); 1712 } else { 1713 shiftbit = p * 2; 1714 spin_lock_irq(&info->slock); 1715 opmode = inb(info->opmode_ioaddr) >> shiftbit; 1716 spin_unlock_irq(&info->slock); 1717 opmode &= OP_MODE_MASK; 1718 if (put_user(opmode, (int __user *)argp)) 1719 return -EFAULT; 1720 } 1721 return 0; 1722 } 1723 1724 if (cmd != TIOCMIWAIT && tty_io_error(tty)) 1725 return -EIO; 1726 1727 switch (cmd) { 1728 case TIOCSERGETLSR: /* Get line status register */ 1729 return mxser_get_lsr_info(info, argp); 1730 /* 1731 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change 1732 * - mask passed in arg for lines of interest 1733 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) 1734 * Caller should use TIOCGICOUNT to see which one it was 1735 */ 1736 case TIOCMIWAIT: 1737 spin_lock_irqsave(&info->slock, flags); 1738 cnow = info->icount; /* note the counters on entry */ 1739 spin_unlock_irqrestore(&info->slock, flags); 1740 1741 return wait_event_interruptible(info->port.delta_msr_wait, 1742 mxser_cflags_changed(info, arg, &cnow)); 1743 case MOXA_HighSpeedOn: 1744 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); 1745 case MOXA_SDS_RSTICOUNTER: 1746 spin_lock_irq(&info->slock); 1747 info->mon_data.rxcnt = 0; 1748 info->mon_data.txcnt = 0; 1749 spin_unlock_irq(&info->slock); 1750 return 0; 1751 1752 case MOXA_ASPP_OQUEUE:{ 1753 int len, lsr; 1754 1755 len = mxser_chars_in_buffer(tty); 1756 spin_lock_irq(&info->slock); 1757 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE; 1758 spin_unlock_irq(&info->slock); 1759 len += (lsr ? 0 : 1); 1760 1761 return put_user(len, (int __user *)argp); 1762 } 1763 case MOXA_ASPP_MON: { 1764 int mcr, status; 1765 1766 spin_lock_irq(&info->slock); 1767 status = mxser_get_msr(info->ioaddr, 1, tty->index); 1768 mxser_check_modem_status(tty, info, status); 1769 1770 mcr = inb(info->ioaddr + UART_MCR); 1771 spin_unlock_irq(&info->slock); 1772 1773 if (mcr & MOXA_MUST_MCR_XON_FLAG) 1774 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD; 1775 else 1776 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD; 1777 1778 if (mcr & MOXA_MUST_MCR_TX_XON) 1779 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT; 1780 else 1781 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT; 1782 1783 if (tty->hw_stopped) 1784 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD; 1785 else 1786 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD; 1787 1788 if (copy_to_user(argp, &info->mon_data, 1789 sizeof(struct mxser_mon))) 1790 return -EFAULT; 1791 1792 return 0; 1793 } 1794 case MOXA_ASPP_LSTATUS: { 1795 if (put_user(info->err_shadow, (unsigned char __user *)argp)) 1796 return -EFAULT; 1797 1798 info->err_shadow = 0; 1799 return 0; 1800 } 1801 case MOXA_SET_BAUD_METHOD: { 1802 int method; 1803 1804 if (get_user(method, (int __user *)argp)) 1805 return -EFAULT; 1806 mxser_set_baud_method[tty->index] = method; 1807 return put_user(method, (int __user *)argp); 1808 } 1809 default: 1810 return -ENOIOCTLCMD; 1811 } 1812 return 0; 1813 } 1814 1815 /* 1816 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) 1817 * Return: write counters to the user passed counter struct 1818 * NB: both 1->0 and 0->1 transitions are counted except for 1819 * RI where only 0->1 is counted. 1820 */ 1821 1822 static int mxser_get_icount(struct tty_struct *tty, 1823 struct serial_icounter_struct *icount) 1824 1825 { 1826 struct mxser_port *info = tty->driver_data; 1827 struct async_icount cnow; 1828 unsigned long flags; 1829 1830 spin_lock_irqsave(&info->slock, flags); 1831 cnow = info->icount; 1832 spin_unlock_irqrestore(&info->slock, flags); 1833 1834 icount->frame = cnow.frame; 1835 icount->brk = cnow.brk; 1836 icount->overrun = cnow.overrun; 1837 icount->buf_overrun = cnow.buf_overrun; 1838 icount->parity = cnow.parity; 1839 icount->rx = cnow.rx; 1840 icount->tx = cnow.tx; 1841 icount->cts = cnow.cts; 1842 icount->dsr = cnow.dsr; 1843 icount->rng = cnow.rng; 1844 icount->dcd = cnow.dcd; 1845 return 0; 1846 } 1847 1848 static void mxser_stoprx(struct tty_struct *tty) 1849 { 1850 struct mxser_port *info = tty->driver_data; 1851 1852 info->ldisc_stop_rx = 1; 1853 if (I_IXOFF(tty)) { 1854 if (info->board->chip_flag) { 1855 info->IER &= ~MOXA_MUST_RECV_ISR; 1856 outb(info->IER, info->ioaddr + UART_IER); 1857 } else { 1858 info->x_char = STOP_CHAR(tty); 1859 outb(0, info->ioaddr + UART_IER); 1860 info->IER |= UART_IER_THRI; 1861 outb(info->IER, info->ioaddr + UART_IER); 1862 } 1863 } 1864 1865 if (C_CRTSCTS(tty)) { 1866 info->MCR &= ~UART_MCR_RTS; 1867 outb(info->MCR, info->ioaddr + UART_MCR); 1868 } 1869 } 1870 1871 /* 1872 * This routine is called by the upper-layer tty layer to signal that 1873 * incoming characters should be throttled. 1874 */ 1875 static void mxser_throttle(struct tty_struct *tty) 1876 { 1877 mxser_stoprx(tty); 1878 } 1879 1880 static void mxser_unthrottle(struct tty_struct *tty) 1881 { 1882 struct mxser_port *info = tty->driver_data; 1883 1884 /* startrx */ 1885 info->ldisc_stop_rx = 0; 1886 if (I_IXOFF(tty)) { 1887 if (info->x_char) 1888 info->x_char = 0; 1889 else { 1890 if (info->board->chip_flag) { 1891 info->IER |= MOXA_MUST_RECV_ISR; 1892 outb(info->IER, info->ioaddr + UART_IER); 1893 } else { 1894 info->x_char = START_CHAR(tty); 1895 outb(0, info->ioaddr + UART_IER); 1896 info->IER |= UART_IER_THRI; 1897 outb(info->IER, info->ioaddr + UART_IER); 1898 } 1899 } 1900 } 1901 1902 if (C_CRTSCTS(tty)) { 1903 info->MCR |= UART_MCR_RTS; 1904 outb(info->MCR, info->ioaddr + UART_MCR); 1905 } 1906 } 1907 1908 /* 1909 * mxser_stop() and mxser_start() 1910 * 1911 * This routines are called before setting or resetting tty->stopped. 1912 * They enable or disable transmitter interrupts, as necessary. 1913 */ 1914 static void mxser_stop(struct tty_struct *tty) 1915 { 1916 struct mxser_port *info = tty->driver_data; 1917 unsigned long flags; 1918 1919 spin_lock_irqsave(&info->slock, flags); 1920 if (info->IER & UART_IER_THRI) { 1921 info->IER &= ~UART_IER_THRI; 1922 outb(info->IER, info->ioaddr + UART_IER); 1923 } 1924 spin_unlock_irqrestore(&info->slock, flags); 1925 } 1926 1927 static void mxser_start(struct tty_struct *tty) 1928 { 1929 struct mxser_port *info = tty->driver_data; 1930 unsigned long flags; 1931 1932 spin_lock_irqsave(&info->slock, flags); 1933 if (info->xmit_cnt && info->port.xmit_buf) { 1934 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1935 info->IER |= UART_IER_THRI; 1936 outb(info->IER, info->ioaddr + UART_IER); 1937 } 1938 spin_unlock_irqrestore(&info->slock, flags); 1939 } 1940 1941 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios) 1942 { 1943 struct mxser_port *info = tty->driver_data; 1944 unsigned long flags; 1945 1946 spin_lock_irqsave(&info->slock, flags); 1947 mxser_change_speed(tty); 1948 spin_unlock_irqrestore(&info->slock, flags); 1949 1950 if ((old_termios->c_cflag & CRTSCTS) && !C_CRTSCTS(tty)) { 1951 tty->hw_stopped = 0; 1952 mxser_start(tty); 1953 } 1954 1955 /* Handle sw stopped */ 1956 if ((old_termios->c_iflag & IXON) && !I_IXON(tty)) { 1957 tty->stopped = 0; 1958 1959 if (info->board->chip_flag) { 1960 spin_lock_irqsave(&info->slock, flags); 1961 mxser_disable_must_rx_software_flow_control( 1962 info->ioaddr); 1963 spin_unlock_irqrestore(&info->slock, flags); 1964 } 1965 1966 mxser_start(tty); 1967 } 1968 } 1969 1970 /* 1971 * mxser_wait_until_sent() --- wait until the transmitter is empty 1972 */ 1973 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout) 1974 { 1975 struct mxser_port *info = tty->driver_data; 1976 unsigned long orig_jiffies, char_time; 1977 unsigned long flags; 1978 int lsr; 1979 1980 if (info->type == PORT_UNKNOWN) 1981 return; 1982 1983 if (info->xmit_fifo_size == 0) 1984 return; /* Just in case.... */ 1985 1986 orig_jiffies = jiffies; 1987 /* 1988 * Set the check interval to be 1/5 of the estimated time to 1989 * send a single character, and make it at least 1. The check 1990 * interval should also be less than the timeout. 1991 * 1992 * Note: we have to use pretty tight timings here to satisfy 1993 * the NIST-PCTS. 1994 */ 1995 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size; 1996 char_time = char_time / 5; 1997 if (char_time == 0) 1998 char_time = 1; 1999 if (timeout && timeout < char_time) 2000 char_time = timeout; 2001 /* 2002 * If the transmitter hasn't cleared in twice the approximate 2003 * amount of time to send the entire FIFO, it probably won't 2004 * ever clear. This assumes the UART isn't doing flow 2005 * control, which is currently the case. Hence, if it ever 2006 * takes longer than info->timeout, this is probably due to a 2007 * UART bug of some kind. So, we clamp the timeout parameter at 2008 * 2*info->timeout. 2009 */ 2010 if (!timeout || timeout > 2 * info->timeout) 2011 timeout = 2 * info->timeout; 2012 2013 spin_lock_irqsave(&info->slock, flags); 2014 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) { 2015 spin_unlock_irqrestore(&info->slock, flags); 2016 schedule_timeout_interruptible(char_time); 2017 spin_lock_irqsave(&info->slock, flags); 2018 if (signal_pending(current)) 2019 break; 2020 if (timeout && time_after(jiffies, orig_jiffies + timeout)) 2021 break; 2022 } 2023 spin_unlock_irqrestore(&info->slock, flags); 2024 set_current_state(TASK_RUNNING); 2025 } 2026 2027 /* 2028 * This routine is called by tty_hangup() when a hangup is signaled. 2029 */ 2030 static void mxser_hangup(struct tty_struct *tty) 2031 { 2032 struct mxser_port *info = tty->driver_data; 2033 2034 mxser_flush_buffer(tty); 2035 tty_port_hangup(&info->port); 2036 } 2037 2038 /* 2039 * mxser_rs_break() --- routine which turns the break handling on or off 2040 */ 2041 static int mxser_rs_break(struct tty_struct *tty, int break_state) 2042 { 2043 struct mxser_port *info = tty->driver_data; 2044 unsigned long flags; 2045 2046 spin_lock_irqsave(&info->slock, flags); 2047 if (break_state == -1) 2048 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, 2049 info->ioaddr + UART_LCR); 2050 else 2051 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, 2052 info->ioaddr + UART_LCR); 2053 spin_unlock_irqrestore(&info->slock, flags); 2054 return 0; 2055 } 2056 2057 static void mxser_receive_chars(struct tty_struct *tty, 2058 struct mxser_port *port, int *status) 2059 { 2060 unsigned char ch, gdl; 2061 int ignored = 0; 2062 int cnt = 0; 2063 int recv_room; 2064 int max = 256; 2065 2066 recv_room = tty->receive_room; 2067 if (recv_room == 0 && !port->ldisc_stop_rx) 2068 mxser_stoprx(tty); 2069 if (port->board->chip_flag != MOXA_OTHER_UART) { 2070 2071 if (*status & UART_LSR_SPECIAL) 2072 goto intr_old; 2073 if (port->board->chip_flag == MOXA_MUST_MU860_HWID && 2074 (*status & MOXA_MUST_LSR_RERR)) 2075 goto intr_old; 2076 if (*status & MOXA_MUST_LSR_RERR) 2077 goto intr_old; 2078 2079 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER); 2080 2081 if (port->board->chip_flag == MOXA_MUST_MU150_HWID) 2082 gdl &= MOXA_MUST_GDL_MASK; 2083 if (gdl >= recv_room) { 2084 if (!port->ldisc_stop_rx) 2085 mxser_stoprx(tty); 2086 } 2087 while (gdl--) { 2088 ch = inb(port->ioaddr + UART_RX); 2089 tty_insert_flip_char(&port->port, ch, 0); 2090 cnt++; 2091 } 2092 goto end_intr; 2093 } 2094 intr_old: 2095 2096 do { 2097 if (max-- < 0) 2098 break; 2099 2100 ch = inb(port->ioaddr + UART_RX); 2101 if (port->board->chip_flag && (*status & UART_LSR_OE)) 2102 outb(0x23, port->ioaddr + UART_FCR); 2103 *status &= port->read_status_mask; 2104 if (*status & port->ignore_status_mask) { 2105 if (++ignored > 100) 2106 break; 2107 } else { 2108 char flag = 0; 2109 if (*status & UART_LSR_SPECIAL) { 2110 if (*status & UART_LSR_BI) { 2111 flag = TTY_BREAK; 2112 port->icount.brk++; 2113 2114 if (port->port.flags & ASYNC_SAK) 2115 do_SAK(tty); 2116 } else if (*status & UART_LSR_PE) { 2117 flag = TTY_PARITY; 2118 port->icount.parity++; 2119 } else if (*status & UART_LSR_FE) { 2120 flag = TTY_FRAME; 2121 port->icount.frame++; 2122 } else if (*status & UART_LSR_OE) { 2123 flag = TTY_OVERRUN; 2124 port->icount.overrun++; 2125 } else 2126 flag = TTY_BREAK; 2127 } 2128 tty_insert_flip_char(&port->port, ch, flag); 2129 cnt++; 2130 if (cnt >= recv_room) { 2131 if (!port->ldisc_stop_rx) 2132 mxser_stoprx(tty); 2133 break; 2134 } 2135 2136 } 2137 2138 if (port->board->chip_flag) 2139 break; 2140 2141 *status = inb(port->ioaddr + UART_LSR); 2142 } while (*status & UART_LSR_DR); 2143 2144 end_intr: 2145 mxvar_log.rxcnt[tty->index] += cnt; 2146 port->mon_data.rxcnt += cnt; 2147 port->mon_data.up_rxcnt += cnt; 2148 2149 /* 2150 * We are called from an interrupt context with &port->slock 2151 * being held. Drop it temporarily in order to prevent 2152 * recursive locking. 2153 */ 2154 spin_unlock(&port->slock); 2155 tty_flip_buffer_push(&port->port); 2156 spin_lock(&port->slock); 2157 } 2158 2159 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port) 2160 { 2161 int count, cnt; 2162 2163 if (port->x_char) { 2164 outb(port->x_char, port->ioaddr + UART_TX); 2165 port->x_char = 0; 2166 mxvar_log.txcnt[tty->index]++; 2167 port->mon_data.txcnt++; 2168 port->mon_data.up_txcnt++; 2169 port->icount.tx++; 2170 return; 2171 } 2172 2173 if (port->port.xmit_buf == NULL) 2174 return; 2175 2176 if (port->xmit_cnt <= 0 || tty->stopped || 2177 (tty->hw_stopped && 2178 (port->type != PORT_16550A) && 2179 (!port->board->chip_flag))) { 2180 port->IER &= ~UART_IER_THRI; 2181 outb(port->IER, port->ioaddr + UART_IER); 2182 return; 2183 } 2184 2185 cnt = port->xmit_cnt; 2186 count = port->xmit_fifo_size; 2187 do { 2188 outb(port->port.xmit_buf[port->xmit_tail++], 2189 port->ioaddr + UART_TX); 2190 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1); 2191 if (--port->xmit_cnt <= 0) 2192 break; 2193 } while (--count > 0); 2194 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt); 2195 2196 port->mon_data.txcnt += (cnt - port->xmit_cnt); 2197 port->mon_data.up_txcnt += (cnt - port->xmit_cnt); 2198 port->icount.tx += (cnt - port->xmit_cnt); 2199 2200 if (port->xmit_cnt < WAKEUP_CHARS) 2201 tty_wakeup(tty); 2202 2203 if (port->xmit_cnt <= 0) { 2204 port->IER &= ~UART_IER_THRI; 2205 outb(port->IER, port->ioaddr + UART_IER); 2206 } 2207 } 2208 2209 /* 2210 * This is the serial driver's generic interrupt routine 2211 */ 2212 static irqreturn_t mxser_interrupt(int irq, void *dev_id) 2213 { 2214 int status, iir, i; 2215 struct mxser_board *brd = NULL; 2216 struct mxser_port *port; 2217 int max, irqbits, bits, msr; 2218 unsigned int int_cnt, pass_counter = 0; 2219 int handled = IRQ_NONE; 2220 struct tty_struct *tty; 2221 2222 for (i = 0; i < MXSER_BOARDS; i++) 2223 if (dev_id == &mxser_boards[i]) { 2224 brd = dev_id; 2225 break; 2226 } 2227 2228 if (i == MXSER_BOARDS) 2229 goto irq_stop; 2230 if (brd == NULL) 2231 goto irq_stop; 2232 max = brd->info->nports; 2233 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) { 2234 irqbits = inb(brd->vector) & brd->vector_mask; 2235 if (irqbits == brd->vector_mask) 2236 break; 2237 2238 handled = IRQ_HANDLED; 2239 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) { 2240 if (irqbits == brd->vector_mask) 2241 break; 2242 if (bits & irqbits) 2243 continue; 2244 port = &brd->ports[i]; 2245 2246 int_cnt = 0; 2247 spin_lock(&port->slock); 2248 do { 2249 iir = inb(port->ioaddr + UART_IIR); 2250 if (iir & UART_IIR_NO_INT) 2251 break; 2252 iir &= MOXA_MUST_IIR_MASK; 2253 tty = tty_port_tty_get(&port->port); 2254 if (!tty || port->closing || 2255 !tty_port_initialized(&port->port)) { 2256 status = inb(port->ioaddr + UART_LSR); 2257 outb(0x27, port->ioaddr + UART_FCR); 2258 inb(port->ioaddr + UART_MSR); 2259 tty_kref_put(tty); 2260 break; 2261 } 2262 2263 status = inb(port->ioaddr + UART_LSR); 2264 2265 if (status & UART_LSR_PE) 2266 port->err_shadow |= NPPI_NOTIFY_PARITY; 2267 if (status & UART_LSR_FE) 2268 port->err_shadow |= NPPI_NOTIFY_FRAMING; 2269 if (status & UART_LSR_OE) 2270 port->err_shadow |= 2271 NPPI_NOTIFY_HW_OVERRUN; 2272 if (status & UART_LSR_BI) 2273 port->err_shadow |= NPPI_NOTIFY_BREAK; 2274 2275 if (port->board->chip_flag) { 2276 if (iir == MOXA_MUST_IIR_GDA || 2277 iir == MOXA_MUST_IIR_RDA || 2278 iir == MOXA_MUST_IIR_RTO || 2279 iir == MOXA_MUST_IIR_LSR) 2280 mxser_receive_chars(tty, port, 2281 &status); 2282 2283 } else { 2284 status &= port->read_status_mask; 2285 if (status & UART_LSR_DR) 2286 mxser_receive_chars(tty, port, 2287 &status); 2288 } 2289 msr = inb(port->ioaddr + UART_MSR); 2290 if (msr & UART_MSR_ANY_DELTA) 2291 mxser_check_modem_status(tty, port, msr); 2292 2293 if (port->board->chip_flag) { 2294 if (iir == 0x02 && (status & 2295 UART_LSR_THRE)) 2296 mxser_transmit_chars(tty, port); 2297 } else { 2298 if (status & UART_LSR_THRE) 2299 mxser_transmit_chars(tty, port); 2300 } 2301 tty_kref_put(tty); 2302 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT); 2303 spin_unlock(&port->slock); 2304 } 2305 } 2306 2307 irq_stop: 2308 return handled; 2309 } 2310 2311 static const struct tty_operations mxser_ops = { 2312 .open = mxser_open, 2313 .close = mxser_close, 2314 .write = mxser_write, 2315 .put_char = mxser_put_char, 2316 .flush_chars = mxser_flush_chars, 2317 .write_room = mxser_write_room, 2318 .chars_in_buffer = mxser_chars_in_buffer, 2319 .flush_buffer = mxser_flush_buffer, 2320 .ioctl = mxser_ioctl, 2321 .throttle = mxser_throttle, 2322 .unthrottle = mxser_unthrottle, 2323 .set_termios = mxser_set_termios, 2324 .stop = mxser_stop, 2325 .start = mxser_start, 2326 .hangup = mxser_hangup, 2327 .break_ctl = mxser_rs_break, 2328 .wait_until_sent = mxser_wait_until_sent, 2329 .tiocmget = mxser_tiocmget, 2330 .tiocmset = mxser_tiocmset, 2331 .set_serial = mxser_set_serial_info, 2332 .get_serial = mxser_get_serial_info, 2333 .get_icount = mxser_get_icount, 2334 }; 2335 2336 static const struct tty_port_operations mxser_port_ops = { 2337 .carrier_raised = mxser_carrier_raised, 2338 .dtr_rts = mxser_dtr_rts, 2339 .activate = mxser_activate, 2340 .shutdown = mxser_shutdown_port, 2341 }; 2342 2343 /* 2344 * The MOXA Smartio/Industio serial driver boot-time initialization code! 2345 */ 2346 2347 static bool allow_overlapping_vector; 2348 module_param(allow_overlapping_vector, bool, S_IRUGO); 2349 MODULE_PARM_DESC(allow_overlapping_vector, "whether we allow ISA cards to be configured such that vector overlabs IO ports (default=no)"); 2350 2351 static bool mxser_overlapping_vector(struct mxser_board *brd) 2352 { 2353 return allow_overlapping_vector && 2354 brd->vector >= brd->ports[0].ioaddr && 2355 brd->vector < brd->ports[0].ioaddr + 8 * brd->info->nports; 2356 } 2357 2358 static int mxser_request_vector(struct mxser_board *brd) 2359 { 2360 if (mxser_overlapping_vector(brd)) 2361 return 0; 2362 return request_region(brd->vector, 1, "mxser(vector)") ? 0 : -EIO; 2363 } 2364 2365 static void mxser_release_vector(struct mxser_board *brd) 2366 { 2367 if (mxser_overlapping_vector(brd)) 2368 return; 2369 release_region(brd->vector, 1); 2370 } 2371 2372 static void mxser_release_ISA_res(struct mxser_board *brd) 2373 { 2374 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); 2375 mxser_release_vector(brd); 2376 } 2377 2378 static int mxser_initbrd(struct mxser_board *brd) 2379 { 2380 struct mxser_port *info; 2381 unsigned int i; 2382 int retval; 2383 2384 printk(KERN_INFO "mxser: max. baud rate = %d bps\n", 2385 brd->ports[0].max_baud); 2386 2387 for (i = 0; i < brd->info->nports; i++) { 2388 info = &brd->ports[i]; 2389 tty_port_init(&info->port); 2390 info->port.ops = &mxser_port_ops; 2391 info->board = brd; 2392 info->stop_rx = 0; 2393 info->ldisc_stop_rx = 0; 2394 2395 /* Enhance mode enabled here */ 2396 if (brd->chip_flag != MOXA_OTHER_UART) 2397 mxser_enable_must_enchance_mode(info->ioaddr); 2398 2399 info->type = brd->uart_type; 2400 2401 process_txrx_fifo(info); 2402 2403 info->custom_divisor = info->baud_base * 16; 2404 info->port.close_delay = 5 * HZ / 10; 2405 info->port.closing_wait = 30 * HZ; 2406 info->normal_termios = mxvar_sdriver->init_termios; 2407 memset(&info->mon_data, 0, sizeof(struct mxser_mon)); 2408 info->err_shadow = 0; 2409 spin_lock_init(&info->slock); 2410 2411 /* before set INT ISR, disable all int */ 2412 outb(inb(info->ioaddr + UART_IER) & 0xf0, 2413 info->ioaddr + UART_IER); 2414 } 2415 2416 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser", 2417 brd); 2418 if (retval) { 2419 for (i = 0; i < brd->info->nports; i++) 2420 tty_port_destroy(&brd->ports[i].port); 2421 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may " 2422 "conflict with another device.\n", 2423 brd->info->name, brd->irq); 2424 } 2425 2426 return retval; 2427 } 2428 2429 static void mxser_board_remove(struct mxser_board *brd) 2430 { 2431 unsigned int i; 2432 2433 for (i = 0; i < brd->info->nports; i++) { 2434 tty_unregister_device(mxvar_sdriver, brd->idx + i); 2435 tty_port_destroy(&brd->ports[i].port); 2436 } 2437 free_irq(brd->irq, brd); 2438 } 2439 2440 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd) 2441 { 2442 int id, i, bits, ret; 2443 unsigned short regs[16], irq; 2444 unsigned char scratch, scratch2; 2445 2446 brd->chip_flag = MOXA_OTHER_UART; 2447 2448 id = mxser_read_register(cap, regs); 2449 switch (id) { 2450 case C168_ASIC_ID: 2451 brd->info = &mxser_cards[0]; 2452 break; 2453 case C104_ASIC_ID: 2454 brd->info = &mxser_cards[1]; 2455 break; 2456 case CI104J_ASIC_ID: 2457 brd->info = &mxser_cards[2]; 2458 break; 2459 case C102_ASIC_ID: 2460 brd->info = &mxser_cards[5]; 2461 break; 2462 case CI132_ASIC_ID: 2463 brd->info = &mxser_cards[6]; 2464 break; 2465 case CI134_ASIC_ID: 2466 brd->info = &mxser_cards[7]; 2467 break; 2468 default: 2469 return 0; 2470 } 2471 2472 irq = 0; 2473 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?) 2474 Flag-hack checks if configuration should be read as 2-port here. */ 2475 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) { 2476 irq = regs[9] & 0xF000; 2477 irq = irq | (irq >> 4); 2478 if (irq != (regs[9] & 0xFF00)) 2479 goto err_irqconflict; 2480 } else if (brd->info->nports == 4) { 2481 irq = regs[9] & 0xF000; 2482 irq = irq | (irq >> 4); 2483 irq = irq | (irq >> 8); 2484 if (irq != regs[9]) 2485 goto err_irqconflict; 2486 } else if (brd->info->nports == 8) { 2487 irq = regs[9] & 0xF000; 2488 irq = irq | (irq >> 4); 2489 irq = irq | (irq >> 8); 2490 if ((irq != regs[9]) || (irq != regs[10])) 2491 goto err_irqconflict; 2492 } 2493 2494 if (!irq) { 2495 printk(KERN_ERR "mxser: interrupt number unset\n"); 2496 return -EIO; 2497 } 2498 brd->irq = ((int)(irq & 0xF000) >> 12); 2499 for (i = 0; i < 8; i++) 2500 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8; 2501 if ((regs[12] & 0x80) == 0) { 2502 printk(KERN_ERR "mxser: invalid interrupt vector\n"); 2503 return -EIO; 2504 } 2505 brd->vector = (int)regs[11]; /* interrupt vector */ 2506 if (id == 1) 2507 brd->vector_mask = 0x00FF; 2508 else 2509 brd->vector_mask = 0x000F; 2510 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) { 2511 if (regs[12] & bits) { 2512 brd->ports[i].baud_base = 921600; 2513 brd->ports[i].max_baud = 921600; 2514 } else { 2515 brd->ports[i].baud_base = 115200; 2516 brd->ports[i].max_baud = 115200; 2517 } 2518 } 2519 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB); 2520 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR); 2521 outb(0, cap + UART_EFR); /* EFR is the same as FCR */ 2522 outb(scratch2, cap + UART_LCR); 2523 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR); 2524 scratch = inb(cap + UART_IIR); 2525 2526 if (scratch & 0xC0) 2527 brd->uart_type = PORT_16550A; 2528 else 2529 brd->uart_type = PORT_16450; 2530 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports, 2531 "mxser(IO)")) { 2532 printk(KERN_ERR "mxser: can't request ports I/O region: " 2533 "0x%.8lx-0x%.8lx\n", 2534 brd->ports[0].ioaddr, brd->ports[0].ioaddr + 2535 8 * brd->info->nports - 1); 2536 return -EIO; 2537 } 2538 2539 ret = mxser_request_vector(brd); 2540 if (ret) { 2541 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); 2542 printk(KERN_ERR "mxser: can't request interrupt vector region: " 2543 "0x%.8lx-0x%.8lx\n", 2544 brd->ports[0].ioaddr, brd->ports[0].ioaddr + 2545 8 * brd->info->nports - 1); 2546 return ret; 2547 } 2548 return brd->info->nports; 2549 2550 err_irqconflict: 2551 printk(KERN_ERR "mxser: invalid interrupt number\n"); 2552 return -EIO; 2553 } 2554 2555 static int mxser_probe(struct pci_dev *pdev, 2556 const struct pci_device_id *ent) 2557 { 2558 #ifdef CONFIG_PCI 2559 struct mxser_board *brd; 2560 unsigned int i, j; 2561 unsigned long ioaddress; 2562 struct device *tty_dev; 2563 int retval = -EINVAL; 2564 2565 for (i = 0; i < MXSER_BOARDS; i++) 2566 if (mxser_boards[i].info == NULL) 2567 break; 2568 2569 if (i >= MXSER_BOARDS) { 2570 dev_err(&pdev->dev, "too many boards found (maximum %d), board " 2571 "not configured\n", MXSER_BOARDS); 2572 goto err; 2573 } 2574 2575 brd = &mxser_boards[i]; 2576 brd->idx = i * MXSER_PORTS_PER_BOARD; 2577 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n", 2578 mxser_cards[ent->driver_data].name, 2579 pdev->bus->number, PCI_SLOT(pdev->devfn)); 2580 2581 retval = pci_enable_device(pdev); 2582 if (retval) { 2583 dev_err(&pdev->dev, "PCI enable failed\n"); 2584 goto err; 2585 } 2586 2587 /* io address */ 2588 ioaddress = pci_resource_start(pdev, 2); 2589 retval = pci_request_region(pdev, 2, "mxser(IO)"); 2590 if (retval) 2591 goto err_dis; 2592 2593 brd->info = &mxser_cards[ent->driver_data]; 2594 for (i = 0; i < brd->info->nports; i++) 2595 brd->ports[i].ioaddr = ioaddress + 8 * i; 2596 2597 /* vector */ 2598 ioaddress = pci_resource_start(pdev, 3); 2599 retval = pci_request_region(pdev, 3, "mxser(vector)"); 2600 if (retval) 2601 goto err_zero; 2602 brd->vector = ioaddress; 2603 2604 /* irq */ 2605 brd->irq = pdev->irq; 2606 2607 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr); 2608 brd->uart_type = PORT_16550A; 2609 brd->vector_mask = 0; 2610 2611 for (i = 0; i < brd->info->nports; i++) { 2612 for (j = 0; j < UART_INFO_NUM; j++) { 2613 if (Gpci_uart_info[j].type == brd->chip_flag) { 2614 brd->ports[i].max_baud = 2615 Gpci_uart_info[j].max_baud; 2616 2617 /* exception....CP-102 */ 2618 if (brd->info->flags & MXSER_HIGHBAUD) 2619 brd->ports[i].max_baud = 921600; 2620 break; 2621 } 2622 } 2623 } 2624 2625 if (brd->chip_flag == MOXA_MUST_MU860_HWID) { 2626 for (i = 0; i < brd->info->nports; i++) { 2627 if (i < 4) 2628 brd->ports[i].opmode_ioaddr = ioaddress + 4; 2629 else 2630 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c; 2631 } 2632 outb(0, ioaddress + 4); /* default set to RS232 mode */ 2633 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */ 2634 } 2635 2636 for (i = 0; i < brd->info->nports; i++) { 2637 brd->vector_mask |= (1 << i); 2638 brd->ports[i].baud_base = 921600; 2639 } 2640 2641 /* mxser_initbrd will hook ISR. */ 2642 retval = mxser_initbrd(brd); 2643 if (retval) 2644 goto err_rel3; 2645 2646 for (i = 0; i < brd->info->nports; i++) { 2647 tty_dev = tty_port_register_device(&brd->ports[i].port, 2648 mxvar_sdriver, brd->idx + i, &pdev->dev); 2649 if (IS_ERR(tty_dev)) { 2650 retval = PTR_ERR(tty_dev); 2651 for (; i > 0; i--) 2652 tty_unregister_device(mxvar_sdriver, 2653 brd->idx + i - 1); 2654 goto err_relbrd; 2655 } 2656 } 2657 2658 pci_set_drvdata(pdev, brd); 2659 2660 return 0; 2661 err_relbrd: 2662 for (i = 0; i < brd->info->nports; i++) 2663 tty_port_destroy(&brd->ports[i].port); 2664 free_irq(brd->irq, brd); 2665 err_rel3: 2666 pci_release_region(pdev, 3); 2667 err_zero: 2668 brd->info = NULL; 2669 pci_release_region(pdev, 2); 2670 err_dis: 2671 pci_disable_device(pdev); 2672 err: 2673 return retval; 2674 #else 2675 return -ENODEV; 2676 #endif 2677 } 2678 2679 static void mxser_remove(struct pci_dev *pdev) 2680 { 2681 #ifdef CONFIG_PCI 2682 struct mxser_board *brd = pci_get_drvdata(pdev); 2683 2684 mxser_board_remove(brd); 2685 2686 pci_release_region(pdev, 2); 2687 pci_release_region(pdev, 3); 2688 pci_disable_device(pdev); 2689 brd->info = NULL; 2690 #endif 2691 } 2692 2693 static struct pci_driver mxser_driver = { 2694 .name = "mxser", 2695 .id_table = mxser_pcibrds, 2696 .probe = mxser_probe, 2697 .remove = mxser_remove 2698 }; 2699 2700 static int __init mxser_module_init(void) 2701 { 2702 struct mxser_board *brd; 2703 struct device *tty_dev; 2704 unsigned int b, i, m; 2705 int retval; 2706 2707 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1); 2708 if (!mxvar_sdriver) 2709 return -ENOMEM; 2710 2711 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", 2712 MXSER_VERSION); 2713 2714 /* Initialize the tty_driver structure */ 2715 mxvar_sdriver->name = "ttyMI"; 2716 mxvar_sdriver->major = ttymajor; 2717 mxvar_sdriver->minor_start = 0; 2718 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL; 2719 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL; 2720 mxvar_sdriver->init_termios = tty_std_termios; 2721 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; 2722 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV; 2723 tty_set_operations(mxvar_sdriver, &mxser_ops); 2724 2725 retval = tty_register_driver(mxvar_sdriver); 2726 if (retval) { 2727 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family " 2728 "tty driver !\n"); 2729 goto err_put; 2730 } 2731 2732 /* Start finding ISA boards here */ 2733 for (m = 0, b = 0; b < MXSER_BOARDS; b++) { 2734 if (!ioaddr[b]) 2735 continue; 2736 2737 brd = &mxser_boards[m]; 2738 retval = mxser_get_ISA_conf(ioaddr[b], brd); 2739 if (retval <= 0) { 2740 brd->info = NULL; 2741 continue; 2742 } 2743 2744 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n", 2745 brd->info->name, ioaddr[b]); 2746 2747 /* mxser_initbrd will hook ISR. */ 2748 if (mxser_initbrd(brd) < 0) { 2749 mxser_release_ISA_res(brd); 2750 brd->info = NULL; 2751 continue; 2752 } 2753 2754 brd->idx = m * MXSER_PORTS_PER_BOARD; 2755 for (i = 0; i < brd->info->nports; i++) { 2756 tty_dev = tty_port_register_device(&brd->ports[i].port, 2757 mxvar_sdriver, brd->idx + i, NULL); 2758 if (IS_ERR(tty_dev)) { 2759 for (; i > 0; i--) 2760 tty_unregister_device(mxvar_sdriver, 2761 brd->idx + i - 1); 2762 for (i = 0; i < brd->info->nports; i++) 2763 tty_port_destroy(&brd->ports[i].port); 2764 free_irq(brd->irq, brd); 2765 mxser_release_ISA_res(brd); 2766 brd->info = NULL; 2767 break; 2768 } 2769 } 2770 if (brd->info == NULL) 2771 continue; 2772 2773 m++; 2774 } 2775 2776 retval = pci_register_driver(&mxser_driver); 2777 if (retval) { 2778 printk(KERN_ERR "mxser: can't register pci driver\n"); 2779 if (!m) { 2780 retval = -ENODEV; 2781 goto err_unr; 2782 } /* else: we have some ISA cards under control */ 2783 } 2784 2785 return 0; 2786 err_unr: 2787 tty_unregister_driver(mxvar_sdriver); 2788 err_put: 2789 put_tty_driver(mxvar_sdriver); 2790 return retval; 2791 } 2792 2793 static void __exit mxser_module_exit(void) 2794 { 2795 unsigned int i; 2796 2797 pci_unregister_driver(&mxser_driver); 2798 2799 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */ 2800 if (mxser_boards[i].info != NULL) 2801 mxser_board_remove(&mxser_boards[i]); 2802 tty_unregister_driver(mxvar_sdriver); 2803 put_tty_driver(mxvar_sdriver); 2804 2805 for (i = 0; i < MXSER_BOARDS; i++) 2806 if (mxser_boards[i].info != NULL) 2807 mxser_release_ISA_res(&mxser_boards[i]); 2808 } 2809 2810 module_init(mxser_module_init); 2811 module_exit(mxser_module_exit); 2812