1 /* 2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver. 3 * 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com). 5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com> 6 * 7 * This code is loosely based on the 1.8 moxa driver which is based on 8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and 9 * others. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox 17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on 18 * www.moxa.com. 19 * - Fixed x86_64 cleanness 20 */ 21 22 #include <linux/module.h> 23 #include <linux/errno.h> 24 #include <linux/signal.h> 25 #include <linux/sched.h> 26 #include <linux/timer.h> 27 #include <linux/interrupt.h> 28 #include <linux/tty.h> 29 #include <linux/tty_flip.h> 30 #include <linux/serial.h> 31 #include <linux/serial_reg.h> 32 #include <linux/major.h> 33 #include <linux/string.h> 34 #include <linux/fcntl.h> 35 #include <linux/ptrace.h> 36 #include <linux/ioport.h> 37 #include <linux/mm.h> 38 #include <linux/delay.h> 39 #include <linux/pci.h> 40 #include <linux/bitops.h> 41 #include <linux/slab.h> 42 #include <linux/ratelimit.h> 43 44 #include <asm/io.h> 45 #include <asm/irq.h> 46 #include <asm/uaccess.h> 47 48 #include "mxser.h" 49 50 #define MXSER_VERSION "2.0.5" /* 1.14 */ 51 #define MXSERMAJOR 174 52 53 #define MXSER_BOARDS 4 /* Max. boards */ 54 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */ 55 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD) 56 #define MXSER_ISR_PASS_LIMIT 100 57 58 /*CheckIsMoxaMust return value*/ 59 #define MOXA_OTHER_UART 0x00 60 #define MOXA_MUST_MU150_HWID 0x01 61 #define MOXA_MUST_MU860_HWID 0x02 62 63 #define WAKEUP_CHARS 256 64 65 #define UART_MCR_AFE 0x20 66 #define UART_LSR_SPECIAL 0x1E 67 68 #define PCI_DEVICE_ID_POS104UL 0x1044 69 #define PCI_DEVICE_ID_CB108 0x1080 70 #define PCI_DEVICE_ID_CP102UF 0x1023 71 #define PCI_DEVICE_ID_CP112UL 0x1120 72 #define PCI_DEVICE_ID_CB114 0x1142 73 #define PCI_DEVICE_ID_CP114UL 0x1143 74 #define PCI_DEVICE_ID_CB134I 0x1341 75 #define PCI_DEVICE_ID_CP138U 0x1380 76 77 78 #define C168_ASIC_ID 1 79 #define C104_ASIC_ID 2 80 #define C102_ASIC_ID 0xB 81 #define CI132_ASIC_ID 4 82 #define CI134_ASIC_ID 3 83 #define CI104J_ASIC_ID 5 84 85 #define MXSER_HIGHBAUD 1 86 #define MXSER_HAS2 2 87 88 /* This is only for PCI */ 89 static const struct { 90 int type; 91 int tx_fifo; 92 int rx_fifo; 93 int xmit_fifo_size; 94 int rx_high_water; 95 int rx_trigger; 96 int rx_low_water; 97 long max_baud; 98 } Gpci_uart_info[] = { 99 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L}, 100 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L}, 101 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L} 102 }; 103 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info) 104 105 struct mxser_cardinfo { 106 char *name; 107 unsigned int nports; 108 unsigned int flags; 109 }; 110 111 static const struct mxser_cardinfo mxser_cards[] = { 112 /* 0*/ { "C168 series", 8, }, 113 { "C104 series", 4, }, 114 { "CI-104J series", 4, }, 115 { "C168H/PCI series", 8, }, 116 { "C104H/PCI series", 4, }, 117 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */ 118 { "CI-132 series", 4, MXSER_HAS2 }, 119 { "CI-134 series", 4, }, 120 { "CP-132 series", 2, }, 121 { "CP-114 series", 4, }, 122 /*10*/ { "CT-114 series", 4, }, 123 { "CP-102 series", 2, MXSER_HIGHBAUD }, 124 { "CP-104U series", 4, }, 125 { "CP-168U series", 8, }, 126 { "CP-132U series", 2, }, 127 /*15*/ { "CP-134U series", 4, }, 128 { "CP-104JU series", 4, }, 129 { "Moxa UC7000 Serial", 8, }, /* RC7000 */ 130 { "CP-118U series", 8, }, 131 { "CP-102UL series", 2, }, 132 /*20*/ { "CP-102U series", 2, }, 133 { "CP-118EL series", 8, }, 134 { "CP-168EL series", 8, }, 135 { "CP-104EL series", 4, }, 136 { "CB-108 series", 8, }, 137 /*25*/ { "CB-114 series", 4, }, 138 { "CB-134I series", 4, }, 139 { "CP-138U series", 8, }, 140 { "POS-104UL series", 4, }, 141 { "CP-114UL series", 4, }, 142 /*30*/ { "CP-102UF series", 2, }, 143 { "CP-112UL series", 2, }, 144 }; 145 146 /* driver_data correspond to the lines in the structure above 147 see also ISA probe function before you change something */ 148 static struct pci_device_id mxser_pcibrds[] = { 149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 }, 150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 }, 151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 }, 152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 }, 153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 }, 154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 }, 155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 }, 156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 }, 157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 }, 158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 }, 159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 }, 160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 }, 161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 }, 162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 }, 163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 }, 164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 }, 165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 }, 166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 }, 167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 }, 168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 }, 169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 }, 170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 }, 171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, 172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 }, 173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 }, 174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 }, 175 { } 176 }; 177 MODULE_DEVICE_TABLE(pci, mxser_pcibrds); 178 179 static unsigned long ioaddr[MXSER_BOARDS]; 180 static int ttymajor = MXSERMAJOR; 181 182 /* Variables for insmod */ 183 184 MODULE_AUTHOR("Casper Yang"); 185 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver"); 186 module_param_array(ioaddr, ulong, NULL, 0); 187 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board"); 188 module_param(ttymajor, int, 0); 189 MODULE_LICENSE("GPL"); 190 191 struct mxser_log { 192 int tick; 193 unsigned long rxcnt[MXSER_PORTS]; 194 unsigned long txcnt[MXSER_PORTS]; 195 }; 196 197 struct mxser_mon { 198 unsigned long rxcnt; 199 unsigned long txcnt; 200 unsigned long up_rxcnt; 201 unsigned long up_txcnt; 202 int modem_status; 203 unsigned char hold_reason; 204 }; 205 206 struct mxser_mon_ext { 207 unsigned long rx_cnt[32]; 208 unsigned long tx_cnt[32]; 209 unsigned long up_rxcnt[32]; 210 unsigned long up_txcnt[32]; 211 int modem_status[32]; 212 213 long baudrate[32]; 214 int databits[32]; 215 int stopbits[32]; 216 int parity[32]; 217 int flowctrl[32]; 218 int fifo[32]; 219 int iftype[32]; 220 }; 221 222 struct mxser_board; 223 224 struct mxser_port { 225 struct tty_port port; 226 struct mxser_board *board; 227 228 unsigned long ioaddr; 229 unsigned long opmode_ioaddr; 230 int max_baud; 231 232 int rx_high_water; 233 int rx_trigger; /* Rx fifo trigger level */ 234 int rx_low_water; 235 int baud_base; /* max. speed */ 236 int type; /* UART type */ 237 238 int x_char; /* xon/xoff character */ 239 int IER; /* Interrupt Enable Register */ 240 int MCR; /* Modem control register */ 241 242 unsigned char stop_rx; 243 unsigned char ldisc_stop_rx; 244 245 int custom_divisor; 246 unsigned char err_shadow; 247 248 struct async_icount icount; /* kernel counters for 4 input interrupts */ 249 int timeout; 250 251 int read_status_mask; 252 int ignore_status_mask; 253 int xmit_fifo_size; 254 int xmit_head; 255 int xmit_tail; 256 int xmit_cnt; 257 int closing; 258 259 struct ktermios normal_termios; 260 261 struct mxser_mon mon_data; 262 263 spinlock_t slock; 264 }; 265 266 struct mxser_board { 267 unsigned int idx; 268 int irq; 269 const struct mxser_cardinfo *info; 270 unsigned long vector; 271 unsigned long vector_mask; 272 273 int chip_flag; 274 int uart_type; 275 276 struct mxser_port ports[MXSER_PORTS_PER_BOARD]; 277 }; 278 279 struct mxser_mstatus { 280 tcflag_t cflag; 281 int cts; 282 int dsr; 283 int ri; 284 int dcd; 285 }; 286 287 static struct mxser_board mxser_boards[MXSER_BOARDS]; 288 static struct tty_driver *mxvar_sdriver; 289 static struct mxser_log mxvar_log; 290 static int mxser_set_baud_method[MXSER_PORTS + 1]; 291 292 static void mxser_enable_must_enchance_mode(unsigned long baseio) 293 { 294 u8 oldlcr; 295 u8 efr; 296 297 oldlcr = inb(baseio + UART_LCR); 298 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 299 300 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 301 efr |= MOXA_MUST_EFR_EFRB_ENABLE; 302 303 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 304 outb(oldlcr, baseio + UART_LCR); 305 } 306 307 #ifdef CONFIG_PCI 308 static void mxser_disable_must_enchance_mode(unsigned long baseio) 309 { 310 u8 oldlcr; 311 u8 efr; 312 313 oldlcr = inb(baseio + UART_LCR); 314 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 315 316 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 317 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE; 318 319 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 320 outb(oldlcr, baseio + UART_LCR); 321 } 322 #endif 323 324 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value) 325 { 326 u8 oldlcr; 327 u8 efr; 328 329 oldlcr = inb(baseio + UART_LCR); 330 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 331 332 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 333 efr &= ~MOXA_MUST_EFR_BANK_MASK; 334 efr |= MOXA_MUST_EFR_BANK0; 335 336 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 337 outb(value, baseio + MOXA_MUST_XON1_REGISTER); 338 outb(oldlcr, baseio + UART_LCR); 339 } 340 341 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value) 342 { 343 u8 oldlcr; 344 u8 efr; 345 346 oldlcr = inb(baseio + UART_LCR); 347 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 348 349 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 350 efr &= ~MOXA_MUST_EFR_BANK_MASK; 351 efr |= MOXA_MUST_EFR_BANK0; 352 353 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 354 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER); 355 outb(oldlcr, baseio + UART_LCR); 356 } 357 358 static void mxser_set_must_fifo_value(struct mxser_port *info) 359 { 360 u8 oldlcr; 361 u8 efr; 362 363 oldlcr = inb(info->ioaddr + UART_LCR); 364 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR); 365 366 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER); 367 efr &= ~MOXA_MUST_EFR_BANK_MASK; 368 efr |= MOXA_MUST_EFR_BANK1; 369 370 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER); 371 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER); 372 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER); 373 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER); 374 outb(oldlcr, info->ioaddr + UART_LCR); 375 } 376 377 static void mxser_set_must_enum_value(unsigned long baseio, u8 value) 378 { 379 u8 oldlcr; 380 u8 efr; 381 382 oldlcr = inb(baseio + UART_LCR); 383 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 384 385 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 386 efr &= ~MOXA_MUST_EFR_BANK_MASK; 387 efr |= MOXA_MUST_EFR_BANK2; 388 389 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 390 outb(value, baseio + MOXA_MUST_ENUM_REGISTER); 391 outb(oldlcr, baseio + UART_LCR); 392 } 393 394 #ifdef CONFIG_PCI 395 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId) 396 { 397 u8 oldlcr; 398 u8 efr; 399 400 oldlcr = inb(baseio + UART_LCR); 401 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 402 403 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 404 efr &= ~MOXA_MUST_EFR_BANK_MASK; 405 efr |= MOXA_MUST_EFR_BANK2; 406 407 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 408 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER); 409 outb(oldlcr, baseio + UART_LCR); 410 } 411 #endif 412 413 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio) 414 { 415 u8 oldlcr; 416 u8 efr; 417 418 oldlcr = inb(baseio + UART_LCR); 419 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 420 421 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 422 efr &= ~MOXA_MUST_EFR_SF_MASK; 423 424 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 425 outb(oldlcr, baseio + UART_LCR); 426 } 427 428 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio) 429 { 430 u8 oldlcr; 431 u8 efr; 432 433 oldlcr = inb(baseio + UART_LCR); 434 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 435 436 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 437 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; 438 efr |= MOXA_MUST_EFR_SF_TX1; 439 440 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 441 outb(oldlcr, baseio + UART_LCR); 442 } 443 444 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio) 445 { 446 u8 oldlcr; 447 u8 efr; 448 449 oldlcr = inb(baseio + UART_LCR); 450 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 451 452 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 453 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; 454 455 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 456 outb(oldlcr, baseio + UART_LCR); 457 } 458 459 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio) 460 { 461 u8 oldlcr; 462 u8 efr; 463 464 oldlcr = inb(baseio + UART_LCR); 465 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 466 467 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 468 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; 469 efr |= MOXA_MUST_EFR_SF_RX1; 470 471 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 472 outb(oldlcr, baseio + UART_LCR); 473 } 474 475 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio) 476 { 477 u8 oldlcr; 478 u8 efr; 479 480 oldlcr = inb(baseio + UART_LCR); 481 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 482 483 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 484 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; 485 486 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 487 outb(oldlcr, baseio + UART_LCR); 488 } 489 490 #ifdef CONFIG_PCI 491 static int CheckIsMoxaMust(unsigned long io) 492 { 493 u8 oldmcr, hwid; 494 int i; 495 496 outb(0, io + UART_LCR); 497 mxser_disable_must_enchance_mode(io); 498 oldmcr = inb(io + UART_MCR); 499 outb(0, io + UART_MCR); 500 mxser_set_must_xon1_value(io, 0x11); 501 if ((hwid = inb(io + UART_MCR)) != 0) { 502 outb(oldmcr, io + UART_MCR); 503 return MOXA_OTHER_UART; 504 } 505 506 mxser_get_must_hardware_id(io, &hwid); 507 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */ 508 if (hwid == Gpci_uart_info[i].type) 509 return (int)hwid; 510 } 511 return MOXA_OTHER_UART; 512 } 513 #endif 514 515 static void process_txrx_fifo(struct mxser_port *info) 516 { 517 int i; 518 519 if ((info->type == PORT_16450) || (info->type == PORT_8250)) { 520 info->rx_trigger = 1; 521 info->rx_high_water = 1; 522 info->rx_low_water = 1; 523 info->xmit_fifo_size = 1; 524 } else 525 for (i = 0; i < UART_INFO_NUM; i++) 526 if (info->board->chip_flag == Gpci_uart_info[i].type) { 527 info->rx_trigger = Gpci_uart_info[i].rx_trigger; 528 info->rx_low_water = Gpci_uart_info[i].rx_low_water; 529 info->rx_high_water = Gpci_uart_info[i].rx_high_water; 530 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size; 531 break; 532 } 533 } 534 535 static unsigned char mxser_get_msr(int baseaddr, int mode, int port) 536 { 537 static unsigned char mxser_msr[MXSER_PORTS + 1]; 538 unsigned char status = 0; 539 540 status = inb(baseaddr + UART_MSR); 541 542 mxser_msr[port] &= 0x0F; 543 mxser_msr[port] |= status; 544 status = mxser_msr[port]; 545 if (mode) 546 mxser_msr[port] = 0; 547 548 return status; 549 } 550 551 static int mxser_carrier_raised(struct tty_port *port) 552 { 553 struct mxser_port *mp = container_of(port, struct mxser_port, port); 554 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0; 555 } 556 557 static void mxser_dtr_rts(struct tty_port *port, int on) 558 { 559 struct mxser_port *mp = container_of(port, struct mxser_port, port); 560 unsigned long flags; 561 562 spin_lock_irqsave(&mp->slock, flags); 563 if (on) 564 outb(inb(mp->ioaddr + UART_MCR) | 565 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR); 566 else 567 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS), 568 mp->ioaddr + UART_MCR); 569 spin_unlock_irqrestore(&mp->slock, flags); 570 } 571 572 static int mxser_set_baud(struct tty_struct *tty, long newspd) 573 { 574 struct mxser_port *info = tty->driver_data; 575 int quot = 0, baud; 576 unsigned char cval; 577 578 if (!info->ioaddr) 579 return -1; 580 581 if (newspd > info->max_baud) 582 return -1; 583 584 if (newspd == 134) { 585 quot = 2 * info->baud_base / 269; 586 tty_encode_baud_rate(tty, 134, 134); 587 } else if (newspd) { 588 quot = info->baud_base / newspd; 589 if (quot == 0) 590 quot = 1; 591 baud = info->baud_base/quot; 592 tty_encode_baud_rate(tty, baud, baud); 593 } else { 594 quot = 0; 595 } 596 597 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base); 598 info->timeout += HZ / 50; /* Add .02 seconds of slop */ 599 600 if (quot) { 601 info->MCR |= UART_MCR_DTR; 602 outb(info->MCR, info->ioaddr + UART_MCR); 603 } else { 604 info->MCR &= ~UART_MCR_DTR; 605 outb(info->MCR, info->ioaddr + UART_MCR); 606 return 0; 607 } 608 609 cval = inb(info->ioaddr + UART_LCR); 610 611 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */ 612 613 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */ 614 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */ 615 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */ 616 617 #ifdef BOTHER 618 if (C_BAUD(tty) == BOTHER) { 619 quot = info->baud_base % newspd; 620 quot *= 8; 621 if (quot % newspd > newspd / 2) { 622 quot /= newspd; 623 quot++; 624 } else 625 quot /= newspd; 626 627 mxser_set_must_enum_value(info->ioaddr, quot); 628 } else 629 #endif 630 mxser_set_must_enum_value(info->ioaddr, 0); 631 632 return 0; 633 } 634 635 /* 636 * This routine is called to set the UART divisor registers to match 637 * the specified baud rate for a serial port. 638 */ 639 static int mxser_change_speed(struct tty_struct *tty, 640 struct ktermios *old_termios) 641 { 642 struct mxser_port *info = tty->driver_data; 643 unsigned cflag, cval, fcr; 644 int ret = 0; 645 unsigned char status; 646 647 cflag = tty->termios.c_cflag; 648 if (!info->ioaddr) 649 return ret; 650 651 if (mxser_set_baud_method[tty->index] == 0) 652 mxser_set_baud(tty, tty_get_baud_rate(tty)); 653 654 /* byte size and parity */ 655 switch (cflag & CSIZE) { 656 case CS5: 657 cval = 0x00; 658 break; 659 case CS6: 660 cval = 0x01; 661 break; 662 case CS7: 663 cval = 0x02; 664 break; 665 case CS8: 666 cval = 0x03; 667 break; 668 default: 669 cval = 0x00; 670 break; /* too keep GCC shut... */ 671 } 672 if (cflag & CSTOPB) 673 cval |= 0x04; 674 if (cflag & PARENB) 675 cval |= UART_LCR_PARITY; 676 if (!(cflag & PARODD)) 677 cval |= UART_LCR_EPAR; 678 if (cflag & CMSPAR) 679 cval |= UART_LCR_SPAR; 680 681 if ((info->type == PORT_8250) || (info->type == PORT_16450)) { 682 if (info->board->chip_flag) { 683 fcr = UART_FCR_ENABLE_FIFO; 684 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; 685 mxser_set_must_fifo_value(info); 686 } else 687 fcr = 0; 688 } else { 689 fcr = UART_FCR_ENABLE_FIFO; 690 if (info->board->chip_flag) { 691 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; 692 mxser_set_must_fifo_value(info); 693 } else { 694 switch (info->rx_trigger) { 695 case 1: 696 fcr |= UART_FCR_TRIGGER_1; 697 break; 698 case 4: 699 fcr |= UART_FCR_TRIGGER_4; 700 break; 701 case 8: 702 fcr |= UART_FCR_TRIGGER_8; 703 break; 704 default: 705 fcr |= UART_FCR_TRIGGER_14; 706 break; 707 } 708 } 709 } 710 711 /* CTS flow control flag and modem status interrupts */ 712 info->IER &= ~UART_IER_MSI; 713 info->MCR &= ~UART_MCR_AFE; 714 tty_port_set_cts_flow(&info->port, cflag & CRTSCTS); 715 if (cflag & CRTSCTS) { 716 info->IER |= UART_IER_MSI; 717 if ((info->type == PORT_16550A) || (info->board->chip_flag)) { 718 info->MCR |= UART_MCR_AFE; 719 } else { 720 status = inb(info->ioaddr + UART_MSR); 721 if (tty->hw_stopped) { 722 if (status & UART_MSR_CTS) { 723 tty->hw_stopped = 0; 724 if (info->type != PORT_16550A && 725 !info->board->chip_flag) { 726 outb(info->IER & ~UART_IER_THRI, 727 info->ioaddr + 728 UART_IER); 729 info->IER |= UART_IER_THRI; 730 outb(info->IER, info->ioaddr + 731 UART_IER); 732 } 733 tty_wakeup(tty); 734 } 735 } else { 736 if (!(status & UART_MSR_CTS)) { 737 tty->hw_stopped = 1; 738 if ((info->type != PORT_16550A) && 739 (!info->board->chip_flag)) { 740 info->IER &= ~UART_IER_THRI; 741 outb(info->IER, info->ioaddr + 742 UART_IER); 743 } 744 } 745 } 746 } 747 } 748 outb(info->MCR, info->ioaddr + UART_MCR); 749 tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL); 750 if (~cflag & CLOCAL) 751 info->IER |= UART_IER_MSI; 752 outb(info->IER, info->ioaddr + UART_IER); 753 754 /* 755 * Set up parity check flag 756 */ 757 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 758 if (I_INPCK(tty)) 759 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE; 760 if (I_BRKINT(tty) || I_PARMRK(tty)) 761 info->read_status_mask |= UART_LSR_BI; 762 763 info->ignore_status_mask = 0; 764 765 if (I_IGNBRK(tty)) { 766 info->ignore_status_mask |= UART_LSR_BI; 767 info->read_status_mask |= UART_LSR_BI; 768 /* 769 * If we're ignore parity and break indicators, ignore 770 * overruns too. (For real raw support). 771 */ 772 if (I_IGNPAR(tty)) { 773 info->ignore_status_mask |= 774 UART_LSR_OE | 775 UART_LSR_PE | 776 UART_LSR_FE; 777 info->read_status_mask |= 778 UART_LSR_OE | 779 UART_LSR_PE | 780 UART_LSR_FE; 781 } 782 } 783 if (info->board->chip_flag) { 784 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty)); 785 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty)); 786 if (I_IXON(tty)) { 787 mxser_enable_must_rx_software_flow_control( 788 info->ioaddr); 789 } else { 790 mxser_disable_must_rx_software_flow_control( 791 info->ioaddr); 792 } 793 if (I_IXOFF(tty)) { 794 mxser_enable_must_tx_software_flow_control( 795 info->ioaddr); 796 } else { 797 mxser_disable_must_tx_software_flow_control( 798 info->ioaddr); 799 } 800 } 801 802 803 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */ 804 outb(cval, info->ioaddr + UART_LCR); 805 806 return ret; 807 } 808 809 static void mxser_check_modem_status(struct tty_struct *tty, 810 struct mxser_port *port, int status) 811 { 812 /* update input line counters */ 813 if (status & UART_MSR_TERI) 814 port->icount.rng++; 815 if (status & UART_MSR_DDSR) 816 port->icount.dsr++; 817 if (status & UART_MSR_DDCD) 818 port->icount.dcd++; 819 if (status & UART_MSR_DCTS) 820 port->icount.cts++; 821 port->mon_data.modem_status = status; 822 wake_up_interruptible(&port->port.delta_msr_wait); 823 824 if (tty_port_check_carrier(&port->port) && (status & UART_MSR_DDCD)) { 825 if (status & UART_MSR_DCD) 826 wake_up_interruptible(&port->port.open_wait); 827 } 828 829 if (tty_port_cts_enabled(&port->port)) { 830 if (tty->hw_stopped) { 831 if (status & UART_MSR_CTS) { 832 tty->hw_stopped = 0; 833 834 if ((port->type != PORT_16550A) && 835 (!port->board->chip_flag)) { 836 outb(port->IER & ~UART_IER_THRI, 837 port->ioaddr + UART_IER); 838 port->IER |= UART_IER_THRI; 839 outb(port->IER, port->ioaddr + 840 UART_IER); 841 } 842 tty_wakeup(tty); 843 } 844 } else { 845 if (!(status & UART_MSR_CTS)) { 846 tty->hw_stopped = 1; 847 if (port->type != PORT_16550A && 848 !port->board->chip_flag) { 849 port->IER &= ~UART_IER_THRI; 850 outb(port->IER, port->ioaddr + 851 UART_IER); 852 } 853 } 854 } 855 } 856 } 857 858 static int mxser_activate(struct tty_port *port, struct tty_struct *tty) 859 { 860 struct mxser_port *info = container_of(port, struct mxser_port, port); 861 unsigned long page; 862 unsigned long flags; 863 864 page = __get_free_page(GFP_KERNEL); 865 if (!page) 866 return -ENOMEM; 867 868 spin_lock_irqsave(&info->slock, flags); 869 870 if (!info->ioaddr || !info->type) { 871 set_bit(TTY_IO_ERROR, &tty->flags); 872 free_page(page); 873 spin_unlock_irqrestore(&info->slock, flags); 874 return 0; 875 } 876 info->port.xmit_buf = (unsigned char *) page; 877 878 /* 879 * Clear the FIFO buffers and disable them 880 * (they will be reenabled in mxser_change_speed()) 881 */ 882 if (info->board->chip_flag) 883 outb((UART_FCR_CLEAR_RCVR | 884 UART_FCR_CLEAR_XMIT | 885 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR); 886 else 887 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), 888 info->ioaddr + UART_FCR); 889 890 /* 891 * At this point there's no way the LSR could still be 0xFF; 892 * if it is, then bail out, because there's likely no UART 893 * here. 894 */ 895 if (inb(info->ioaddr + UART_LSR) == 0xff) { 896 spin_unlock_irqrestore(&info->slock, flags); 897 if (capable(CAP_SYS_ADMIN)) { 898 set_bit(TTY_IO_ERROR, &tty->flags); 899 return 0; 900 } else 901 return -ENODEV; 902 } 903 904 /* 905 * Clear the interrupt registers. 906 */ 907 (void) inb(info->ioaddr + UART_LSR); 908 (void) inb(info->ioaddr + UART_RX); 909 (void) inb(info->ioaddr + UART_IIR); 910 (void) inb(info->ioaddr + UART_MSR); 911 912 /* 913 * Now, initialize the UART 914 */ 915 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */ 916 info->MCR = UART_MCR_DTR | UART_MCR_RTS; 917 outb(info->MCR, info->ioaddr + UART_MCR); 918 919 /* 920 * Finally, enable interrupts 921 */ 922 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; 923 924 if (info->board->chip_flag) 925 info->IER |= MOXA_MUST_IER_EGDAI; 926 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */ 927 928 /* 929 * And clear the interrupt registers again for luck. 930 */ 931 (void) inb(info->ioaddr + UART_LSR); 932 (void) inb(info->ioaddr + UART_RX); 933 (void) inb(info->ioaddr + UART_IIR); 934 (void) inb(info->ioaddr + UART_MSR); 935 936 clear_bit(TTY_IO_ERROR, &tty->flags); 937 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; 938 939 /* 940 * and set the speed of the serial port 941 */ 942 mxser_change_speed(tty, NULL); 943 spin_unlock_irqrestore(&info->slock, flags); 944 945 return 0; 946 } 947 948 /* 949 * This routine will shutdown a serial port 950 */ 951 static void mxser_shutdown_port(struct tty_port *port) 952 { 953 struct mxser_port *info = container_of(port, struct mxser_port, port); 954 unsigned long flags; 955 956 spin_lock_irqsave(&info->slock, flags); 957 958 /* 959 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq 960 * here so the queue might never be waken up 961 */ 962 wake_up_interruptible(&info->port.delta_msr_wait); 963 964 /* 965 * Free the xmit buffer, if necessary 966 */ 967 if (info->port.xmit_buf) { 968 free_page((unsigned long) info->port.xmit_buf); 969 info->port.xmit_buf = NULL; 970 } 971 972 info->IER = 0; 973 outb(0x00, info->ioaddr + UART_IER); 974 975 /* clear Rx/Tx FIFO's */ 976 if (info->board->chip_flag) 977 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | 978 MOXA_MUST_FCR_GDA_MODE_ENABLE, 979 info->ioaddr + UART_FCR); 980 else 981 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, 982 info->ioaddr + UART_FCR); 983 984 /* read data port to reset things */ 985 (void) inb(info->ioaddr + UART_RX); 986 987 988 if (info->board->chip_flag) 989 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr); 990 991 spin_unlock_irqrestore(&info->slock, flags); 992 } 993 994 /* 995 * This routine is called whenever a serial port is opened. It 996 * enables interrupts for a serial port, linking in its async structure into 997 * the IRQ chain. It also performs the serial-specific 998 * initialization for the tty structure. 999 */ 1000 static int mxser_open(struct tty_struct *tty, struct file *filp) 1001 { 1002 struct mxser_port *info; 1003 int line; 1004 1005 line = tty->index; 1006 if (line == MXSER_PORTS) 1007 return 0; 1008 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD]; 1009 if (!info->ioaddr) 1010 return -ENODEV; 1011 1012 tty->driver_data = info; 1013 return tty_port_open(&info->port, tty, filp); 1014 } 1015 1016 static void mxser_flush_buffer(struct tty_struct *tty) 1017 { 1018 struct mxser_port *info = tty->driver_data; 1019 char fcr; 1020 unsigned long flags; 1021 1022 1023 spin_lock_irqsave(&info->slock, flags); 1024 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; 1025 1026 fcr = inb(info->ioaddr + UART_FCR); 1027 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), 1028 info->ioaddr + UART_FCR); 1029 outb(fcr, info->ioaddr + UART_FCR); 1030 1031 spin_unlock_irqrestore(&info->slock, flags); 1032 1033 tty_wakeup(tty); 1034 } 1035 1036 1037 static void mxser_close_port(struct tty_port *port) 1038 { 1039 struct mxser_port *info = container_of(port, struct mxser_port, port); 1040 unsigned long timeout; 1041 /* 1042 * At this point we stop accepting input. To do this, we 1043 * disable the receive line status interrupts, and tell the 1044 * interrupt driver to stop checking the data ready bit in the 1045 * line status register. 1046 */ 1047 info->IER &= ~UART_IER_RLSI; 1048 if (info->board->chip_flag) 1049 info->IER &= ~MOXA_MUST_RECV_ISR; 1050 1051 outb(info->IER, info->ioaddr + UART_IER); 1052 /* 1053 * Before we drop DTR, make sure the UART transmitter 1054 * has completely drained; this is especially 1055 * important if there is a transmit FIFO! 1056 */ 1057 timeout = jiffies + HZ; 1058 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) { 1059 schedule_timeout_interruptible(5); 1060 if (time_after(jiffies, timeout)) 1061 break; 1062 } 1063 } 1064 1065 /* 1066 * This routine is called when the serial port gets closed. First, we 1067 * wait for the last remaining data to be sent. Then, we unlink its 1068 * async structure from the interrupt chain if necessary, and we free 1069 * that IRQ if nothing is left in the chain. 1070 */ 1071 static void mxser_close(struct tty_struct *tty, struct file *filp) 1072 { 1073 struct mxser_port *info = tty->driver_data; 1074 struct tty_port *port = &info->port; 1075 1076 if (tty->index == MXSER_PORTS || info == NULL) 1077 return; 1078 if (tty_port_close_start(port, tty, filp) == 0) 1079 return; 1080 info->closing = 1; 1081 mutex_lock(&port->mutex); 1082 mxser_close_port(port); 1083 mxser_flush_buffer(tty); 1084 if (tty_port_initialized(port) && C_HUPCL(tty)) 1085 tty_port_lower_dtr_rts(port); 1086 mxser_shutdown_port(port); 1087 tty_port_set_initialized(port, 0); 1088 mutex_unlock(&port->mutex); 1089 info->closing = 0; 1090 /* Right now the tty_port set is done outside of the close_end helper 1091 as we don't yet have everyone using refcounts */ 1092 tty_port_close_end(port, tty); 1093 tty_port_tty_set(port, NULL); 1094 } 1095 1096 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) 1097 { 1098 int c, total = 0; 1099 struct mxser_port *info = tty->driver_data; 1100 unsigned long flags; 1101 1102 if (!info->port.xmit_buf) 1103 return 0; 1104 1105 while (1) { 1106 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, 1107 SERIAL_XMIT_SIZE - info->xmit_head)); 1108 if (c <= 0) 1109 break; 1110 1111 memcpy(info->port.xmit_buf + info->xmit_head, buf, c); 1112 spin_lock_irqsave(&info->slock, flags); 1113 info->xmit_head = (info->xmit_head + c) & 1114 (SERIAL_XMIT_SIZE - 1); 1115 info->xmit_cnt += c; 1116 spin_unlock_irqrestore(&info->slock, flags); 1117 1118 buf += c; 1119 count -= c; 1120 total += c; 1121 } 1122 1123 if (info->xmit_cnt && !tty->stopped) { 1124 if (!tty->hw_stopped || 1125 (info->type == PORT_16550A) || 1126 (info->board->chip_flag)) { 1127 spin_lock_irqsave(&info->slock, flags); 1128 outb(info->IER & ~UART_IER_THRI, info->ioaddr + 1129 UART_IER); 1130 info->IER |= UART_IER_THRI; 1131 outb(info->IER, info->ioaddr + UART_IER); 1132 spin_unlock_irqrestore(&info->slock, flags); 1133 } 1134 } 1135 return total; 1136 } 1137 1138 static int mxser_put_char(struct tty_struct *tty, unsigned char ch) 1139 { 1140 struct mxser_port *info = tty->driver_data; 1141 unsigned long flags; 1142 1143 if (!info->port.xmit_buf) 1144 return 0; 1145 1146 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1) 1147 return 0; 1148 1149 spin_lock_irqsave(&info->slock, flags); 1150 info->port.xmit_buf[info->xmit_head++] = ch; 1151 info->xmit_head &= SERIAL_XMIT_SIZE - 1; 1152 info->xmit_cnt++; 1153 spin_unlock_irqrestore(&info->slock, flags); 1154 if (!tty->stopped) { 1155 if (!tty->hw_stopped || 1156 (info->type == PORT_16550A) || 1157 info->board->chip_flag) { 1158 spin_lock_irqsave(&info->slock, flags); 1159 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1160 info->IER |= UART_IER_THRI; 1161 outb(info->IER, info->ioaddr + UART_IER); 1162 spin_unlock_irqrestore(&info->slock, flags); 1163 } 1164 } 1165 return 1; 1166 } 1167 1168 1169 static void mxser_flush_chars(struct tty_struct *tty) 1170 { 1171 struct mxser_port *info = tty->driver_data; 1172 unsigned long flags; 1173 1174 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf || 1175 (tty->hw_stopped && info->type != PORT_16550A && 1176 !info->board->chip_flag)) 1177 return; 1178 1179 spin_lock_irqsave(&info->slock, flags); 1180 1181 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1182 info->IER |= UART_IER_THRI; 1183 outb(info->IER, info->ioaddr + UART_IER); 1184 1185 spin_unlock_irqrestore(&info->slock, flags); 1186 } 1187 1188 static int mxser_write_room(struct tty_struct *tty) 1189 { 1190 struct mxser_port *info = tty->driver_data; 1191 int ret; 1192 1193 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; 1194 return ret < 0 ? 0 : ret; 1195 } 1196 1197 static int mxser_chars_in_buffer(struct tty_struct *tty) 1198 { 1199 struct mxser_port *info = tty->driver_data; 1200 return info->xmit_cnt; 1201 } 1202 1203 /* 1204 * ------------------------------------------------------------ 1205 * friends of mxser_ioctl() 1206 * ------------------------------------------------------------ 1207 */ 1208 static int mxser_get_serial_info(struct tty_struct *tty, 1209 struct serial_struct __user *retinfo) 1210 { 1211 struct mxser_port *info = tty->driver_data; 1212 struct serial_struct tmp = { 1213 .type = info->type, 1214 .line = tty->index, 1215 .port = info->ioaddr, 1216 .irq = info->board->irq, 1217 .flags = info->port.flags, 1218 .baud_base = info->baud_base, 1219 .close_delay = info->port.close_delay, 1220 .closing_wait = info->port.closing_wait, 1221 .custom_divisor = info->custom_divisor, 1222 }; 1223 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) 1224 return -EFAULT; 1225 return 0; 1226 } 1227 1228 static int mxser_set_serial_info(struct tty_struct *tty, 1229 struct serial_struct __user *new_info) 1230 { 1231 struct mxser_port *info = tty->driver_data; 1232 struct tty_port *port = &info->port; 1233 struct serial_struct new_serial; 1234 speed_t baud; 1235 unsigned long sl_flags; 1236 unsigned int flags; 1237 int retval = 0; 1238 1239 if (!new_info || !info->ioaddr) 1240 return -ENODEV; 1241 if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) 1242 return -EFAULT; 1243 1244 if (new_serial.irq != info->board->irq || 1245 new_serial.port != info->ioaddr) 1246 return -EINVAL; 1247 1248 flags = port->flags & ASYNC_SPD_MASK; 1249 1250 if (!capable(CAP_SYS_ADMIN)) { 1251 if ((new_serial.baud_base != info->baud_base) || 1252 (new_serial.close_delay != info->port.close_delay) || 1253 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) 1254 return -EPERM; 1255 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) | 1256 (new_serial.flags & ASYNC_USR_MASK)); 1257 } else { 1258 /* 1259 * OK, past this point, all the error checking has been done. 1260 * At this point, we start making changes..... 1261 */ 1262 port->flags = ((port->flags & ~ASYNC_FLAGS) | 1263 (new_serial.flags & ASYNC_FLAGS)); 1264 port->close_delay = new_serial.close_delay * HZ / 100; 1265 port->closing_wait = new_serial.closing_wait * HZ / 100; 1266 port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0; 1267 if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST && 1268 (new_serial.baud_base != info->baud_base || 1269 new_serial.custom_divisor != 1270 info->custom_divisor)) { 1271 if (new_serial.custom_divisor == 0) 1272 return -EINVAL; 1273 baud = new_serial.baud_base / new_serial.custom_divisor; 1274 tty_encode_baud_rate(tty, baud, baud); 1275 } 1276 } 1277 1278 info->type = new_serial.type; 1279 1280 process_txrx_fifo(info); 1281 1282 if (tty_port_initialized(port)) { 1283 if (flags != (port->flags & ASYNC_SPD_MASK)) { 1284 spin_lock_irqsave(&info->slock, sl_flags); 1285 mxser_change_speed(tty, NULL); 1286 spin_unlock_irqrestore(&info->slock, sl_flags); 1287 } 1288 } else { 1289 retval = mxser_activate(port, tty); 1290 if (retval == 0) 1291 tty_port_set_initialized(port, 1); 1292 } 1293 return retval; 1294 } 1295 1296 /* 1297 * mxser_get_lsr_info - get line status register info 1298 * 1299 * Purpose: Let user call ioctl() to get info when the UART physically 1300 * is emptied. On bus types like RS485, the transmitter must 1301 * release the bus after transmitting. This must be done when 1302 * the transmit shift register is empty, not be done when the 1303 * transmit holding register is empty. This functionality 1304 * allows an RS485 driver to be written in user space. 1305 */ 1306 static int mxser_get_lsr_info(struct mxser_port *info, 1307 unsigned int __user *value) 1308 { 1309 unsigned char status; 1310 unsigned int result; 1311 unsigned long flags; 1312 1313 spin_lock_irqsave(&info->slock, flags); 1314 status = inb(info->ioaddr + UART_LSR); 1315 spin_unlock_irqrestore(&info->slock, flags); 1316 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); 1317 return put_user(result, value); 1318 } 1319 1320 static int mxser_tiocmget(struct tty_struct *tty) 1321 { 1322 struct mxser_port *info = tty->driver_data; 1323 unsigned char control, status; 1324 unsigned long flags; 1325 1326 1327 if (tty->index == MXSER_PORTS) 1328 return -ENOIOCTLCMD; 1329 if (tty_io_error(tty)) 1330 return -EIO; 1331 1332 control = info->MCR; 1333 1334 spin_lock_irqsave(&info->slock, flags); 1335 status = inb(info->ioaddr + UART_MSR); 1336 if (status & UART_MSR_ANY_DELTA) 1337 mxser_check_modem_status(tty, info, status); 1338 spin_unlock_irqrestore(&info->slock, flags); 1339 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | 1340 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | 1341 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | 1342 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | 1343 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | 1344 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); 1345 } 1346 1347 static int mxser_tiocmset(struct tty_struct *tty, 1348 unsigned int set, unsigned int clear) 1349 { 1350 struct mxser_port *info = tty->driver_data; 1351 unsigned long flags; 1352 1353 1354 if (tty->index == MXSER_PORTS) 1355 return -ENOIOCTLCMD; 1356 if (tty_io_error(tty)) 1357 return -EIO; 1358 1359 spin_lock_irqsave(&info->slock, flags); 1360 1361 if (set & TIOCM_RTS) 1362 info->MCR |= UART_MCR_RTS; 1363 if (set & TIOCM_DTR) 1364 info->MCR |= UART_MCR_DTR; 1365 1366 if (clear & TIOCM_RTS) 1367 info->MCR &= ~UART_MCR_RTS; 1368 if (clear & TIOCM_DTR) 1369 info->MCR &= ~UART_MCR_DTR; 1370 1371 outb(info->MCR, info->ioaddr + UART_MCR); 1372 spin_unlock_irqrestore(&info->slock, flags); 1373 return 0; 1374 } 1375 1376 static int __init mxser_program_mode(int port) 1377 { 1378 int id, i, j, n; 1379 1380 outb(0, port); 1381 outb(0, port); 1382 outb(0, port); 1383 (void)inb(port); 1384 (void)inb(port); 1385 outb(0, port); 1386 (void)inb(port); 1387 1388 id = inb(port + 1) & 0x1F; 1389 if ((id != C168_ASIC_ID) && 1390 (id != C104_ASIC_ID) && 1391 (id != C102_ASIC_ID) && 1392 (id != CI132_ASIC_ID) && 1393 (id != CI134_ASIC_ID) && 1394 (id != CI104J_ASIC_ID)) 1395 return -1; 1396 for (i = 0, j = 0; i < 4; i++) { 1397 n = inb(port + 2); 1398 if (n == 'M') { 1399 j = 1; 1400 } else if ((j == 1) && (n == 1)) { 1401 j = 2; 1402 break; 1403 } else 1404 j = 0; 1405 } 1406 if (j != 2) 1407 id = -2; 1408 return id; 1409 } 1410 1411 static void __init mxser_normal_mode(int port) 1412 { 1413 int i, n; 1414 1415 outb(0xA5, port + 1); 1416 outb(0x80, port + 3); 1417 outb(12, port + 0); /* 9600 bps */ 1418 outb(0, port + 1); 1419 outb(0x03, port + 3); /* 8 data bits */ 1420 outb(0x13, port + 4); /* loop back mode */ 1421 for (i = 0; i < 16; i++) { 1422 n = inb(port + 5); 1423 if ((n & 0x61) == 0x60) 1424 break; 1425 if ((n & 1) == 1) 1426 (void)inb(port); 1427 } 1428 outb(0x00, port + 4); 1429 } 1430 1431 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */ 1432 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */ 1433 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */ 1434 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */ 1435 #define EN_CCMD 0x000 /* Chip's command register */ 1436 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */ 1437 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */ 1438 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */ 1439 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */ 1440 #define EN0_DCFG 0x00E /* Data configuration reg WR */ 1441 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */ 1442 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */ 1443 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */ 1444 static int __init mxser_read_register(int port, unsigned short *regs) 1445 { 1446 int i, k, value, id; 1447 unsigned int j; 1448 1449 id = mxser_program_mode(port); 1450 if (id < 0) 1451 return id; 1452 for (i = 0; i < 14; i++) { 1453 k = (i & 0x3F) | 0x180; 1454 for (j = 0x100; j > 0; j >>= 1) { 1455 outb(CHIP_CS, port); 1456 if (k & j) { 1457 outb(CHIP_CS | CHIP_DO, port); 1458 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */ 1459 } else { 1460 outb(CHIP_CS, port); 1461 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */ 1462 } 1463 } 1464 (void)inb(port); 1465 value = 0; 1466 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) { 1467 outb(CHIP_CS, port); 1468 outb(CHIP_CS | CHIP_SK, port); 1469 if (inb(port) & CHIP_DI) 1470 value |= j; 1471 } 1472 regs[i] = value; 1473 outb(0, port); 1474 } 1475 mxser_normal_mode(port); 1476 return id; 1477 } 1478 1479 static int mxser_ioctl_special(unsigned int cmd, void __user *argp) 1480 { 1481 struct mxser_port *ip; 1482 struct tty_port *port; 1483 struct tty_struct *tty; 1484 int result, status; 1485 unsigned int i, j; 1486 int ret = 0; 1487 1488 switch (cmd) { 1489 case MOXA_GET_MAJOR: 1490 printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl " 1491 "%x (GET_MAJOR), fix your userspace\n", 1492 current->comm, cmd); 1493 return put_user(ttymajor, (int __user *)argp); 1494 1495 case MOXA_CHKPORTENABLE: 1496 result = 0; 1497 for (i = 0; i < MXSER_BOARDS; i++) 1498 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) 1499 if (mxser_boards[i].ports[j].ioaddr) 1500 result |= (1 << i); 1501 return put_user(result, (unsigned long __user *)argp); 1502 case MOXA_GETDATACOUNT: 1503 /* The receive side is locked by port->slock but it isn't 1504 clear that an exact snapshot is worth copying here */ 1505 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log))) 1506 ret = -EFAULT; 1507 return ret; 1508 case MOXA_GETMSTATUS: { 1509 struct mxser_mstatus ms, __user *msu = argp; 1510 for (i = 0; i < MXSER_BOARDS; i++) 1511 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { 1512 ip = &mxser_boards[i].ports[j]; 1513 port = &ip->port; 1514 memset(&ms, 0, sizeof(ms)); 1515 1516 mutex_lock(&port->mutex); 1517 if (!ip->ioaddr) 1518 goto copy; 1519 1520 tty = tty_port_tty_get(port); 1521 1522 if (!tty) 1523 ms.cflag = ip->normal_termios.c_cflag; 1524 else 1525 ms.cflag = tty->termios.c_cflag; 1526 tty_kref_put(tty); 1527 spin_lock_irq(&ip->slock); 1528 status = inb(ip->ioaddr + UART_MSR); 1529 spin_unlock_irq(&ip->slock); 1530 if (status & UART_MSR_DCD) 1531 ms.dcd = 1; 1532 if (status & UART_MSR_DSR) 1533 ms.dsr = 1; 1534 if (status & UART_MSR_CTS) 1535 ms.cts = 1; 1536 copy: 1537 mutex_unlock(&port->mutex); 1538 if (copy_to_user(msu, &ms, sizeof(ms))) 1539 return -EFAULT; 1540 msu++; 1541 } 1542 return 0; 1543 } 1544 case MOXA_ASPP_MON_EXT: { 1545 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */ 1546 unsigned int cflag, iflag, p; 1547 u8 opmode; 1548 1549 me = kzalloc(sizeof(*me), GFP_KERNEL); 1550 if (!me) 1551 return -ENOMEM; 1552 1553 for (i = 0, p = 0; i < MXSER_BOARDS; i++) { 1554 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) { 1555 if (p >= ARRAY_SIZE(me->rx_cnt)) { 1556 i = MXSER_BOARDS; 1557 break; 1558 } 1559 ip = &mxser_boards[i].ports[j]; 1560 port = &ip->port; 1561 1562 mutex_lock(&port->mutex); 1563 if (!ip->ioaddr) { 1564 mutex_unlock(&port->mutex); 1565 continue; 1566 } 1567 1568 spin_lock_irq(&ip->slock); 1569 status = mxser_get_msr(ip->ioaddr, 0, p); 1570 1571 if (status & UART_MSR_TERI) 1572 ip->icount.rng++; 1573 if (status & UART_MSR_DDSR) 1574 ip->icount.dsr++; 1575 if (status & UART_MSR_DDCD) 1576 ip->icount.dcd++; 1577 if (status & UART_MSR_DCTS) 1578 ip->icount.cts++; 1579 1580 ip->mon_data.modem_status = status; 1581 me->rx_cnt[p] = ip->mon_data.rxcnt; 1582 me->tx_cnt[p] = ip->mon_data.txcnt; 1583 me->up_rxcnt[p] = ip->mon_data.up_rxcnt; 1584 me->up_txcnt[p] = ip->mon_data.up_txcnt; 1585 me->modem_status[p] = 1586 ip->mon_data.modem_status; 1587 spin_unlock_irq(&ip->slock); 1588 1589 tty = tty_port_tty_get(&ip->port); 1590 1591 if (!tty) { 1592 cflag = ip->normal_termios.c_cflag; 1593 iflag = ip->normal_termios.c_iflag; 1594 me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios); 1595 } else { 1596 cflag = tty->termios.c_cflag; 1597 iflag = tty->termios.c_iflag; 1598 me->baudrate[p] = tty_get_baud_rate(tty); 1599 } 1600 tty_kref_put(tty); 1601 1602 me->databits[p] = cflag & CSIZE; 1603 me->stopbits[p] = cflag & CSTOPB; 1604 me->parity[p] = cflag & (PARENB | PARODD | 1605 CMSPAR); 1606 1607 if (cflag & CRTSCTS) 1608 me->flowctrl[p] |= 0x03; 1609 1610 if (iflag & (IXON | IXOFF)) 1611 me->flowctrl[p] |= 0x0C; 1612 1613 if (ip->type == PORT_16550A) 1614 me->fifo[p] = 1; 1615 1616 if (ip->board->chip_flag == MOXA_MUST_MU860_HWID) { 1617 opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2); 1618 opmode &= OP_MODE_MASK; 1619 } else { 1620 opmode = RS232_MODE; 1621 } 1622 me->iftype[p] = opmode; 1623 mutex_unlock(&port->mutex); 1624 } 1625 } 1626 if (copy_to_user(argp, me, sizeof(*me))) 1627 ret = -EFAULT; 1628 kfree(me); 1629 return ret; 1630 } 1631 default: 1632 return -ENOIOCTLCMD; 1633 } 1634 return 0; 1635 } 1636 1637 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg, 1638 struct async_icount *cprev) 1639 { 1640 struct async_icount cnow; 1641 unsigned long flags; 1642 int ret; 1643 1644 spin_lock_irqsave(&info->slock, flags); 1645 cnow = info->icount; /* atomic copy */ 1646 spin_unlock_irqrestore(&info->slock, flags); 1647 1648 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) || 1649 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) || 1650 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) || 1651 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts)); 1652 1653 *cprev = cnow; 1654 1655 return ret; 1656 } 1657 1658 static int mxser_ioctl(struct tty_struct *tty, 1659 unsigned int cmd, unsigned long arg) 1660 { 1661 struct mxser_port *info = tty->driver_data; 1662 struct tty_port *port = &info->port; 1663 struct async_icount cnow; 1664 unsigned long flags; 1665 void __user *argp = (void __user *)arg; 1666 int retval; 1667 1668 if (tty->index == MXSER_PORTS) 1669 return mxser_ioctl_special(cmd, argp); 1670 1671 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) { 1672 int p; 1673 unsigned long opmode; 1674 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f }; 1675 int shiftbit; 1676 unsigned char val, mask; 1677 1678 if (info->board->chip_flag != MOXA_MUST_MU860_HWID) 1679 return -EFAULT; 1680 1681 p = tty->index % 4; 1682 if (cmd == MOXA_SET_OP_MODE) { 1683 if (get_user(opmode, (int __user *) argp)) 1684 return -EFAULT; 1685 if (opmode != RS232_MODE && 1686 opmode != RS485_2WIRE_MODE && 1687 opmode != RS422_MODE && 1688 opmode != RS485_4WIRE_MODE) 1689 return -EFAULT; 1690 mask = ModeMask[p]; 1691 shiftbit = p * 2; 1692 spin_lock_irq(&info->slock); 1693 val = inb(info->opmode_ioaddr); 1694 val &= mask; 1695 val |= (opmode << shiftbit); 1696 outb(val, info->opmode_ioaddr); 1697 spin_unlock_irq(&info->slock); 1698 } else { 1699 shiftbit = p * 2; 1700 spin_lock_irq(&info->slock); 1701 opmode = inb(info->opmode_ioaddr) >> shiftbit; 1702 spin_unlock_irq(&info->slock); 1703 opmode &= OP_MODE_MASK; 1704 if (put_user(opmode, (int __user *)argp)) 1705 return -EFAULT; 1706 } 1707 return 0; 1708 } 1709 1710 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && tty_io_error(tty)) 1711 return -EIO; 1712 1713 switch (cmd) { 1714 case TIOCGSERIAL: 1715 mutex_lock(&port->mutex); 1716 retval = mxser_get_serial_info(tty, argp); 1717 mutex_unlock(&port->mutex); 1718 return retval; 1719 case TIOCSSERIAL: 1720 mutex_lock(&port->mutex); 1721 retval = mxser_set_serial_info(tty, argp); 1722 mutex_unlock(&port->mutex); 1723 return retval; 1724 case TIOCSERGETLSR: /* Get line status register */ 1725 return mxser_get_lsr_info(info, argp); 1726 /* 1727 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change 1728 * - mask passed in arg for lines of interest 1729 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) 1730 * Caller should use TIOCGICOUNT to see which one it was 1731 */ 1732 case TIOCMIWAIT: 1733 spin_lock_irqsave(&info->slock, flags); 1734 cnow = info->icount; /* note the counters on entry */ 1735 spin_unlock_irqrestore(&info->slock, flags); 1736 1737 return wait_event_interruptible(info->port.delta_msr_wait, 1738 mxser_cflags_changed(info, arg, &cnow)); 1739 case MOXA_HighSpeedOn: 1740 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); 1741 case MOXA_SDS_RSTICOUNTER: 1742 spin_lock_irq(&info->slock); 1743 info->mon_data.rxcnt = 0; 1744 info->mon_data.txcnt = 0; 1745 spin_unlock_irq(&info->slock); 1746 return 0; 1747 1748 case MOXA_ASPP_OQUEUE:{ 1749 int len, lsr; 1750 1751 len = mxser_chars_in_buffer(tty); 1752 spin_lock_irq(&info->slock); 1753 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE; 1754 spin_unlock_irq(&info->slock); 1755 len += (lsr ? 0 : 1); 1756 1757 return put_user(len, (int __user *)argp); 1758 } 1759 case MOXA_ASPP_MON: { 1760 int mcr, status; 1761 1762 spin_lock_irq(&info->slock); 1763 status = mxser_get_msr(info->ioaddr, 1, tty->index); 1764 mxser_check_modem_status(tty, info, status); 1765 1766 mcr = inb(info->ioaddr + UART_MCR); 1767 spin_unlock_irq(&info->slock); 1768 1769 if (mcr & MOXA_MUST_MCR_XON_FLAG) 1770 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD; 1771 else 1772 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD; 1773 1774 if (mcr & MOXA_MUST_MCR_TX_XON) 1775 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT; 1776 else 1777 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT; 1778 1779 if (tty->hw_stopped) 1780 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD; 1781 else 1782 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD; 1783 1784 if (copy_to_user(argp, &info->mon_data, 1785 sizeof(struct mxser_mon))) 1786 return -EFAULT; 1787 1788 return 0; 1789 } 1790 case MOXA_ASPP_LSTATUS: { 1791 if (put_user(info->err_shadow, (unsigned char __user *)argp)) 1792 return -EFAULT; 1793 1794 info->err_shadow = 0; 1795 return 0; 1796 } 1797 case MOXA_SET_BAUD_METHOD: { 1798 int method; 1799 1800 if (get_user(method, (int __user *)argp)) 1801 return -EFAULT; 1802 mxser_set_baud_method[tty->index] = method; 1803 return put_user(method, (int __user *)argp); 1804 } 1805 default: 1806 return -ENOIOCTLCMD; 1807 } 1808 return 0; 1809 } 1810 1811 /* 1812 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) 1813 * Return: write counters to the user passed counter struct 1814 * NB: both 1->0 and 0->1 transitions are counted except for 1815 * RI where only 0->1 is counted. 1816 */ 1817 1818 static int mxser_get_icount(struct tty_struct *tty, 1819 struct serial_icounter_struct *icount) 1820 1821 { 1822 struct mxser_port *info = tty->driver_data; 1823 struct async_icount cnow; 1824 unsigned long flags; 1825 1826 spin_lock_irqsave(&info->slock, flags); 1827 cnow = info->icount; 1828 spin_unlock_irqrestore(&info->slock, flags); 1829 1830 icount->frame = cnow.frame; 1831 icount->brk = cnow.brk; 1832 icount->overrun = cnow.overrun; 1833 icount->buf_overrun = cnow.buf_overrun; 1834 icount->parity = cnow.parity; 1835 icount->rx = cnow.rx; 1836 icount->tx = cnow.tx; 1837 icount->cts = cnow.cts; 1838 icount->dsr = cnow.dsr; 1839 icount->rng = cnow.rng; 1840 icount->dcd = cnow.dcd; 1841 return 0; 1842 } 1843 1844 static void mxser_stoprx(struct tty_struct *tty) 1845 { 1846 struct mxser_port *info = tty->driver_data; 1847 1848 info->ldisc_stop_rx = 1; 1849 if (I_IXOFF(tty)) { 1850 if (info->board->chip_flag) { 1851 info->IER &= ~MOXA_MUST_RECV_ISR; 1852 outb(info->IER, info->ioaddr + UART_IER); 1853 } else { 1854 info->x_char = STOP_CHAR(tty); 1855 outb(0, info->ioaddr + UART_IER); 1856 info->IER |= UART_IER_THRI; 1857 outb(info->IER, info->ioaddr + UART_IER); 1858 } 1859 } 1860 1861 if (C_CRTSCTS(tty)) { 1862 info->MCR &= ~UART_MCR_RTS; 1863 outb(info->MCR, info->ioaddr + UART_MCR); 1864 } 1865 } 1866 1867 /* 1868 * This routine is called by the upper-layer tty layer to signal that 1869 * incoming characters should be throttled. 1870 */ 1871 static void mxser_throttle(struct tty_struct *tty) 1872 { 1873 mxser_stoprx(tty); 1874 } 1875 1876 static void mxser_unthrottle(struct tty_struct *tty) 1877 { 1878 struct mxser_port *info = tty->driver_data; 1879 1880 /* startrx */ 1881 info->ldisc_stop_rx = 0; 1882 if (I_IXOFF(tty)) { 1883 if (info->x_char) 1884 info->x_char = 0; 1885 else { 1886 if (info->board->chip_flag) { 1887 info->IER |= MOXA_MUST_RECV_ISR; 1888 outb(info->IER, info->ioaddr + UART_IER); 1889 } else { 1890 info->x_char = START_CHAR(tty); 1891 outb(0, info->ioaddr + UART_IER); 1892 info->IER |= UART_IER_THRI; 1893 outb(info->IER, info->ioaddr + UART_IER); 1894 } 1895 } 1896 } 1897 1898 if (C_CRTSCTS(tty)) { 1899 info->MCR |= UART_MCR_RTS; 1900 outb(info->MCR, info->ioaddr + UART_MCR); 1901 } 1902 } 1903 1904 /* 1905 * mxser_stop() and mxser_start() 1906 * 1907 * This routines are called before setting or resetting tty->stopped. 1908 * They enable or disable transmitter interrupts, as necessary. 1909 */ 1910 static void mxser_stop(struct tty_struct *tty) 1911 { 1912 struct mxser_port *info = tty->driver_data; 1913 unsigned long flags; 1914 1915 spin_lock_irqsave(&info->slock, flags); 1916 if (info->IER & UART_IER_THRI) { 1917 info->IER &= ~UART_IER_THRI; 1918 outb(info->IER, info->ioaddr + UART_IER); 1919 } 1920 spin_unlock_irqrestore(&info->slock, flags); 1921 } 1922 1923 static void mxser_start(struct tty_struct *tty) 1924 { 1925 struct mxser_port *info = tty->driver_data; 1926 unsigned long flags; 1927 1928 spin_lock_irqsave(&info->slock, flags); 1929 if (info->xmit_cnt && info->port.xmit_buf) { 1930 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1931 info->IER |= UART_IER_THRI; 1932 outb(info->IER, info->ioaddr + UART_IER); 1933 } 1934 spin_unlock_irqrestore(&info->slock, flags); 1935 } 1936 1937 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios) 1938 { 1939 struct mxser_port *info = tty->driver_data; 1940 unsigned long flags; 1941 1942 spin_lock_irqsave(&info->slock, flags); 1943 mxser_change_speed(tty, old_termios); 1944 spin_unlock_irqrestore(&info->slock, flags); 1945 1946 if ((old_termios->c_cflag & CRTSCTS) && !C_CRTSCTS(tty)) { 1947 tty->hw_stopped = 0; 1948 mxser_start(tty); 1949 } 1950 1951 /* Handle sw stopped */ 1952 if ((old_termios->c_iflag & IXON) && !I_IXON(tty)) { 1953 tty->stopped = 0; 1954 1955 if (info->board->chip_flag) { 1956 spin_lock_irqsave(&info->slock, flags); 1957 mxser_disable_must_rx_software_flow_control( 1958 info->ioaddr); 1959 spin_unlock_irqrestore(&info->slock, flags); 1960 } 1961 1962 mxser_start(tty); 1963 } 1964 } 1965 1966 /* 1967 * mxser_wait_until_sent() --- wait until the transmitter is empty 1968 */ 1969 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout) 1970 { 1971 struct mxser_port *info = tty->driver_data; 1972 unsigned long orig_jiffies, char_time; 1973 unsigned long flags; 1974 int lsr; 1975 1976 if (info->type == PORT_UNKNOWN) 1977 return; 1978 1979 if (info->xmit_fifo_size == 0) 1980 return; /* Just in case.... */ 1981 1982 orig_jiffies = jiffies; 1983 /* 1984 * Set the check interval to be 1/5 of the estimated time to 1985 * send a single character, and make it at least 1. The check 1986 * interval should also be less than the timeout. 1987 * 1988 * Note: we have to use pretty tight timings here to satisfy 1989 * the NIST-PCTS. 1990 */ 1991 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size; 1992 char_time = char_time / 5; 1993 if (char_time == 0) 1994 char_time = 1; 1995 if (timeout && timeout < char_time) 1996 char_time = timeout; 1997 /* 1998 * If the transmitter hasn't cleared in twice the approximate 1999 * amount of time to send the entire FIFO, it probably won't 2000 * ever clear. This assumes the UART isn't doing flow 2001 * control, which is currently the case. Hence, if it ever 2002 * takes longer than info->timeout, this is probably due to a 2003 * UART bug of some kind. So, we clamp the timeout parameter at 2004 * 2*info->timeout. 2005 */ 2006 if (!timeout || timeout > 2 * info->timeout) 2007 timeout = 2 * info->timeout; 2008 2009 spin_lock_irqsave(&info->slock, flags); 2010 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) { 2011 spin_unlock_irqrestore(&info->slock, flags); 2012 schedule_timeout_interruptible(char_time); 2013 spin_lock_irqsave(&info->slock, flags); 2014 if (signal_pending(current)) 2015 break; 2016 if (timeout && time_after(jiffies, orig_jiffies + timeout)) 2017 break; 2018 } 2019 spin_unlock_irqrestore(&info->slock, flags); 2020 set_current_state(TASK_RUNNING); 2021 } 2022 2023 /* 2024 * This routine is called by tty_hangup() when a hangup is signaled. 2025 */ 2026 static void mxser_hangup(struct tty_struct *tty) 2027 { 2028 struct mxser_port *info = tty->driver_data; 2029 2030 mxser_flush_buffer(tty); 2031 tty_port_hangup(&info->port); 2032 } 2033 2034 /* 2035 * mxser_rs_break() --- routine which turns the break handling on or off 2036 */ 2037 static int mxser_rs_break(struct tty_struct *tty, int break_state) 2038 { 2039 struct mxser_port *info = tty->driver_data; 2040 unsigned long flags; 2041 2042 spin_lock_irqsave(&info->slock, flags); 2043 if (break_state == -1) 2044 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, 2045 info->ioaddr + UART_LCR); 2046 else 2047 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, 2048 info->ioaddr + UART_LCR); 2049 spin_unlock_irqrestore(&info->slock, flags); 2050 return 0; 2051 } 2052 2053 static void mxser_receive_chars(struct tty_struct *tty, 2054 struct mxser_port *port, int *status) 2055 { 2056 unsigned char ch, gdl; 2057 int ignored = 0; 2058 int cnt = 0; 2059 int recv_room; 2060 int max = 256; 2061 2062 recv_room = tty->receive_room; 2063 if (recv_room == 0 && !port->ldisc_stop_rx) 2064 mxser_stoprx(tty); 2065 if (port->board->chip_flag != MOXA_OTHER_UART) { 2066 2067 if (*status & UART_LSR_SPECIAL) 2068 goto intr_old; 2069 if (port->board->chip_flag == MOXA_MUST_MU860_HWID && 2070 (*status & MOXA_MUST_LSR_RERR)) 2071 goto intr_old; 2072 if (*status & MOXA_MUST_LSR_RERR) 2073 goto intr_old; 2074 2075 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER); 2076 2077 if (port->board->chip_flag == MOXA_MUST_MU150_HWID) 2078 gdl &= MOXA_MUST_GDL_MASK; 2079 if (gdl >= recv_room) { 2080 if (!port->ldisc_stop_rx) 2081 mxser_stoprx(tty); 2082 } 2083 while (gdl--) { 2084 ch = inb(port->ioaddr + UART_RX); 2085 tty_insert_flip_char(&port->port, ch, 0); 2086 cnt++; 2087 } 2088 goto end_intr; 2089 } 2090 intr_old: 2091 2092 do { 2093 if (max-- < 0) 2094 break; 2095 2096 ch = inb(port->ioaddr + UART_RX); 2097 if (port->board->chip_flag && (*status & UART_LSR_OE)) 2098 outb(0x23, port->ioaddr + UART_FCR); 2099 *status &= port->read_status_mask; 2100 if (*status & port->ignore_status_mask) { 2101 if (++ignored > 100) 2102 break; 2103 } else { 2104 char flag = 0; 2105 if (*status & UART_LSR_SPECIAL) { 2106 if (*status & UART_LSR_BI) { 2107 flag = TTY_BREAK; 2108 port->icount.brk++; 2109 2110 if (port->port.flags & ASYNC_SAK) 2111 do_SAK(tty); 2112 } else if (*status & UART_LSR_PE) { 2113 flag = TTY_PARITY; 2114 port->icount.parity++; 2115 } else if (*status & UART_LSR_FE) { 2116 flag = TTY_FRAME; 2117 port->icount.frame++; 2118 } else if (*status & UART_LSR_OE) { 2119 flag = TTY_OVERRUN; 2120 port->icount.overrun++; 2121 } else 2122 flag = TTY_BREAK; 2123 } 2124 tty_insert_flip_char(&port->port, ch, flag); 2125 cnt++; 2126 if (cnt >= recv_room) { 2127 if (!port->ldisc_stop_rx) 2128 mxser_stoprx(tty); 2129 break; 2130 } 2131 2132 } 2133 2134 if (port->board->chip_flag) 2135 break; 2136 2137 *status = inb(port->ioaddr + UART_LSR); 2138 } while (*status & UART_LSR_DR); 2139 2140 end_intr: 2141 mxvar_log.rxcnt[tty->index] += cnt; 2142 port->mon_data.rxcnt += cnt; 2143 port->mon_data.up_rxcnt += cnt; 2144 2145 /* 2146 * We are called from an interrupt context with &port->slock 2147 * being held. Drop it temporarily in order to prevent 2148 * recursive locking. 2149 */ 2150 spin_unlock(&port->slock); 2151 tty_flip_buffer_push(&port->port); 2152 spin_lock(&port->slock); 2153 } 2154 2155 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port) 2156 { 2157 int count, cnt; 2158 2159 if (port->x_char) { 2160 outb(port->x_char, port->ioaddr + UART_TX); 2161 port->x_char = 0; 2162 mxvar_log.txcnt[tty->index]++; 2163 port->mon_data.txcnt++; 2164 port->mon_data.up_txcnt++; 2165 port->icount.tx++; 2166 return; 2167 } 2168 2169 if (port->port.xmit_buf == NULL) 2170 return; 2171 2172 if (port->xmit_cnt <= 0 || tty->stopped || 2173 (tty->hw_stopped && 2174 (port->type != PORT_16550A) && 2175 (!port->board->chip_flag))) { 2176 port->IER &= ~UART_IER_THRI; 2177 outb(port->IER, port->ioaddr + UART_IER); 2178 return; 2179 } 2180 2181 cnt = port->xmit_cnt; 2182 count = port->xmit_fifo_size; 2183 do { 2184 outb(port->port.xmit_buf[port->xmit_tail++], 2185 port->ioaddr + UART_TX); 2186 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1); 2187 if (--port->xmit_cnt <= 0) 2188 break; 2189 } while (--count > 0); 2190 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt); 2191 2192 port->mon_data.txcnt += (cnt - port->xmit_cnt); 2193 port->mon_data.up_txcnt += (cnt - port->xmit_cnt); 2194 port->icount.tx += (cnt - port->xmit_cnt); 2195 2196 if (port->xmit_cnt < WAKEUP_CHARS) 2197 tty_wakeup(tty); 2198 2199 if (port->xmit_cnt <= 0) { 2200 port->IER &= ~UART_IER_THRI; 2201 outb(port->IER, port->ioaddr + UART_IER); 2202 } 2203 } 2204 2205 /* 2206 * This is the serial driver's generic interrupt routine 2207 */ 2208 static irqreturn_t mxser_interrupt(int irq, void *dev_id) 2209 { 2210 int status, iir, i; 2211 struct mxser_board *brd = NULL; 2212 struct mxser_port *port; 2213 int max, irqbits, bits, msr; 2214 unsigned int int_cnt, pass_counter = 0; 2215 int handled = IRQ_NONE; 2216 struct tty_struct *tty; 2217 2218 for (i = 0; i < MXSER_BOARDS; i++) 2219 if (dev_id == &mxser_boards[i]) { 2220 brd = dev_id; 2221 break; 2222 } 2223 2224 if (i == MXSER_BOARDS) 2225 goto irq_stop; 2226 if (brd == NULL) 2227 goto irq_stop; 2228 max = brd->info->nports; 2229 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) { 2230 irqbits = inb(brd->vector) & brd->vector_mask; 2231 if (irqbits == brd->vector_mask) 2232 break; 2233 2234 handled = IRQ_HANDLED; 2235 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) { 2236 if (irqbits == brd->vector_mask) 2237 break; 2238 if (bits & irqbits) 2239 continue; 2240 port = &brd->ports[i]; 2241 2242 int_cnt = 0; 2243 spin_lock(&port->slock); 2244 do { 2245 iir = inb(port->ioaddr + UART_IIR); 2246 if (iir & UART_IIR_NO_INT) 2247 break; 2248 iir &= MOXA_MUST_IIR_MASK; 2249 tty = tty_port_tty_get(&port->port); 2250 if (!tty || port->closing || 2251 !tty_port_initialized(&port->port)) { 2252 status = inb(port->ioaddr + UART_LSR); 2253 outb(0x27, port->ioaddr + UART_FCR); 2254 inb(port->ioaddr + UART_MSR); 2255 tty_kref_put(tty); 2256 break; 2257 } 2258 2259 status = inb(port->ioaddr + UART_LSR); 2260 2261 if (status & UART_LSR_PE) 2262 port->err_shadow |= NPPI_NOTIFY_PARITY; 2263 if (status & UART_LSR_FE) 2264 port->err_shadow |= NPPI_NOTIFY_FRAMING; 2265 if (status & UART_LSR_OE) 2266 port->err_shadow |= 2267 NPPI_NOTIFY_HW_OVERRUN; 2268 if (status & UART_LSR_BI) 2269 port->err_shadow |= NPPI_NOTIFY_BREAK; 2270 2271 if (port->board->chip_flag) { 2272 if (iir == MOXA_MUST_IIR_GDA || 2273 iir == MOXA_MUST_IIR_RDA || 2274 iir == MOXA_MUST_IIR_RTO || 2275 iir == MOXA_MUST_IIR_LSR) 2276 mxser_receive_chars(tty, port, 2277 &status); 2278 2279 } else { 2280 status &= port->read_status_mask; 2281 if (status & UART_LSR_DR) 2282 mxser_receive_chars(tty, port, 2283 &status); 2284 } 2285 msr = inb(port->ioaddr + UART_MSR); 2286 if (msr & UART_MSR_ANY_DELTA) 2287 mxser_check_modem_status(tty, port, msr); 2288 2289 if (port->board->chip_flag) { 2290 if (iir == 0x02 && (status & 2291 UART_LSR_THRE)) 2292 mxser_transmit_chars(tty, port); 2293 } else { 2294 if (status & UART_LSR_THRE) 2295 mxser_transmit_chars(tty, port); 2296 } 2297 tty_kref_put(tty); 2298 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT); 2299 spin_unlock(&port->slock); 2300 } 2301 } 2302 2303 irq_stop: 2304 return handled; 2305 } 2306 2307 static const struct tty_operations mxser_ops = { 2308 .open = mxser_open, 2309 .close = mxser_close, 2310 .write = mxser_write, 2311 .put_char = mxser_put_char, 2312 .flush_chars = mxser_flush_chars, 2313 .write_room = mxser_write_room, 2314 .chars_in_buffer = mxser_chars_in_buffer, 2315 .flush_buffer = mxser_flush_buffer, 2316 .ioctl = mxser_ioctl, 2317 .throttle = mxser_throttle, 2318 .unthrottle = mxser_unthrottle, 2319 .set_termios = mxser_set_termios, 2320 .stop = mxser_stop, 2321 .start = mxser_start, 2322 .hangup = mxser_hangup, 2323 .break_ctl = mxser_rs_break, 2324 .wait_until_sent = mxser_wait_until_sent, 2325 .tiocmget = mxser_tiocmget, 2326 .tiocmset = mxser_tiocmset, 2327 .get_icount = mxser_get_icount, 2328 }; 2329 2330 static const struct tty_port_operations mxser_port_ops = { 2331 .carrier_raised = mxser_carrier_raised, 2332 .dtr_rts = mxser_dtr_rts, 2333 .activate = mxser_activate, 2334 .shutdown = mxser_shutdown_port, 2335 }; 2336 2337 /* 2338 * The MOXA Smartio/Industio serial driver boot-time initialization code! 2339 */ 2340 2341 static bool allow_overlapping_vector; 2342 module_param(allow_overlapping_vector, bool, S_IRUGO); 2343 MODULE_PARM_DESC(allow_overlapping_vector, "whether we allow ISA cards to be configured such that vector overlabs IO ports (default=no)"); 2344 2345 static bool mxser_overlapping_vector(struct mxser_board *brd) 2346 { 2347 return allow_overlapping_vector && 2348 brd->vector >= brd->ports[0].ioaddr && 2349 brd->vector < brd->ports[0].ioaddr + 8 * brd->info->nports; 2350 } 2351 2352 static int mxser_request_vector(struct mxser_board *brd) 2353 { 2354 if (mxser_overlapping_vector(brd)) 2355 return 0; 2356 return request_region(brd->vector, 1, "mxser(vector)") ? 0 : -EIO; 2357 } 2358 2359 static void mxser_release_vector(struct mxser_board *brd) 2360 { 2361 if (mxser_overlapping_vector(brd)) 2362 return; 2363 release_region(brd->vector, 1); 2364 } 2365 2366 static void mxser_release_ISA_res(struct mxser_board *brd) 2367 { 2368 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); 2369 mxser_release_vector(brd); 2370 } 2371 2372 static int mxser_initbrd(struct mxser_board *brd, 2373 struct pci_dev *pdev) 2374 { 2375 struct mxser_port *info; 2376 unsigned int i; 2377 int retval; 2378 2379 printk(KERN_INFO "mxser: max. baud rate = %d bps\n", 2380 brd->ports[0].max_baud); 2381 2382 for (i = 0; i < brd->info->nports; i++) { 2383 info = &brd->ports[i]; 2384 tty_port_init(&info->port); 2385 info->port.ops = &mxser_port_ops; 2386 info->board = brd; 2387 info->stop_rx = 0; 2388 info->ldisc_stop_rx = 0; 2389 2390 /* Enhance mode enabled here */ 2391 if (brd->chip_flag != MOXA_OTHER_UART) 2392 mxser_enable_must_enchance_mode(info->ioaddr); 2393 2394 info->type = brd->uart_type; 2395 2396 process_txrx_fifo(info); 2397 2398 info->custom_divisor = info->baud_base * 16; 2399 info->port.close_delay = 5 * HZ / 10; 2400 info->port.closing_wait = 30 * HZ; 2401 info->normal_termios = mxvar_sdriver->init_termios; 2402 memset(&info->mon_data, 0, sizeof(struct mxser_mon)); 2403 info->err_shadow = 0; 2404 spin_lock_init(&info->slock); 2405 2406 /* before set INT ISR, disable all int */ 2407 outb(inb(info->ioaddr + UART_IER) & 0xf0, 2408 info->ioaddr + UART_IER); 2409 } 2410 2411 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser", 2412 brd); 2413 if (retval) { 2414 for (i = 0; i < brd->info->nports; i++) 2415 tty_port_destroy(&brd->ports[i].port); 2416 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may " 2417 "conflict with another device.\n", 2418 brd->info->name, brd->irq); 2419 } 2420 2421 return retval; 2422 } 2423 2424 static void mxser_board_remove(struct mxser_board *brd) 2425 { 2426 unsigned int i; 2427 2428 for (i = 0; i < brd->info->nports; i++) { 2429 tty_unregister_device(mxvar_sdriver, brd->idx + i); 2430 tty_port_destroy(&brd->ports[i].port); 2431 } 2432 free_irq(brd->irq, brd); 2433 } 2434 2435 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd) 2436 { 2437 int id, i, bits, ret; 2438 unsigned short regs[16], irq; 2439 unsigned char scratch, scratch2; 2440 2441 brd->chip_flag = MOXA_OTHER_UART; 2442 2443 id = mxser_read_register(cap, regs); 2444 switch (id) { 2445 case C168_ASIC_ID: 2446 brd->info = &mxser_cards[0]; 2447 break; 2448 case C104_ASIC_ID: 2449 brd->info = &mxser_cards[1]; 2450 break; 2451 case CI104J_ASIC_ID: 2452 brd->info = &mxser_cards[2]; 2453 break; 2454 case C102_ASIC_ID: 2455 brd->info = &mxser_cards[5]; 2456 break; 2457 case CI132_ASIC_ID: 2458 brd->info = &mxser_cards[6]; 2459 break; 2460 case CI134_ASIC_ID: 2461 brd->info = &mxser_cards[7]; 2462 break; 2463 default: 2464 return 0; 2465 } 2466 2467 irq = 0; 2468 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?) 2469 Flag-hack checks if configuration should be read as 2-port here. */ 2470 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) { 2471 irq = regs[9] & 0xF000; 2472 irq = irq | (irq >> 4); 2473 if (irq != (regs[9] & 0xFF00)) 2474 goto err_irqconflict; 2475 } else if (brd->info->nports == 4) { 2476 irq = regs[9] & 0xF000; 2477 irq = irq | (irq >> 4); 2478 irq = irq | (irq >> 8); 2479 if (irq != regs[9]) 2480 goto err_irqconflict; 2481 } else if (brd->info->nports == 8) { 2482 irq = regs[9] & 0xF000; 2483 irq = irq | (irq >> 4); 2484 irq = irq | (irq >> 8); 2485 if ((irq != regs[9]) || (irq != regs[10])) 2486 goto err_irqconflict; 2487 } 2488 2489 if (!irq) { 2490 printk(KERN_ERR "mxser: interrupt number unset\n"); 2491 return -EIO; 2492 } 2493 brd->irq = ((int)(irq & 0xF000) >> 12); 2494 for (i = 0; i < 8; i++) 2495 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8; 2496 if ((regs[12] & 0x80) == 0) { 2497 printk(KERN_ERR "mxser: invalid interrupt vector\n"); 2498 return -EIO; 2499 } 2500 brd->vector = (int)regs[11]; /* interrupt vector */ 2501 if (id == 1) 2502 brd->vector_mask = 0x00FF; 2503 else 2504 brd->vector_mask = 0x000F; 2505 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) { 2506 if (regs[12] & bits) { 2507 brd->ports[i].baud_base = 921600; 2508 brd->ports[i].max_baud = 921600; 2509 } else { 2510 brd->ports[i].baud_base = 115200; 2511 brd->ports[i].max_baud = 115200; 2512 } 2513 } 2514 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB); 2515 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR); 2516 outb(0, cap + UART_EFR); /* EFR is the same as FCR */ 2517 outb(scratch2, cap + UART_LCR); 2518 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR); 2519 scratch = inb(cap + UART_IIR); 2520 2521 if (scratch & 0xC0) 2522 brd->uart_type = PORT_16550A; 2523 else 2524 brd->uart_type = PORT_16450; 2525 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports, 2526 "mxser(IO)")) { 2527 printk(KERN_ERR "mxser: can't request ports I/O region: " 2528 "0x%.8lx-0x%.8lx\n", 2529 brd->ports[0].ioaddr, brd->ports[0].ioaddr + 2530 8 * brd->info->nports - 1); 2531 return -EIO; 2532 } 2533 2534 ret = mxser_request_vector(brd); 2535 if (ret) { 2536 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); 2537 printk(KERN_ERR "mxser: can't request interrupt vector region: " 2538 "0x%.8lx-0x%.8lx\n", 2539 brd->ports[0].ioaddr, brd->ports[0].ioaddr + 2540 8 * brd->info->nports - 1); 2541 return ret; 2542 } 2543 return brd->info->nports; 2544 2545 err_irqconflict: 2546 printk(KERN_ERR "mxser: invalid interrupt number\n"); 2547 return -EIO; 2548 } 2549 2550 static int mxser_probe(struct pci_dev *pdev, 2551 const struct pci_device_id *ent) 2552 { 2553 #ifdef CONFIG_PCI 2554 struct mxser_board *brd; 2555 unsigned int i, j; 2556 unsigned long ioaddress; 2557 struct device *tty_dev; 2558 int retval = -EINVAL; 2559 2560 for (i = 0; i < MXSER_BOARDS; i++) 2561 if (mxser_boards[i].info == NULL) 2562 break; 2563 2564 if (i >= MXSER_BOARDS) { 2565 dev_err(&pdev->dev, "too many boards found (maximum %d), board " 2566 "not configured\n", MXSER_BOARDS); 2567 goto err; 2568 } 2569 2570 brd = &mxser_boards[i]; 2571 brd->idx = i * MXSER_PORTS_PER_BOARD; 2572 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n", 2573 mxser_cards[ent->driver_data].name, 2574 pdev->bus->number, PCI_SLOT(pdev->devfn)); 2575 2576 retval = pci_enable_device(pdev); 2577 if (retval) { 2578 dev_err(&pdev->dev, "PCI enable failed\n"); 2579 goto err; 2580 } 2581 2582 /* io address */ 2583 ioaddress = pci_resource_start(pdev, 2); 2584 retval = pci_request_region(pdev, 2, "mxser(IO)"); 2585 if (retval) 2586 goto err_dis; 2587 2588 brd->info = &mxser_cards[ent->driver_data]; 2589 for (i = 0; i < brd->info->nports; i++) 2590 brd->ports[i].ioaddr = ioaddress + 8 * i; 2591 2592 /* vector */ 2593 ioaddress = pci_resource_start(pdev, 3); 2594 retval = pci_request_region(pdev, 3, "mxser(vector)"); 2595 if (retval) 2596 goto err_zero; 2597 brd->vector = ioaddress; 2598 2599 /* irq */ 2600 brd->irq = pdev->irq; 2601 2602 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr); 2603 brd->uart_type = PORT_16550A; 2604 brd->vector_mask = 0; 2605 2606 for (i = 0; i < brd->info->nports; i++) { 2607 for (j = 0; j < UART_INFO_NUM; j++) { 2608 if (Gpci_uart_info[j].type == brd->chip_flag) { 2609 brd->ports[i].max_baud = 2610 Gpci_uart_info[j].max_baud; 2611 2612 /* exception....CP-102 */ 2613 if (brd->info->flags & MXSER_HIGHBAUD) 2614 brd->ports[i].max_baud = 921600; 2615 break; 2616 } 2617 } 2618 } 2619 2620 if (brd->chip_flag == MOXA_MUST_MU860_HWID) { 2621 for (i = 0; i < brd->info->nports; i++) { 2622 if (i < 4) 2623 brd->ports[i].opmode_ioaddr = ioaddress + 4; 2624 else 2625 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c; 2626 } 2627 outb(0, ioaddress + 4); /* default set to RS232 mode */ 2628 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */ 2629 } 2630 2631 for (i = 0; i < brd->info->nports; i++) { 2632 brd->vector_mask |= (1 << i); 2633 brd->ports[i].baud_base = 921600; 2634 } 2635 2636 /* mxser_initbrd will hook ISR. */ 2637 retval = mxser_initbrd(brd, pdev); 2638 if (retval) 2639 goto err_rel3; 2640 2641 for (i = 0; i < brd->info->nports; i++) { 2642 tty_dev = tty_port_register_device(&brd->ports[i].port, 2643 mxvar_sdriver, brd->idx + i, &pdev->dev); 2644 if (IS_ERR(tty_dev)) { 2645 retval = PTR_ERR(tty_dev); 2646 for (; i > 0; i--) 2647 tty_unregister_device(mxvar_sdriver, 2648 brd->idx + i - 1); 2649 goto err_relbrd; 2650 } 2651 } 2652 2653 pci_set_drvdata(pdev, brd); 2654 2655 return 0; 2656 err_relbrd: 2657 for (i = 0; i < brd->info->nports; i++) 2658 tty_port_destroy(&brd->ports[i].port); 2659 free_irq(brd->irq, brd); 2660 err_rel3: 2661 pci_release_region(pdev, 3); 2662 err_zero: 2663 brd->info = NULL; 2664 pci_release_region(pdev, 2); 2665 err_dis: 2666 pci_disable_device(pdev); 2667 err: 2668 return retval; 2669 #else 2670 return -ENODEV; 2671 #endif 2672 } 2673 2674 static void mxser_remove(struct pci_dev *pdev) 2675 { 2676 #ifdef CONFIG_PCI 2677 struct mxser_board *brd = pci_get_drvdata(pdev); 2678 2679 mxser_board_remove(brd); 2680 2681 pci_release_region(pdev, 2); 2682 pci_release_region(pdev, 3); 2683 pci_disable_device(pdev); 2684 brd->info = NULL; 2685 #endif 2686 } 2687 2688 static struct pci_driver mxser_driver = { 2689 .name = "mxser", 2690 .id_table = mxser_pcibrds, 2691 .probe = mxser_probe, 2692 .remove = mxser_remove 2693 }; 2694 2695 static int __init mxser_module_init(void) 2696 { 2697 struct mxser_board *brd; 2698 struct device *tty_dev; 2699 unsigned int b, i, m; 2700 int retval; 2701 2702 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1); 2703 if (!mxvar_sdriver) 2704 return -ENOMEM; 2705 2706 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", 2707 MXSER_VERSION); 2708 2709 /* Initialize the tty_driver structure */ 2710 mxvar_sdriver->name = "ttyMI"; 2711 mxvar_sdriver->major = ttymajor; 2712 mxvar_sdriver->minor_start = 0; 2713 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL; 2714 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL; 2715 mxvar_sdriver->init_termios = tty_std_termios; 2716 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; 2717 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV; 2718 tty_set_operations(mxvar_sdriver, &mxser_ops); 2719 2720 retval = tty_register_driver(mxvar_sdriver); 2721 if (retval) { 2722 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family " 2723 "tty driver !\n"); 2724 goto err_put; 2725 } 2726 2727 /* Start finding ISA boards here */ 2728 for (m = 0, b = 0; b < MXSER_BOARDS; b++) { 2729 if (!ioaddr[b]) 2730 continue; 2731 2732 brd = &mxser_boards[m]; 2733 retval = mxser_get_ISA_conf(ioaddr[b], brd); 2734 if (retval <= 0) { 2735 brd->info = NULL; 2736 continue; 2737 } 2738 2739 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n", 2740 brd->info->name, ioaddr[b]); 2741 2742 /* mxser_initbrd will hook ISR. */ 2743 if (mxser_initbrd(brd, NULL) < 0) { 2744 mxser_release_ISA_res(brd); 2745 brd->info = NULL; 2746 continue; 2747 } 2748 2749 brd->idx = m * MXSER_PORTS_PER_BOARD; 2750 for (i = 0; i < brd->info->nports; i++) { 2751 tty_dev = tty_port_register_device(&brd->ports[i].port, 2752 mxvar_sdriver, brd->idx + i, NULL); 2753 if (IS_ERR(tty_dev)) { 2754 for (; i > 0; i--) 2755 tty_unregister_device(mxvar_sdriver, 2756 brd->idx + i - 1); 2757 for (i = 0; i < brd->info->nports; i++) 2758 tty_port_destroy(&brd->ports[i].port); 2759 free_irq(brd->irq, brd); 2760 mxser_release_ISA_res(brd); 2761 brd->info = NULL; 2762 break; 2763 } 2764 } 2765 if (brd->info == NULL) 2766 continue; 2767 2768 m++; 2769 } 2770 2771 retval = pci_register_driver(&mxser_driver); 2772 if (retval) { 2773 printk(KERN_ERR "mxser: can't register pci driver\n"); 2774 if (!m) { 2775 retval = -ENODEV; 2776 goto err_unr; 2777 } /* else: we have some ISA cards under control */ 2778 } 2779 2780 return 0; 2781 err_unr: 2782 tty_unregister_driver(mxvar_sdriver); 2783 err_put: 2784 put_tty_driver(mxvar_sdriver); 2785 return retval; 2786 } 2787 2788 static void __exit mxser_module_exit(void) 2789 { 2790 unsigned int i; 2791 2792 pci_unregister_driver(&mxser_driver); 2793 2794 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */ 2795 if (mxser_boards[i].info != NULL) 2796 mxser_board_remove(&mxser_boards[i]); 2797 tty_unregister_driver(mxvar_sdriver); 2798 put_tty_driver(mxvar_sdriver); 2799 2800 for (i = 0; i < MXSER_BOARDS; i++) 2801 if (mxser_boards[i].info != NULL) 2802 mxser_release_ISA_res(&mxser_boards[i]); 2803 } 2804 2805 module_init(mxser_module_init); 2806 module_exit(mxser_module_exit); 2807