1 // SPDX-License-Identifier: GPL-2.0+ 2 /*****************************************************************************/ 3 /* 4 * moxa.c -- MOXA Intellio family multiport serial driver. 5 * 6 * Copyright (C) 1999-2000 Moxa Technologies (support@moxa.com). 7 * Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com> 8 * 9 * This code is loosely based on the Linux serial driver, written by 10 * Linus Torvalds, Theodore T'so and others. 11 */ 12 13 /* 14 * MOXA Intellio Series Driver 15 * for : LINUX 16 * date : 1999/1/7 17 * version : 5.1 18 */ 19 20 #include <linux/module.h> 21 #include <linux/types.h> 22 #include <linux/mm.h> 23 #include <linux/ioport.h> 24 #include <linux/errno.h> 25 #include <linux/firmware.h> 26 #include <linux/signal.h> 27 #include <linux/sched.h> 28 #include <linux/timer.h> 29 #include <linux/interrupt.h> 30 #include <linux/tty.h> 31 #include <linux/tty_flip.h> 32 #include <linux/major.h> 33 #include <linux/string.h> 34 #include <linux/fcntl.h> 35 #include <linux/ptrace.h> 36 #include <linux/serial.h> 37 #include <linux/tty_driver.h> 38 #include <linux/delay.h> 39 #include <linux/pci.h> 40 #include <linux/init.h> 41 #include <linux/bitops.h> 42 #include <linux/slab.h> 43 #include <linux/ratelimit.h> 44 45 #include <asm/io.h> 46 47 /* 48 * System Configuration 49 */ 50 51 #define Magic_code 0x404 52 53 /* 54 * for C218 BIOS initialization 55 */ 56 #define C218_ConfBase 0x800 57 #define C218_status (C218_ConfBase + 0) /* BIOS running status */ 58 #define C218_diag (C218_ConfBase + 2) /* diagnostic status */ 59 #define C218_key (C218_ConfBase + 4) /* WORD (0x218 for C218) */ 60 #define C218DLoad_len (C218_ConfBase + 6) /* WORD */ 61 #define C218check_sum (C218_ConfBase + 8) /* BYTE */ 62 #define C218chksum_ok (C218_ConfBase + 0x0a) /* BYTE (1:ok) */ 63 #define C218_TestRx (C218_ConfBase + 0x10) /* 8 bytes for 8 ports */ 64 #define C218_TestTx (C218_ConfBase + 0x18) /* 8 bytes for 8 ports */ 65 #define C218_RXerr (C218_ConfBase + 0x20) /* 8 bytes for 8 ports */ 66 #define C218_ErrFlag (C218_ConfBase + 0x28) /* 8 bytes for 8 ports */ 67 68 #define C218_LoadBuf 0x0F00 69 #define C218_KeyCode 0x218 70 #define CP204J_KeyCode 0x204 71 72 /* 73 * for C320 BIOS initialization 74 */ 75 #define C320_ConfBase 0x800 76 #define C320_LoadBuf 0x0f00 77 #define STS_init 0x05 /* for C320_status */ 78 79 #define C320_status C320_ConfBase + 0 /* BIOS running status */ 80 #define C320_diag C320_ConfBase + 2 /* diagnostic status */ 81 #define C320_key C320_ConfBase + 4 /* WORD (0320H for C320) */ 82 #define C320DLoad_len C320_ConfBase + 6 /* WORD */ 83 #define C320check_sum C320_ConfBase + 8 /* WORD */ 84 #define C320chksum_ok C320_ConfBase + 0x0a /* WORD (1:ok) */ 85 #define C320bapi_len C320_ConfBase + 0x0c /* WORD */ 86 #define C320UART_no C320_ConfBase + 0x0e /* WORD */ 87 88 #define C320_KeyCode 0x320 89 90 #define FixPage_addr 0x0000 /* starting addr of static page */ 91 #define DynPage_addr 0x2000 /* starting addr of dynamic page */ 92 #define C218_start 0x3000 /* starting addr of C218 BIOS prg */ 93 #define Control_reg 0x1ff0 /* select page and reset control */ 94 #define HW_reset 0x80 95 96 /* 97 * Function Codes 98 */ 99 #define FC_CardReset 0x80 100 #define FC_ChannelReset 1 /* C320 firmware not supported */ 101 #define FC_EnableCH 2 102 #define FC_DisableCH 3 103 #define FC_SetParam 4 104 #define FC_SetMode 5 105 #define FC_SetRate 6 106 #define FC_LineControl 7 107 #define FC_LineStatus 8 108 #define FC_XmitControl 9 109 #define FC_FlushQueue 10 110 #define FC_SendBreak 11 111 #define FC_StopBreak 12 112 #define FC_LoopbackON 13 113 #define FC_LoopbackOFF 14 114 #define FC_ClrIrqTable 15 115 #define FC_SendXon 16 116 #define FC_SetTermIrq 17 /* C320 firmware not supported */ 117 #define FC_SetCntIrq 18 /* C320 firmware not supported */ 118 #define FC_SetBreakIrq 19 119 #define FC_SetLineIrq 20 120 #define FC_SetFlowCtl 21 121 #define FC_GenIrq 22 122 #define FC_InCD180 23 123 #define FC_OutCD180 24 124 #define FC_InUARTreg 23 125 #define FC_OutUARTreg 24 126 #define FC_SetXonXoff 25 127 #define FC_OutCD180CCR 26 128 #define FC_ExtIQueue 27 129 #define FC_ExtOQueue 28 130 #define FC_ClrLineIrq 29 131 #define FC_HWFlowCtl 30 132 #define FC_GetClockRate 35 133 #define FC_SetBaud 36 134 #define FC_SetDataMode 41 135 #define FC_GetCCSR 43 136 #define FC_GetDataError 45 137 #define FC_RxControl 50 138 #define FC_ImmSend 51 139 #define FC_SetXonState 52 140 #define FC_SetXoffState 53 141 #define FC_SetRxFIFOTrig 54 142 #define FC_SetTxFIFOCnt 55 143 #define FC_UnixRate 56 144 #define FC_UnixResetTimer 57 145 146 #define RxFIFOTrig1 0 147 #define RxFIFOTrig4 1 148 #define RxFIFOTrig8 2 149 #define RxFIFOTrig14 3 150 151 /* 152 * Dual-Ported RAM 153 */ 154 #define DRAM_global 0 155 #define INT_data (DRAM_global + 0) 156 #define Config_base (DRAM_global + 0x108) 157 158 #define IRQindex (INT_data + 0) 159 #define IRQpending (INT_data + 4) 160 #define IRQtable (INT_data + 8) 161 162 /* 163 * Interrupt Status 164 */ 165 #define IntrRx 0x01 /* receiver data O.K. */ 166 #define IntrTx 0x02 /* transmit buffer empty */ 167 #define IntrFunc 0x04 /* function complete */ 168 #define IntrBreak 0x08 /* received break */ 169 #define IntrLine 0x10 /* line status change 170 for transmitter */ 171 #define IntrIntr 0x20 /* received INTR code */ 172 #define IntrQuit 0x40 /* received QUIT code */ 173 #define IntrEOF 0x80 /* received EOF code */ 174 175 #define IntrRxTrigger 0x100 /* rx data count reach trigger value */ 176 #define IntrTxTrigger 0x200 /* tx data count below trigger value */ 177 178 #define Magic_no (Config_base + 0) 179 #define Card_model_no (Config_base + 2) 180 #define Total_ports (Config_base + 4) 181 #define Module_cnt (Config_base + 8) 182 #define Module_no (Config_base + 10) 183 #define Timer_10ms (Config_base + 14) 184 #define Disable_IRQ (Config_base + 20) 185 #define TMS320_PORT1 (Config_base + 22) 186 #define TMS320_PORT2 (Config_base + 24) 187 #define TMS320_CLOCK (Config_base + 26) 188 189 /* 190 * DATA BUFFER in DRAM 191 */ 192 #define Extern_table 0x400 /* Base address of the external table 193 (24 words * 64) total 3K bytes 194 (24 words * 128) total 6K bytes */ 195 #define Extern_size 0x60 /* 96 bytes */ 196 #define RXrptr 0x00 /* read pointer for RX buffer */ 197 #define RXwptr 0x02 /* write pointer for RX buffer */ 198 #define TXrptr 0x04 /* read pointer for TX buffer */ 199 #define TXwptr 0x06 /* write pointer for TX buffer */ 200 #define HostStat 0x08 /* IRQ flag and general flag */ 201 #define FlagStat 0x0A 202 #define FlowControl 0x0C /* B7 B6 B5 B4 B3 B2 B1 B0 */ 203 /* x x x x | | | | */ 204 /* | | | + CTS flow */ 205 /* | | +--- RTS flow */ 206 /* | +------ TX Xon/Xoff */ 207 /* +--------- RX Xon/Xoff */ 208 #define Break_cnt 0x0E /* received break count */ 209 #define CD180TXirq 0x10 /* if non-0: enable TX irq */ 210 #define RX_mask 0x12 211 #define TX_mask 0x14 212 #define Ofs_rxb 0x16 213 #define Ofs_txb 0x18 214 #define Page_rxb 0x1A 215 #define Page_txb 0x1C 216 #define EndPage_rxb 0x1E 217 #define EndPage_txb 0x20 218 #define Data_error 0x22 219 #define RxTrigger 0x28 220 #define TxTrigger 0x2a 221 222 #define rRXwptr 0x34 223 #define Low_water 0x36 224 225 #define FuncCode 0x40 226 #define FuncArg 0x42 227 #define FuncArg1 0x44 228 229 #define C218rx_size 0x2000 /* 8K bytes */ 230 #define C218tx_size 0x8000 /* 32K bytes */ 231 232 #define C218rx_mask (C218rx_size - 1) 233 #define C218tx_mask (C218tx_size - 1) 234 235 #define C320p8rx_size 0x2000 236 #define C320p8tx_size 0x8000 237 #define C320p8rx_mask (C320p8rx_size - 1) 238 #define C320p8tx_mask (C320p8tx_size - 1) 239 240 #define C320p16rx_size 0x2000 241 #define C320p16tx_size 0x4000 242 #define C320p16rx_mask (C320p16rx_size - 1) 243 #define C320p16tx_mask (C320p16tx_size - 1) 244 245 #define C320p24rx_size 0x2000 246 #define C320p24tx_size 0x2000 247 #define C320p24rx_mask (C320p24rx_size - 1) 248 #define C320p24tx_mask (C320p24tx_size - 1) 249 250 #define C320p32rx_size 0x1000 251 #define C320p32tx_size 0x1000 252 #define C320p32rx_mask (C320p32rx_size - 1) 253 #define C320p32tx_mask (C320p32tx_size - 1) 254 255 #define Page_size 0x2000U 256 #define Page_mask (Page_size - 1) 257 #define C218rx_spage 3 258 #define C218tx_spage 4 259 #define C218rx_pageno 1 260 #define C218tx_pageno 4 261 #define C218buf_pageno 5 262 263 #define C320p8rx_spage 3 264 #define C320p8tx_spage 4 265 #define C320p8rx_pgno 1 266 #define C320p8tx_pgno 4 267 #define C320p8buf_pgno 5 268 269 #define C320p16rx_spage 3 270 #define C320p16tx_spage 4 271 #define C320p16rx_pgno 1 272 #define C320p16tx_pgno 2 273 #define C320p16buf_pgno 3 274 275 #define C320p24rx_spage 3 276 #define C320p24tx_spage 4 277 #define C320p24rx_pgno 1 278 #define C320p24tx_pgno 1 279 #define C320p24buf_pgno 2 280 281 #define C320p32rx_spage 3 282 #define C320p32tx_ofs C320p32rx_size 283 #define C320p32tx_spage 3 284 #define C320p32buf_pgno 1 285 286 /* 287 * Host Status 288 */ 289 #define WakeupRx 0x01 290 #define WakeupTx 0x02 291 #define WakeupBreak 0x08 292 #define WakeupLine 0x10 293 #define WakeupIntr 0x20 294 #define WakeupQuit 0x40 295 #define WakeupEOF 0x80 /* used in VTIME control */ 296 #define WakeupRxTrigger 0x100 297 #define WakeupTxTrigger 0x200 298 /* 299 * Flag status 300 */ 301 #define Rx_over 0x01 302 #define Xoff_state 0x02 303 #define Tx_flowOff 0x04 304 #define Tx_enable 0x08 305 #define CTS_state 0x10 306 #define DSR_state 0x20 307 #define DCD_state 0x80 308 /* 309 * FlowControl 310 */ 311 #define CTS_FlowCtl 1 312 #define RTS_FlowCtl 2 313 #define Tx_FlowCtl 4 314 #define Rx_FlowCtl 8 315 #define IXM_IXANY 0x10 316 317 #define LowWater 128 318 319 #define DTR_ON 1 320 #define RTS_ON 2 321 #define CTS_ON 1 322 #define DSR_ON 2 323 #define DCD_ON 8 324 325 /* mode definition */ 326 #define MX_CS8 0x03 327 #define MX_CS7 0x02 328 #define MX_CS6 0x01 329 #define MX_CS5 0x00 330 331 #define MX_STOP1 0x00 332 #define MX_STOP15 0x04 333 #define MX_STOP2 0x08 334 335 #define MX_PARNONE 0x00 336 #define MX_PAREVEN 0x40 337 #define MX_PARODD 0xC0 338 #define MX_PARMARK 0xA0 339 #define MX_PARSPACE 0x20 340 341 #define MOXA_FW_HDRLEN 32 342 343 #define MOXAMAJOR 172 344 345 #define MAX_BOARDS 4 /* Don't change this value */ 346 #define MAX_PORTS_PER_BOARD 32 /* Don't change this value */ 347 #define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD) 348 349 #define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_PCI) 350 351 enum { 352 MOXA_BOARD_C218_PCI = 1, 353 MOXA_BOARD_C320_PCI, 354 MOXA_BOARD_CP204J, 355 }; 356 357 static char *moxa_brdname[] = 358 { 359 "C218 Turbo PCI series", 360 "C320 Turbo PCI series", 361 "CP-204J series", 362 }; 363 364 static const struct pci_device_id moxa_pcibrds[] = { 365 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218), 366 .driver_data = MOXA_BOARD_C218_PCI }, 367 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320), 368 .driver_data = MOXA_BOARD_C320_PCI }, 369 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J), 370 .driver_data = MOXA_BOARD_CP204J }, 371 { 0 } 372 }; 373 MODULE_DEVICE_TABLE(pci, moxa_pcibrds); 374 375 struct moxa_port; 376 377 static struct moxa_board_conf { 378 int boardType; 379 int numPorts; 380 381 unsigned int ready; 382 383 struct moxa_port *ports; 384 385 void __iomem *basemem; 386 void __iomem *intNdx; 387 void __iomem *intPend; 388 void __iomem *intTable; 389 } moxa_boards[MAX_BOARDS]; 390 391 struct moxa_port { 392 struct tty_port port; 393 struct moxa_board_conf *board; 394 void __iomem *tableAddr; 395 396 int type; 397 int cflag; 398 unsigned long statusflags; 399 400 u8 DCDState; /* Protected by the port lock */ 401 u8 lineCtrl; 402 u8 lowChkFlag; 403 }; 404 405 /* statusflags */ 406 #define TXSTOPPED 1 407 #define LOWWAIT 2 408 #define EMPTYWAIT 3 409 410 411 #define WAKEUP_CHARS 256 412 413 static int ttymajor = MOXAMAJOR; 414 static unsigned int moxaFuncTout = HZ / 2; 415 static unsigned int moxaLowWaterChk; 416 static DEFINE_MUTEX(moxa_openlock); 417 static DEFINE_SPINLOCK(moxa_lock); 418 419 MODULE_AUTHOR("William Chen"); 420 MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver"); 421 MODULE_LICENSE("GPL"); 422 MODULE_FIRMWARE("c218tunx.cod"); 423 MODULE_FIRMWARE("cp204unx.cod"); 424 MODULE_FIRMWARE("c320tunx.cod"); 425 426 module_param(ttymajor, int, 0); 427 428 /* 429 * static functions: 430 */ 431 static int moxa_open(struct tty_struct *, struct file *); 432 static void moxa_close(struct tty_struct *, struct file *); 433 static ssize_t moxa_write(struct tty_struct *, const u8 *, size_t); 434 static unsigned int moxa_write_room(struct tty_struct *); 435 static void moxa_flush_buffer(struct tty_struct *); 436 static unsigned int moxa_chars_in_buffer(struct tty_struct *); 437 static void moxa_set_termios(struct tty_struct *, const struct ktermios *); 438 static void moxa_stop(struct tty_struct *); 439 static void moxa_start(struct tty_struct *); 440 static void moxa_hangup(struct tty_struct *); 441 static int moxa_tiocmget(struct tty_struct *tty); 442 static int moxa_tiocmset(struct tty_struct *tty, 443 unsigned int set, unsigned int clear); 444 static void moxa_poll(struct timer_list *); 445 static void moxa_set_tty_param(struct tty_struct *, const struct ktermios *); 446 static void moxa_shutdown(struct tty_port *); 447 static bool moxa_carrier_raised(struct tty_port *); 448 static void moxa_dtr_rts(struct tty_port *, bool); 449 /* 450 * moxa board interface functions: 451 */ 452 static void MoxaPortEnable(struct moxa_port *); 453 static void MoxaPortDisable(struct moxa_port *); 454 static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t); 455 static int MoxaPortGetLineOut(struct moxa_port *, bool *, bool *); 456 static void MoxaPortLineCtrl(struct moxa_port *, bool, bool); 457 static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int); 458 static int MoxaPortLineStatus(struct moxa_port *); 459 static void MoxaPortFlushData(struct moxa_port *, int); 460 static ssize_t MoxaPortWriteData(struct tty_struct *, const u8 *, size_t); 461 static int MoxaPortReadData(struct moxa_port *); 462 static unsigned int MoxaPortTxQueue(struct moxa_port *); 463 static int MoxaPortRxQueue(struct moxa_port *); 464 static unsigned int MoxaPortTxFree(struct moxa_port *); 465 static void MoxaPortTxDisable(struct moxa_port *); 466 static void MoxaPortTxEnable(struct moxa_port *); 467 static int moxa_get_serial_info(struct tty_struct *, struct serial_struct *); 468 static int moxa_set_serial_info(struct tty_struct *, struct serial_struct *); 469 static void MoxaSetFifo(struct moxa_port *port, int enable); 470 471 /* 472 * I/O functions 473 */ 474 475 static DEFINE_SPINLOCK(moxafunc_lock); 476 477 static void moxa_wait_finish(void __iomem *ofsAddr) 478 { 479 unsigned long end = jiffies + moxaFuncTout; 480 481 while (readw(ofsAddr + FuncCode) != 0) 482 if (time_after(jiffies, end)) 483 return; 484 if (readw(ofsAddr + FuncCode) != 0) 485 printk_ratelimited(KERN_WARNING "moxa function expired\n"); 486 } 487 488 static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg) 489 { 490 unsigned long flags; 491 spin_lock_irqsave(&moxafunc_lock, flags); 492 writew(arg, ofsAddr + FuncArg); 493 writew(cmd, ofsAddr + FuncCode); 494 moxa_wait_finish(ofsAddr); 495 spin_unlock_irqrestore(&moxafunc_lock, flags); 496 } 497 498 static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg) 499 { 500 unsigned long flags; 501 u16 ret; 502 spin_lock_irqsave(&moxafunc_lock, flags); 503 writew(arg, ofsAddr + FuncArg); 504 writew(cmd, ofsAddr + FuncCode); 505 moxa_wait_finish(ofsAddr); 506 ret = readw(ofsAddr + FuncArg); 507 spin_unlock_irqrestore(&moxafunc_lock, flags); 508 return ret; 509 } 510 511 static void moxa_low_water_check(void __iomem *ofsAddr) 512 { 513 u16 rptr, wptr, mask, len; 514 515 if (readb(ofsAddr + FlagStat) & Xoff_state) { 516 rptr = readw(ofsAddr + RXrptr); 517 wptr = readw(ofsAddr + RXwptr); 518 mask = readw(ofsAddr + RX_mask); 519 len = (wptr - rptr) & mask; 520 if (len <= Low_water) 521 moxafunc(ofsAddr, FC_SendXon, 0); 522 } 523 } 524 525 /* 526 * TTY operations 527 */ 528 529 static int moxa_break_ctl(struct tty_struct *tty, int state) 530 { 531 struct moxa_port *port = tty->driver_data; 532 533 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak, 534 Magic_code); 535 return 0; 536 } 537 538 static const struct tty_operations moxa_ops = { 539 .open = moxa_open, 540 .close = moxa_close, 541 .write = moxa_write, 542 .write_room = moxa_write_room, 543 .flush_buffer = moxa_flush_buffer, 544 .chars_in_buffer = moxa_chars_in_buffer, 545 .set_termios = moxa_set_termios, 546 .stop = moxa_stop, 547 .start = moxa_start, 548 .hangup = moxa_hangup, 549 .break_ctl = moxa_break_ctl, 550 .tiocmget = moxa_tiocmget, 551 .tiocmset = moxa_tiocmset, 552 .set_serial = moxa_set_serial_info, 553 .get_serial = moxa_get_serial_info, 554 }; 555 556 static const struct tty_port_operations moxa_port_ops = { 557 .carrier_raised = moxa_carrier_raised, 558 .dtr_rts = moxa_dtr_rts, 559 .shutdown = moxa_shutdown, 560 }; 561 562 static struct tty_driver *moxaDriver; 563 static DEFINE_TIMER(moxaTimer, moxa_poll); 564 565 /* 566 * HW init 567 */ 568 569 static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model) 570 { 571 switch (brd->boardType) { 572 case MOXA_BOARD_C218_PCI: 573 if (model != 1) 574 goto err; 575 break; 576 case MOXA_BOARD_CP204J: 577 if (model != 3) 578 goto err; 579 break; 580 default: 581 if (model != 2) 582 goto err; 583 break; 584 } 585 return 0; 586 err: 587 return -EINVAL; 588 } 589 590 static int moxa_check_fw(const void *ptr) 591 { 592 const __le16 *lptr = ptr; 593 594 if (*lptr != cpu_to_le16(0x7980)) 595 return -EINVAL; 596 597 return 0; 598 } 599 600 static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf, 601 size_t len) 602 { 603 void __iomem *baseAddr = brd->basemem; 604 u16 tmp; 605 606 writeb(HW_reset, baseAddr + Control_reg); /* reset */ 607 msleep(10); 608 memset_io(baseAddr, 0, 4096); 609 memcpy_toio(baseAddr, buf, len); /* download BIOS */ 610 writeb(0, baseAddr + Control_reg); /* restart */ 611 612 msleep(2000); 613 614 switch (brd->boardType) { 615 case MOXA_BOARD_C218_PCI: 616 tmp = readw(baseAddr + C218_key); 617 if (tmp != C218_KeyCode) 618 goto err; 619 break; 620 case MOXA_BOARD_CP204J: 621 tmp = readw(baseAddr + C218_key); 622 if (tmp != CP204J_KeyCode) 623 goto err; 624 break; 625 default: 626 tmp = readw(baseAddr + C320_key); 627 if (tmp != C320_KeyCode) 628 goto err; 629 tmp = readw(baseAddr + C320_status); 630 if (tmp != STS_init) { 631 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic " 632 "module not found\n"); 633 return -EIO; 634 } 635 break; 636 } 637 638 return 0; 639 err: 640 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n"); 641 return -EIO; 642 } 643 644 static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr, 645 size_t len) 646 { 647 void __iomem *baseAddr = brd->basemem; 648 649 if (len < 7168) { 650 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n"); 651 return -EINVAL; 652 } 653 654 writew(len - 7168 - 2, baseAddr + C320bapi_len); 655 writeb(1, baseAddr + Control_reg); /* Select Page 1 */ 656 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168); 657 writeb(2, baseAddr + Control_reg); /* Select Page 2 */ 658 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168); 659 660 return 0; 661 } 662 663 static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr, 664 size_t len) 665 { 666 void __iomem *baseAddr = brd->basemem; 667 const __le16 *uptr = ptr; 668 size_t wlen, len2, j; 669 unsigned long key, loadbuf, loadlen, checksum, checksum_ok; 670 unsigned int i, retry; 671 u16 usum, keycode; 672 673 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode : 674 C218_KeyCode; 675 676 switch (brd->boardType) { 677 case MOXA_BOARD_CP204J: 678 case MOXA_BOARD_C218_PCI: 679 key = C218_key; 680 loadbuf = C218_LoadBuf; 681 loadlen = C218DLoad_len; 682 checksum = C218check_sum; 683 checksum_ok = C218chksum_ok; 684 break; 685 default: 686 key = C320_key; 687 keycode = C320_KeyCode; 688 loadbuf = C320_LoadBuf; 689 loadlen = C320DLoad_len; 690 checksum = C320check_sum; 691 checksum_ok = C320chksum_ok; 692 break; 693 } 694 695 usum = 0; 696 wlen = len >> 1; 697 for (i = 0; i < wlen; i++) 698 usum += le16_to_cpu(uptr[i]); 699 retry = 0; 700 do { 701 wlen = len >> 1; 702 j = 0; 703 while (wlen) { 704 len2 = (wlen > 2048) ? 2048 : wlen; 705 wlen -= len2; 706 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1); 707 j += len2 << 1; 708 709 writew(len2, baseAddr + loadlen); 710 writew(0, baseAddr + key); 711 for (i = 0; i < 100; i++) { 712 if (readw(baseAddr + key) == keycode) 713 break; 714 msleep(10); 715 } 716 if (readw(baseAddr + key) != keycode) 717 return -EIO; 718 } 719 writew(0, baseAddr + loadlen); 720 writew(usum, baseAddr + checksum); 721 writew(0, baseAddr + key); 722 for (i = 0; i < 100; i++) { 723 if (readw(baseAddr + key) == keycode) 724 break; 725 msleep(10); 726 } 727 retry++; 728 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3)); 729 if (readb(baseAddr + checksum_ok) != 1) 730 return -EIO; 731 732 writew(0, baseAddr + key); 733 for (i = 0; i < 600; i++) { 734 if (readw(baseAddr + Magic_no) == Magic_code) 735 break; 736 msleep(10); 737 } 738 if (readw(baseAddr + Magic_no) != Magic_code) 739 return -EIO; 740 741 if (MOXA_IS_320(brd)) { 742 writew(0x3800, baseAddr + TMS320_PORT1); 743 writew(0x3900, baseAddr + TMS320_PORT2); 744 writew(28499, baseAddr + TMS320_CLOCK); 745 } 746 writew(1, baseAddr + Disable_IRQ); 747 writew(0, baseAddr + Magic_no); 748 for (i = 0; i < 500; i++) { 749 if (readw(baseAddr + Magic_no) == Magic_code) 750 break; 751 msleep(10); 752 } 753 if (readw(baseAddr + Magic_no) != Magic_code) 754 return -EIO; 755 756 if (MOXA_IS_320(brd)) { 757 j = readw(baseAddr + Module_cnt); 758 if (j <= 0) 759 return -EIO; 760 brd->numPorts = j * 8; 761 writew(j, baseAddr + Module_no); 762 writew(0, baseAddr + Magic_no); 763 for (i = 0; i < 600; i++) { 764 if (readw(baseAddr + Magic_no) == Magic_code) 765 break; 766 msleep(10); 767 } 768 if (readw(baseAddr + Magic_no) != Magic_code) 769 return -EIO; 770 } 771 brd->intNdx = baseAddr + IRQindex; 772 brd->intPend = baseAddr + IRQpending; 773 brd->intTable = baseAddr + IRQtable; 774 775 return 0; 776 } 777 778 static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr, 779 size_t len) 780 { 781 void __iomem *ofsAddr, *baseAddr = brd->basemem; 782 struct moxa_port *port; 783 int retval, i; 784 785 if (len % 2) { 786 printk(KERN_ERR "MOXA: bios length is not even\n"); 787 return -EINVAL; 788 } 789 790 retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */ 791 if (retval) 792 return retval; 793 794 switch (brd->boardType) { 795 case MOXA_BOARD_C218_PCI: 796 case MOXA_BOARD_CP204J: 797 port = brd->ports; 798 for (i = 0; i < brd->numPorts; i++, port++) { 799 port->board = brd; 800 port->DCDState = 0; 801 port->tableAddr = baseAddr + Extern_table + 802 Extern_size * i; 803 ofsAddr = port->tableAddr; 804 writew(C218rx_mask, ofsAddr + RX_mask); 805 writew(C218tx_mask, ofsAddr + TX_mask); 806 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb); 807 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb); 808 809 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb); 810 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb); 811 812 } 813 break; 814 default: 815 port = brd->ports; 816 for (i = 0; i < brd->numPorts; i++, port++) { 817 port->board = brd; 818 port->DCDState = 0; 819 port->tableAddr = baseAddr + Extern_table + 820 Extern_size * i; 821 ofsAddr = port->tableAddr; 822 switch (brd->numPorts) { 823 case 8: 824 writew(C320p8rx_mask, ofsAddr + RX_mask); 825 writew(C320p8tx_mask, ofsAddr + TX_mask); 826 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb); 827 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb); 828 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb); 829 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb); 830 831 break; 832 case 16: 833 writew(C320p16rx_mask, ofsAddr + RX_mask); 834 writew(C320p16tx_mask, ofsAddr + TX_mask); 835 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb); 836 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb); 837 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb); 838 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb); 839 break; 840 841 case 24: 842 writew(C320p24rx_mask, ofsAddr + RX_mask); 843 writew(C320p24tx_mask, ofsAddr + TX_mask); 844 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb); 845 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb); 846 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb); 847 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb); 848 break; 849 case 32: 850 writew(C320p32rx_mask, ofsAddr + RX_mask); 851 writew(C320p32tx_mask, ofsAddr + TX_mask); 852 writew(C320p32tx_ofs, ofsAddr + Ofs_txb); 853 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb); 854 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb); 855 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb); 856 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb); 857 break; 858 } 859 } 860 break; 861 } 862 return 0; 863 } 864 865 static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw) 866 { 867 const void *ptr = fw->data; 868 char rsn[64]; 869 u16 lens[5]; 870 size_t len; 871 unsigned int a, lenp, lencnt; 872 int ret = -EINVAL; 873 struct { 874 __le32 magic; /* 0x34303430 */ 875 u8 reserved1[2]; 876 u8 type; /* UNIX = 3 */ 877 u8 model; /* C218T=1, C320T=2, CP204=3 */ 878 u8 reserved2[8]; 879 __le16 len[5]; 880 } const *hdr = ptr; 881 882 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens)); 883 884 if (fw->size < MOXA_FW_HDRLEN) { 885 strcpy(rsn, "too short (even header won't fit)"); 886 goto err; 887 } 888 if (hdr->magic != cpu_to_le32(0x30343034)) { 889 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic)); 890 goto err; 891 } 892 if (hdr->type != 3) { 893 sprintf(rsn, "not for linux, type is %u", hdr->type); 894 goto err; 895 } 896 if (moxa_check_fw_model(brd, hdr->model)) { 897 sprintf(rsn, "not for this card, model is %u", hdr->model); 898 goto err; 899 } 900 901 len = MOXA_FW_HDRLEN; 902 lencnt = hdr->model == 2 ? 5 : 3; 903 for (a = 0; a < ARRAY_SIZE(lens); a++) { 904 lens[a] = le16_to_cpu(hdr->len[a]); 905 if (lens[a] && len + lens[a] <= fw->size && 906 moxa_check_fw(&fw->data[len])) 907 printk(KERN_WARNING "MOXA firmware: unexpected input " 908 "at offset %u, but going on\n", (u32)len); 909 if (!lens[a] && a < lencnt) { 910 sprintf(rsn, "too few entries in fw file"); 911 goto err; 912 } 913 len += lens[a]; 914 } 915 916 if (len != fw->size) { 917 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size, 918 (u32)len); 919 goto err; 920 } 921 922 ptr += MOXA_FW_HDRLEN; 923 lenp = 0; /* bios */ 924 925 strcpy(rsn, "read above"); 926 927 ret = moxa_load_bios(brd, ptr, lens[lenp]); 928 if (ret) 929 goto err; 930 931 /* we skip the tty section (lens[1]), since we don't need it */ 932 ptr += lens[lenp] + lens[lenp + 1]; 933 lenp += 2; /* comm */ 934 935 if (hdr->model == 2) { 936 ret = moxa_load_320b(brd, ptr, lens[lenp]); 937 if (ret) 938 goto err; 939 /* skip another tty */ 940 ptr += lens[lenp] + lens[lenp + 1]; 941 lenp += 2; 942 } 943 944 ret = moxa_load_code(brd, ptr, lens[lenp]); 945 if (ret) 946 goto err; 947 948 return 0; 949 err: 950 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn); 951 return ret; 952 } 953 954 static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev) 955 { 956 const struct firmware *fw; 957 const char *file; 958 struct moxa_port *p; 959 unsigned int i, first_idx; 960 int ret; 961 962 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports), 963 GFP_KERNEL); 964 if (brd->ports == NULL) { 965 printk(KERN_ERR "cannot allocate memory for ports\n"); 966 ret = -ENOMEM; 967 goto err; 968 } 969 970 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) { 971 tty_port_init(&p->port); 972 p->port.ops = &moxa_port_ops; 973 p->type = PORT_16550A; 974 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL; 975 } 976 977 switch (brd->boardType) { 978 case MOXA_BOARD_C218_PCI: 979 file = "c218tunx.cod"; 980 break; 981 case MOXA_BOARD_CP204J: 982 file = "cp204unx.cod"; 983 break; 984 default: 985 file = "c320tunx.cod"; 986 break; 987 } 988 989 ret = request_firmware(&fw, file, dev); 990 if (ret) { 991 printk(KERN_ERR "MOXA: request_firmware failed. Make sure " 992 "you've placed '%s' file into your firmware " 993 "loader directory (e.g. /lib/firmware)\n", 994 file); 995 goto err_free; 996 } 997 998 ret = moxa_load_fw(brd, fw); 999 1000 release_firmware(fw); 1001 1002 if (ret) 1003 goto err_free; 1004 1005 spin_lock_bh(&moxa_lock); 1006 brd->ready = 1; 1007 if (!timer_pending(&moxaTimer)) 1008 mod_timer(&moxaTimer, jiffies + HZ / 50); 1009 spin_unlock_bh(&moxa_lock); 1010 1011 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD; 1012 for (i = 0; i < brd->numPorts; i++) 1013 tty_port_register_device(&brd->ports[i].port, moxaDriver, 1014 first_idx + i, dev); 1015 1016 return 0; 1017 err_free: 1018 for (i = 0; i < MAX_PORTS_PER_BOARD; i++) 1019 tty_port_destroy(&brd->ports[i].port); 1020 kfree(brd->ports); 1021 err: 1022 return ret; 1023 } 1024 1025 static void moxa_board_deinit(struct moxa_board_conf *brd) 1026 { 1027 unsigned int a, opened, first_idx; 1028 1029 mutex_lock(&moxa_openlock); 1030 spin_lock_bh(&moxa_lock); 1031 brd->ready = 0; 1032 spin_unlock_bh(&moxa_lock); 1033 1034 /* pci hot-un-plug support */ 1035 for (a = 0; a < brd->numPorts; a++) 1036 if (tty_port_initialized(&brd->ports[a].port)) 1037 tty_port_tty_hangup(&brd->ports[a].port, false); 1038 1039 for (a = 0; a < MAX_PORTS_PER_BOARD; a++) 1040 tty_port_destroy(&brd->ports[a].port); 1041 1042 while (1) { 1043 opened = 0; 1044 for (a = 0; a < brd->numPorts; a++) 1045 if (tty_port_initialized(&brd->ports[a].port)) 1046 opened++; 1047 mutex_unlock(&moxa_openlock); 1048 if (!opened) 1049 break; 1050 msleep(50); 1051 mutex_lock(&moxa_openlock); 1052 } 1053 1054 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD; 1055 for (a = 0; a < brd->numPorts; a++) 1056 tty_unregister_device(moxaDriver, first_idx + a); 1057 1058 iounmap(brd->basemem); 1059 brd->basemem = NULL; 1060 kfree(brd->ports); 1061 } 1062 1063 static int moxa_pci_probe(struct pci_dev *pdev, 1064 const struct pci_device_id *ent) 1065 { 1066 struct moxa_board_conf *board; 1067 unsigned int i; 1068 int board_type = ent->driver_data; 1069 int retval; 1070 1071 retval = pci_enable_device(pdev); 1072 if (retval) { 1073 dev_err(&pdev->dev, "can't enable pci device\n"); 1074 goto err; 1075 } 1076 1077 for (i = 0; i < MAX_BOARDS; i++) 1078 if (moxa_boards[i].basemem == NULL) 1079 break; 1080 1081 retval = -ENODEV; 1082 if (i >= MAX_BOARDS) { 1083 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards " 1084 "found. Board is ignored.\n", MAX_BOARDS); 1085 goto err; 1086 } 1087 1088 board = &moxa_boards[i]; 1089 1090 retval = pci_request_region(pdev, 2, "moxa-base"); 1091 if (retval) { 1092 dev_err(&pdev->dev, "can't request pci region 2\n"); 1093 goto err; 1094 } 1095 1096 board->basemem = ioremap(pci_resource_start(pdev, 2), 0x4000); 1097 if (board->basemem == NULL) { 1098 dev_err(&pdev->dev, "can't remap io space 2\n"); 1099 retval = -ENOMEM; 1100 goto err_reg; 1101 } 1102 1103 board->boardType = board_type; 1104 switch (board_type) { 1105 case MOXA_BOARD_C218_PCI: 1106 board->numPorts = 8; 1107 break; 1108 1109 case MOXA_BOARD_CP204J: 1110 board->numPorts = 4; 1111 break; 1112 default: 1113 board->numPorts = 0; 1114 break; 1115 } 1116 1117 retval = moxa_init_board(board, &pdev->dev); 1118 if (retval) 1119 goto err_base; 1120 1121 pci_set_drvdata(pdev, board); 1122 1123 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n", 1124 moxa_brdname[board_type - 1], board->numPorts); 1125 1126 return 0; 1127 err_base: 1128 iounmap(board->basemem); 1129 board->basemem = NULL; 1130 err_reg: 1131 pci_release_region(pdev, 2); 1132 err: 1133 return retval; 1134 } 1135 1136 static void moxa_pci_remove(struct pci_dev *pdev) 1137 { 1138 struct moxa_board_conf *brd = pci_get_drvdata(pdev); 1139 1140 moxa_board_deinit(brd); 1141 1142 pci_release_region(pdev, 2); 1143 } 1144 1145 static struct pci_driver moxa_pci_driver = { 1146 .name = "moxa", 1147 .id_table = moxa_pcibrds, 1148 .probe = moxa_pci_probe, 1149 .remove = moxa_pci_remove 1150 }; 1151 1152 static int __init moxa_init(void) 1153 { 1154 int retval = 0; 1155 1156 moxaDriver = tty_alloc_driver(MAX_PORTS, 1157 TTY_DRIVER_REAL_RAW | 1158 TTY_DRIVER_DYNAMIC_DEV); 1159 if (IS_ERR(moxaDriver)) 1160 return PTR_ERR(moxaDriver); 1161 1162 moxaDriver->name = "ttyMX"; 1163 moxaDriver->major = ttymajor; 1164 moxaDriver->minor_start = 0; 1165 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL; 1166 moxaDriver->subtype = SERIAL_TYPE_NORMAL; 1167 moxaDriver->init_termios = tty_std_termios; 1168 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL; 1169 moxaDriver->init_termios.c_ispeed = 9600; 1170 moxaDriver->init_termios.c_ospeed = 9600; 1171 tty_set_operations(moxaDriver, &moxa_ops); 1172 1173 if (tty_register_driver(moxaDriver)) { 1174 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n"); 1175 tty_driver_kref_put(moxaDriver); 1176 return -1; 1177 } 1178 1179 retval = pci_register_driver(&moxa_pci_driver); 1180 if (retval) 1181 printk(KERN_ERR "Can't register MOXA pci driver!\n"); 1182 1183 return retval; 1184 } 1185 1186 static void __exit moxa_exit(void) 1187 { 1188 pci_unregister_driver(&moxa_pci_driver); 1189 1190 timer_delete_sync(&moxaTimer); 1191 1192 tty_unregister_driver(moxaDriver); 1193 tty_driver_kref_put(moxaDriver); 1194 } 1195 1196 module_init(moxa_init); 1197 module_exit(moxa_exit); 1198 1199 static void moxa_shutdown(struct tty_port *port) 1200 { 1201 struct moxa_port *ch = container_of(port, struct moxa_port, port); 1202 MoxaPortDisable(ch); 1203 MoxaPortFlushData(ch, 2); 1204 } 1205 1206 static bool moxa_carrier_raised(struct tty_port *port) 1207 { 1208 struct moxa_port *ch = container_of(port, struct moxa_port, port); 1209 int dcd; 1210 1211 spin_lock_irq(&port->lock); 1212 dcd = ch->DCDState; 1213 spin_unlock_irq(&port->lock); 1214 return dcd; 1215 } 1216 1217 static void moxa_dtr_rts(struct tty_port *port, bool active) 1218 { 1219 struct moxa_port *ch = container_of(port, struct moxa_port, port); 1220 MoxaPortLineCtrl(ch, active, active); 1221 } 1222 1223 1224 static int moxa_open(struct tty_struct *tty, struct file *filp) 1225 { 1226 struct moxa_board_conf *brd; 1227 struct moxa_port *ch; 1228 int port; 1229 1230 port = tty->index; 1231 if (mutex_lock_interruptible(&moxa_openlock)) 1232 return -ERESTARTSYS; 1233 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD]; 1234 if (!brd->ready) { 1235 mutex_unlock(&moxa_openlock); 1236 return -ENODEV; 1237 } 1238 1239 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) { 1240 mutex_unlock(&moxa_openlock); 1241 return -ENODEV; 1242 } 1243 1244 ch = &brd->ports[port % MAX_PORTS_PER_BOARD]; 1245 ch->port.count++; 1246 tty->driver_data = ch; 1247 tty_port_tty_set(&ch->port, tty); 1248 mutex_lock(&ch->port.mutex); 1249 if (!tty_port_initialized(&ch->port)) { 1250 ch->statusflags = 0; 1251 moxa_set_tty_param(tty, &tty->termios); 1252 MoxaPortLineCtrl(ch, true, true); 1253 MoxaPortEnable(ch); 1254 MoxaSetFifo(ch, ch->type == PORT_16550A); 1255 tty_port_set_initialized(&ch->port, true); 1256 } 1257 mutex_unlock(&ch->port.mutex); 1258 mutex_unlock(&moxa_openlock); 1259 1260 return tty_port_block_til_ready(&ch->port, tty, filp); 1261 } 1262 1263 static void moxa_close(struct tty_struct *tty, struct file *filp) 1264 { 1265 struct moxa_port *ch = tty->driver_data; 1266 ch->cflag = tty->termios.c_cflag; 1267 tty_port_close(&ch->port, tty, filp); 1268 } 1269 1270 static ssize_t moxa_write(struct tty_struct *tty, const u8 *buf, size_t count) 1271 { 1272 struct moxa_port *ch = tty->driver_data; 1273 unsigned long flags; 1274 int len; 1275 1276 if (ch == NULL) 1277 return 0; 1278 1279 spin_lock_irqsave(&moxa_lock, flags); 1280 len = MoxaPortWriteData(tty, buf, count); 1281 spin_unlock_irqrestore(&moxa_lock, flags); 1282 1283 set_bit(LOWWAIT, &ch->statusflags); 1284 return len; 1285 } 1286 1287 static unsigned int moxa_write_room(struct tty_struct *tty) 1288 { 1289 struct moxa_port *ch; 1290 1291 if (tty->flow.stopped) 1292 return 0; 1293 ch = tty->driver_data; 1294 if (ch == NULL) 1295 return 0; 1296 return MoxaPortTxFree(ch); 1297 } 1298 1299 static void moxa_flush_buffer(struct tty_struct *tty) 1300 { 1301 struct moxa_port *ch = tty->driver_data; 1302 1303 if (ch == NULL) 1304 return; 1305 MoxaPortFlushData(ch, 1); 1306 tty_wakeup(tty); 1307 } 1308 1309 static unsigned int moxa_chars_in_buffer(struct tty_struct *tty) 1310 { 1311 struct moxa_port *ch = tty->driver_data; 1312 unsigned int chars; 1313 1314 chars = MoxaPortTxQueue(ch); 1315 if (chars) 1316 /* 1317 * Make it possible to wakeup anything waiting for output 1318 * in tty_ioctl.c, etc. 1319 */ 1320 set_bit(EMPTYWAIT, &ch->statusflags); 1321 return chars; 1322 } 1323 1324 static int moxa_tiocmget(struct tty_struct *tty) 1325 { 1326 struct moxa_port *ch = tty->driver_data; 1327 bool dtr_active, rts_active; 1328 int flag = 0; 1329 int status; 1330 1331 MoxaPortGetLineOut(ch, &dtr_active, &rts_active); 1332 if (dtr_active) 1333 flag |= TIOCM_DTR; 1334 if (rts_active) 1335 flag |= TIOCM_RTS; 1336 status = MoxaPortLineStatus(ch); 1337 if (status & 1) 1338 flag |= TIOCM_CTS; 1339 if (status & 2) 1340 flag |= TIOCM_DSR; 1341 if (status & 4) 1342 flag |= TIOCM_CD; 1343 return flag; 1344 } 1345 1346 static int moxa_tiocmset(struct tty_struct *tty, 1347 unsigned int set, unsigned int clear) 1348 { 1349 bool dtr_active, rts_active; 1350 struct moxa_port *ch; 1351 1352 mutex_lock(&moxa_openlock); 1353 ch = tty->driver_data; 1354 if (!ch) { 1355 mutex_unlock(&moxa_openlock); 1356 return -EINVAL; 1357 } 1358 1359 MoxaPortGetLineOut(ch, &dtr_active, &rts_active); 1360 if (set & TIOCM_RTS) 1361 rts_active = true; 1362 if (set & TIOCM_DTR) 1363 dtr_active = true; 1364 if (clear & TIOCM_RTS) 1365 rts_active = false; 1366 if (clear & TIOCM_DTR) 1367 dtr_active = false; 1368 MoxaPortLineCtrl(ch, dtr_active, rts_active); 1369 mutex_unlock(&moxa_openlock); 1370 return 0; 1371 } 1372 1373 static void moxa_set_termios(struct tty_struct *tty, 1374 const struct ktermios *old_termios) 1375 { 1376 struct moxa_port *ch = tty->driver_data; 1377 1378 if (ch == NULL) 1379 return; 1380 moxa_set_tty_param(tty, old_termios); 1381 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty)) 1382 wake_up_interruptible(&ch->port.open_wait); 1383 } 1384 1385 static void moxa_stop(struct tty_struct *tty) 1386 { 1387 struct moxa_port *ch = tty->driver_data; 1388 1389 if (ch == NULL) 1390 return; 1391 MoxaPortTxDisable(ch); 1392 set_bit(TXSTOPPED, &ch->statusflags); 1393 } 1394 1395 1396 static void moxa_start(struct tty_struct *tty) 1397 { 1398 struct moxa_port *ch = tty->driver_data; 1399 1400 if (ch == NULL) 1401 return; 1402 1403 if (!test_bit(TXSTOPPED, &ch->statusflags)) 1404 return; 1405 1406 MoxaPortTxEnable(ch); 1407 clear_bit(TXSTOPPED, &ch->statusflags); 1408 } 1409 1410 static void moxa_hangup(struct tty_struct *tty) 1411 { 1412 struct moxa_port *ch = tty->driver_data; 1413 tty_port_hangup(&ch->port); 1414 } 1415 1416 static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd) 1417 { 1418 unsigned long flags; 1419 dcd = !!dcd; 1420 1421 spin_lock_irqsave(&p->port.lock, flags); 1422 if (dcd != p->DCDState) { 1423 p->DCDState = dcd; 1424 spin_unlock_irqrestore(&p->port.lock, flags); 1425 if (!dcd) 1426 tty_port_tty_hangup(&p->port, true); 1427 } 1428 else 1429 spin_unlock_irqrestore(&p->port.lock, flags); 1430 } 1431 1432 static int moxa_poll_port(struct moxa_port *p, unsigned int handle, 1433 u16 __iomem *ip) 1434 { 1435 struct tty_struct *tty = tty_port_tty_get(&p->port); 1436 bool inited = tty_port_initialized(&p->port); 1437 void __iomem *ofsAddr; 1438 u16 intr; 1439 1440 if (tty) { 1441 if (test_bit(EMPTYWAIT, &p->statusflags) && 1442 MoxaPortTxQueue(p) == 0) { 1443 clear_bit(EMPTYWAIT, &p->statusflags); 1444 tty_wakeup(tty); 1445 } 1446 if (test_bit(LOWWAIT, &p->statusflags) && !tty->flow.stopped && 1447 MoxaPortTxQueue(p) <= WAKEUP_CHARS) { 1448 clear_bit(LOWWAIT, &p->statusflags); 1449 tty_wakeup(tty); 1450 } 1451 1452 if (inited && !tty_throttled(tty) && 1453 MoxaPortRxQueue(p) > 0) { /* RX */ 1454 MoxaPortReadData(p); 1455 tty_flip_buffer_push(&p->port); 1456 } 1457 } else { 1458 clear_bit(EMPTYWAIT, &p->statusflags); 1459 MoxaPortFlushData(p, 0); /* flush RX */ 1460 } 1461 1462 if (!handle) /* nothing else to do */ 1463 goto put; 1464 1465 intr = readw(ip); /* port irq status */ 1466 if (intr == 0) 1467 goto put; 1468 1469 writew(0, ip); /* ACK port */ 1470 ofsAddr = p->tableAddr; 1471 if (intr & IntrTx) /* disable tx intr */ 1472 writew(readw(ofsAddr + HostStat) & ~WakeupTx, 1473 ofsAddr + HostStat); 1474 1475 if (!inited) 1476 goto put; 1477 1478 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */ 1479 tty_insert_flip_char(&p->port, 0, TTY_BREAK); 1480 tty_flip_buffer_push(&p->port); 1481 } 1482 1483 if (intr & IntrLine) 1484 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state); 1485 put: 1486 tty_kref_put(tty); 1487 1488 return 0; 1489 } 1490 1491 static void moxa_poll(struct timer_list *unused) 1492 { 1493 struct moxa_board_conf *brd; 1494 u16 __iomem *ip; 1495 unsigned int card, port, served = 0; 1496 1497 spin_lock(&moxa_lock); 1498 for (card = 0; card < MAX_BOARDS; card++) { 1499 brd = &moxa_boards[card]; 1500 if (!brd->ready) 1501 continue; 1502 1503 served++; 1504 1505 ip = NULL; 1506 if (readb(brd->intPend) == 0xff) 1507 ip = brd->intTable + readb(brd->intNdx); 1508 1509 for (port = 0; port < brd->numPorts; port++) 1510 moxa_poll_port(&brd->ports[port], !!ip, ip + port); 1511 1512 if (ip) 1513 writeb(0, brd->intPend); /* ACK */ 1514 1515 if (moxaLowWaterChk) { 1516 struct moxa_port *p = brd->ports; 1517 for (port = 0; port < brd->numPorts; port++, p++) 1518 if (p->lowChkFlag) { 1519 p->lowChkFlag = 0; 1520 moxa_low_water_check(p->tableAddr); 1521 } 1522 } 1523 } 1524 moxaLowWaterChk = 0; 1525 1526 if (served) 1527 mod_timer(&moxaTimer, jiffies + HZ / 50); 1528 spin_unlock(&moxa_lock); 1529 } 1530 1531 /******************************************************************************/ 1532 1533 static void moxa_set_tty_param(struct tty_struct *tty, 1534 const struct ktermios *old_termios) 1535 { 1536 register struct ktermios *ts = &tty->termios; 1537 struct moxa_port *ch = tty->driver_data; 1538 int rts, cts, txflow, rxflow, xany, baud; 1539 1540 rts = cts = txflow = rxflow = xany = 0; 1541 if (ts->c_cflag & CRTSCTS) 1542 rts = cts = 1; 1543 if (ts->c_iflag & IXON) 1544 txflow = 1; 1545 if (ts->c_iflag & IXOFF) 1546 rxflow = 1; 1547 if (ts->c_iflag & IXANY) 1548 xany = 1; 1549 1550 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany); 1551 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty)); 1552 if (baud == -1) 1553 baud = tty_termios_baud_rate(old_termios); 1554 /* Not put the baud rate into the termios data */ 1555 tty_encode_baud_rate(tty, baud, baud); 1556 } 1557 1558 /***************************************************************************** 1559 * Driver level functions: * 1560 *****************************************************************************/ 1561 1562 static void MoxaPortFlushData(struct moxa_port *port, int mode) 1563 { 1564 void __iomem *ofsAddr; 1565 if (mode < 0 || mode > 2) 1566 return; 1567 ofsAddr = port->tableAddr; 1568 moxafunc(ofsAddr, FC_FlushQueue, mode); 1569 if (mode != 1) { 1570 port->lowChkFlag = 0; 1571 moxa_low_water_check(ofsAddr); 1572 } 1573 } 1574 1575 /* 1576 * Moxa Port Number Description: 1577 * 1578 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And, 1579 * the port number using in MOXA driver functions will be 0 to 31 for 1580 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96 1581 * to 127 for fourth. For example, if you setup three MOXA boards, 1582 * first board is C218, second board is C320-16 and third board is 1583 * C320-32. The port number of first board (C218 - 8 ports) is from 1584 * 0 to 7. The port number of second board (C320 - 16 ports) is form 1585 * 32 to 47. The port number of third board (C320 - 32 ports) is from 1586 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to 1587 * 127 will be invalid. 1588 * 1589 * 1590 * Moxa Functions Description: 1591 * 1592 * Function 1: Driver initialization routine, this routine must be 1593 * called when initialized driver. 1594 * Syntax: 1595 * void MoxaDriverInit(); 1596 * 1597 * 1598 * Function 2: Moxa driver private IOCTL command processing. 1599 * Syntax: 1600 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port); 1601 * 1602 * unsigned int cmd : IOCTL command 1603 * unsigned long arg : IOCTL argument 1604 * int port : port number (0 - 127) 1605 * 1606 * return: 0 (OK) 1607 * -EINVAL 1608 * -ENOIOCTLCMD 1609 * 1610 * 1611 * Function 6: Enable this port to start Tx/Rx data. 1612 * Syntax: 1613 * void MoxaPortEnable(int port); 1614 * int port : port number (0 - 127) 1615 * 1616 * 1617 * Function 7: Disable this port 1618 * Syntax: 1619 * void MoxaPortDisable(int port); 1620 * int port : port number (0 - 127) 1621 * 1622 * 1623 * Function 10: Setting baud rate of this port. 1624 * Syntax: 1625 * speed_t MoxaPortSetBaud(int port, speed_t baud); 1626 * int port : port number (0 - 127) 1627 * long baud : baud rate (50 - 115200) 1628 * 1629 * return: 0 : this port is invalid or baud < 50 1630 * 50 - 115200 : the real baud rate set to the port, if 1631 * the argument baud is large than maximun 1632 * available baud rate, the real setting 1633 * baud rate will be the maximun baud rate. 1634 * 1635 * 1636 * Function 12: Configure the port. 1637 * Syntax: 1638 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud); 1639 * int port : port number (0 - 127) 1640 * struct ktermios * termio : termio structure pointer 1641 * speed_t baud : baud rate 1642 * 1643 * return: -1 : this port is invalid or termio == NULL 1644 * 0 : setting O.K. 1645 * 1646 * 1647 * Function 13: Get the DTR/RTS state of this port. 1648 * Syntax: 1649 * int MoxaPortGetLineOut(int port, bool *dtrState, bool *rtsState); 1650 * int port : port number (0 - 127) 1651 * bool * dtr_active : pointer to bool to receive the current DTR 1652 * state. (if NULL, this function will not 1653 * write to this address) 1654 * bool * rts_active : pointer to bool to receive the current RTS 1655 * state. (if NULL, this function will not 1656 * write to this address) 1657 * 1658 * return: -1 : this port is invalid 1659 * 0 : O.K. 1660 * 1661 * 1662 * Function 14: Setting the DTR/RTS output state of this port. 1663 * Syntax: 1664 * void MoxaPortLineCtrl(int port, bool dtrState, bool rtsState); 1665 * int port : port number (0 - 127) 1666 * bool dtr_active : DTR output state 1667 * bool rts_active : RTS output state 1668 * 1669 * 1670 * Function 15: Setting the flow control of this port. 1671 * Syntax: 1672 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow, 1673 * int txFlow,int xany); 1674 * int port : port number (0 - 127) 1675 * int rtsFlow : H/W RTS flow control (0: no, 1: yes) 1676 * int ctsFlow : H/W CTS flow control (0: no, 1: yes) 1677 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes) 1678 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes) 1679 * int xany : S/W XANY flow control (0: no, 1: yes) 1680 * 1681 * 1682 * Function 16: Get ths line status of this port 1683 * Syntax: 1684 * int MoxaPortLineStatus(int port); 1685 * int port : port number (0 - 127) 1686 * 1687 * return: Bit 0 - CTS state (0: off, 1: on) 1688 * Bit 1 - DSR state (0: off, 1: on) 1689 * Bit 2 - DCD state (0: off, 1: on) 1690 * 1691 * 1692 * Function 19: Flush the Rx/Tx buffer data of this port. 1693 * Syntax: 1694 * void MoxaPortFlushData(int port, int mode); 1695 * int port : port number (0 - 127) 1696 * int mode 1697 * 0 : flush the Rx buffer 1698 * 1 : flush the Tx buffer 1699 * 2 : flush the Rx and Tx buffer 1700 * 1701 * 1702 * Function 20: Write data. 1703 * Syntax: 1704 * ssize_t MoxaPortWriteData(int port, u8 *buffer, size_t length); 1705 * int port : port number (0 - 127) 1706 * u8 *buffer : pointer to write data buffer. 1707 * size_t length : write data length 1708 * 1709 * return: 0 - length : real write data length 1710 * 1711 * 1712 * Function 21: Read data. 1713 * Syntax: 1714 * int MoxaPortReadData(int port, struct tty_struct *tty); 1715 * int port : port number (0 - 127) 1716 * struct tty_struct *tty : tty for data 1717 * 1718 * return: 0 - length : real read data length 1719 * 1720 * 1721 * Function 24: Get the Tx buffer current queued data bytes 1722 * Syntax: 1723 * int MoxaPortTxQueue(int port); 1724 * int port : port number (0 - 127) 1725 * 1726 * return: .. : Tx buffer current queued data bytes 1727 * 1728 * 1729 * Function 25: Get the Tx buffer current free space 1730 * Syntax: 1731 * int MoxaPortTxFree(int port); 1732 * int port : port number (0 - 127) 1733 * 1734 * return: .. : Tx buffer current free space 1735 * 1736 * 1737 * Function 26: Get the Rx buffer current queued data bytes 1738 * Syntax: 1739 * int MoxaPortRxQueue(int port); 1740 * int port : port number (0 - 127) 1741 * 1742 * return: .. : Rx buffer current queued data bytes 1743 * 1744 * 1745 * Function 28: Disable port data transmission. 1746 * Syntax: 1747 * void MoxaPortTxDisable(int port); 1748 * int port : port number (0 - 127) 1749 * 1750 * 1751 * Function 29: Enable port data transmission. 1752 * Syntax: 1753 * void MoxaPortTxEnable(int port); 1754 * int port : port number (0 - 127) 1755 * 1756 * 1757 * Function 31: Get the received BREAK signal count and reset it. 1758 * Syntax: 1759 * int MoxaPortResetBrkCnt(int port); 1760 * int port : port number (0 - 127) 1761 * 1762 * return: 0 - .. : BREAK signal count 1763 * 1764 * 1765 */ 1766 1767 static void MoxaPortEnable(struct moxa_port *port) 1768 { 1769 void __iomem *ofsAddr; 1770 u16 lowwater = 512; 1771 1772 ofsAddr = port->tableAddr; 1773 writew(lowwater, ofsAddr + Low_water); 1774 if (MOXA_IS_320(port->board)) 1775 moxafunc(ofsAddr, FC_SetBreakIrq, 0); 1776 else 1777 writew(readw(ofsAddr + HostStat) | WakeupBreak, 1778 ofsAddr + HostStat); 1779 1780 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code); 1781 moxafunc(ofsAddr, FC_FlushQueue, 2); 1782 1783 moxafunc(ofsAddr, FC_EnableCH, Magic_code); 1784 MoxaPortLineStatus(port); 1785 } 1786 1787 static void MoxaPortDisable(struct moxa_port *port) 1788 { 1789 void __iomem *ofsAddr = port->tableAddr; 1790 1791 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */ 1792 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code); 1793 writew(0, ofsAddr + HostStat); 1794 moxafunc(ofsAddr, FC_DisableCH, Magic_code); 1795 } 1796 1797 static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud) 1798 { 1799 void __iomem *ofsAddr = port->tableAddr; 1800 unsigned int clock, val; 1801 speed_t max; 1802 1803 max = MOXA_IS_320(port->board) ? 460800 : 921600; 1804 if (baud < 50) 1805 return 0; 1806 if (baud > max) 1807 baud = max; 1808 clock = 921600; 1809 val = clock / baud; 1810 moxafunc(ofsAddr, FC_SetBaud, val); 1811 baud = clock / val; 1812 return baud; 1813 } 1814 1815 static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio, 1816 speed_t baud) 1817 { 1818 void __iomem *ofsAddr; 1819 tcflag_t mode = 0; 1820 1821 ofsAddr = port->tableAddr; 1822 1823 mode = termio->c_cflag & CSIZE; 1824 if (mode == CS5) 1825 mode = MX_CS5; 1826 else if (mode == CS6) 1827 mode = MX_CS6; 1828 else if (mode == CS7) 1829 mode = MX_CS7; 1830 else if (mode == CS8) 1831 mode = MX_CS8; 1832 1833 if (termio->c_cflag & CSTOPB) { 1834 if (mode == MX_CS5) 1835 mode |= MX_STOP15; 1836 else 1837 mode |= MX_STOP2; 1838 } else 1839 mode |= MX_STOP1; 1840 1841 if (termio->c_cflag & PARENB) { 1842 if (termio->c_cflag & PARODD) { 1843 if (termio->c_cflag & CMSPAR) 1844 mode |= MX_PARMARK; 1845 else 1846 mode |= MX_PARODD; 1847 } else { 1848 if (termio->c_cflag & CMSPAR) 1849 mode |= MX_PARSPACE; 1850 else 1851 mode |= MX_PAREVEN; 1852 } 1853 } else 1854 mode |= MX_PARNONE; 1855 1856 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode); 1857 1858 if (MOXA_IS_320(port->board) && baud >= 921600) 1859 return -1; 1860 1861 baud = MoxaPortSetBaud(port, baud); 1862 1863 if (termio->c_iflag & (IXON | IXOFF | IXANY)) { 1864 spin_lock_irq(&moxafunc_lock); 1865 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg); 1866 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1); 1867 writeb(FC_SetXonXoff, ofsAddr + FuncCode); 1868 moxa_wait_finish(ofsAddr); 1869 spin_unlock_irq(&moxafunc_lock); 1870 1871 } 1872 return baud; 1873 } 1874 1875 static int MoxaPortGetLineOut(struct moxa_port *port, bool *dtr_active, 1876 bool *rts_active) 1877 { 1878 if (dtr_active) 1879 *dtr_active = port->lineCtrl & DTR_ON; 1880 if (rts_active) 1881 *rts_active = port->lineCtrl & RTS_ON; 1882 1883 return 0; 1884 } 1885 1886 static void MoxaPortLineCtrl(struct moxa_port *port, bool dtr_active, bool rts_active) 1887 { 1888 u8 mode = 0; 1889 1890 if (dtr_active) 1891 mode |= DTR_ON; 1892 if (rts_active) 1893 mode |= RTS_ON; 1894 port->lineCtrl = mode; 1895 moxafunc(port->tableAddr, FC_LineControl, mode); 1896 } 1897 1898 static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts, 1899 int txflow, int rxflow, int txany) 1900 { 1901 int mode = 0; 1902 1903 if (rts) 1904 mode |= RTS_FlowCtl; 1905 if (cts) 1906 mode |= CTS_FlowCtl; 1907 if (txflow) 1908 mode |= Tx_FlowCtl; 1909 if (rxflow) 1910 mode |= Rx_FlowCtl; 1911 if (txany) 1912 mode |= IXM_IXANY; 1913 moxafunc(port->tableAddr, FC_SetFlowCtl, mode); 1914 } 1915 1916 static int MoxaPortLineStatus(struct moxa_port *port) 1917 { 1918 void __iomem *ofsAddr; 1919 int val; 1920 1921 ofsAddr = port->tableAddr; 1922 if (MOXA_IS_320(port->board)) 1923 val = moxafuncret(ofsAddr, FC_LineStatus, 0); 1924 else 1925 val = readw(ofsAddr + FlagStat) >> 4; 1926 val &= 0x0B; 1927 if (val & 8) 1928 val |= 4; 1929 moxa_new_dcdstate(port, val & 8); 1930 val &= 7; 1931 return val; 1932 } 1933 1934 static ssize_t MoxaPortWriteData(struct tty_struct *tty, const u8 *buffer, 1935 size_t len) 1936 { 1937 struct moxa_port *port = tty->driver_data; 1938 void __iomem *baseAddr, *ofsAddr, *ofs; 1939 size_t c, total; 1940 u16 head, tail, tx_mask, spage, epage; 1941 u16 pageno, pageofs, bufhead; 1942 1943 ofsAddr = port->tableAddr; 1944 baseAddr = port->board->basemem; 1945 tx_mask = readw(ofsAddr + TX_mask); 1946 spage = readw(ofsAddr + Page_txb); 1947 epage = readw(ofsAddr + EndPage_txb); 1948 tail = readw(ofsAddr + TXwptr); 1949 head = readw(ofsAddr + TXrptr); 1950 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask); 1951 if (c > len) 1952 c = len; 1953 total = c; 1954 if (spage == epage) { 1955 bufhead = readw(ofsAddr + Ofs_txb); 1956 writew(spage, baseAddr + Control_reg); 1957 while (c > 0) { 1958 if (head > tail) 1959 len = head - tail - 1; 1960 else 1961 len = tx_mask + 1 - tail; 1962 len = (c > len) ? len : c; 1963 ofs = baseAddr + DynPage_addr + bufhead + tail; 1964 memcpy_toio(ofs, buffer, len); 1965 buffer += len; 1966 tail = (tail + len) & tx_mask; 1967 c -= len; 1968 } 1969 } else { 1970 pageno = spage + (tail >> 13); 1971 pageofs = tail & Page_mask; 1972 while (c > 0) { 1973 len = Page_size - pageofs; 1974 if (len > c) 1975 len = c; 1976 writeb(pageno, baseAddr + Control_reg); 1977 ofs = baseAddr + DynPage_addr + pageofs; 1978 memcpy_toio(ofs, buffer, len); 1979 buffer += len; 1980 if (++pageno == epage) 1981 pageno = spage; 1982 pageofs = 0; 1983 c -= len; 1984 } 1985 tail = (tail + total) & tx_mask; 1986 } 1987 writew(tail, ofsAddr + TXwptr); 1988 writeb(1, ofsAddr + CD180TXirq); /* start to send */ 1989 return total; 1990 } 1991 1992 static int MoxaPortReadData(struct moxa_port *port) 1993 { 1994 void __iomem *baseAddr, *ofsAddr, *ofs; 1995 u8 *dst; 1996 unsigned int count, len, total; 1997 u16 tail, rx_mask, spage, epage; 1998 u16 pageno, pageofs, bufhead, head; 1999 2000 ofsAddr = port->tableAddr; 2001 baseAddr = port->board->basemem; 2002 head = readw(ofsAddr + RXrptr); 2003 tail = readw(ofsAddr + RXwptr); 2004 rx_mask = readw(ofsAddr + RX_mask); 2005 spage = readw(ofsAddr + Page_rxb); 2006 epage = readw(ofsAddr + EndPage_rxb); 2007 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1); 2008 if (count == 0) 2009 return 0; 2010 2011 total = count; 2012 if (spage == epage) { 2013 bufhead = readw(ofsAddr + Ofs_rxb); 2014 writew(spage, baseAddr + Control_reg); 2015 while (count > 0) { 2016 ofs = baseAddr + DynPage_addr + bufhead + head; 2017 len = (tail >= head) ? (tail - head) : 2018 (rx_mask + 1 - head); 2019 len = tty_prepare_flip_string(&port->port, &dst, 2020 min(len, count)); 2021 memcpy_fromio(dst, ofs, len); 2022 head = (head + len) & rx_mask; 2023 count -= len; 2024 } 2025 } else { 2026 pageno = spage + (head >> 13); 2027 pageofs = head & Page_mask; 2028 while (count > 0) { 2029 writew(pageno, baseAddr + Control_reg); 2030 ofs = baseAddr + DynPage_addr + pageofs; 2031 len = tty_prepare_flip_string(&port->port, &dst, 2032 min(Page_size - pageofs, count)); 2033 memcpy_fromio(dst, ofs, len); 2034 2035 count -= len; 2036 pageofs = (pageofs + len) & Page_mask; 2037 if (pageofs == 0 && ++pageno == epage) 2038 pageno = spage; 2039 } 2040 head = (head + total) & rx_mask; 2041 } 2042 writew(head, ofsAddr + RXrptr); 2043 if (readb(ofsAddr + FlagStat) & Xoff_state) { 2044 moxaLowWaterChk = 1; 2045 port->lowChkFlag = 1; 2046 } 2047 return total; 2048 } 2049 2050 2051 static unsigned int MoxaPortTxQueue(struct moxa_port *port) 2052 { 2053 void __iomem *ofsAddr = port->tableAddr; 2054 u16 rptr, wptr, mask; 2055 2056 rptr = readw(ofsAddr + TXrptr); 2057 wptr = readw(ofsAddr + TXwptr); 2058 mask = readw(ofsAddr + TX_mask); 2059 return (wptr - rptr) & mask; 2060 } 2061 2062 static unsigned int MoxaPortTxFree(struct moxa_port *port) 2063 { 2064 void __iomem *ofsAddr = port->tableAddr; 2065 u16 rptr, wptr, mask; 2066 2067 rptr = readw(ofsAddr + TXrptr); 2068 wptr = readw(ofsAddr + TXwptr); 2069 mask = readw(ofsAddr + TX_mask); 2070 return mask - ((wptr - rptr) & mask); 2071 } 2072 2073 static int MoxaPortRxQueue(struct moxa_port *port) 2074 { 2075 void __iomem *ofsAddr = port->tableAddr; 2076 u16 rptr, wptr, mask; 2077 2078 rptr = readw(ofsAddr + RXrptr); 2079 wptr = readw(ofsAddr + RXwptr); 2080 mask = readw(ofsAddr + RX_mask); 2081 return (wptr - rptr) & mask; 2082 } 2083 2084 static void MoxaPortTxDisable(struct moxa_port *port) 2085 { 2086 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code); 2087 } 2088 2089 static void MoxaPortTxEnable(struct moxa_port *port) 2090 { 2091 moxafunc(port->tableAddr, FC_SetXonState, Magic_code); 2092 } 2093 2094 static int moxa_get_serial_info(struct tty_struct *tty, 2095 struct serial_struct *ss) 2096 { 2097 struct moxa_port *info = tty->driver_data; 2098 2099 if (!info) 2100 return -ENODEV; 2101 mutex_lock(&info->port.mutex); 2102 ss->type = info->type; 2103 ss->line = info->port.tty->index; 2104 ss->flags = info->port.flags; 2105 ss->baud_base = 921600; 2106 ss->close_delay = jiffies_to_msecs(info->port.close_delay) / 10; 2107 mutex_unlock(&info->port.mutex); 2108 return 0; 2109 } 2110 2111 2112 static int moxa_set_serial_info(struct tty_struct *tty, 2113 struct serial_struct *ss) 2114 { 2115 struct moxa_port *info = tty->driver_data; 2116 unsigned int close_delay; 2117 2118 if (!info) 2119 return -ENODEV; 2120 2121 close_delay = msecs_to_jiffies(ss->close_delay * 10); 2122 2123 mutex_lock(&info->port.mutex); 2124 if (!capable(CAP_SYS_ADMIN)) { 2125 if (close_delay != info->port.close_delay || 2126 ss->type != info->type || 2127 ((ss->flags & ~ASYNC_USR_MASK) != 2128 (info->port.flags & ~ASYNC_USR_MASK))) { 2129 mutex_unlock(&info->port.mutex); 2130 return -EPERM; 2131 } 2132 } else { 2133 info->port.close_delay = close_delay; 2134 2135 MoxaSetFifo(info, ss->type == PORT_16550A); 2136 2137 info->type = ss->type; 2138 } 2139 mutex_unlock(&info->port.mutex); 2140 return 0; 2141 } 2142 2143 2144 2145 /***************************************************************************** 2146 * Static local functions: * 2147 *****************************************************************************/ 2148 2149 static void MoxaSetFifo(struct moxa_port *port, int enable) 2150 { 2151 void __iomem *ofsAddr = port->tableAddr; 2152 2153 if (!enable) { 2154 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0); 2155 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1); 2156 } else { 2157 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3); 2158 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16); 2159 } 2160 } 2161