1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Thunderbolt driver - Tunneling support 4 * 5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com> 6 * Copyright (C) 2019, Intel Corporation 7 */ 8 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/list.h> 12 #include <linux/ktime.h> 13 #include <linux/string_helpers.h> 14 15 #include "tunnel.h" 16 #include "tb.h" 17 18 /* PCIe adapters use always HopID of 8 for both directions */ 19 #define TB_PCI_HOPID 8 20 21 #define TB_PCI_PATH_DOWN 0 22 #define TB_PCI_PATH_UP 1 23 24 #define TB_PCI_PRIORITY 3 25 #define TB_PCI_WEIGHT 1 26 27 /* USB3 adapters use always HopID of 8 for both directions */ 28 #define TB_USB3_HOPID 8 29 30 #define TB_USB3_PATH_DOWN 0 31 #define TB_USB3_PATH_UP 1 32 33 #define TB_USB3_PRIORITY 3 34 #define TB_USB3_WEIGHT 2 35 36 /* DP adapters use HopID 8 for AUX and 9 for Video */ 37 #define TB_DP_AUX_TX_HOPID 8 38 #define TB_DP_AUX_RX_HOPID 8 39 #define TB_DP_VIDEO_HOPID 9 40 41 #define TB_DP_VIDEO_PATH_OUT 0 42 #define TB_DP_AUX_PATH_OUT 1 43 #define TB_DP_AUX_PATH_IN 2 44 45 #define TB_DP_VIDEO_PRIORITY 1 46 #define TB_DP_VIDEO_WEIGHT 1 47 48 #define TB_DP_AUX_PRIORITY 2 49 #define TB_DP_AUX_WEIGHT 1 50 51 /* Minimum number of credits needed for PCIe path */ 52 #define TB_MIN_PCIE_CREDITS 6U 53 /* 54 * Number of credits we try to allocate for each DMA path if not limited 55 * by the host router baMaxHI. 56 */ 57 #define TB_DMA_CREDITS 14 58 /* Minimum number of credits for DMA path */ 59 #define TB_MIN_DMA_CREDITS 1 60 61 #define TB_DMA_PRIORITY 5 62 #define TB_DMA_WEIGHT 1 63 64 /* 65 * Reserve additional bandwidth for USB 3.x and PCIe bulk traffic 66 * according to USB4 v2 Connection Manager guide. This ends up reserving 67 * 1500 Mb/s for PCIe and 3000 Mb/s for USB 3.x taking weights into 68 * account. 69 */ 70 #define USB4_V2_PCI_MIN_BANDWIDTH (1500 * TB_PCI_WEIGHT) 71 #define USB4_V2_USB3_MIN_BANDWIDTH (1500 * TB_USB3_WEIGHT) 72 73 /* 74 * According to VESA spec, the DPRX negotiation shall compete in 5 75 * seconds after tunnel is established. Since at least i915 can runtime 76 * suspend if there is nothing connected, and that it polls any new 77 * connections every 10 seconds, we use 12 seconds here. 78 * 79 * These are in ms. 80 */ 81 #define TB_DPRX_TIMEOUT 12000 82 #define TB_DPRX_WAIT_TIMEOUT 25 83 #define TB_DPRX_POLL_DELAY 50 84 85 static int dprx_timeout = TB_DPRX_TIMEOUT; 86 module_param(dprx_timeout, int, 0444); 87 MODULE_PARM_DESC(dprx_timeout, 88 "DPRX capability read timeout in ms, -1 waits forever (default: " 89 __MODULE_STRING(TB_DPRX_TIMEOUT) ")"); 90 91 static unsigned int dma_credits = TB_DMA_CREDITS; 92 module_param(dma_credits, uint, 0444); 93 MODULE_PARM_DESC(dma_credits, "specify custom credits for DMA tunnels (default: " 94 __MODULE_STRING(TB_DMA_CREDITS) ")"); 95 96 static bool bw_alloc_mode = true; 97 module_param(bw_alloc_mode, bool, 0444); 98 MODULE_PARM_DESC(bw_alloc_mode, 99 "enable bandwidth allocation mode if supported (default: true)"); 100 101 static const char * const tb_tunnel_names[] = { "PCI", "DP", "DMA", "USB3" }; 102 103 static const char * const tb_event_names[] = { 104 [TB_TUNNEL_ACTIVATED] = "activated", 105 [TB_TUNNEL_CHANGED] = "changed", 106 [TB_TUNNEL_DEACTIVATED] = "deactivated", 107 [TB_TUNNEL_LOW_BANDWIDTH] = "low bandwidth", 108 [TB_TUNNEL_NO_BANDWIDTH] = "insufficient bandwidth", 109 }; 110 111 /* Synchronizes kref_get()/put() of struct tb_tunnel */ 112 static DEFINE_MUTEX(tb_tunnel_lock); 113 114 static inline unsigned int tb_usable_credits(const struct tb_port *port) 115 { 116 return port->total_credits - port->ctl_credits; 117 } 118 119 /** 120 * tb_available_credits() - Available credits for PCIe and DMA 121 * @port: Lane adapter to check 122 * @max_dp_streams: If non-%NULL stores maximum number of simultaneous DP 123 * streams possible through this lane adapter 124 * 125 * Return: Number of available credits. 126 */ 127 static unsigned int tb_available_credits(const struct tb_port *port, 128 size_t *max_dp_streams) 129 { 130 const struct tb_switch *sw = port->sw; 131 int credits, usb3, pcie, spare; 132 size_t ndp; 133 134 usb3 = tb_acpi_may_tunnel_usb3() ? sw->max_usb3_credits : 0; 135 pcie = tb_acpi_may_tunnel_pcie() ? sw->max_pcie_credits : 0; 136 137 if (tb_acpi_is_xdomain_allowed()) { 138 spare = min_not_zero(sw->max_dma_credits, dma_credits); 139 /* Add some credits for potential second DMA tunnel */ 140 spare += TB_MIN_DMA_CREDITS; 141 } else { 142 spare = 0; 143 } 144 145 credits = tb_usable_credits(port); 146 if (tb_acpi_may_tunnel_dp()) { 147 /* 148 * Maximum number of DP streams possible through the 149 * lane adapter. 150 */ 151 if (sw->min_dp_aux_credits + sw->min_dp_main_credits) 152 ndp = (credits - (usb3 + pcie + spare)) / 153 (sw->min_dp_aux_credits + sw->min_dp_main_credits); 154 else 155 ndp = 0; 156 } else { 157 ndp = 0; 158 } 159 credits -= ndp * (sw->min_dp_aux_credits + sw->min_dp_main_credits); 160 credits -= usb3; 161 162 if (max_dp_streams) 163 *max_dp_streams = ndp; 164 165 return credits > 0 ? credits : 0; 166 } 167 168 static void tb_init_pm_support(struct tb_path_hop *hop) 169 { 170 struct tb_port *out_port = hop->out_port; 171 struct tb_port *in_port = hop->in_port; 172 173 if (tb_port_is_null(in_port) && tb_port_is_null(out_port) && 174 usb4_switch_version(in_port->sw) >= 2) 175 hop->pm_support = true; 176 } 177 178 static struct tb_tunnel *tb_tunnel_alloc(struct tb *tb, size_t npaths, 179 enum tb_tunnel_type type) 180 { 181 struct tb_tunnel *tunnel; 182 183 tunnel = kzalloc_flex(*tunnel, paths, npaths); 184 if (!tunnel) 185 return NULL; 186 187 tunnel->npaths = npaths; 188 189 INIT_LIST_HEAD(&tunnel->list); 190 tunnel->tb = tb; 191 tunnel->type = type; 192 kref_init(&tunnel->kref); 193 194 return tunnel; 195 } 196 197 static void tb_tunnel_get(struct tb_tunnel *tunnel) 198 { 199 mutex_lock(&tb_tunnel_lock); 200 kref_get(&tunnel->kref); 201 mutex_unlock(&tb_tunnel_lock); 202 } 203 204 static void tb_tunnel_destroy(struct kref *kref) 205 { 206 struct tb_tunnel *tunnel = container_of(kref, typeof(*tunnel), kref); 207 int i; 208 209 if (tunnel->destroy) 210 tunnel->destroy(tunnel); 211 212 for (i = 0; i < tunnel->npaths; i++) { 213 if (tunnel->paths[i]) 214 tb_path_free(tunnel->paths[i]); 215 } 216 217 kfree(tunnel); 218 } 219 220 void tb_tunnel_put(struct tb_tunnel *tunnel) 221 { 222 mutex_lock(&tb_tunnel_lock); 223 kref_put(&tunnel->kref, tb_tunnel_destroy); 224 mutex_unlock(&tb_tunnel_lock); 225 } 226 227 /** 228 * tb_tunnel_event() - Notify userspace about tunneling event 229 * @tb: Domain where the event occurred 230 * @event: Event that happened 231 * @type: Type of the tunnel in question 232 * @src_port: Tunnel source port (can be %NULL) 233 * @dst_port: Tunnel destination port (can be %NULL) 234 * 235 * Notifies userspace about tunneling @event in the domain. The tunnel 236 * does not need to exist (e.g the tunnel was not activated because 237 * there is not enough bandwidth). If the @src_port and @dst_port are 238 * given fill in full %TUNNEL_DETAILS environment variable. Otherwise 239 * uses the shorter one (just the tunnel type). 240 */ 241 void tb_tunnel_event(struct tb *tb, enum tb_tunnel_event event, 242 enum tb_tunnel_type type, 243 const struct tb_port *src_port, 244 const struct tb_port *dst_port) 245 { 246 char *envp[3] = { NULL }; 247 248 if (WARN_ON_ONCE(event >= ARRAY_SIZE(tb_event_names))) 249 return; 250 if (WARN_ON_ONCE(type >= ARRAY_SIZE(tb_tunnel_names))) 251 return; 252 253 envp[0] = kasprintf(GFP_KERNEL, "TUNNEL_EVENT=%s", tb_event_names[event]); 254 if (!envp[0]) 255 return; 256 257 if (src_port != NULL && dst_port != NULL) { 258 envp[1] = kasprintf(GFP_KERNEL, "TUNNEL_DETAILS=%llx:%u <-> %llx:%u (%s)", 259 tb_route(src_port->sw), src_port->port, 260 tb_route(dst_port->sw), dst_port->port, 261 tb_tunnel_names[type]); 262 } else { 263 envp[1] = kasprintf(GFP_KERNEL, "TUNNEL_DETAILS=(%s)", 264 tb_tunnel_names[type]); 265 } 266 267 if (envp[1]) 268 tb_domain_event(tb, envp); 269 270 kfree(envp[1]); 271 kfree(envp[0]); 272 } 273 274 static inline void tb_tunnel_set_active(struct tb_tunnel *tunnel, bool active) 275 { 276 if (active) { 277 tunnel->state = TB_TUNNEL_ACTIVE; 278 tb_tunnel_event(tunnel->tb, TB_TUNNEL_ACTIVATED, tunnel->type, 279 tunnel->src_port, tunnel->dst_port); 280 } else { 281 tunnel->state = TB_TUNNEL_INACTIVE; 282 tb_tunnel_event(tunnel->tb, TB_TUNNEL_DEACTIVATED, tunnel->type, 283 tunnel->src_port, tunnel->dst_port); 284 } 285 } 286 287 static inline void tb_tunnel_changed(struct tb_tunnel *tunnel) 288 { 289 tb_tunnel_event(tunnel->tb, TB_TUNNEL_CHANGED, tunnel->type, 290 tunnel->src_port, tunnel->dst_port); 291 } 292 293 static int tb_pci_port_ltssm_state_detect(struct tb_port *port) 294 { 295 ktime_t timeout = ktime_add_ms(ktime_get(), 500); 296 297 do { 298 int ret; 299 300 ret = usb4_pci_port_ltssm_state(port); 301 if (ret < 0) 302 return ret; 303 if (ret == USB4_PCIE_LTSSM_DETECT) 304 return 0; 305 306 fsleep(50); 307 } while (ktime_before(ktime_get(), timeout)); 308 309 return -ETIMEDOUT; 310 } 311 312 static int tb_pci_pre_activate(struct tb_tunnel *tunnel) 313 { 314 struct tb_port *down = tunnel->src_port; 315 struct tb_port *up = tunnel->dst_port; 316 int ret; 317 318 ret = tb_switch_is_usb4(down->sw) ? 319 tb_pci_port_ltssm_state_detect(down) : 0; 320 if (ret) 321 return ret; 322 323 return tb_switch_is_usb4(up->sw) ? 324 tb_pci_port_ltssm_state_detect(up) : 0; 325 } 326 327 static int tb_pci_set_ext_encapsulation(struct tb_tunnel *tunnel, bool enable) 328 { 329 struct tb_port *port = tb_upstream_port(tunnel->dst_port->sw); 330 int ret; 331 332 /* Only supported if both routers are at least USB4 v2 */ 333 if ((usb4_switch_version(tunnel->src_port->sw) < 2) || 334 (usb4_switch_version(tunnel->dst_port->sw) < 2)) 335 return 0; 336 337 if (enable && tb_port_get_link_generation(port) < 4) 338 return 0; 339 340 ret = usb4_pci_port_set_ext_encapsulation(tunnel->src_port, enable); 341 if (ret) 342 return ret; 343 344 /* 345 * Downstream router could be unplugged so disable of encapsulation 346 * in upstream router is still possible. 347 */ 348 ret = usb4_pci_port_set_ext_encapsulation(tunnel->dst_port, enable); 349 if (ret) { 350 if (enable) 351 return ret; 352 if (ret != -ENODEV) 353 return ret; 354 } 355 356 tb_tunnel_dbg(tunnel, "extended encapsulation %s\n", 357 str_enabled_disabled(enable)); 358 return 0; 359 } 360 361 static int tb_pci_activate(struct tb_tunnel *tunnel, bool activate) 362 { 363 int res; 364 365 if (activate) { 366 res = tb_pci_set_ext_encapsulation(tunnel, activate); 367 if (res) 368 return res; 369 } 370 371 if (activate) 372 res = tb_pci_port_enable(tunnel->dst_port, activate); 373 else 374 res = tb_pci_port_enable(tunnel->src_port, activate); 375 if (res) 376 return res; 377 378 379 if (activate) { 380 res = tb_pci_port_enable(tunnel->src_port, activate); 381 if (res) 382 return res; 383 } else { 384 /* Downstream router could be unplugged */ 385 tb_pci_port_enable(tunnel->dst_port, activate); 386 } 387 388 return activate ? 0 : tb_pci_set_ext_encapsulation(tunnel, activate); 389 } 390 391 static int tb_pci_init_credits(struct tb_path_hop *hop) 392 { 393 struct tb_port *port = hop->in_port; 394 struct tb_switch *sw = port->sw; 395 unsigned int credits; 396 397 if (tb_port_use_credit_allocation(port)) { 398 unsigned int available; 399 400 available = tb_available_credits(port, NULL); 401 credits = min(sw->max_pcie_credits, available); 402 403 if (credits < TB_MIN_PCIE_CREDITS) 404 return -ENOSPC; 405 406 credits = max(TB_MIN_PCIE_CREDITS, credits); 407 } else { 408 if (tb_port_is_null(port)) 409 credits = port->bonded ? 32 : 16; 410 else 411 credits = 7; 412 } 413 414 hop->initial_credits = credits; 415 return 0; 416 } 417 418 static int tb_pci_init_path(struct tb_path *path) 419 { 420 struct tb_path_hop *hop; 421 422 path->egress_fc_enable = TB_PATH_SOURCE | TB_PATH_INTERNAL; 423 path->egress_shared_buffer = TB_PATH_NONE; 424 path->ingress_fc_enable = TB_PATH_ALL; 425 path->ingress_shared_buffer = TB_PATH_NONE; 426 path->priority = TB_PCI_PRIORITY; 427 path->weight = TB_PCI_WEIGHT; 428 path->drop_packages = 0; 429 430 tb_path_for_each_hop(path, hop) { 431 int ret; 432 433 ret = tb_pci_init_credits(hop); 434 if (ret) 435 return ret; 436 } 437 438 return 0; 439 } 440 441 /** 442 * tb_tunnel_discover_pci() - Discover existing PCIe tunnels 443 * @tb: Pointer to the domain structure 444 * @down: PCIe downstream adapter 445 * @alloc_hopid: Allocate HopIDs from visited ports 446 * 447 * If @down adapter is active, follows the tunnel to the PCIe upstream 448 * adapter and back. 449 * 450 * Return: Pointer to &struct tb_tunnel or %NULL if there was no tunnel. 451 */ 452 struct tb_tunnel *tb_tunnel_discover_pci(struct tb *tb, struct tb_port *down, 453 bool alloc_hopid) 454 { 455 struct tb_tunnel *tunnel; 456 struct tb_path *path; 457 458 if (!tb_pci_port_is_enabled(down)) 459 return NULL; 460 461 tunnel = tb_tunnel_alloc(tb, 2, TB_TUNNEL_PCI); 462 if (!tunnel) 463 return NULL; 464 465 tunnel->activate = tb_pci_activate; 466 tunnel->src_port = down; 467 468 /* 469 * Discover both paths even if they are not complete. We will 470 * clean them up by calling tb_tunnel_deactivate() below in that 471 * case. 472 */ 473 path = tb_path_discover(down, TB_PCI_HOPID, NULL, -1, 474 &tunnel->dst_port, "PCIe Up", alloc_hopid); 475 if (!path) { 476 /* Just disable the downstream port */ 477 tb_pci_port_enable(down, false); 478 goto err_free; 479 } 480 tunnel->paths[TB_PCI_PATH_UP] = path; 481 if (tb_pci_init_path(tunnel->paths[TB_PCI_PATH_UP])) 482 goto err_free; 483 484 path = tb_path_discover(tunnel->dst_port, -1, down, TB_PCI_HOPID, NULL, 485 "PCIe Down", alloc_hopid); 486 if (!path) 487 goto err_deactivate; 488 tunnel->paths[TB_PCI_PATH_DOWN] = path; 489 if (tb_pci_init_path(tunnel->paths[TB_PCI_PATH_DOWN])) 490 goto err_deactivate; 491 492 /* Validate that the tunnel is complete */ 493 if (!tb_port_is_pcie_up(tunnel->dst_port)) { 494 tb_port_warn(tunnel->dst_port, 495 "path does not end on a PCIe adapter, cleaning up\n"); 496 goto err_deactivate; 497 } 498 499 if (down != tunnel->src_port) { 500 tb_tunnel_warn(tunnel, "path is not complete, cleaning up\n"); 501 goto err_deactivate; 502 } 503 504 if (!tb_pci_port_is_enabled(tunnel->dst_port)) { 505 tb_tunnel_warn(tunnel, 506 "tunnel is not fully activated, cleaning up\n"); 507 goto err_deactivate; 508 } 509 510 tb_tunnel_dbg(tunnel, "discovered\n"); 511 return tunnel; 512 513 err_deactivate: 514 tb_tunnel_deactivate(tunnel); 515 err_free: 516 tb_tunnel_put(tunnel); 517 518 return NULL; 519 } 520 521 /** 522 * tb_tunnel_alloc_pci() - allocate a pci tunnel 523 * @tb: Pointer to the domain structure 524 * @up: PCIe upstream adapter port 525 * @down: PCIe downstream adapter port 526 * 527 * Allocate a PCI tunnel. The ports must be of type TB_TYPE_PCIE_UP and 528 * TB_TYPE_PCIE_DOWN. 529 * 530 * Return: Pointer to @struct tb_tunnel or %NULL on failure. 531 */ 532 struct tb_tunnel *tb_tunnel_alloc_pci(struct tb *tb, struct tb_port *up, 533 struct tb_port *down) 534 { 535 struct tb_tunnel *tunnel; 536 struct tb_path *path; 537 538 tunnel = tb_tunnel_alloc(tb, 2, TB_TUNNEL_PCI); 539 if (!tunnel) 540 return NULL; 541 542 tunnel->pre_activate = tb_pci_pre_activate; 543 tunnel->activate = tb_pci_activate; 544 tunnel->src_port = down; 545 tunnel->dst_port = up; 546 547 path = tb_path_alloc(tb, down, TB_PCI_HOPID, up, TB_PCI_HOPID, 0, 548 "PCIe Down"); 549 if (!path) 550 goto err_free; 551 tunnel->paths[TB_PCI_PATH_DOWN] = path; 552 if (tb_pci_init_path(path)) 553 goto err_free; 554 555 path = tb_path_alloc(tb, up, TB_PCI_HOPID, down, TB_PCI_HOPID, 0, 556 "PCIe Up"); 557 if (!path) 558 goto err_free; 559 tunnel->paths[TB_PCI_PATH_UP] = path; 560 if (tb_pci_init_path(path)) 561 goto err_free; 562 563 return tunnel; 564 565 err_free: 566 tb_tunnel_put(tunnel); 567 return NULL; 568 } 569 570 /** 571 * tb_tunnel_reserved_pci() - Amount of bandwidth to reserve for PCIe 572 * @port: Lane 0 adapter 573 * @reserved_up: Upstream bandwidth in Mb/s to reserve 574 * @reserved_down: Downstream bandwidth in Mb/s to reserve 575 * 576 * Can be called to any connected lane 0 adapter to find out how much 577 * bandwidth needs to be left in reserve for possible PCIe bulk traffic. 578 * 579 * Return: 580 * * %true - If there is something to be reserved. Writes the amount to 581 * @reserved_down/@reserved_up. 582 * * %false - Nothing to be reserved. Leaves @reserved_down/@reserved_up 583 * unmodified. 584 */ 585 bool tb_tunnel_reserved_pci(struct tb_port *port, int *reserved_up, 586 int *reserved_down) 587 { 588 if (WARN_ON_ONCE(!port->remote)) 589 return false; 590 591 if (!tb_acpi_may_tunnel_pcie()) 592 return false; 593 594 if (tb_port_get_link_generation(port) < 4) 595 return false; 596 597 /* Must have PCIe adapters */ 598 if (tb_is_upstream_port(port)) { 599 if (!tb_switch_find_port(port->sw, TB_TYPE_PCIE_UP)) 600 return false; 601 if (!tb_switch_find_port(port->remote->sw, TB_TYPE_PCIE_DOWN)) 602 return false; 603 } else { 604 if (!tb_switch_find_port(port->sw, TB_TYPE_PCIE_DOWN)) 605 return false; 606 if (!tb_switch_find_port(port->remote->sw, TB_TYPE_PCIE_UP)) 607 return false; 608 } 609 610 *reserved_up = USB4_V2_PCI_MIN_BANDWIDTH; 611 *reserved_down = USB4_V2_PCI_MIN_BANDWIDTH; 612 613 tb_port_dbg(port, "reserving %u/%u Mb/s for PCIe\n", *reserved_up, 614 *reserved_down); 615 return true; 616 } 617 618 static bool tb_dp_is_usb4(const struct tb_switch *sw) 619 { 620 /* Titan Ridge DP adapters need the same treatment as USB4 */ 621 return tb_switch_is_usb4(sw) || tb_switch_is_titan_ridge(sw); 622 } 623 624 static int tb_dp_cm_handshake(struct tb_port *in, struct tb_port *out, 625 int timeout_msec) 626 { 627 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec); 628 u32 val; 629 int ret; 630 631 /* Both ends need to support this */ 632 if (!tb_dp_is_usb4(in->sw) || !tb_dp_is_usb4(out->sw)) 633 return 0; 634 635 ret = tb_port_read(out, &val, TB_CFG_PORT, 636 out->cap_adap + DP_STATUS_CTRL, 1); 637 if (ret) 638 return ret; 639 640 val |= DP_STATUS_CTRL_UF | DP_STATUS_CTRL_CMHS; 641 642 ret = tb_port_write(out, &val, TB_CFG_PORT, 643 out->cap_adap + DP_STATUS_CTRL, 1); 644 if (ret) 645 return ret; 646 647 do { 648 ret = tb_port_read(out, &val, TB_CFG_PORT, 649 out->cap_adap + DP_STATUS_CTRL, 1); 650 if (ret) 651 return ret; 652 if (!(val & DP_STATUS_CTRL_CMHS)) 653 return 0; 654 usleep_range(100, 150); 655 } while (ktime_before(ktime_get(), timeout)); 656 657 return -ETIMEDOUT; 658 } 659 660 /* 661 * Returns maximum possible rate from capability supporting only DP 2.0 662 * and below. Used when DP BW allocation mode is not enabled. 663 */ 664 static inline u32 tb_dp_cap_get_rate(u32 val) 665 { 666 u32 rate = (val & DP_COMMON_CAP_RATE_MASK) >> DP_COMMON_CAP_RATE_SHIFT; 667 668 switch (rate) { 669 case DP_COMMON_CAP_RATE_RBR: 670 return 1620; 671 case DP_COMMON_CAP_RATE_HBR: 672 return 2700; 673 case DP_COMMON_CAP_RATE_HBR2: 674 return 5400; 675 case DP_COMMON_CAP_RATE_HBR3: 676 return 8100; 677 default: 678 return 0; 679 } 680 } 681 682 /* 683 * Returns maximum possible rate from capability supporting DP 2.1 684 * UHBR20, 13.5 and 10 rates as well. Use only when DP BW allocation 685 * mode is enabled. 686 */ 687 static inline u32 tb_dp_cap_get_rate_ext(u32 val) 688 { 689 if (val & DP_COMMON_CAP_UHBR20) 690 return 20000; 691 else if (val & DP_COMMON_CAP_UHBR13_5) 692 return 13500; 693 else if (val & DP_COMMON_CAP_UHBR10) 694 return 10000; 695 696 return tb_dp_cap_get_rate(val); 697 } 698 699 static inline bool tb_dp_is_uhbr_rate(unsigned int rate) 700 { 701 return rate >= 10000; 702 } 703 704 static inline u32 tb_dp_cap_set_rate(u32 val, u32 rate) 705 { 706 val &= ~DP_COMMON_CAP_RATE_MASK; 707 switch (rate) { 708 default: 709 WARN(1, "invalid rate %u passed, defaulting to 1620 MB/s\n", rate); 710 fallthrough; 711 case 1620: 712 val |= DP_COMMON_CAP_RATE_RBR << DP_COMMON_CAP_RATE_SHIFT; 713 break; 714 case 2700: 715 val |= DP_COMMON_CAP_RATE_HBR << DP_COMMON_CAP_RATE_SHIFT; 716 break; 717 case 5400: 718 val |= DP_COMMON_CAP_RATE_HBR2 << DP_COMMON_CAP_RATE_SHIFT; 719 break; 720 case 8100: 721 val |= DP_COMMON_CAP_RATE_HBR3 << DP_COMMON_CAP_RATE_SHIFT; 722 break; 723 } 724 return val; 725 } 726 727 static inline u32 tb_dp_cap_get_lanes(u32 val) 728 { 729 u32 lanes = (val & DP_COMMON_CAP_LANES_MASK) >> DP_COMMON_CAP_LANES_SHIFT; 730 731 switch (lanes) { 732 case DP_COMMON_CAP_1_LANE: 733 return 1; 734 case DP_COMMON_CAP_2_LANES: 735 return 2; 736 case DP_COMMON_CAP_4_LANES: 737 return 4; 738 default: 739 return 0; 740 } 741 } 742 743 static inline u32 tb_dp_cap_set_lanes(u32 val, u32 lanes) 744 { 745 val &= ~DP_COMMON_CAP_LANES_MASK; 746 switch (lanes) { 747 default: 748 WARN(1, "invalid number of lanes %u passed, defaulting to 1\n", 749 lanes); 750 fallthrough; 751 case 1: 752 val |= DP_COMMON_CAP_1_LANE << DP_COMMON_CAP_LANES_SHIFT; 753 break; 754 case 2: 755 val |= DP_COMMON_CAP_2_LANES << DP_COMMON_CAP_LANES_SHIFT; 756 break; 757 case 4: 758 val |= DP_COMMON_CAP_4_LANES << DP_COMMON_CAP_LANES_SHIFT; 759 break; 760 } 761 return val; 762 } 763 764 static unsigned int tb_dp_bandwidth(unsigned int rate, unsigned int lanes) 765 { 766 /* Tunneling removes the DP 8b/10b 128/132b encoding */ 767 if (tb_dp_is_uhbr_rate(rate)) 768 return rate * lanes * 128 / 132; 769 return rate * lanes * 8 / 10; 770 } 771 772 static int tb_dp_reduce_bandwidth(int max_bw, u32 in_rate, u32 in_lanes, 773 u32 out_rate, u32 out_lanes, u32 *new_rate, 774 u32 *new_lanes) 775 { 776 static const u32 dp_bw[][2] = { 777 /* Mb/s, lanes */ 778 { 8100, 4 }, /* 25920 Mb/s */ 779 { 5400, 4 }, /* 17280 Mb/s */ 780 { 8100, 2 }, /* 12960 Mb/s */ 781 { 2700, 4 }, /* 8640 Mb/s */ 782 { 5400, 2 }, /* 8640 Mb/s */ 783 { 8100, 1 }, /* 6480 Mb/s */ 784 { 1620, 4 }, /* 5184 Mb/s */ 785 { 5400, 1 }, /* 4320 Mb/s */ 786 { 2700, 2 }, /* 4320 Mb/s */ 787 { 1620, 2 }, /* 2592 Mb/s */ 788 { 2700, 1 }, /* 2160 Mb/s */ 789 { 1620, 1 }, /* 1296 Mb/s */ 790 }; 791 unsigned int i; 792 793 /* 794 * Find a combination that can fit into max_bw and does not 795 * exceed the maximum rate and lanes supported by the DP OUT and 796 * DP IN adapters. 797 */ 798 for (i = 0; i < ARRAY_SIZE(dp_bw); i++) { 799 if (dp_bw[i][0] > out_rate || dp_bw[i][1] > out_lanes) 800 continue; 801 802 if (dp_bw[i][0] > in_rate || dp_bw[i][1] > in_lanes) 803 continue; 804 805 if (tb_dp_bandwidth(dp_bw[i][0], dp_bw[i][1]) <= max_bw) { 806 *new_rate = dp_bw[i][0]; 807 *new_lanes = dp_bw[i][1]; 808 return 0; 809 } 810 } 811 812 return -ENOSR; 813 } 814 815 static int tb_dp_xchg_caps(struct tb_tunnel *tunnel) 816 { 817 u32 out_dp_cap, out_rate, out_lanes, in_dp_cap, in_rate, in_lanes, bw; 818 struct tb_port *out = tunnel->dst_port; 819 struct tb_port *in = tunnel->src_port; 820 int ret, max_bw; 821 822 /* 823 * Copy DP_LOCAL_CAP register to DP_REMOTE_CAP register for 824 * newer generation hardware. 825 */ 826 if (in->sw->generation < 2 || out->sw->generation < 2) 827 return 0; 828 829 /* 830 * Perform connection manager handshake between IN and OUT ports 831 * before capabilities exchange can take place. 832 */ 833 ret = tb_dp_cm_handshake(in, out, 3000); 834 if (ret) 835 return ret; 836 837 /* Read both DP_LOCAL_CAP registers */ 838 ret = tb_port_read(in, &in_dp_cap, TB_CFG_PORT, 839 in->cap_adap + DP_LOCAL_CAP, 1); 840 if (ret) 841 return ret; 842 843 ret = tb_port_read(out, &out_dp_cap, TB_CFG_PORT, 844 out->cap_adap + DP_LOCAL_CAP, 1); 845 if (ret) 846 return ret; 847 848 /* Write IN local caps to OUT remote caps */ 849 ret = tb_port_write(out, &in_dp_cap, TB_CFG_PORT, 850 out->cap_adap + DP_REMOTE_CAP, 1); 851 if (ret) 852 return ret; 853 854 in_rate = tb_dp_cap_get_rate(in_dp_cap); 855 in_lanes = tb_dp_cap_get_lanes(in_dp_cap); 856 tb_tunnel_dbg(tunnel, 857 "DP IN maximum supported bandwidth %u Mb/s x%u = %u Mb/s\n", 858 in_rate, in_lanes, tb_dp_bandwidth(in_rate, in_lanes)); 859 860 /* 861 * If the tunnel bandwidth is limited (max_bw is set) then see 862 * if we need to reduce bandwidth to fit there. 863 */ 864 out_rate = tb_dp_cap_get_rate(out_dp_cap); 865 out_lanes = tb_dp_cap_get_lanes(out_dp_cap); 866 bw = tb_dp_bandwidth(out_rate, out_lanes); 867 tb_tunnel_dbg(tunnel, 868 "DP OUT maximum supported bandwidth %u Mb/s x%u = %u Mb/s\n", 869 out_rate, out_lanes, bw); 870 871 if (tb_tunnel_direction_downstream(tunnel)) 872 max_bw = tunnel->max_down; 873 else 874 max_bw = tunnel->max_up; 875 876 if (max_bw && bw > max_bw) { 877 u32 new_rate, new_lanes, new_bw; 878 879 ret = tb_dp_reduce_bandwidth(max_bw, in_rate, in_lanes, 880 out_rate, out_lanes, &new_rate, 881 &new_lanes); 882 if (ret) { 883 tb_tunnel_info(tunnel, "not enough bandwidth\n"); 884 return ret; 885 } 886 887 new_bw = tb_dp_bandwidth(new_rate, new_lanes); 888 tb_tunnel_dbg(tunnel, 889 "bandwidth reduced to %u Mb/s x%u = %u Mb/s\n", 890 new_rate, new_lanes, new_bw); 891 892 /* 893 * Set new rate and number of lanes before writing it to 894 * the IN port remote caps. 895 */ 896 out_dp_cap = tb_dp_cap_set_rate(out_dp_cap, new_rate); 897 out_dp_cap = tb_dp_cap_set_lanes(out_dp_cap, new_lanes); 898 } 899 900 /* 901 * Titan Ridge does not disable AUX timers when it gets 902 * SET_CONFIG with SET_LTTPR_MODE set. This causes problems with 903 * DP tunneling. 904 */ 905 if (tb_route(out->sw) && tb_switch_is_titan_ridge(out->sw)) { 906 out_dp_cap |= DP_COMMON_CAP_LTTPR_NS; 907 tb_tunnel_dbg(tunnel, "disabling LTTPR\n"); 908 } 909 910 return tb_port_write(in, &out_dp_cap, TB_CFG_PORT, 911 in->cap_adap + DP_REMOTE_CAP, 1); 912 } 913 914 static int tb_dp_bandwidth_alloc_mode_enable(struct tb_tunnel *tunnel) 915 { 916 int ret, estimated_bw, granularity, tmp; 917 struct tb_port *out = tunnel->dst_port; 918 struct tb_port *in = tunnel->src_port; 919 u32 out_dp_cap, out_rate, out_lanes; 920 u32 in_dp_cap, in_rate, in_lanes; 921 u32 rate, lanes; 922 923 if (!bw_alloc_mode) 924 return 0; 925 926 ret = usb4_dp_port_set_cm_bandwidth_mode_supported(in, true); 927 if (ret) 928 return ret; 929 930 ret = usb4_dp_port_set_group_id(in, in->group->index); 931 if (ret) 932 return ret; 933 934 /* 935 * Get the non-reduced rate and lanes based on the lowest 936 * capability of both adapters. 937 */ 938 ret = tb_port_read(in, &in_dp_cap, TB_CFG_PORT, 939 in->cap_adap + DP_LOCAL_CAP, 1); 940 if (ret) 941 return ret; 942 943 ret = tb_port_read(out, &out_dp_cap, TB_CFG_PORT, 944 out->cap_adap + DP_LOCAL_CAP, 1); 945 if (ret) 946 return ret; 947 948 in_rate = tb_dp_cap_get_rate(in_dp_cap); 949 in_lanes = tb_dp_cap_get_lanes(in_dp_cap); 950 out_rate = tb_dp_cap_get_rate(out_dp_cap); 951 out_lanes = tb_dp_cap_get_lanes(out_dp_cap); 952 953 rate = min(in_rate, out_rate); 954 lanes = min(in_lanes, out_lanes); 955 tmp = tb_dp_bandwidth(rate, lanes); 956 957 tb_tunnel_dbg(tunnel, "non-reduced bandwidth %u Mb/s x%u = %u Mb/s\n", 958 rate, lanes, tmp); 959 960 ret = usb4_dp_port_set_nrd(in, rate, lanes); 961 if (ret) 962 return ret; 963 964 /* 965 * Pick up granularity that supports maximum possible bandwidth. 966 * For that we use the UHBR rates too. 967 */ 968 in_rate = tb_dp_cap_get_rate_ext(in_dp_cap); 969 out_rate = tb_dp_cap_get_rate_ext(out_dp_cap); 970 rate = min(in_rate, out_rate); 971 tmp = tb_dp_bandwidth(rate, lanes); 972 973 tb_tunnel_dbg(tunnel, 974 "maximum bandwidth through allocation mode %u Mb/s x%u = %u Mb/s\n", 975 rate, lanes, tmp); 976 977 for (granularity = 250; tmp / granularity > 255 && granularity <= 1000; 978 granularity *= 2) 979 ; 980 981 tb_tunnel_dbg(tunnel, "granularity %d Mb/s\n", granularity); 982 983 /* 984 * Returns -EINVAL if granularity above is outside of the 985 * accepted ranges. 986 */ 987 ret = usb4_dp_port_set_granularity(in, granularity); 988 if (ret) 989 return ret; 990 991 /* 992 * Bandwidth estimation is pretty much what we have in 993 * max_up/down fields. For discovery we just read what the 994 * estimation was set to. 995 */ 996 if (tb_tunnel_direction_downstream(tunnel)) 997 estimated_bw = tunnel->max_down; 998 else 999 estimated_bw = tunnel->max_up; 1000 1001 tb_tunnel_dbg(tunnel, "estimated bandwidth %d Mb/s\n", estimated_bw); 1002 1003 ret = usb4_dp_port_set_estimated_bandwidth(in, estimated_bw); 1004 if (ret) 1005 return ret; 1006 1007 /* Initial allocation should be 0 according the spec */ 1008 ret = usb4_dp_port_allocate_bandwidth(in, 0); 1009 if (ret) 1010 return ret; 1011 1012 tb_tunnel_dbg(tunnel, "bandwidth allocation mode enabled\n"); 1013 return 0; 1014 } 1015 1016 static int tb_dp_pre_activate(struct tb_tunnel *tunnel) 1017 { 1018 struct tb_port *in = tunnel->src_port; 1019 struct tb_switch *sw = in->sw; 1020 struct tb *tb = in->sw->tb; 1021 int ret; 1022 1023 ret = tb_dp_xchg_caps(tunnel); 1024 if (ret) 1025 return ret; 1026 1027 if (!tb_switch_is_usb4(sw)) 1028 return 0; 1029 1030 if (!usb4_dp_port_bandwidth_mode_supported(in)) 1031 return 0; 1032 1033 tb_tunnel_dbg(tunnel, "bandwidth allocation mode supported\n"); 1034 1035 ret = usb4_dp_port_set_cm_id(in, tb->index); 1036 if (ret) 1037 return ret; 1038 1039 return tb_dp_bandwidth_alloc_mode_enable(tunnel); 1040 } 1041 1042 static void tb_dp_post_deactivate(struct tb_tunnel *tunnel) 1043 { 1044 struct tb_port *in = tunnel->src_port; 1045 1046 if (!usb4_dp_port_bandwidth_mode_supported(in)) 1047 return; 1048 if (usb4_dp_port_bandwidth_mode_enabled(in)) { 1049 usb4_dp_port_set_cm_bandwidth_mode_supported(in, false); 1050 tb_tunnel_dbg(tunnel, "bandwidth allocation mode disabled\n"); 1051 } 1052 } 1053 1054 static ktime_t dprx_timeout_to_ktime(int timeout_msec) 1055 { 1056 return timeout_msec >= 0 ? 1057 ktime_add_ms(ktime_get(), timeout_msec) : KTIME_MAX; 1058 } 1059 1060 static int tb_dp_wait_dprx(struct tb_tunnel *tunnel, int timeout_msec) 1061 { 1062 ktime_t timeout = dprx_timeout_to_ktime(timeout_msec); 1063 struct tb_port *in = tunnel->src_port; 1064 1065 /* 1066 * Wait for DPRX done. Normally it should be already set for 1067 * active tunnel. 1068 */ 1069 do { 1070 u32 val; 1071 int ret; 1072 1073 ret = tb_port_read(in, &val, TB_CFG_PORT, 1074 in->cap_adap + DP_COMMON_CAP, 1); 1075 if (ret) 1076 return ret; 1077 1078 if (val & DP_COMMON_CAP_DPRX_DONE) 1079 return 0; 1080 1081 usleep_range(100, 150); 1082 } while (ktime_before(ktime_get(), timeout)); 1083 1084 tb_tunnel_dbg(tunnel, "DPRX read timeout\n"); 1085 return -ETIMEDOUT; 1086 } 1087 1088 static void tb_dp_dprx_work(struct work_struct *work) 1089 { 1090 struct tb_tunnel *tunnel = container_of(work, typeof(*tunnel), dprx_work.work); 1091 struct tb *tb = tunnel->tb; 1092 1093 if (!tunnel->dprx_canceled) { 1094 mutex_lock(&tb->lock); 1095 if (tb_dp_is_usb4(tunnel->src_port->sw) && 1096 tb_dp_wait_dprx(tunnel, TB_DPRX_WAIT_TIMEOUT)) { 1097 if (ktime_before(ktime_get(), tunnel->dprx_timeout)) { 1098 queue_delayed_work(tb->wq, &tunnel->dprx_work, 1099 msecs_to_jiffies(TB_DPRX_POLL_DELAY)); 1100 mutex_unlock(&tb->lock); 1101 return; 1102 } 1103 } else { 1104 tb_tunnel_set_active(tunnel, true); 1105 } 1106 mutex_unlock(&tb->lock); 1107 } 1108 1109 if (tunnel->callback) 1110 tunnel->callback(tunnel, tunnel->callback_data); 1111 tb_tunnel_put(tunnel); 1112 } 1113 1114 static int tb_dp_dprx_start(struct tb_tunnel *tunnel) 1115 { 1116 /* 1117 * Bump up the reference to keep the tunnel around. It will be 1118 * dropped in tb_dp_dprx_stop() once the tunnel is deactivated. 1119 */ 1120 tb_tunnel_get(tunnel); 1121 1122 tunnel->dprx_started = true; 1123 1124 if (tunnel->callback) { 1125 tunnel->dprx_timeout = dprx_timeout_to_ktime(dprx_timeout); 1126 queue_delayed_work(tunnel->tb->wq, &tunnel->dprx_work, 0); 1127 return -EINPROGRESS; 1128 } 1129 1130 return tb_dp_is_usb4(tunnel->src_port->sw) ? 1131 tb_dp_wait_dprx(tunnel, dprx_timeout) : 0; 1132 } 1133 1134 static void tb_dp_dprx_stop(struct tb_tunnel *tunnel) 1135 { 1136 if (tunnel->dprx_started) { 1137 tunnel->dprx_started = false; 1138 tunnel->dprx_canceled = true; 1139 if (cancel_delayed_work(&tunnel->dprx_work)) 1140 tb_tunnel_put(tunnel); 1141 } 1142 } 1143 1144 static int tb_dp_activate(struct tb_tunnel *tunnel, bool active) 1145 { 1146 int ret; 1147 1148 if (active) { 1149 struct tb_path **paths; 1150 int last; 1151 1152 paths = tunnel->paths; 1153 last = paths[TB_DP_VIDEO_PATH_OUT]->path_length - 1; 1154 1155 tb_dp_port_set_hops(tunnel->src_port, 1156 paths[TB_DP_VIDEO_PATH_OUT]->hops[0].in_hop_index, 1157 paths[TB_DP_AUX_PATH_OUT]->hops[0].in_hop_index, 1158 paths[TB_DP_AUX_PATH_IN]->hops[last].next_hop_index); 1159 1160 tb_dp_port_set_hops(tunnel->dst_port, 1161 paths[TB_DP_VIDEO_PATH_OUT]->hops[last].next_hop_index, 1162 paths[TB_DP_AUX_PATH_IN]->hops[0].in_hop_index, 1163 paths[TB_DP_AUX_PATH_OUT]->hops[last].next_hop_index); 1164 } else { 1165 tb_dp_dprx_stop(tunnel); 1166 tb_dp_port_hpd_clear(tunnel->src_port); 1167 tb_dp_port_set_hops(tunnel->src_port, 0, 0, 0); 1168 if (tb_port_is_dpout(tunnel->dst_port)) 1169 tb_dp_port_set_hops(tunnel->dst_port, 0, 0, 0); 1170 } 1171 1172 ret = tb_dp_port_enable(tunnel->src_port, active); 1173 if (ret) 1174 return ret; 1175 1176 if (tb_port_is_dpout(tunnel->dst_port)) { 1177 ret = tb_dp_port_enable(tunnel->dst_port, active); 1178 if (ret) 1179 return ret; 1180 } 1181 1182 return active ? tb_dp_dprx_start(tunnel) : 0; 1183 } 1184 1185 /** 1186 * tb_dp_bandwidth_mode_maximum_bandwidth() - Maximum possible bandwidth 1187 * @tunnel: DP tunnel to check 1188 * @max_bw_rounded: Maximum bandwidth in Mb/s rounded up to the next granularity 1189 * 1190 * Return: Maximum possible bandwidth for this tunnel in Mb/s, negative errno 1191 * in case of failure. 1192 */ 1193 static int tb_dp_bandwidth_mode_maximum_bandwidth(struct tb_tunnel *tunnel, 1194 int *max_bw_rounded) 1195 { 1196 struct tb_port *in = tunnel->src_port; 1197 int ret, rate, lanes, max_bw; 1198 u32 cap; 1199 1200 /* 1201 * DP IN adapter DP_LOCAL_CAP gets updated to the lowest AUX 1202 * read parameter values so we can use this to determine the 1203 * maximum possible bandwidth over this link. 1204 * 1205 * See USB4 v2 spec 1.0 10.4.4.5. 1206 */ 1207 ret = tb_port_read(in, &cap, TB_CFG_PORT, 1208 in->cap_adap + DP_LOCAL_CAP, 1); 1209 if (ret) 1210 return ret; 1211 1212 rate = tb_dp_cap_get_rate_ext(cap); 1213 lanes = tb_dp_cap_get_lanes(cap); 1214 1215 max_bw = tb_dp_bandwidth(rate, lanes); 1216 1217 if (max_bw_rounded) { 1218 ret = usb4_dp_port_granularity(in); 1219 if (ret < 0) 1220 return ret; 1221 *max_bw_rounded = roundup(max_bw, ret); 1222 } 1223 1224 return max_bw; 1225 } 1226 1227 static int tb_dp_bandwidth_mode_consumed_bandwidth(struct tb_tunnel *tunnel, 1228 int *consumed_up, 1229 int *consumed_down) 1230 { 1231 struct tb_port *in = tunnel->src_port; 1232 int ret, allocated_bw, max_bw_rounded; 1233 1234 if (!usb4_dp_port_bandwidth_mode_enabled(in)) 1235 return -EOPNOTSUPP; 1236 1237 if (!tunnel->bw_mode) 1238 return -EOPNOTSUPP; 1239 1240 /* Read what was allocated previously if any */ 1241 ret = usb4_dp_port_allocated_bandwidth(in); 1242 if (ret < 0) 1243 return ret; 1244 allocated_bw = ret; 1245 1246 ret = tb_dp_bandwidth_mode_maximum_bandwidth(tunnel, &max_bw_rounded); 1247 if (ret < 0) 1248 return ret; 1249 if (allocated_bw == max_bw_rounded) 1250 allocated_bw = ret; 1251 1252 if (tb_tunnel_direction_downstream(tunnel)) { 1253 *consumed_up = 0; 1254 *consumed_down = allocated_bw; 1255 } else { 1256 *consumed_up = allocated_bw; 1257 *consumed_down = 0; 1258 } 1259 1260 return 0; 1261 } 1262 1263 static int tb_dp_allocated_bandwidth(struct tb_tunnel *tunnel, int *allocated_up, 1264 int *allocated_down) 1265 { 1266 struct tb_port *in = tunnel->src_port; 1267 1268 /* 1269 * If we have already set the allocated bandwidth then use that. 1270 * Otherwise we read it from the DPRX. 1271 */ 1272 if (usb4_dp_port_bandwidth_mode_enabled(in) && tunnel->bw_mode) { 1273 int ret, allocated_bw, max_bw_rounded; 1274 1275 ret = usb4_dp_port_allocated_bandwidth(in); 1276 if (ret < 0) 1277 return ret; 1278 allocated_bw = ret; 1279 1280 ret = tb_dp_bandwidth_mode_maximum_bandwidth(tunnel, 1281 &max_bw_rounded); 1282 if (ret < 0) 1283 return ret; 1284 if (allocated_bw == max_bw_rounded) 1285 allocated_bw = ret; 1286 1287 if (tb_tunnel_direction_downstream(tunnel)) { 1288 *allocated_up = 0; 1289 *allocated_down = allocated_bw; 1290 } else { 1291 *allocated_up = allocated_bw; 1292 *allocated_down = 0; 1293 } 1294 return 0; 1295 } 1296 1297 return tunnel->consumed_bandwidth(tunnel, allocated_up, 1298 allocated_down); 1299 } 1300 1301 static int tb_dp_alloc_bandwidth(struct tb_tunnel *tunnel, int *alloc_up, 1302 int *alloc_down) 1303 { 1304 struct tb_port *in = tunnel->src_port; 1305 int max_bw_rounded, ret, tmp; 1306 1307 if (!usb4_dp_port_bandwidth_mode_enabled(in)) 1308 return -EOPNOTSUPP; 1309 1310 ret = tb_dp_bandwidth_mode_maximum_bandwidth(tunnel, &max_bw_rounded); 1311 if (ret < 0) 1312 return ret; 1313 1314 if (tb_tunnel_direction_downstream(tunnel)) { 1315 tmp = min(*alloc_down, max_bw_rounded); 1316 ret = usb4_dp_port_allocate_bandwidth(in, tmp); 1317 if (ret) 1318 return ret; 1319 *alloc_down = tmp; 1320 *alloc_up = 0; 1321 } else { 1322 tmp = min(*alloc_up, max_bw_rounded); 1323 ret = usb4_dp_port_allocate_bandwidth(in, tmp); 1324 if (ret) 1325 return ret; 1326 *alloc_down = 0; 1327 *alloc_up = tmp; 1328 } 1329 1330 /* Now we can use BW mode registers to figure out the bandwidth */ 1331 /* TODO: need to handle discovery too */ 1332 tunnel->bw_mode = true; 1333 return 0; 1334 } 1335 1336 /* Read cap from tunnel DP IN */ 1337 static int tb_dp_read_cap(struct tb_tunnel *tunnel, unsigned int cap, u32 *rate, 1338 u32 *lanes) 1339 { 1340 struct tb_port *in = tunnel->src_port; 1341 u32 val; 1342 int ret; 1343 1344 switch (cap) { 1345 case DP_LOCAL_CAP: 1346 case DP_REMOTE_CAP: 1347 case DP_COMMON_CAP: 1348 break; 1349 1350 default: 1351 tb_tunnel_WARN(tunnel, "invalid capability index %#x\n", cap); 1352 return -EINVAL; 1353 } 1354 1355 /* 1356 * Read from the copied remote cap so that we take into account 1357 * if capabilities were reduced during exchange. 1358 */ 1359 ret = tb_port_read(in, &val, TB_CFG_PORT, in->cap_adap + cap, 1); 1360 if (ret) 1361 return ret; 1362 1363 *rate = tb_dp_cap_get_rate(val); 1364 *lanes = tb_dp_cap_get_lanes(val); 1365 return 0; 1366 } 1367 1368 static int tb_dp_maximum_bandwidth(struct tb_tunnel *tunnel, int *max_up, 1369 int *max_down) 1370 { 1371 int ret; 1372 1373 if (!usb4_dp_port_bandwidth_mode_enabled(tunnel->src_port)) 1374 return -EOPNOTSUPP; 1375 1376 ret = tb_dp_bandwidth_mode_maximum_bandwidth(tunnel, NULL); 1377 if (ret < 0) 1378 return ret; 1379 1380 if (tb_tunnel_direction_downstream(tunnel)) { 1381 *max_up = 0; 1382 *max_down = ret; 1383 } else { 1384 *max_up = ret; 1385 *max_down = 0; 1386 } 1387 1388 return 0; 1389 } 1390 1391 static int tb_dp_consumed_bandwidth(struct tb_tunnel *tunnel, int *consumed_up, 1392 int *consumed_down) 1393 { 1394 const struct tb_switch *sw = tunnel->src_port->sw; 1395 u32 rate = 0, lanes = 0; 1396 int ret; 1397 1398 if (tb_dp_is_usb4(sw)) { 1399 ret = tb_dp_wait_dprx(tunnel, 0); 1400 if (ret) { 1401 if (ret == -ETIMEDOUT) { 1402 /* 1403 * While we wait for DPRX complete the 1404 * tunnel consumes as much as it had 1405 * been reserved initially. 1406 */ 1407 ret = tb_dp_read_cap(tunnel, DP_REMOTE_CAP, 1408 &rate, &lanes); 1409 if (ret) 1410 return ret; 1411 } else { 1412 return ret; 1413 } 1414 } else { 1415 /* 1416 * On USB4 routers check if the bandwidth allocation 1417 * mode is enabled first and then read the bandwidth 1418 * through those registers. 1419 */ 1420 ret = tb_dp_bandwidth_mode_consumed_bandwidth(tunnel, consumed_up, 1421 consumed_down); 1422 if (ret < 0) { 1423 if (ret != -EOPNOTSUPP) 1424 return ret; 1425 } else if (!ret) { 1426 return 0; 1427 } 1428 ret = tb_dp_read_cap(tunnel, DP_COMMON_CAP, &rate, &lanes); 1429 if (ret) 1430 return ret; 1431 } 1432 } else if (sw->generation >= 2) { 1433 ret = tb_dp_read_cap(tunnel, DP_REMOTE_CAP, &rate, &lanes); 1434 if (ret) 1435 return ret; 1436 } else { 1437 /* No bandwidth management for legacy devices */ 1438 *consumed_up = 0; 1439 *consumed_down = 0; 1440 return 0; 1441 } 1442 1443 if (tb_tunnel_direction_downstream(tunnel)) { 1444 *consumed_up = 0; 1445 *consumed_down = tb_dp_bandwidth(rate, lanes); 1446 } else { 1447 *consumed_up = tb_dp_bandwidth(rate, lanes); 1448 *consumed_down = 0; 1449 } 1450 1451 return 0; 1452 } 1453 1454 static void tb_dp_init_aux_credits(struct tb_path_hop *hop) 1455 { 1456 struct tb_port *port = hop->in_port; 1457 struct tb_switch *sw = port->sw; 1458 1459 if (tb_port_use_credit_allocation(port)) 1460 hop->initial_credits = sw->min_dp_aux_credits; 1461 else 1462 hop->initial_credits = 1; 1463 } 1464 1465 static void tb_dp_init_aux_path(struct tb_path *path, bool pm_support) 1466 { 1467 struct tb_path_hop *hop; 1468 1469 path->egress_fc_enable = TB_PATH_SOURCE | TB_PATH_INTERNAL; 1470 path->egress_shared_buffer = TB_PATH_NONE; 1471 path->ingress_fc_enable = TB_PATH_ALL; 1472 path->ingress_shared_buffer = TB_PATH_NONE; 1473 path->priority = TB_DP_AUX_PRIORITY; 1474 path->weight = TB_DP_AUX_WEIGHT; 1475 1476 tb_path_for_each_hop(path, hop) { 1477 tb_dp_init_aux_credits(hop); 1478 if (pm_support) 1479 tb_init_pm_support(hop); 1480 } 1481 } 1482 1483 static int tb_dp_init_video_credits(struct tb_path_hop *hop) 1484 { 1485 struct tb_port *port = hop->in_port; 1486 struct tb_switch *sw = port->sw; 1487 1488 if (tb_port_use_credit_allocation(port)) { 1489 unsigned int nfc_credits; 1490 size_t max_dp_streams; 1491 1492 tb_available_credits(port, &max_dp_streams); 1493 /* 1494 * Read the number of currently allocated NFC credits 1495 * from the lane adapter. Since we only use them for DP 1496 * tunneling we can use that to figure out how many DP 1497 * tunnels already go through the lane adapter. 1498 */ 1499 nfc_credits = port->config.nfc_credits & 1500 ADP_CS_4_NFC_BUFFERS_MASK; 1501 if (nfc_credits / sw->min_dp_main_credits > max_dp_streams) 1502 return -ENOSPC; 1503 1504 hop->nfc_credits = sw->min_dp_main_credits; 1505 } else { 1506 hop->nfc_credits = min(port->total_credits - 2, 12U); 1507 } 1508 1509 return 0; 1510 } 1511 1512 static int tb_dp_init_video_path(struct tb_path *path, bool pm_support) 1513 { 1514 struct tb_path_hop *hop; 1515 1516 path->egress_fc_enable = TB_PATH_NONE; 1517 path->egress_shared_buffer = TB_PATH_NONE; 1518 path->ingress_fc_enable = TB_PATH_NONE; 1519 path->ingress_shared_buffer = TB_PATH_NONE; 1520 path->priority = TB_DP_VIDEO_PRIORITY; 1521 path->weight = TB_DP_VIDEO_WEIGHT; 1522 1523 tb_path_for_each_hop(path, hop) { 1524 int ret; 1525 1526 ret = tb_dp_init_video_credits(hop); 1527 if (ret) 1528 return ret; 1529 if (pm_support) 1530 tb_init_pm_support(hop); 1531 } 1532 1533 return 0; 1534 } 1535 1536 static void tb_dp_dump(struct tb_tunnel *tunnel) 1537 { 1538 struct tb_port *in, *out; 1539 u32 dp_cap, rate, lanes; 1540 1541 in = tunnel->src_port; 1542 out = tunnel->dst_port; 1543 1544 if (tb_port_read(in, &dp_cap, TB_CFG_PORT, 1545 in->cap_adap + DP_LOCAL_CAP, 1)) 1546 return; 1547 1548 rate = tb_dp_cap_get_rate(dp_cap); 1549 lanes = tb_dp_cap_get_lanes(dp_cap); 1550 1551 tb_tunnel_dbg(tunnel, 1552 "DP IN maximum supported bandwidth %u Mb/s x%u = %u Mb/s\n", 1553 rate, lanes, tb_dp_bandwidth(rate, lanes)); 1554 1555 if (tb_port_read(out, &dp_cap, TB_CFG_PORT, 1556 out->cap_adap + DP_LOCAL_CAP, 1)) 1557 return; 1558 1559 rate = tb_dp_cap_get_rate(dp_cap); 1560 lanes = tb_dp_cap_get_lanes(dp_cap); 1561 1562 tb_tunnel_dbg(tunnel, 1563 "DP OUT maximum supported bandwidth %u Mb/s x%u = %u Mb/s\n", 1564 rate, lanes, tb_dp_bandwidth(rate, lanes)); 1565 1566 if (tb_port_read(in, &dp_cap, TB_CFG_PORT, 1567 in->cap_adap + DP_REMOTE_CAP, 1)) 1568 return; 1569 1570 rate = tb_dp_cap_get_rate(dp_cap); 1571 lanes = tb_dp_cap_get_lanes(dp_cap); 1572 1573 tb_tunnel_dbg(tunnel, "reduced bandwidth %u Mb/s x%u = %u Mb/s\n", 1574 rate, lanes, tb_dp_bandwidth(rate, lanes)); 1575 } 1576 1577 /** 1578 * tb_tunnel_discover_dp() - Discover existing Display Port tunnels 1579 * @tb: Pointer to the domain structure 1580 * @in: DP in adapter 1581 * @alloc_hopid: Allocate HopIDs from visited ports 1582 * 1583 * If @in adapter is active, follows the tunnel to the DP out adapter 1584 * and back. Returns the discovered tunnel or %NULL if there was no 1585 * tunnel. 1586 * 1587 * Return: Pointer to &struct tb_tunnel or %NULL if no tunnel found. 1588 */ 1589 struct tb_tunnel *tb_tunnel_discover_dp(struct tb *tb, struct tb_port *in, 1590 bool alloc_hopid) 1591 { 1592 struct tb_tunnel *tunnel; 1593 struct tb_port *port; 1594 struct tb_path *path; 1595 1596 if (!tb_dp_port_is_enabled(in)) 1597 return NULL; 1598 1599 tunnel = tb_tunnel_alloc(tb, 3, TB_TUNNEL_DP); 1600 if (!tunnel) 1601 return NULL; 1602 1603 tunnel->pre_activate = tb_dp_pre_activate; 1604 tunnel->activate = tb_dp_activate; 1605 tunnel->post_deactivate = tb_dp_post_deactivate; 1606 tunnel->maximum_bandwidth = tb_dp_maximum_bandwidth; 1607 tunnel->allocated_bandwidth = tb_dp_allocated_bandwidth; 1608 tunnel->alloc_bandwidth = tb_dp_alloc_bandwidth; 1609 tunnel->consumed_bandwidth = tb_dp_consumed_bandwidth; 1610 tunnel->src_port = in; 1611 1612 path = tb_path_discover(in, TB_DP_VIDEO_HOPID, NULL, -1, 1613 &tunnel->dst_port, "Video", alloc_hopid); 1614 if (!path) { 1615 /* Just disable the DP IN port */ 1616 tb_dp_port_enable(in, false); 1617 goto err_free; 1618 } 1619 tunnel->paths[TB_DP_VIDEO_PATH_OUT] = path; 1620 if (tb_dp_init_video_path(tunnel->paths[TB_DP_VIDEO_PATH_OUT], false)) 1621 goto err_free; 1622 1623 path = tb_path_discover(in, TB_DP_AUX_TX_HOPID, NULL, -1, NULL, "AUX TX", 1624 alloc_hopid); 1625 if (!path) 1626 goto err_deactivate; 1627 tunnel->paths[TB_DP_AUX_PATH_OUT] = path; 1628 tb_dp_init_aux_path(tunnel->paths[TB_DP_AUX_PATH_OUT], false); 1629 1630 path = tb_path_discover(tunnel->dst_port, -1, in, TB_DP_AUX_RX_HOPID, 1631 &port, "AUX RX", alloc_hopid); 1632 if (!path) 1633 goto err_deactivate; 1634 tunnel->paths[TB_DP_AUX_PATH_IN] = path; 1635 tb_dp_init_aux_path(tunnel->paths[TB_DP_AUX_PATH_IN], false); 1636 1637 /* Validate that the tunnel is complete */ 1638 if (!tb_port_is_dpout(tunnel->dst_port)) { 1639 tb_port_warn(in, "path does not end on a DP adapter, cleaning up\n"); 1640 goto err_deactivate; 1641 } 1642 1643 if (!tb_dp_port_is_enabled(tunnel->dst_port)) 1644 goto err_deactivate; 1645 1646 if (!tb_dp_port_hpd_is_active(tunnel->dst_port)) 1647 goto err_deactivate; 1648 1649 if (port != tunnel->src_port) { 1650 tb_tunnel_warn(tunnel, "path is not complete, cleaning up\n"); 1651 goto err_deactivate; 1652 } 1653 1654 tb_dp_dump(tunnel); 1655 1656 tb_tunnel_dbg(tunnel, "discovered\n"); 1657 return tunnel; 1658 1659 err_deactivate: 1660 tb_tunnel_deactivate(tunnel); 1661 err_free: 1662 tb_tunnel_put(tunnel); 1663 1664 return NULL; 1665 } 1666 1667 /** 1668 * tb_tunnel_alloc_dp() - allocate a Display Port tunnel 1669 * @tb: Pointer to the domain structure 1670 * @in: DP in adapter port 1671 * @out: DP out adapter port 1672 * @link_nr: Preferred lane adapter when the link is not bonded 1673 * @max_up: Maximum available upstream bandwidth for the DP tunnel. 1674 * %0 if no available bandwidth. 1675 * @max_down: Maximum available downstream bandwidth for the DP tunnel. 1676 * %0 if no available bandwidth. 1677 * @callback: Optional callback that is called when the DP tunnel is 1678 * fully activated (or there is an error) 1679 * @callback_data: Optional data for @callback 1680 * 1681 * Allocates a tunnel between @in and @out that is capable of tunneling 1682 * Display Port traffic. If @callback is not %NULL it will be called 1683 * after tb_tunnel_activate() once the tunnel has been fully activated. 1684 * It can call tb_tunnel_is_active() to check if activation was 1685 * successful (or if it returns %false there was some sort of issue). 1686 * The @callback is called without @tb->lock held. 1687 * 1688 * Return: Pointer to @struct tb_tunnel or %NULL in case of failure. 1689 */ 1690 struct tb_tunnel *tb_tunnel_alloc_dp(struct tb *tb, struct tb_port *in, 1691 struct tb_port *out, int link_nr, 1692 int max_up, int max_down, 1693 void (*callback)(struct tb_tunnel *, void *), 1694 void *callback_data) 1695 { 1696 struct tb_tunnel *tunnel; 1697 struct tb_path **paths; 1698 struct tb_path *path; 1699 bool pm_support; 1700 1701 if (WARN_ON(!in->cap_adap || !out->cap_adap)) 1702 return NULL; 1703 1704 tunnel = tb_tunnel_alloc(tb, 3, TB_TUNNEL_DP); 1705 if (!tunnel) 1706 return NULL; 1707 1708 tunnel->pre_activate = tb_dp_pre_activate; 1709 tunnel->activate = tb_dp_activate; 1710 tunnel->post_deactivate = tb_dp_post_deactivate; 1711 tunnel->maximum_bandwidth = tb_dp_maximum_bandwidth; 1712 tunnel->allocated_bandwidth = tb_dp_allocated_bandwidth; 1713 tunnel->alloc_bandwidth = tb_dp_alloc_bandwidth; 1714 tunnel->consumed_bandwidth = tb_dp_consumed_bandwidth; 1715 tunnel->src_port = in; 1716 tunnel->dst_port = out; 1717 tunnel->max_up = max_up; 1718 tunnel->max_down = max_down; 1719 tunnel->callback = callback; 1720 tunnel->callback_data = callback_data; 1721 INIT_DELAYED_WORK(&tunnel->dprx_work, tb_dp_dprx_work); 1722 1723 paths = tunnel->paths; 1724 pm_support = usb4_switch_version(in->sw) >= 2; 1725 1726 path = tb_path_alloc(tb, in, TB_DP_VIDEO_HOPID, out, TB_DP_VIDEO_HOPID, 1727 link_nr, "Video"); 1728 if (!path) 1729 goto err_free; 1730 tb_dp_init_video_path(path, pm_support); 1731 paths[TB_DP_VIDEO_PATH_OUT] = path; 1732 1733 path = tb_path_alloc(tb, in, TB_DP_AUX_TX_HOPID, out, 1734 TB_DP_AUX_TX_HOPID, link_nr, "AUX TX"); 1735 if (!path) 1736 goto err_free; 1737 tb_dp_init_aux_path(path, pm_support); 1738 paths[TB_DP_AUX_PATH_OUT] = path; 1739 1740 path = tb_path_alloc(tb, out, TB_DP_AUX_RX_HOPID, in, 1741 TB_DP_AUX_RX_HOPID, link_nr, "AUX RX"); 1742 if (!path) 1743 goto err_free; 1744 tb_dp_init_aux_path(path, pm_support); 1745 paths[TB_DP_AUX_PATH_IN] = path; 1746 1747 return tunnel; 1748 1749 err_free: 1750 tb_tunnel_put(tunnel); 1751 return NULL; 1752 } 1753 1754 static unsigned int tb_dma_available_credits(const struct tb_port *port) 1755 { 1756 const struct tb_switch *sw = port->sw; 1757 int credits; 1758 1759 credits = tb_available_credits(port, NULL); 1760 if (tb_acpi_may_tunnel_pcie()) 1761 credits -= sw->max_pcie_credits; 1762 credits -= port->dma_credits; 1763 1764 return credits > 0 ? credits : 0; 1765 } 1766 1767 static int tb_dma_reserve_credits(struct tb_path_hop *hop, unsigned int credits) 1768 { 1769 struct tb_port *port = hop->in_port; 1770 1771 if (tb_port_use_credit_allocation(port)) { 1772 unsigned int available = tb_dma_available_credits(port); 1773 1774 /* 1775 * Need to have at least TB_MIN_DMA_CREDITS, otherwise 1776 * DMA path cannot be established. 1777 */ 1778 if (available < TB_MIN_DMA_CREDITS) 1779 return -ENOSPC; 1780 1781 while (credits > available) 1782 credits--; 1783 1784 tb_port_dbg(port, "reserving %u credits for DMA path\n", 1785 credits); 1786 1787 port->dma_credits += credits; 1788 } else { 1789 if (tb_port_is_null(port)) 1790 credits = port->bonded ? 14 : 6; 1791 else 1792 credits = min(port->total_credits, credits); 1793 } 1794 1795 hop->initial_credits = credits; 1796 return 0; 1797 } 1798 1799 /* Path from lane adapter to NHI */ 1800 static int tb_dma_init_rx_path(struct tb_path *path, unsigned int credits) 1801 { 1802 struct tb_path_hop *hop; 1803 unsigned int i, tmp; 1804 1805 path->egress_fc_enable = TB_PATH_SOURCE | TB_PATH_INTERNAL; 1806 path->ingress_fc_enable = TB_PATH_ALL; 1807 path->egress_shared_buffer = TB_PATH_NONE; 1808 path->ingress_shared_buffer = TB_PATH_NONE; 1809 path->priority = TB_DMA_PRIORITY; 1810 path->weight = TB_DMA_WEIGHT; 1811 path->clear_fc = true; 1812 1813 /* 1814 * First lane adapter is the one connected to the remote host. 1815 * We don't tunnel other traffic over this link so we can use 1816 * all the credits (except the ones reserved for control traffic). 1817 */ 1818 hop = &path->hops[0]; 1819 tmp = min(tb_usable_credits(hop->in_port), credits); 1820 hop->initial_credits = tmp; 1821 hop->in_port->dma_credits += tmp; 1822 1823 for (i = 1; i < path->path_length; i++) { 1824 int ret; 1825 1826 ret = tb_dma_reserve_credits(&path->hops[i], credits); 1827 if (ret) 1828 return ret; 1829 } 1830 1831 return 0; 1832 } 1833 1834 /* Path from NHI to lane adapter */ 1835 static int tb_dma_init_tx_path(struct tb_path *path, unsigned int credits) 1836 { 1837 struct tb_path_hop *hop; 1838 1839 path->egress_fc_enable = TB_PATH_ALL; 1840 path->ingress_fc_enable = TB_PATH_ALL; 1841 path->egress_shared_buffer = TB_PATH_NONE; 1842 path->ingress_shared_buffer = TB_PATH_NONE; 1843 path->priority = TB_DMA_PRIORITY; 1844 path->weight = TB_DMA_WEIGHT; 1845 path->clear_fc = true; 1846 1847 tb_path_for_each_hop(path, hop) { 1848 int ret; 1849 1850 ret = tb_dma_reserve_credits(hop, credits); 1851 if (ret) 1852 return ret; 1853 } 1854 1855 return 0; 1856 } 1857 1858 static void tb_dma_release_credits(struct tb_path_hop *hop) 1859 { 1860 struct tb_port *port = hop->in_port; 1861 1862 if (tb_port_use_credit_allocation(port)) { 1863 port->dma_credits -= hop->initial_credits; 1864 1865 tb_port_dbg(port, "released %u DMA path credits\n", 1866 hop->initial_credits); 1867 } 1868 } 1869 1870 static void tb_dma_destroy_path(struct tb_path *path) 1871 { 1872 struct tb_path_hop *hop; 1873 1874 tb_path_for_each_hop(path, hop) 1875 tb_dma_release_credits(hop); 1876 } 1877 1878 static void tb_dma_destroy(struct tb_tunnel *tunnel) 1879 { 1880 int i; 1881 1882 for (i = 0; i < tunnel->npaths; i++) { 1883 if (!tunnel->paths[i]) 1884 continue; 1885 tb_dma_destroy_path(tunnel->paths[i]); 1886 } 1887 } 1888 1889 /** 1890 * tb_tunnel_alloc_dma() - allocate a DMA tunnel 1891 * @tb: Pointer to the domain structure 1892 * @nhi: Host controller port 1893 * @dst: Destination null port which the other domain is connected to 1894 * @transmit_path: HopID used for transmitting packets 1895 * @transmit_ring: NHI ring number used to send packets towards the 1896 * other domain. Set to %-1 if TX path is not needed. 1897 * @receive_path: HopID used for receiving packets 1898 * @receive_ring: NHI ring number used to receive packets from the 1899 * other domain. Set to %-1 if RX path is not needed. 1900 * 1901 * Return: Pointer to @struct tb_tunnel or %NULL in case of failure. 1902 */ 1903 struct tb_tunnel *tb_tunnel_alloc_dma(struct tb *tb, struct tb_port *nhi, 1904 struct tb_port *dst, int transmit_path, 1905 int transmit_ring, int receive_path, 1906 int receive_ring) 1907 { 1908 struct tb_tunnel *tunnel; 1909 size_t npaths = 0, i = 0; 1910 struct tb_path *path; 1911 int credits; 1912 1913 /* Ring 0 is reserved for control channel */ 1914 if (WARN_ON(!receive_ring || !transmit_ring)) 1915 return NULL; 1916 1917 if (receive_ring > 0) 1918 npaths++; 1919 if (transmit_ring > 0) 1920 npaths++; 1921 1922 if (WARN_ON(!npaths)) 1923 return NULL; 1924 1925 tunnel = tb_tunnel_alloc(tb, npaths, TB_TUNNEL_DMA); 1926 if (!tunnel) 1927 return NULL; 1928 1929 tunnel->src_port = nhi; 1930 tunnel->dst_port = dst; 1931 tunnel->destroy = tb_dma_destroy; 1932 1933 credits = min_not_zero(dma_credits, nhi->sw->max_dma_credits); 1934 1935 if (receive_ring > 0) { 1936 path = tb_path_alloc(tb, dst, receive_path, nhi, receive_ring, 0, 1937 "DMA RX"); 1938 if (!path) 1939 goto err_free; 1940 tunnel->paths[i++] = path; 1941 if (tb_dma_init_rx_path(path, credits)) { 1942 tb_tunnel_dbg(tunnel, "not enough buffers for RX path\n"); 1943 goto err_free; 1944 } 1945 } 1946 1947 if (transmit_ring > 0) { 1948 path = tb_path_alloc(tb, nhi, transmit_ring, dst, transmit_path, 0, 1949 "DMA TX"); 1950 if (!path) 1951 goto err_free; 1952 tunnel->paths[i++] = path; 1953 if (tb_dma_init_tx_path(path, credits)) { 1954 tb_tunnel_dbg(tunnel, "not enough buffers for TX path\n"); 1955 goto err_free; 1956 } 1957 } 1958 1959 return tunnel; 1960 1961 err_free: 1962 tb_tunnel_put(tunnel); 1963 return NULL; 1964 } 1965 1966 /** 1967 * tb_tunnel_match_dma() - Match DMA tunnel 1968 * @tunnel: Tunnel to match 1969 * @transmit_path: HopID used for transmitting packets. Pass %-1 to ignore. 1970 * @transmit_ring: NHI ring number used to send packets towards the 1971 * other domain. Pass %-1 to ignore. 1972 * @receive_path: HopID used for receiving packets. Pass %-1 to ignore. 1973 * @receive_ring: NHI ring number used to receive packets from the 1974 * other domain. Pass %-1 to ignore. 1975 * 1976 * This function can be used to match specific DMA tunnel, if there are 1977 * multiple DMA tunnels going through the same XDomain connection. 1978 * 1979 * Return: %true if there is a match, %false otherwise. 1980 */ 1981 bool tb_tunnel_match_dma(const struct tb_tunnel *tunnel, int transmit_path, 1982 int transmit_ring, int receive_path, int receive_ring) 1983 { 1984 const struct tb_path *tx_path = NULL, *rx_path = NULL; 1985 int i; 1986 1987 if (!receive_ring || !transmit_ring) 1988 return false; 1989 1990 for (i = 0; i < tunnel->npaths; i++) { 1991 const struct tb_path *path = tunnel->paths[i]; 1992 1993 if (!path) 1994 continue; 1995 1996 if (tb_port_is_nhi(path->hops[0].in_port)) 1997 tx_path = path; 1998 else if (tb_port_is_nhi(path->hops[path->path_length - 1].out_port)) 1999 rx_path = path; 2000 } 2001 2002 if (transmit_ring > 0 || transmit_path > 0) { 2003 if (!tx_path) 2004 return false; 2005 if (transmit_ring > 0 && 2006 (tx_path->hops[0].in_hop_index != transmit_ring)) 2007 return false; 2008 if (transmit_path > 0 && 2009 (tx_path->hops[tx_path->path_length - 1].next_hop_index != transmit_path)) 2010 return false; 2011 } 2012 2013 if (receive_ring > 0 || receive_path > 0) { 2014 if (!rx_path) 2015 return false; 2016 if (receive_path > 0 && 2017 (rx_path->hops[0].in_hop_index != receive_path)) 2018 return false; 2019 if (receive_ring > 0 && 2020 (rx_path->hops[rx_path->path_length - 1].next_hop_index != receive_ring)) 2021 return false; 2022 } 2023 2024 return true; 2025 } 2026 2027 static int tb_usb3_max_link_rate(struct tb_port *up, struct tb_port *down) 2028 { 2029 int ret, up_max_rate, down_max_rate; 2030 2031 ret = usb4_usb3_port_max_link_rate(up); 2032 if (ret < 0) 2033 return ret; 2034 up_max_rate = ret; 2035 2036 ret = usb4_usb3_port_max_link_rate(down); 2037 if (ret < 0) 2038 return ret; 2039 down_max_rate = ret; 2040 2041 return min(up_max_rate, down_max_rate); 2042 } 2043 2044 static int tb_usb3_pre_activate(struct tb_tunnel *tunnel) 2045 { 2046 tb_tunnel_dbg(tunnel, "allocating initial bandwidth %d/%d Mb/s\n", 2047 tunnel->allocated_up, tunnel->allocated_down); 2048 2049 return usb4_usb3_port_allocate_bandwidth(tunnel->src_port, 2050 &tunnel->allocated_up, 2051 &tunnel->allocated_down); 2052 } 2053 2054 static int tb_usb3_activate(struct tb_tunnel *tunnel, bool activate) 2055 { 2056 int res; 2057 2058 res = tb_usb3_port_enable(tunnel->src_port, activate); 2059 if (res) 2060 return res; 2061 2062 if (tb_port_is_usb3_up(tunnel->dst_port)) 2063 return tb_usb3_port_enable(tunnel->dst_port, activate); 2064 2065 return 0; 2066 } 2067 2068 static int tb_usb3_consumed_bandwidth(struct tb_tunnel *tunnel, 2069 int *consumed_up, int *consumed_down) 2070 { 2071 struct tb_port *port = tb_upstream_port(tunnel->dst_port->sw); 2072 int pcie_weight = tb_acpi_may_tunnel_pcie() ? TB_PCI_WEIGHT : 0; 2073 2074 /* 2075 * PCIe tunneling, if enabled, affects the USB3 bandwidth so 2076 * take that into account here. 2077 */ 2078 *consumed_up = tunnel->allocated_up * 2079 (TB_USB3_WEIGHT + pcie_weight) / TB_USB3_WEIGHT; 2080 *consumed_down = tunnel->allocated_down * 2081 (TB_USB3_WEIGHT + pcie_weight) / TB_USB3_WEIGHT; 2082 2083 if (tb_port_get_link_generation(port) >= 4) { 2084 *consumed_up = max(*consumed_up, USB4_V2_USB3_MIN_BANDWIDTH); 2085 *consumed_down = max(*consumed_down, USB4_V2_USB3_MIN_BANDWIDTH); 2086 } 2087 2088 return 0; 2089 } 2090 2091 static int tb_usb3_release_unused_bandwidth(struct tb_tunnel *tunnel) 2092 { 2093 int ret; 2094 2095 ret = usb4_usb3_port_release_bandwidth(tunnel->src_port, 2096 &tunnel->allocated_up, 2097 &tunnel->allocated_down); 2098 if (ret) 2099 return ret; 2100 2101 tb_tunnel_dbg(tunnel, "decreased bandwidth allocation to %d/%d Mb/s\n", 2102 tunnel->allocated_up, tunnel->allocated_down); 2103 return 0; 2104 } 2105 2106 static void tb_usb3_reclaim_available_bandwidth(struct tb_tunnel *tunnel, 2107 int *available_up, 2108 int *available_down) 2109 { 2110 int ret, max_rate, allocate_up, allocate_down; 2111 2112 ret = tb_usb3_max_link_rate(tunnel->dst_port, tunnel->src_port); 2113 if (ret < 0) { 2114 tb_tunnel_warn(tunnel, "failed to read maximum link rate\n"); 2115 return; 2116 } 2117 2118 /* 2119 * 90% of the max rate can be allocated for isochronous 2120 * transfers. 2121 */ 2122 max_rate = ret * 90 / 100; 2123 2124 /* No need to reclaim if already at maximum */ 2125 if (tunnel->allocated_up >= max_rate && 2126 tunnel->allocated_down >= max_rate) 2127 return; 2128 2129 /* Don't go lower than what is already allocated */ 2130 allocate_up = min(max_rate, *available_up); 2131 if (allocate_up < tunnel->allocated_up) 2132 allocate_up = tunnel->allocated_up; 2133 2134 allocate_down = min(max_rate, *available_down); 2135 if (allocate_down < tunnel->allocated_down) 2136 allocate_down = tunnel->allocated_down; 2137 2138 /* If no changes no need to do more */ 2139 if (allocate_up == tunnel->allocated_up && 2140 allocate_down == tunnel->allocated_down) 2141 return; 2142 2143 ret = usb4_usb3_port_allocate_bandwidth(tunnel->src_port, &allocate_up, 2144 &allocate_down); 2145 if (ret) { 2146 tb_tunnel_info(tunnel, "failed to allocate bandwidth\n"); 2147 return; 2148 } 2149 2150 tunnel->allocated_up = allocate_up; 2151 *available_up -= tunnel->allocated_up; 2152 2153 tunnel->allocated_down = allocate_down; 2154 *available_down -= tunnel->allocated_down; 2155 2156 tb_tunnel_dbg(tunnel, "increased bandwidth allocation to %d/%d Mb/s\n", 2157 tunnel->allocated_up, tunnel->allocated_down); 2158 } 2159 2160 static void tb_usb3_init_credits(struct tb_path_hop *hop) 2161 { 2162 struct tb_port *port = hop->in_port; 2163 struct tb_switch *sw = port->sw; 2164 unsigned int credits; 2165 2166 if (tb_port_use_credit_allocation(port)) { 2167 credits = sw->max_usb3_credits; 2168 } else { 2169 if (tb_port_is_null(port)) 2170 credits = port->bonded ? 32 : 16; 2171 else 2172 credits = 7; 2173 } 2174 2175 hop->initial_credits = credits; 2176 } 2177 2178 static void tb_usb3_init_path(struct tb_path *path) 2179 { 2180 struct tb_path_hop *hop; 2181 2182 path->egress_fc_enable = TB_PATH_SOURCE | TB_PATH_INTERNAL; 2183 path->egress_shared_buffer = TB_PATH_NONE; 2184 path->ingress_fc_enable = TB_PATH_ALL; 2185 path->ingress_shared_buffer = TB_PATH_NONE; 2186 path->priority = TB_USB3_PRIORITY; 2187 path->weight = TB_USB3_WEIGHT; 2188 path->drop_packages = 0; 2189 2190 tb_path_for_each_hop(path, hop) 2191 tb_usb3_init_credits(hop); 2192 } 2193 2194 /** 2195 * tb_tunnel_discover_usb3() - Discover existing USB3 tunnels 2196 * @tb: Pointer to the domain structure 2197 * @down: USB3 downstream adapter 2198 * @alloc_hopid: Allocate HopIDs from visited ports 2199 * 2200 * If @down adapter is active, follows the tunnel to the USB3 upstream 2201 * adapter and back. 2202 * 2203 * Return: Pointer to &struct tb_tunnel or %NULL if there was no tunnel. 2204 */ 2205 struct tb_tunnel *tb_tunnel_discover_usb3(struct tb *tb, struct tb_port *down, 2206 bool alloc_hopid) 2207 { 2208 struct tb_tunnel *tunnel; 2209 struct tb_path *path; 2210 2211 if (!tb_usb3_port_is_enabled(down)) 2212 return NULL; 2213 2214 tunnel = tb_tunnel_alloc(tb, 2, TB_TUNNEL_USB3); 2215 if (!tunnel) 2216 return NULL; 2217 2218 tunnel->activate = tb_usb3_activate; 2219 tunnel->src_port = down; 2220 2221 /* 2222 * Discover both paths even if they are not complete. We will 2223 * clean them up by calling tb_tunnel_deactivate() below in that 2224 * case. 2225 */ 2226 path = tb_path_discover(down, TB_USB3_HOPID, NULL, -1, 2227 &tunnel->dst_port, "USB3 Down", alloc_hopid); 2228 if (!path) { 2229 /* Just disable the downstream port */ 2230 tb_usb3_port_enable(down, false); 2231 goto err_free; 2232 } 2233 tunnel->paths[TB_USB3_PATH_DOWN] = path; 2234 tb_usb3_init_path(tunnel->paths[TB_USB3_PATH_DOWN]); 2235 2236 path = tb_path_discover(tunnel->dst_port, -1, down, TB_USB3_HOPID, NULL, 2237 "USB3 Up", alloc_hopid); 2238 if (!path) 2239 goto err_deactivate; 2240 tunnel->paths[TB_USB3_PATH_UP] = path; 2241 tb_usb3_init_path(tunnel->paths[TB_USB3_PATH_UP]); 2242 2243 /* Validate that the tunnel is complete */ 2244 if (!tb_port_is_usb3_up(tunnel->dst_port)) { 2245 tb_port_warn(tunnel->dst_port, 2246 "path does not end on an USB3 adapter, cleaning up\n"); 2247 goto err_deactivate; 2248 } 2249 2250 if (down != tunnel->src_port) { 2251 tb_tunnel_warn(tunnel, "path is not complete, cleaning up\n"); 2252 goto err_deactivate; 2253 } 2254 2255 if (!tb_usb3_port_is_enabled(tunnel->dst_port)) { 2256 tb_tunnel_warn(tunnel, 2257 "tunnel is not fully activated, cleaning up\n"); 2258 goto err_deactivate; 2259 } 2260 2261 if (!tb_route(down->sw)) { 2262 int ret; 2263 2264 /* 2265 * Read the initial bandwidth allocation for the first 2266 * hop tunnel. 2267 */ 2268 ret = usb4_usb3_port_allocated_bandwidth(down, 2269 &tunnel->allocated_up, &tunnel->allocated_down); 2270 if (ret) 2271 goto err_deactivate; 2272 2273 tb_tunnel_dbg(tunnel, "currently allocated bandwidth %d/%d Mb/s\n", 2274 tunnel->allocated_up, tunnel->allocated_down); 2275 2276 tunnel->pre_activate = tb_usb3_pre_activate; 2277 tunnel->consumed_bandwidth = tb_usb3_consumed_bandwidth; 2278 tunnel->release_unused_bandwidth = 2279 tb_usb3_release_unused_bandwidth; 2280 tunnel->reclaim_available_bandwidth = 2281 tb_usb3_reclaim_available_bandwidth; 2282 } 2283 2284 tb_tunnel_dbg(tunnel, "discovered\n"); 2285 return tunnel; 2286 2287 err_deactivate: 2288 tb_tunnel_deactivate(tunnel); 2289 err_free: 2290 tb_tunnel_put(tunnel); 2291 2292 return NULL; 2293 } 2294 2295 /** 2296 * tb_tunnel_alloc_usb3() - allocate a USB3 tunnel 2297 * @tb: Pointer to the domain structure 2298 * @up: USB3 upstream adapter port 2299 * @down: USB3 downstream adapter port 2300 * @max_up: Maximum available upstream bandwidth for the USB3 tunnel. 2301 * %0 if no available bandwidth. 2302 * @max_down: Maximum available downstream bandwidth for the USB3 tunnel. 2303 * %0 if no available bandwidth. 2304 * 2305 * Allocate an USB3 tunnel. The ports must be of type @TB_TYPE_USB3_UP and 2306 * @TB_TYPE_USB3_DOWN. 2307 * 2308 * Return: Pointer to @struct tb_tunnel or %NULL in case of failure. 2309 */ 2310 struct tb_tunnel *tb_tunnel_alloc_usb3(struct tb *tb, struct tb_port *up, 2311 struct tb_port *down, int max_up, 2312 int max_down) 2313 { 2314 struct tb_tunnel *tunnel; 2315 struct tb_path *path; 2316 int max_rate = 0; 2317 2318 if (!tb_route(down->sw) && (max_up > 0 || max_down > 0)) { 2319 /* 2320 * For USB3 isochronous transfers, we allow bandwidth which is 2321 * not higher than 90% of maximum supported bandwidth by USB3 2322 * adapters. 2323 */ 2324 max_rate = tb_usb3_max_link_rate(down, up); 2325 if (max_rate < 0) 2326 return NULL; 2327 2328 max_rate = max_rate * 90 / 100; 2329 tb_port_dbg(up, "maximum required bandwidth for USB3 tunnel %d Mb/s\n", 2330 max_rate); 2331 } 2332 2333 tunnel = tb_tunnel_alloc(tb, 2, TB_TUNNEL_USB3); 2334 if (!tunnel) 2335 return NULL; 2336 2337 tunnel->activate = tb_usb3_activate; 2338 tunnel->src_port = down; 2339 tunnel->dst_port = up; 2340 tunnel->max_up = max_up; 2341 tunnel->max_down = max_down; 2342 2343 path = tb_path_alloc(tb, down, TB_USB3_HOPID, up, TB_USB3_HOPID, 0, 2344 "USB3 Down"); 2345 if (!path) 2346 goto err_free; 2347 tb_usb3_init_path(path); 2348 tunnel->paths[TB_USB3_PATH_DOWN] = path; 2349 2350 path = tb_path_alloc(tb, up, TB_USB3_HOPID, down, TB_USB3_HOPID, 0, 2351 "USB3 Up"); 2352 if (!path) 2353 goto err_free; 2354 tb_usb3_init_path(path); 2355 tunnel->paths[TB_USB3_PATH_UP] = path; 2356 2357 if (!tb_route(down->sw)) { 2358 tunnel->allocated_up = min(max_rate, max_up); 2359 tunnel->allocated_down = min(max_rate, max_down); 2360 2361 tunnel->pre_activate = tb_usb3_pre_activate; 2362 tunnel->consumed_bandwidth = tb_usb3_consumed_bandwidth; 2363 tunnel->release_unused_bandwidth = 2364 tb_usb3_release_unused_bandwidth; 2365 tunnel->reclaim_available_bandwidth = 2366 tb_usb3_reclaim_available_bandwidth; 2367 } 2368 2369 return tunnel; 2370 2371 err_free: 2372 tb_tunnel_put(tunnel); 2373 return NULL; 2374 } 2375 2376 /** 2377 * tb_tunnel_is_invalid - check whether an activated path is still valid 2378 * @tunnel: Tunnel to check 2379 * 2380 * Return: %true if path is valid, %false otherwise. 2381 */ 2382 bool tb_tunnel_is_invalid(struct tb_tunnel *tunnel) 2383 { 2384 int i; 2385 2386 for (i = 0; i < tunnel->npaths; i++) { 2387 WARN_ON(!tunnel->paths[i]->activated); 2388 if (tb_path_is_invalid(tunnel->paths[i])) 2389 return true; 2390 } 2391 2392 return false; 2393 } 2394 2395 /** 2396 * tb_tunnel_activate() - activate a tunnel 2397 * @tunnel: Tunnel to activate 2398 * 2399 * Return: 2400 * * %0 - On success. 2401 * * %-EINPROGRESS - If the tunnel activation is still in progress (that's 2402 * for DP tunnels to complete DPRX capabilities read). 2403 * * Negative errno - Another error occurred. 2404 */ 2405 int tb_tunnel_activate(struct tb_tunnel *tunnel) 2406 { 2407 int res, i; 2408 2409 tb_tunnel_dbg(tunnel, "activating\n"); 2410 2411 /* 2412 * Make sure all paths are properly disabled before enabling 2413 * them again. 2414 */ 2415 for (i = 0; i < tunnel->npaths; i++) { 2416 if (tunnel->paths[i]->activated) { 2417 tb_path_deactivate(tunnel->paths[i]); 2418 tunnel->paths[i]->activated = false; 2419 } 2420 } 2421 2422 tunnel->state = TB_TUNNEL_ACTIVATING; 2423 2424 if (tunnel->pre_activate) { 2425 res = tunnel->pre_activate(tunnel); 2426 if (res) 2427 return res; 2428 } 2429 2430 for (i = 0; i < tunnel->npaths; i++) { 2431 res = tb_path_activate(tunnel->paths[i]); 2432 if (res) 2433 goto err; 2434 } 2435 2436 if (tunnel->activate) { 2437 res = tunnel->activate(tunnel, true); 2438 if (res) { 2439 if (res == -EINPROGRESS) 2440 return res; 2441 goto err; 2442 } 2443 } 2444 2445 tb_tunnel_set_active(tunnel, true); 2446 return 0; 2447 2448 err: 2449 tb_tunnel_warn(tunnel, "activation failed\n"); 2450 tb_tunnel_deactivate(tunnel); 2451 return res; 2452 } 2453 2454 /** 2455 * tb_tunnel_deactivate() - deactivate a tunnel 2456 * @tunnel: Tunnel to deactivate 2457 */ 2458 void tb_tunnel_deactivate(struct tb_tunnel *tunnel) 2459 { 2460 int i; 2461 2462 tb_tunnel_dbg(tunnel, "deactivating\n"); 2463 2464 if (tunnel->activate) 2465 tunnel->activate(tunnel, false); 2466 2467 for (i = 0; i < tunnel->npaths; i++) { 2468 if (tunnel->paths[i] && tunnel->paths[i]->activated) 2469 tb_path_deactivate(tunnel->paths[i]); 2470 } 2471 2472 if (tunnel->post_deactivate) 2473 tunnel->post_deactivate(tunnel); 2474 2475 tb_tunnel_set_active(tunnel, false); 2476 } 2477 2478 /** 2479 * tb_tunnel_port_on_path() - Does the tunnel go through port 2480 * @tunnel: Tunnel to check 2481 * @port: Port to check 2482 * 2483 * Return: %true if @tunnel goes through @port (direction does not matter), 2484 * %false otherwise. 2485 */ 2486 bool tb_tunnel_port_on_path(const struct tb_tunnel *tunnel, 2487 const struct tb_port *port) 2488 { 2489 int i; 2490 2491 for (i = 0; i < tunnel->npaths; i++) { 2492 if (!tunnel->paths[i]) 2493 continue; 2494 2495 if (tb_path_port_on_path(tunnel->paths[i], port)) 2496 return true; 2497 } 2498 2499 return false; 2500 } 2501 2502 // Is tb_tunnel_activate() called for the tunnel 2503 static bool tb_tunnel_is_activated(const struct tb_tunnel *tunnel) 2504 { 2505 return tunnel->state == TB_TUNNEL_ACTIVATING || tb_tunnel_is_active(tunnel); 2506 } 2507 2508 /** 2509 * tb_tunnel_maximum_bandwidth() - Return maximum possible bandwidth 2510 * @tunnel: Tunnel to check 2511 * @max_up: Maximum upstream bandwidth in Mb/s 2512 * @max_down: Maximum downstream bandwidth in Mb/s 2513 * 2514 * Return: 2515 * * Maximum possible bandwidth this tunnel can support if not 2516 * limited by other bandwidth clients. 2517 * * %-EOPNOTSUPP - If the tunnel does not support this function. 2518 * * %-ENOTCONN - If the tunnel is not active. 2519 */ 2520 int tb_tunnel_maximum_bandwidth(struct tb_tunnel *tunnel, int *max_up, 2521 int *max_down) 2522 { 2523 if (!tb_tunnel_is_active(tunnel)) 2524 return -ENOTCONN; 2525 2526 if (tunnel->maximum_bandwidth) 2527 return tunnel->maximum_bandwidth(tunnel, max_up, max_down); 2528 return -EOPNOTSUPP; 2529 } 2530 2531 /** 2532 * tb_tunnel_allocated_bandwidth() - Return bandwidth allocated for the tunnel 2533 * @tunnel: Tunnel to check 2534 * @allocated_up: Currently allocated upstream bandwidth in Mb/s is stored here 2535 * @allocated_down: Currently allocated downstream bandwidth in Mb/s is 2536 * stored here 2537 * 2538 * Return: 2539 * * Bandwidth allocated for the tunnel. This may be higher than what the 2540 * tunnel actually consumes. 2541 * * %-EOPNOTSUPP - If the tunnel does not support this function. 2542 * * %-ENOTCONN - If the tunnel is not active. 2543 * * Negative errno - Another error occurred. 2544 */ 2545 int tb_tunnel_allocated_bandwidth(struct tb_tunnel *tunnel, int *allocated_up, 2546 int *allocated_down) 2547 { 2548 if (!tb_tunnel_is_active(tunnel)) 2549 return -ENOTCONN; 2550 2551 if (tunnel->allocated_bandwidth) 2552 return tunnel->allocated_bandwidth(tunnel, allocated_up, 2553 allocated_down); 2554 return -EOPNOTSUPP; 2555 } 2556 2557 /** 2558 * tb_tunnel_alloc_bandwidth() - Change tunnel bandwidth allocation 2559 * @tunnel: Tunnel whose bandwidth allocation to change 2560 * @alloc_up: New upstream bandwidth in Mb/s 2561 * @alloc_down: New downstream bandwidth in Mb/s 2562 * 2563 * Tries to change tunnel bandwidth allocation. 2564 * 2565 * Return: 2566 * * %0 - On success. Updates @alloc_up and @alloc_down to values that were 2567 * actually allocated (it may not be the same as passed originally). 2568 * * Negative errno - In case of failure. 2569 */ 2570 int tb_tunnel_alloc_bandwidth(struct tb_tunnel *tunnel, int *alloc_up, 2571 int *alloc_down) 2572 { 2573 if (!tb_tunnel_is_active(tunnel)) 2574 return -ENOTCONN; 2575 2576 if (tunnel->alloc_bandwidth) { 2577 int ret; 2578 2579 ret = tunnel->alloc_bandwidth(tunnel, alloc_up, alloc_down); 2580 if (ret) 2581 return ret; 2582 2583 tb_tunnel_changed(tunnel); 2584 return 0; 2585 } 2586 2587 return -EOPNOTSUPP; 2588 } 2589 2590 /** 2591 * tb_tunnel_consumed_bandwidth() - Return bandwidth consumed by the tunnel 2592 * @tunnel: Tunnel to check 2593 * @consumed_up: Consumed bandwidth in Mb/s from @dst_port to @src_port. 2594 * Can be %NULL. 2595 * @consumed_down: Consumed bandwidth in Mb/s from @src_port to @dst_port. 2596 * Can be %NULL. 2597 * 2598 * Stores the amount of isochronous bandwidth @tunnel consumes in 2599 * @consumed_up and @consumed_down. 2600 * 2601 * Return: %0 on success, negative errno otherwise. 2602 */ 2603 int tb_tunnel_consumed_bandwidth(struct tb_tunnel *tunnel, int *consumed_up, 2604 int *consumed_down) 2605 { 2606 int up_bw = 0, down_bw = 0; 2607 2608 /* 2609 * Here we need to distinguish between not active tunnel from 2610 * tunnels that are either fully active or activation started. 2611 * The latter is true for DP tunnels where we must report the 2612 * consumed to be the maximum we gave it until DPRX capabilities 2613 * read is done by the graphics driver. 2614 */ 2615 if (tb_tunnel_is_activated(tunnel) && tunnel->consumed_bandwidth) { 2616 int ret; 2617 2618 ret = tunnel->consumed_bandwidth(tunnel, &up_bw, &down_bw); 2619 if (ret) 2620 return ret; 2621 } 2622 2623 if (consumed_up) 2624 *consumed_up = up_bw; 2625 if (consumed_down) 2626 *consumed_down = down_bw; 2627 2628 tb_tunnel_dbg(tunnel, "consumed bandwidth %d/%d Mb/s\n", up_bw, down_bw); 2629 return 0; 2630 } 2631 2632 /** 2633 * tb_tunnel_release_unused_bandwidth() - Release unused bandwidth 2634 * @tunnel: Tunnel whose unused bandwidth to release 2635 * 2636 * If tunnel supports dynamic bandwidth management (USB3 tunnels at the 2637 * moment) this function makes it release all the unused bandwidth. 2638 * 2639 * Return: %0 on success, negative errno otherwise. 2640 */ 2641 int tb_tunnel_release_unused_bandwidth(struct tb_tunnel *tunnel) 2642 { 2643 if (!tb_tunnel_is_active(tunnel)) 2644 return -ENOTCONN; 2645 2646 if (tunnel->release_unused_bandwidth) { 2647 int ret; 2648 2649 ret = tunnel->release_unused_bandwidth(tunnel); 2650 if (ret) 2651 return ret; 2652 } 2653 2654 return 0; 2655 } 2656 2657 /** 2658 * tb_tunnel_reclaim_available_bandwidth() - Reclaim available bandwidth 2659 * @tunnel: Tunnel reclaiming available bandwidth 2660 * @available_up: Available upstream bandwidth (in Mb/s) 2661 * @available_down: Available downstream bandwidth (in Mb/s) 2662 * 2663 * Reclaims bandwidth from @available_up and @available_down and updates 2664 * the variables accordingly (e.g decreases both according to what was 2665 * reclaimed by the tunnel). If nothing was reclaimed the values are 2666 * kept as is. 2667 */ 2668 void tb_tunnel_reclaim_available_bandwidth(struct tb_tunnel *tunnel, 2669 int *available_up, 2670 int *available_down) 2671 { 2672 if (!tb_tunnel_is_active(tunnel)) 2673 return; 2674 2675 if (tunnel->reclaim_available_bandwidth) 2676 tunnel->reclaim_available_bandwidth(tunnel, available_up, 2677 available_down); 2678 } 2679 2680 const char *tb_tunnel_type_name(const struct tb_tunnel *tunnel) 2681 { 2682 return tb_tunnel_names[tunnel->type]; 2683 } 2684