xref: /linux/drivers/thunderbolt/dma_test.c (revision 0ea5c948cb64bab5bc7a5516774eb8536f05aa0d)
1edc0f494SIsaac Hazan // SPDX-License-Identifier: GPL-2.0
2edc0f494SIsaac Hazan /*
3edc0f494SIsaac Hazan  * DMA traffic test driver
4edc0f494SIsaac Hazan  *
5edc0f494SIsaac Hazan  * Copyright (C) 2020, Intel Corporation
6edc0f494SIsaac Hazan  * Authors: Isaac Hazan <isaac.hazan@intel.com>
7edc0f494SIsaac Hazan  *	    Mika Westerberg <mika.westerberg@linux.intel.com>
8edc0f494SIsaac Hazan  */
9edc0f494SIsaac Hazan 
10edc0f494SIsaac Hazan #include <linux/completion.h>
11edc0f494SIsaac Hazan #include <linux/debugfs.h>
12edc0f494SIsaac Hazan #include <linux/module.h>
13edc0f494SIsaac Hazan #include <linux/sizes.h>
14edc0f494SIsaac Hazan #include <linux/thunderbolt.h>
15edc0f494SIsaac Hazan 
16edc0f494SIsaac Hazan #define DMA_TEST_TX_RING_SIZE		64
17edc0f494SIsaac Hazan #define DMA_TEST_RX_RING_SIZE		256
18edc0f494SIsaac Hazan #define DMA_TEST_FRAME_SIZE		SZ_4K
19edc0f494SIsaac Hazan #define DMA_TEST_DATA_PATTERN		0x0123456789abcdefLL
20edc0f494SIsaac Hazan #define DMA_TEST_MAX_PACKETS		1000
21edc0f494SIsaac Hazan 
22edc0f494SIsaac Hazan enum dma_test_frame_pdf {
23edc0f494SIsaac Hazan 	DMA_TEST_PDF_FRAME_START = 1,
24edc0f494SIsaac Hazan 	DMA_TEST_PDF_FRAME_END,
25edc0f494SIsaac Hazan };
26edc0f494SIsaac Hazan 
27edc0f494SIsaac Hazan struct dma_test_frame {
28edc0f494SIsaac Hazan 	struct dma_test *dma_test;
29edc0f494SIsaac Hazan 	void *data;
30edc0f494SIsaac Hazan 	struct ring_frame frame;
31edc0f494SIsaac Hazan };
32edc0f494SIsaac Hazan 
33edc0f494SIsaac Hazan enum dma_test_test_error {
34edc0f494SIsaac Hazan 	DMA_TEST_NO_ERROR,
35edc0f494SIsaac Hazan 	DMA_TEST_INTERRUPTED,
36edc0f494SIsaac Hazan 	DMA_TEST_BUFFER_ERROR,
37edc0f494SIsaac Hazan 	DMA_TEST_DMA_ERROR,
38edc0f494SIsaac Hazan 	DMA_TEST_CONFIG_ERROR,
39edc0f494SIsaac Hazan 	DMA_TEST_SPEED_ERROR,
40edc0f494SIsaac Hazan 	DMA_TEST_WIDTH_ERROR,
41edc0f494SIsaac Hazan 	DMA_TEST_BONDING_ERROR,
42edc0f494SIsaac Hazan 	DMA_TEST_PACKET_ERROR,
43edc0f494SIsaac Hazan };
44edc0f494SIsaac Hazan 
45edc0f494SIsaac Hazan static const char * const dma_test_error_names[] = {
46edc0f494SIsaac Hazan 	[DMA_TEST_NO_ERROR] = "no errors",
47edc0f494SIsaac Hazan 	[DMA_TEST_INTERRUPTED] = "interrupted by signal",
48edc0f494SIsaac Hazan 	[DMA_TEST_BUFFER_ERROR] = "no memory for packet buffers",
49edc0f494SIsaac Hazan 	[DMA_TEST_DMA_ERROR] = "DMA ring setup failed",
50edc0f494SIsaac Hazan 	[DMA_TEST_CONFIG_ERROR] = "configuration is not valid",
51edc0f494SIsaac Hazan 	[DMA_TEST_SPEED_ERROR] = "unexpected link speed",
52edc0f494SIsaac Hazan 	[DMA_TEST_WIDTH_ERROR] = "unexpected link width",
53edc0f494SIsaac Hazan 	[DMA_TEST_BONDING_ERROR] = "lane bonding configuration error",
54edc0f494SIsaac Hazan 	[DMA_TEST_PACKET_ERROR] = "packet check failed",
55edc0f494SIsaac Hazan };
56edc0f494SIsaac Hazan 
57edc0f494SIsaac Hazan enum dma_test_result {
58edc0f494SIsaac Hazan 	DMA_TEST_NOT_RUN,
59edc0f494SIsaac Hazan 	DMA_TEST_SUCCESS,
60edc0f494SIsaac Hazan 	DMA_TEST_FAIL,
61edc0f494SIsaac Hazan };
62edc0f494SIsaac Hazan 
63edc0f494SIsaac Hazan static const char * const dma_test_result_names[] = {
64edc0f494SIsaac Hazan 	[DMA_TEST_NOT_RUN] = "not run",
65edc0f494SIsaac Hazan 	[DMA_TEST_SUCCESS] = "success",
66edc0f494SIsaac Hazan 	[DMA_TEST_FAIL] = "failed",
67edc0f494SIsaac Hazan };
68edc0f494SIsaac Hazan 
69edc0f494SIsaac Hazan /**
70edc0f494SIsaac Hazan  * struct dma_test - DMA test device driver private data
71edc0f494SIsaac Hazan  * @svc: XDomain service the driver is bound to
72edc0f494SIsaac Hazan  * @xd: XDomain the service belongs to
73edc0f494SIsaac Hazan  * @rx_ring: Software ring holding RX frames
74180b0689SMika Westerberg  * @rx_hopid: HopID used for receiving frames
75edc0f494SIsaac Hazan  * @tx_ring: Software ring holding TX frames
76180b0689SMika Westerberg  * @tx_hopid: HopID used for sending fames
77edc0f494SIsaac Hazan  * @packets_to_send: Number of packets to send
78edc0f494SIsaac Hazan  * @packets_to_receive: Number of packets to receive
79edc0f494SIsaac Hazan  * @packets_sent: Actual number of packets sent
80edc0f494SIsaac Hazan  * @packets_received: Actual number of packets received
81edc0f494SIsaac Hazan  * @link_speed: Expected link speed (Gb/s), %0 to use whatever is negotiated
82edc0f494SIsaac Hazan  * @link_width: Expected link width (Gb/s), %0 to use whatever is negotiated
83edc0f494SIsaac Hazan  * @crc_errors: Number of CRC errors during the test run
84edc0f494SIsaac Hazan  * @buffer_overflow_errors: Number of buffer overflow errors during the test
85edc0f494SIsaac Hazan  *			    run
86edc0f494SIsaac Hazan  * @result: Result of the last run
87edc0f494SIsaac Hazan  * @error_code: Error code of the last run
88edc0f494SIsaac Hazan  * @complete: Used to wait for the Rx to complete
89edc0f494SIsaac Hazan  * @lock: Lock serializing access to this structure
90edc0f494SIsaac Hazan  * @debugfs_dir: dentry of this dma_test
91edc0f494SIsaac Hazan  */
92edc0f494SIsaac Hazan struct dma_test {
93edc0f494SIsaac Hazan 	const struct tb_service *svc;
94edc0f494SIsaac Hazan 	struct tb_xdomain *xd;
95edc0f494SIsaac Hazan 	struct tb_ring *rx_ring;
96180b0689SMika Westerberg 	int rx_hopid;
97edc0f494SIsaac Hazan 	struct tb_ring *tx_ring;
98180b0689SMika Westerberg 	int tx_hopid;
99edc0f494SIsaac Hazan 	unsigned int packets_to_send;
100edc0f494SIsaac Hazan 	unsigned int packets_to_receive;
101edc0f494SIsaac Hazan 	unsigned int packets_sent;
102edc0f494SIsaac Hazan 	unsigned int packets_received;
103edc0f494SIsaac Hazan 	unsigned int link_speed;
104*7b304040SMika Westerberg 	enum tb_link_width link_width;
105edc0f494SIsaac Hazan 	unsigned int crc_errors;
106edc0f494SIsaac Hazan 	unsigned int buffer_overflow_errors;
107edc0f494SIsaac Hazan 	enum dma_test_result result;
108edc0f494SIsaac Hazan 	enum dma_test_test_error error_code;
109edc0f494SIsaac Hazan 	struct completion complete;
110edc0f494SIsaac Hazan 	struct mutex lock;
111edc0f494SIsaac Hazan 	struct dentry *debugfs_dir;
112edc0f494SIsaac Hazan };
113edc0f494SIsaac Hazan 
114edc0f494SIsaac Hazan /* DMA test property directory UUID: 3188cd10-6523-4a5a-a682-fdca07a248d8 */
115edc0f494SIsaac Hazan static const uuid_t dma_test_dir_uuid =
116edc0f494SIsaac Hazan 	UUID_INIT(0x3188cd10, 0x6523, 0x4a5a,
117edc0f494SIsaac Hazan 		  0xa6, 0x82, 0xfd, 0xca, 0x07, 0xa2, 0x48, 0xd8);
118edc0f494SIsaac Hazan 
119edc0f494SIsaac Hazan static struct tb_property_dir *dma_test_dir;
120edc0f494SIsaac Hazan static void *dma_test_pattern;
121edc0f494SIsaac Hazan 
dma_test_free_rings(struct dma_test * dt)122edc0f494SIsaac Hazan static void dma_test_free_rings(struct dma_test *dt)
123edc0f494SIsaac Hazan {
124edc0f494SIsaac Hazan 	if (dt->rx_ring) {
125180b0689SMika Westerberg 		tb_xdomain_release_in_hopid(dt->xd, dt->rx_hopid);
126edc0f494SIsaac Hazan 		tb_ring_free(dt->rx_ring);
127edc0f494SIsaac Hazan 		dt->rx_ring = NULL;
128edc0f494SIsaac Hazan 	}
129edc0f494SIsaac Hazan 	if (dt->tx_ring) {
130180b0689SMika Westerberg 		tb_xdomain_release_out_hopid(dt->xd, dt->tx_hopid);
131edc0f494SIsaac Hazan 		tb_ring_free(dt->tx_ring);
132edc0f494SIsaac Hazan 		dt->tx_ring = NULL;
133edc0f494SIsaac Hazan 	}
134edc0f494SIsaac Hazan }
135edc0f494SIsaac Hazan 
dma_test_start_rings(struct dma_test * dt)136edc0f494SIsaac Hazan static int dma_test_start_rings(struct dma_test *dt)
137edc0f494SIsaac Hazan {
138edc0f494SIsaac Hazan 	unsigned int flags = RING_FLAG_FRAME;
139edc0f494SIsaac Hazan 	struct tb_xdomain *xd = dt->xd;
140edc0f494SIsaac Hazan 	int ret, e2e_tx_hop = 0;
141edc0f494SIsaac Hazan 	struct tb_ring *ring;
142edc0f494SIsaac Hazan 
143edc0f494SIsaac Hazan 	/*
144edc0f494SIsaac Hazan 	 * If we are both sender and receiver (traffic goes over a
145edc0f494SIsaac Hazan 	 * special loopback dongle) enable E2E flow control. This avoids
146edc0f494SIsaac Hazan 	 * losing packets.
147edc0f494SIsaac Hazan 	 */
148edc0f494SIsaac Hazan 	if (dt->packets_to_send && dt->packets_to_receive)
149edc0f494SIsaac Hazan 		flags |= RING_FLAG_E2E;
150edc0f494SIsaac Hazan 
151edc0f494SIsaac Hazan 	if (dt->packets_to_send) {
152edc0f494SIsaac Hazan 		ring = tb_ring_alloc_tx(xd->tb->nhi, -1, DMA_TEST_TX_RING_SIZE,
153edc0f494SIsaac Hazan 					flags);
154edc0f494SIsaac Hazan 		if (!ring)
155edc0f494SIsaac Hazan 			return -ENOMEM;
156edc0f494SIsaac Hazan 
157edc0f494SIsaac Hazan 		dt->tx_ring = ring;
158edc0f494SIsaac Hazan 		e2e_tx_hop = ring->hop;
159180b0689SMika Westerberg 
160180b0689SMika Westerberg 		ret = tb_xdomain_alloc_out_hopid(xd, -1);
161180b0689SMika Westerberg 		if (ret < 0) {
162180b0689SMika Westerberg 			dma_test_free_rings(dt);
163180b0689SMika Westerberg 			return ret;
164180b0689SMika Westerberg 		}
165180b0689SMika Westerberg 
166180b0689SMika Westerberg 		dt->tx_hopid = ret;
167edc0f494SIsaac Hazan 	}
168edc0f494SIsaac Hazan 
169edc0f494SIsaac Hazan 	if (dt->packets_to_receive) {
170edc0f494SIsaac Hazan 		u16 sof_mask, eof_mask;
171edc0f494SIsaac Hazan 
172edc0f494SIsaac Hazan 		sof_mask = BIT(DMA_TEST_PDF_FRAME_START);
173edc0f494SIsaac Hazan 		eof_mask = BIT(DMA_TEST_PDF_FRAME_END);
174edc0f494SIsaac Hazan 
175edc0f494SIsaac Hazan 		ring = tb_ring_alloc_rx(xd->tb->nhi, -1, DMA_TEST_RX_RING_SIZE,
176edc0f494SIsaac Hazan 					flags, e2e_tx_hop, sof_mask, eof_mask,
177edc0f494SIsaac Hazan 					NULL, NULL);
178edc0f494SIsaac Hazan 		if (!ring) {
179edc0f494SIsaac Hazan 			dma_test_free_rings(dt);
180edc0f494SIsaac Hazan 			return -ENOMEM;
181edc0f494SIsaac Hazan 		}
182edc0f494SIsaac Hazan 
183edc0f494SIsaac Hazan 		dt->rx_ring = ring;
184180b0689SMika Westerberg 
185180b0689SMika Westerberg 		ret = tb_xdomain_alloc_in_hopid(xd, -1);
186180b0689SMika Westerberg 		if (ret < 0) {
187180b0689SMika Westerberg 			dma_test_free_rings(dt);
188180b0689SMika Westerberg 			return ret;
189edc0f494SIsaac Hazan 		}
190edc0f494SIsaac Hazan 
191180b0689SMika Westerberg 		dt->rx_hopid = ret;
192180b0689SMika Westerberg 	}
193180b0689SMika Westerberg 
194180b0689SMika Westerberg 	ret = tb_xdomain_enable_paths(dt->xd, dt->tx_hopid,
19570c2e03eSMika Westerberg 				      dt->tx_ring ? dt->tx_ring->hop : -1,
196180b0689SMika Westerberg 				      dt->rx_hopid,
19770c2e03eSMika Westerberg 				      dt->rx_ring ? dt->rx_ring->hop : -1);
198edc0f494SIsaac Hazan 	if (ret) {
199edc0f494SIsaac Hazan 		dma_test_free_rings(dt);
200edc0f494SIsaac Hazan 		return ret;
201edc0f494SIsaac Hazan 	}
202edc0f494SIsaac Hazan 
203edc0f494SIsaac Hazan 	if (dt->tx_ring)
204edc0f494SIsaac Hazan 		tb_ring_start(dt->tx_ring);
205edc0f494SIsaac Hazan 	if (dt->rx_ring)
206edc0f494SIsaac Hazan 		tb_ring_start(dt->rx_ring);
207edc0f494SIsaac Hazan 
208edc0f494SIsaac Hazan 	return 0;
209edc0f494SIsaac Hazan }
210edc0f494SIsaac Hazan 
dma_test_stop_rings(struct dma_test * dt)211edc0f494SIsaac Hazan static void dma_test_stop_rings(struct dma_test *dt)
212edc0f494SIsaac Hazan {
213180b0689SMika Westerberg 	int ret;
214180b0689SMika Westerberg 
215edc0f494SIsaac Hazan 	if (dt->rx_ring)
216edc0f494SIsaac Hazan 		tb_ring_stop(dt->rx_ring);
217edc0f494SIsaac Hazan 	if (dt->tx_ring)
218edc0f494SIsaac Hazan 		tb_ring_stop(dt->tx_ring);
219edc0f494SIsaac Hazan 
220180b0689SMika Westerberg 	ret = tb_xdomain_disable_paths(dt->xd, dt->tx_hopid,
22170c2e03eSMika Westerberg 				       dt->tx_ring ? dt->tx_ring->hop : -1,
222180b0689SMika Westerberg 				       dt->rx_hopid,
22370c2e03eSMika Westerberg 				       dt->rx_ring ? dt->rx_ring->hop : -1);
224180b0689SMika Westerberg 	if (ret)
225edc0f494SIsaac Hazan 		dev_warn(&dt->svc->dev, "failed to disable DMA paths\n");
226edc0f494SIsaac Hazan 
227edc0f494SIsaac Hazan 	dma_test_free_rings(dt);
228edc0f494SIsaac Hazan }
229edc0f494SIsaac Hazan 
dma_test_rx_callback(struct tb_ring * ring,struct ring_frame * frame,bool canceled)230edc0f494SIsaac Hazan static void dma_test_rx_callback(struct tb_ring *ring, struct ring_frame *frame,
231edc0f494SIsaac Hazan 				 bool canceled)
232edc0f494SIsaac Hazan {
233edc0f494SIsaac Hazan 	struct dma_test_frame *tf = container_of(frame, typeof(*tf), frame);
234edc0f494SIsaac Hazan 	struct dma_test *dt = tf->dma_test;
235edc0f494SIsaac Hazan 	struct device *dma_dev = tb_ring_dma_device(dt->rx_ring);
236edc0f494SIsaac Hazan 
237edc0f494SIsaac Hazan 	dma_unmap_single(dma_dev, tf->frame.buffer_phy, DMA_TEST_FRAME_SIZE,
238edc0f494SIsaac Hazan 			 DMA_FROM_DEVICE);
239edc0f494SIsaac Hazan 	kfree(tf->data);
240edc0f494SIsaac Hazan 
241edc0f494SIsaac Hazan 	if (canceled) {
242edc0f494SIsaac Hazan 		kfree(tf);
243edc0f494SIsaac Hazan 		return;
244edc0f494SIsaac Hazan 	}
245edc0f494SIsaac Hazan 
246edc0f494SIsaac Hazan 	dt->packets_received++;
247edc0f494SIsaac Hazan 	dev_dbg(&dt->svc->dev, "packet %u/%u received\n", dt->packets_received,
248edc0f494SIsaac Hazan 		dt->packets_to_receive);
249edc0f494SIsaac Hazan 
250edc0f494SIsaac Hazan 	if (tf->frame.flags & RING_DESC_CRC_ERROR)
251edc0f494SIsaac Hazan 		dt->crc_errors++;
252edc0f494SIsaac Hazan 	if (tf->frame.flags & RING_DESC_BUFFER_OVERRUN)
253edc0f494SIsaac Hazan 		dt->buffer_overflow_errors++;
254edc0f494SIsaac Hazan 
255edc0f494SIsaac Hazan 	kfree(tf);
256edc0f494SIsaac Hazan 
257edc0f494SIsaac Hazan 	if (dt->packets_received == dt->packets_to_receive)
258edc0f494SIsaac Hazan 		complete(&dt->complete);
259edc0f494SIsaac Hazan }
260edc0f494SIsaac Hazan 
dma_test_submit_rx(struct dma_test * dt,size_t npackets)261edc0f494SIsaac Hazan static int dma_test_submit_rx(struct dma_test *dt, size_t npackets)
262edc0f494SIsaac Hazan {
263edc0f494SIsaac Hazan 	struct device *dma_dev = tb_ring_dma_device(dt->rx_ring);
264edc0f494SIsaac Hazan 	int i;
265edc0f494SIsaac Hazan 
266edc0f494SIsaac Hazan 	for (i = 0; i < npackets; i++) {
267edc0f494SIsaac Hazan 		struct dma_test_frame *tf;
268edc0f494SIsaac Hazan 		dma_addr_t dma_addr;
269edc0f494SIsaac Hazan 
270edc0f494SIsaac Hazan 		tf = kzalloc(sizeof(*tf), GFP_KERNEL);
271edc0f494SIsaac Hazan 		if (!tf)
272edc0f494SIsaac Hazan 			return -ENOMEM;
273edc0f494SIsaac Hazan 
274edc0f494SIsaac Hazan 		tf->data = kzalloc(DMA_TEST_FRAME_SIZE, GFP_KERNEL);
275edc0f494SIsaac Hazan 		if (!tf->data) {
276edc0f494SIsaac Hazan 			kfree(tf);
277edc0f494SIsaac Hazan 			return -ENOMEM;
278edc0f494SIsaac Hazan 		}
279edc0f494SIsaac Hazan 
280edc0f494SIsaac Hazan 		dma_addr = dma_map_single(dma_dev, tf->data, DMA_TEST_FRAME_SIZE,
281edc0f494SIsaac Hazan 					  DMA_FROM_DEVICE);
282edc0f494SIsaac Hazan 		if (dma_mapping_error(dma_dev, dma_addr)) {
283edc0f494SIsaac Hazan 			kfree(tf->data);
284edc0f494SIsaac Hazan 			kfree(tf);
285edc0f494SIsaac Hazan 			return -ENOMEM;
286edc0f494SIsaac Hazan 		}
287edc0f494SIsaac Hazan 
288edc0f494SIsaac Hazan 		tf->frame.buffer_phy = dma_addr;
289edc0f494SIsaac Hazan 		tf->frame.callback = dma_test_rx_callback;
290edc0f494SIsaac Hazan 		tf->dma_test = dt;
291edc0f494SIsaac Hazan 		INIT_LIST_HEAD(&tf->frame.list);
292edc0f494SIsaac Hazan 
293edc0f494SIsaac Hazan 		tb_ring_rx(dt->rx_ring, &tf->frame);
294edc0f494SIsaac Hazan 	}
295edc0f494SIsaac Hazan 
296edc0f494SIsaac Hazan 	return 0;
297edc0f494SIsaac Hazan }
298edc0f494SIsaac Hazan 
dma_test_tx_callback(struct tb_ring * ring,struct ring_frame * frame,bool canceled)299edc0f494SIsaac Hazan static void dma_test_tx_callback(struct tb_ring *ring, struct ring_frame *frame,
300edc0f494SIsaac Hazan 				 bool canceled)
301edc0f494SIsaac Hazan {
302edc0f494SIsaac Hazan 	struct dma_test_frame *tf = container_of(frame, typeof(*tf), frame);
303edc0f494SIsaac Hazan 	struct dma_test *dt = tf->dma_test;
304edc0f494SIsaac Hazan 	struct device *dma_dev = tb_ring_dma_device(dt->tx_ring);
305edc0f494SIsaac Hazan 
306edc0f494SIsaac Hazan 	dma_unmap_single(dma_dev, tf->frame.buffer_phy, DMA_TEST_FRAME_SIZE,
307edc0f494SIsaac Hazan 			 DMA_TO_DEVICE);
308edc0f494SIsaac Hazan 	kfree(tf->data);
309edc0f494SIsaac Hazan 	kfree(tf);
310edc0f494SIsaac Hazan }
311edc0f494SIsaac Hazan 
dma_test_submit_tx(struct dma_test * dt,size_t npackets)312edc0f494SIsaac Hazan static int dma_test_submit_tx(struct dma_test *dt, size_t npackets)
313edc0f494SIsaac Hazan {
314edc0f494SIsaac Hazan 	struct device *dma_dev = tb_ring_dma_device(dt->tx_ring);
315edc0f494SIsaac Hazan 	int i;
316edc0f494SIsaac Hazan 
317edc0f494SIsaac Hazan 	for (i = 0; i < npackets; i++) {
318edc0f494SIsaac Hazan 		struct dma_test_frame *tf;
319edc0f494SIsaac Hazan 		dma_addr_t dma_addr;
320edc0f494SIsaac Hazan 
321edc0f494SIsaac Hazan 		tf = kzalloc(sizeof(*tf), GFP_KERNEL);
322edc0f494SIsaac Hazan 		if (!tf)
323edc0f494SIsaac Hazan 			return -ENOMEM;
324edc0f494SIsaac Hazan 
325edc0f494SIsaac Hazan 		tf->frame.size = 0; /* means 4096 */
326edc0f494SIsaac Hazan 		tf->dma_test = dt;
327edc0f494SIsaac Hazan 
32882096ecfSTian Tao 		tf->data = kmemdup(dma_test_pattern, DMA_TEST_FRAME_SIZE, GFP_KERNEL);
329edc0f494SIsaac Hazan 		if (!tf->data) {
330edc0f494SIsaac Hazan 			kfree(tf);
331edc0f494SIsaac Hazan 			return -ENOMEM;
332edc0f494SIsaac Hazan 		}
333edc0f494SIsaac Hazan 
334edc0f494SIsaac Hazan 		dma_addr = dma_map_single(dma_dev, tf->data, DMA_TEST_FRAME_SIZE,
335edc0f494SIsaac Hazan 					  DMA_TO_DEVICE);
336edc0f494SIsaac Hazan 		if (dma_mapping_error(dma_dev, dma_addr)) {
337edc0f494SIsaac Hazan 			kfree(tf->data);
338edc0f494SIsaac Hazan 			kfree(tf);
339edc0f494SIsaac Hazan 			return -ENOMEM;
340edc0f494SIsaac Hazan 		}
341edc0f494SIsaac Hazan 
342edc0f494SIsaac Hazan 		tf->frame.buffer_phy = dma_addr;
343edc0f494SIsaac Hazan 		tf->frame.callback = dma_test_tx_callback;
344edc0f494SIsaac Hazan 		tf->frame.sof = DMA_TEST_PDF_FRAME_START;
345edc0f494SIsaac Hazan 		tf->frame.eof = DMA_TEST_PDF_FRAME_END;
346edc0f494SIsaac Hazan 		INIT_LIST_HEAD(&tf->frame.list);
347edc0f494SIsaac Hazan 
348edc0f494SIsaac Hazan 		dt->packets_sent++;
349edc0f494SIsaac Hazan 		dev_dbg(&dt->svc->dev, "packet %u/%u sent\n", dt->packets_sent,
350edc0f494SIsaac Hazan 			dt->packets_to_send);
351edc0f494SIsaac Hazan 
352edc0f494SIsaac Hazan 		tb_ring_tx(dt->tx_ring, &tf->frame);
353edc0f494SIsaac Hazan 	}
354edc0f494SIsaac Hazan 
355edc0f494SIsaac Hazan 	return 0;
356edc0f494SIsaac Hazan }
357edc0f494SIsaac Hazan 
358edc0f494SIsaac Hazan #define DMA_TEST_DEBUGFS_ATTR(__fops, __get, __validate, __set)	\
359edc0f494SIsaac Hazan static int __fops ## _show(void *data, u64 *val)		\
360edc0f494SIsaac Hazan {								\
361edc0f494SIsaac Hazan 	struct tb_service *svc = data;				\
362edc0f494SIsaac Hazan 	struct dma_test *dt = tb_service_get_drvdata(svc);	\
363edc0f494SIsaac Hazan 	int ret;						\
364edc0f494SIsaac Hazan 								\
365edc0f494SIsaac Hazan 	ret = mutex_lock_interruptible(&dt->lock);		\
366edc0f494SIsaac Hazan 	if (ret)						\
367edc0f494SIsaac Hazan 		return ret;					\
368edc0f494SIsaac Hazan 	__get(dt, val);						\
369edc0f494SIsaac Hazan 	mutex_unlock(&dt->lock);				\
370edc0f494SIsaac Hazan 	return 0;						\
371edc0f494SIsaac Hazan }								\
372edc0f494SIsaac Hazan static int __fops ## _store(void *data, u64 val)		\
373edc0f494SIsaac Hazan {								\
374edc0f494SIsaac Hazan 	struct tb_service *svc = data;				\
375edc0f494SIsaac Hazan 	struct dma_test *dt = tb_service_get_drvdata(svc);	\
376edc0f494SIsaac Hazan 	int ret;						\
377edc0f494SIsaac Hazan 								\
378edc0f494SIsaac Hazan 	ret = __validate(val);					\
379edc0f494SIsaac Hazan 	if (ret)						\
380edc0f494SIsaac Hazan 		return ret;					\
381edc0f494SIsaac Hazan 	ret = mutex_lock_interruptible(&dt->lock);		\
382edc0f494SIsaac Hazan 	if (ret)						\
383edc0f494SIsaac Hazan 		return ret;					\
384edc0f494SIsaac Hazan 	__set(dt, val);						\
385edc0f494SIsaac Hazan 	mutex_unlock(&dt->lock);				\
386edc0f494SIsaac Hazan 	return 0;						\
387edc0f494SIsaac Hazan }								\
388edc0f494SIsaac Hazan DEFINE_DEBUGFS_ATTRIBUTE(__fops ## _fops, __fops ## _show,	\
389edc0f494SIsaac Hazan 			 __fops ## _store, "%llu\n")
390edc0f494SIsaac Hazan 
lanes_get(const struct dma_test * dt,u64 * val)391edc0f494SIsaac Hazan static void lanes_get(const struct dma_test *dt, u64 *val)
392edc0f494SIsaac Hazan {
393edc0f494SIsaac Hazan 	*val = dt->link_width;
394edc0f494SIsaac Hazan }
395edc0f494SIsaac Hazan 
lanes_validate(u64 val)396edc0f494SIsaac Hazan static int lanes_validate(u64 val)
397edc0f494SIsaac Hazan {
398edc0f494SIsaac Hazan 	return val > 2 ? -EINVAL : 0;
399edc0f494SIsaac Hazan }
400edc0f494SIsaac Hazan 
lanes_set(struct dma_test * dt,u64 val)401edc0f494SIsaac Hazan static void lanes_set(struct dma_test *dt, u64 val)
402edc0f494SIsaac Hazan {
403edc0f494SIsaac Hazan 	dt->link_width = val;
404edc0f494SIsaac Hazan }
405edc0f494SIsaac Hazan DMA_TEST_DEBUGFS_ATTR(lanes, lanes_get, lanes_validate, lanes_set);
406edc0f494SIsaac Hazan 
speed_get(const struct dma_test * dt,u64 * val)407edc0f494SIsaac Hazan static void speed_get(const struct dma_test *dt, u64 *val)
408edc0f494SIsaac Hazan {
409edc0f494SIsaac Hazan 	*val = dt->link_speed;
410edc0f494SIsaac Hazan }
411edc0f494SIsaac Hazan 
speed_validate(u64 val)412edc0f494SIsaac Hazan static int speed_validate(u64 val)
413edc0f494SIsaac Hazan {
414edc0f494SIsaac Hazan 	switch (val) {
415e111fb92SGil Fine 	case 40:
416edc0f494SIsaac Hazan 	case 20:
417edc0f494SIsaac Hazan 	case 10:
418edc0f494SIsaac Hazan 	case 0:
419edc0f494SIsaac Hazan 		return 0;
420edc0f494SIsaac Hazan 	default:
421edc0f494SIsaac Hazan 		return -EINVAL;
422edc0f494SIsaac Hazan 	}
423edc0f494SIsaac Hazan }
424edc0f494SIsaac Hazan 
speed_set(struct dma_test * dt,u64 val)425edc0f494SIsaac Hazan static void speed_set(struct dma_test *dt, u64 val)
426edc0f494SIsaac Hazan {
427edc0f494SIsaac Hazan 	dt->link_speed = val;
428edc0f494SIsaac Hazan }
429edc0f494SIsaac Hazan DMA_TEST_DEBUGFS_ATTR(speed, speed_get, speed_validate, speed_set);
430edc0f494SIsaac Hazan 
packets_to_receive_get(const struct dma_test * dt,u64 * val)431edc0f494SIsaac Hazan static void packets_to_receive_get(const struct dma_test *dt, u64 *val)
432edc0f494SIsaac Hazan {
433edc0f494SIsaac Hazan 	*val = dt->packets_to_receive;
434edc0f494SIsaac Hazan }
435edc0f494SIsaac Hazan 
packets_to_receive_validate(u64 val)436edc0f494SIsaac Hazan static int packets_to_receive_validate(u64 val)
437edc0f494SIsaac Hazan {
438edc0f494SIsaac Hazan 	return val > DMA_TEST_MAX_PACKETS ? -EINVAL : 0;
439edc0f494SIsaac Hazan }
440edc0f494SIsaac Hazan 
packets_to_receive_set(struct dma_test * dt,u64 val)441edc0f494SIsaac Hazan static void packets_to_receive_set(struct dma_test *dt, u64 val)
442edc0f494SIsaac Hazan {
443edc0f494SIsaac Hazan 	dt->packets_to_receive = val;
444edc0f494SIsaac Hazan }
445edc0f494SIsaac Hazan DMA_TEST_DEBUGFS_ATTR(packets_to_receive, packets_to_receive_get,
446edc0f494SIsaac Hazan 		      packets_to_receive_validate, packets_to_receive_set);
447edc0f494SIsaac Hazan 
packets_to_send_get(const struct dma_test * dt,u64 * val)448edc0f494SIsaac Hazan static void packets_to_send_get(const struct dma_test *dt, u64 *val)
449edc0f494SIsaac Hazan {
450edc0f494SIsaac Hazan 	*val = dt->packets_to_send;
451edc0f494SIsaac Hazan }
452edc0f494SIsaac Hazan 
packets_to_send_validate(u64 val)453edc0f494SIsaac Hazan static int packets_to_send_validate(u64 val)
454edc0f494SIsaac Hazan {
455edc0f494SIsaac Hazan 	return val > DMA_TEST_MAX_PACKETS ? -EINVAL : 0;
456edc0f494SIsaac Hazan }
457edc0f494SIsaac Hazan 
packets_to_send_set(struct dma_test * dt,u64 val)458edc0f494SIsaac Hazan static void packets_to_send_set(struct dma_test *dt, u64 val)
459edc0f494SIsaac Hazan {
460edc0f494SIsaac Hazan 	dt->packets_to_send = val;
461edc0f494SIsaac Hazan }
462edc0f494SIsaac Hazan DMA_TEST_DEBUGFS_ATTR(packets_to_send, packets_to_send_get,
463edc0f494SIsaac Hazan 		      packets_to_send_validate, packets_to_send_set);
464edc0f494SIsaac Hazan 
dma_test_set_bonding(struct dma_test * dt)465edc0f494SIsaac Hazan static int dma_test_set_bonding(struct dma_test *dt)
466edc0f494SIsaac Hazan {
467edc0f494SIsaac Hazan 	switch (dt->link_width) {
468*7b304040SMika Westerberg 	case TB_LINK_WIDTH_DUAL:
469edc0f494SIsaac Hazan 		return tb_xdomain_lane_bonding_enable(dt->xd);
470*7b304040SMika Westerberg 	case TB_LINK_WIDTH_SINGLE:
471edc0f494SIsaac Hazan 		tb_xdomain_lane_bonding_disable(dt->xd);
472edc0f494SIsaac Hazan 		fallthrough;
473edc0f494SIsaac Hazan 	default:
474edc0f494SIsaac Hazan 		return 0;
475edc0f494SIsaac Hazan 	}
476edc0f494SIsaac Hazan }
477edc0f494SIsaac Hazan 
dma_test_validate_config(struct dma_test * dt)478edc0f494SIsaac Hazan static bool dma_test_validate_config(struct dma_test *dt)
479edc0f494SIsaac Hazan {
480edc0f494SIsaac Hazan 	if (!dt->packets_to_send && !dt->packets_to_receive)
481edc0f494SIsaac Hazan 		return false;
482edc0f494SIsaac Hazan 	if (dt->packets_to_send && dt->packets_to_receive &&
483edc0f494SIsaac Hazan 	    dt->packets_to_send != dt->packets_to_receive)
484edc0f494SIsaac Hazan 		return false;
485edc0f494SIsaac Hazan 	return true;
486edc0f494SIsaac Hazan }
487edc0f494SIsaac Hazan 
dma_test_check_errors(struct dma_test * dt,int ret)488edc0f494SIsaac Hazan static void dma_test_check_errors(struct dma_test *dt, int ret)
489edc0f494SIsaac Hazan {
490edc0f494SIsaac Hazan 	if (!dt->error_code) {
491edc0f494SIsaac Hazan 		if (dt->link_speed && dt->xd->link_speed != dt->link_speed) {
492edc0f494SIsaac Hazan 			dt->error_code = DMA_TEST_SPEED_ERROR;
493*7b304040SMika Westerberg 		} else if (dt->link_width && dt->link_width != dt->xd->link_width) {
494edc0f494SIsaac Hazan 			dt->error_code = DMA_TEST_WIDTH_ERROR;
495edc0f494SIsaac Hazan 		} else if (dt->packets_to_send != dt->packets_sent ||
496edc0f494SIsaac Hazan 			 dt->packets_to_receive != dt->packets_received ||
497edc0f494SIsaac Hazan 			 dt->crc_errors || dt->buffer_overflow_errors) {
498edc0f494SIsaac Hazan 			dt->error_code = DMA_TEST_PACKET_ERROR;
499edc0f494SIsaac Hazan 		} else {
500edc0f494SIsaac Hazan 			return;
501edc0f494SIsaac Hazan 		}
502edc0f494SIsaac Hazan 	}
503edc0f494SIsaac Hazan 
504edc0f494SIsaac Hazan 	dt->result = DMA_TEST_FAIL;
505edc0f494SIsaac Hazan }
506edc0f494SIsaac Hazan 
test_store(void * data,u64 val)507edc0f494SIsaac Hazan static int test_store(void *data, u64 val)
508edc0f494SIsaac Hazan {
509edc0f494SIsaac Hazan 	struct tb_service *svc = data;
510edc0f494SIsaac Hazan 	struct dma_test *dt = tb_service_get_drvdata(svc);
511edc0f494SIsaac Hazan 	int ret;
512edc0f494SIsaac Hazan 
513edc0f494SIsaac Hazan 	if (val != 1)
514edc0f494SIsaac Hazan 		return -EINVAL;
515edc0f494SIsaac Hazan 
516edc0f494SIsaac Hazan 	ret = mutex_lock_interruptible(&dt->lock);
517edc0f494SIsaac Hazan 	if (ret)
518edc0f494SIsaac Hazan 		return ret;
519edc0f494SIsaac Hazan 
520edc0f494SIsaac Hazan 	dt->packets_sent = 0;
521edc0f494SIsaac Hazan 	dt->packets_received = 0;
522edc0f494SIsaac Hazan 	dt->crc_errors = 0;
523edc0f494SIsaac Hazan 	dt->buffer_overflow_errors = 0;
524edc0f494SIsaac Hazan 	dt->result = DMA_TEST_SUCCESS;
525edc0f494SIsaac Hazan 	dt->error_code = DMA_TEST_NO_ERROR;
526edc0f494SIsaac Hazan 
527edc0f494SIsaac Hazan 	dev_dbg(&svc->dev, "DMA test starting\n");
528edc0f494SIsaac Hazan 	if (dt->link_speed)
529edc0f494SIsaac Hazan 		dev_dbg(&svc->dev, "link_speed: %u Gb/s\n", dt->link_speed);
530edc0f494SIsaac Hazan 	if (dt->link_width)
531edc0f494SIsaac Hazan 		dev_dbg(&svc->dev, "link_width: %u\n", dt->link_width);
532edc0f494SIsaac Hazan 	dev_dbg(&svc->dev, "packets_to_send: %u\n", dt->packets_to_send);
533edc0f494SIsaac Hazan 	dev_dbg(&svc->dev, "packets_to_receive: %u\n", dt->packets_to_receive);
534edc0f494SIsaac Hazan 
535edc0f494SIsaac Hazan 	if (!dma_test_validate_config(dt)) {
536edc0f494SIsaac Hazan 		dev_err(&svc->dev, "invalid test configuration\n");
537edc0f494SIsaac Hazan 		dt->error_code = DMA_TEST_CONFIG_ERROR;
538edc0f494SIsaac Hazan 		goto out_unlock;
539edc0f494SIsaac Hazan 	}
540edc0f494SIsaac Hazan 
541edc0f494SIsaac Hazan 	ret = dma_test_set_bonding(dt);
542edc0f494SIsaac Hazan 	if (ret) {
543edc0f494SIsaac Hazan 		dev_err(&svc->dev, "failed to set lanes\n");
544edc0f494SIsaac Hazan 		dt->error_code = DMA_TEST_BONDING_ERROR;
545edc0f494SIsaac Hazan 		goto out_unlock;
546edc0f494SIsaac Hazan 	}
547edc0f494SIsaac Hazan 
548edc0f494SIsaac Hazan 	ret = dma_test_start_rings(dt);
549edc0f494SIsaac Hazan 	if (ret) {
550edc0f494SIsaac Hazan 		dev_err(&svc->dev, "failed to enable DMA rings\n");
551edc0f494SIsaac Hazan 		dt->error_code = DMA_TEST_DMA_ERROR;
552edc0f494SIsaac Hazan 		goto out_unlock;
553edc0f494SIsaac Hazan 	}
554edc0f494SIsaac Hazan 
555edc0f494SIsaac Hazan 	if (dt->packets_to_receive) {
556edc0f494SIsaac Hazan 		reinit_completion(&dt->complete);
557edc0f494SIsaac Hazan 		ret = dma_test_submit_rx(dt, dt->packets_to_receive);
558edc0f494SIsaac Hazan 		if (ret) {
559edc0f494SIsaac Hazan 			dev_err(&svc->dev, "failed to submit receive buffers\n");
560edc0f494SIsaac Hazan 			dt->error_code = DMA_TEST_BUFFER_ERROR;
561edc0f494SIsaac Hazan 			goto out_stop;
562edc0f494SIsaac Hazan 		}
563edc0f494SIsaac Hazan 	}
564edc0f494SIsaac Hazan 
565edc0f494SIsaac Hazan 	if (dt->packets_to_send) {
566edc0f494SIsaac Hazan 		ret = dma_test_submit_tx(dt, dt->packets_to_send);
567edc0f494SIsaac Hazan 		if (ret) {
568edc0f494SIsaac Hazan 			dev_err(&svc->dev, "failed to submit transmit buffers\n");
569edc0f494SIsaac Hazan 			dt->error_code = DMA_TEST_BUFFER_ERROR;
570edc0f494SIsaac Hazan 			goto out_stop;
571edc0f494SIsaac Hazan 		}
572edc0f494SIsaac Hazan 	}
573edc0f494SIsaac Hazan 
574edc0f494SIsaac Hazan 	if (dt->packets_to_receive) {
575edc0f494SIsaac Hazan 		ret = wait_for_completion_interruptible(&dt->complete);
576edc0f494SIsaac Hazan 		if (ret) {
577edc0f494SIsaac Hazan 			dt->error_code = DMA_TEST_INTERRUPTED;
578edc0f494SIsaac Hazan 			goto out_stop;
579edc0f494SIsaac Hazan 		}
580edc0f494SIsaac Hazan 	}
581edc0f494SIsaac Hazan 
582edc0f494SIsaac Hazan out_stop:
583edc0f494SIsaac Hazan 	dma_test_stop_rings(dt);
584edc0f494SIsaac Hazan out_unlock:
585edc0f494SIsaac Hazan 	dma_test_check_errors(dt, ret);
586edc0f494SIsaac Hazan 	mutex_unlock(&dt->lock);
587edc0f494SIsaac Hazan 
588edc0f494SIsaac Hazan 	dev_dbg(&svc->dev, "DMA test %s\n", dma_test_result_names[dt->result]);
589edc0f494SIsaac Hazan 	return ret;
590edc0f494SIsaac Hazan }
591edc0f494SIsaac Hazan DEFINE_DEBUGFS_ATTRIBUTE(test_fops, NULL, test_store, "%llu\n");
592edc0f494SIsaac Hazan 
status_show(struct seq_file * s,void * not_used)593edc0f494SIsaac Hazan static int status_show(struct seq_file *s, void *not_used)
594edc0f494SIsaac Hazan {
595edc0f494SIsaac Hazan 	struct tb_service *svc = s->private;
596edc0f494SIsaac Hazan 	struct dma_test *dt = tb_service_get_drvdata(svc);
597edc0f494SIsaac Hazan 	int ret;
598edc0f494SIsaac Hazan 
599edc0f494SIsaac Hazan 	ret = mutex_lock_interruptible(&dt->lock);
600edc0f494SIsaac Hazan 	if (ret)
601edc0f494SIsaac Hazan 		return ret;
602edc0f494SIsaac Hazan 
603edc0f494SIsaac Hazan 	seq_printf(s, "result: %s\n", dma_test_result_names[dt->result]);
604edc0f494SIsaac Hazan 	if (dt->result == DMA_TEST_NOT_RUN)
605edc0f494SIsaac Hazan 		goto out_unlock;
606edc0f494SIsaac Hazan 
607edc0f494SIsaac Hazan 	seq_printf(s, "packets received: %u\n", dt->packets_received);
608edc0f494SIsaac Hazan 	seq_printf(s, "packets sent: %u\n", dt->packets_sent);
609edc0f494SIsaac Hazan 	seq_printf(s, "CRC errors: %u\n", dt->crc_errors);
610edc0f494SIsaac Hazan 	seq_printf(s, "buffer overflow errors: %u\n",
611edc0f494SIsaac Hazan 		   dt->buffer_overflow_errors);
612edc0f494SIsaac Hazan 	seq_printf(s, "error: %s\n", dma_test_error_names[dt->error_code]);
613edc0f494SIsaac Hazan 
614edc0f494SIsaac Hazan out_unlock:
615edc0f494SIsaac Hazan 	mutex_unlock(&dt->lock);
616edc0f494SIsaac Hazan 	return 0;
617edc0f494SIsaac Hazan }
618edc0f494SIsaac Hazan DEFINE_SHOW_ATTRIBUTE(status);
619edc0f494SIsaac Hazan 
dma_test_debugfs_init(struct tb_service * svc)620edc0f494SIsaac Hazan static void dma_test_debugfs_init(struct tb_service *svc)
621edc0f494SIsaac Hazan {
622edc0f494SIsaac Hazan 	struct dma_test *dt = tb_service_get_drvdata(svc);
623edc0f494SIsaac Hazan 
624edc0f494SIsaac Hazan 	dt->debugfs_dir = debugfs_create_dir("dma_test", svc->debugfs_dir);
625edc0f494SIsaac Hazan 
626edc0f494SIsaac Hazan 	debugfs_create_file("lanes", 0600, dt->debugfs_dir, svc, &lanes_fops);
627edc0f494SIsaac Hazan 	debugfs_create_file("speed", 0600, dt->debugfs_dir, svc, &speed_fops);
628edc0f494SIsaac Hazan 	debugfs_create_file("packets_to_receive", 0600, dt->debugfs_dir, svc,
629edc0f494SIsaac Hazan 			    &packets_to_receive_fops);
630edc0f494SIsaac Hazan 	debugfs_create_file("packets_to_send", 0600, dt->debugfs_dir, svc,
631edc0f494SIsaac Hazan 			    &packets_to_send_fops);
632edc0f494SIsaac Hazan 	debugfs_create_file("status", 0400, dt->debugfs_dir, svc, &status_fops);
633edc0f494SIsaac Hazan 	debugfs_create_file("test", 0200, dt->debugfs_dir, svc, &test_fops);
634edc0f494SIsaac Hazan }
635edc0f494SIsaac Hazan 
dma_test_probe(struct tb_service * svc,const struct tb_service_id * id)636edc0f494SIsaac Hazan static int dma_test_probe(struct tb_service *svc, const struct tb_service_id *id)
637edc0f494SIsaac Hazan {
638edc0f494SIsaac Hazan 	struct tb_xdomain *xd = tb_service_parent(svc);
639edc0f494SIsaac Hazan 	struct dma_test *dt;
640edc0f494SIsaac Hazan 
641edc0f494SIsaac Hazan 	dt = devm_kzalloc(&svc->dev, sizeof(*dt), GFP_KERNEL);
642edc0f494SIsaac Hazan 	if (!dt)
643edc0f494SIsaac Hazan 		return -ENOMEM;
644edc0f494SIsaac Hazan 
645edc0f494SIsaac Hazan 	dt->svc = svc;
646edc0f494SIsaac Hazan 	dt->xd = xd;
647edc0f494SIsaac Hazan 	mutex_init(&dt->lock);
648edc0f494SIsaac Hazan 	init_completion(&dt->complete);
649edc0f494SIsaac Hazan 
650edc0f494SIsaac Hazan 	tb_service_set_drvdata(svc, dt);
651edc0f494SIsaac Hazan 	dma_test_debugfs_init(svc);
652edc0f494SIsaac Hazan 
653edc0f494SIsaac Hazan 	return 0;
654edc0f494SIsaac Hazan }
655edc0f494SIsaac Hazan 
dma_test_remove(struct tb_service * svc)656edc0f494SIsaac Hazan static void dma_test_remove(struct tb_service *svc)
657edc0f494SIsaac Hazan {
658edc0f494SIsaac Hazan 	struct dma_test *dt = tb_service_get_drvdata(svc);
659edc0f494SIsaac Hazan 
660edc0f494SIsaac Hazan 	mutex_lock(&dt->lock);
661edc0f494SIsaac Hazan 	debugfs_remove_recursive(dt->debugfs_dir);
662edc0f494SIsaac Hazan 	mutex_unlock(&dt->lock);
663edc0f494SIsaac Hazan }
664edc0f494SIsaac Hazan 
dma_test_suspend(struct device * dev)665edc0f494SIsaac Hazan static int __maybe_unused dma_test_suspend(struct device *dev)
666edc0f494SIsaac Hazan {
667edc0f494SIsaac Hazan 	/*
668edc0f494SIsaac Hazan 	 * No need to do anything special here. If userspace is writing
669edc0f494SIsaac Hazan 	 * to the test attribute when suspend started, it comes out from
670edc0f494SIsaac Hazan 	 * wait_for_completion_interruptible() with -ERESTARTSYS and the
671edc0f494SIsaac Hazan 	 * DMA test fails tearing down the rings. Once userspace is
672edc0f494SIsaac Hazan 	 * thawed the kernel restarts the write syscall effectively
673edc0f494SIsaac Hazan 	 * re-running the test.
674edc0f494SIsaac Hazan 	 */
675edc0f494SIsaac Hazan 	return 0;
676edc0f494SIsaac Hazan }
677edc0f494SIsaac Hazan 
dma_test_resume(struct device * dev)678edc0f494SIsaac Hazan static int __maybe_unused dma_test_resume(struct device *dev)
679edc0f494SIsaac Hazan {
680edc0f494SIsaac Hazan 	return 0;
681edc0f494SIsaac Hazan }
682edc0f494SIsaac Hazan 
683edc0f494SIsaac Hazan static const struct dev_pm_ops dma_test_pm_ops = {
684edc0f494SIsaac Hazan 	SET_SYSTEM_SLEEP_PM_OPS(dma_test_suspend, dma_test_resume)
685edc0f494SIsaac Hazan };
686edc0f494SIsaac Hazan 
687edc0f494SIsaac Hazan static const struct tb_service_id dma_test_ids[] = {
688edc0f494SIsaac Hazan 	{ TB_SERVICE("dma_test", 1) },
689edc0f494SIsaac Hazan 	{ },
690edc0f494SIsaac Hazan };
691edc0f494SIsaac Hazan MODULE_DEVICE_TABLE(tbsvc, dma_test_ids);
692edc0f494SIsaac Hazan 
693edc0f494SIsaac Hazan static struct tb_service_driver dma_test_driver = {
694edc0f494SIsaac Hazan 	.driver = {
695edc0f494SIsaac Hazan 		.owner = THIS_MODULE,
696edc0f494SIsaac Hazan 		.name = "thunderbolt_dma_test",
697edc0f494SIsaac Hazan 		.pm = &dma_test_pm_ops,
698edc0f494SIsaac Hazan 	},
699edc0f494SIsaac Hazan 	.probe = dma_test_probe,
700edc0f494SIsaac Hazan 	.remove = dma_test_remove,
701edc0f494SIsaac Hazan 	.id_table = dma_test_ids,
702edc0f494SIsaac Hazan };
703edc0f494SIsaac Hazan 
dma_test_init(void)704edc0f494SIsaac Hazan static int __init dma_test_init(void)
705edc0f494SIsaac Hazan {
706edc0f494SIsaac Hazan 	u64 data_value = DMA_TEST_DATA_PATTERN;
707edc0f494SIsaac Hazan 	int i, ret;
708edc0f494SIsaac Hazan 
709edc0f494SIsaac Hazan 	dma_test_pattern = kmalloc(DMA_TEST_FRAME_SIZE, GFP_KERNEL);
710edc0f494SIsaac Hazan 	if (!dma_test_pattern)
711edc0f494SIsaac Hazan 		return -ENOMEM;
712edc0f494SIsaac Hazan 
713edc0f494SIsaac Hazan 	for (i = 0; i <	DMA_TEST_FRAME_SIZE / sizeof(data_value); i++)
714edc0f494SIsaac Hazan 		((u32 *)dma_test_pattern)[i] = data_value++;
715edc0f494SIsaac Hazan 
716edc0f494SIsaac Hazan 	dma_test_dir = tb_property_create_dir(&dma_test_dir_uuid);
717edc0f494SIsaac Hazan 	if (!dma_test_dir) {
718edc0f494SIsaac Hazan 		ret = -ENOMEM;
719edc0f494SIsaac Hazan 		goto err_free_pattern;
720edc0f494SIsaac Hazan 	}
721edc0f494SIsaac Hazan 
722edc0f494SIsaac Hazan 	tb_property_add_immediate(dma_test_dir, "prtcid", 1);
723edc0f494SIsaac Hazan 	tb_property_add_immediate(dma_test_dir, "prtcvers", 1);
724edc0f494SIsaac Hazan 	tb_property_add_immediate(dma_test_dir, "prtcrevs", 0);
725edc0f494SIsaac Hazan 	tb_property_add_immediate(dma_test_dir, "prtcstns", 0);
726edc0f494SIsaac Hazan 
727edc0f494SIsaac Hazan 	ret = tb_register_property_dir("dma_test", dma_test_dir);
728edc0f494SIsaac Hazan 	if (ret)
729edc0f494SIsaac Hazan 		goto err_free_dir;
730edc0f494SIsaac Hazan 
731edc0f494SIsaac Hazan 	ret = tb_register_service_driver(&dma_test_driver);
732edc0f494SIsaac Hazan 	if (ret)
733edc0f494SIsaac Hazan 		goto err_unregister_dir;
734edc0f494SIsaac Hazan 
735edc0f494SIsaac Hazan 	return 0;
736edc0f494SIsaac Hazan 
737edc0f494SIsaac Hazan err_unregister_dir:
738edc0f494SIsaac Hazan 	tb_unregister_property_dir("dma_test", dma_test_dir);
739edc0f494SIsaac Hazan err_free_dir:
740edc0f494SIsaac Hazan 	tb_property_free_dir(dma_test_dir);
741edc0f494SIsaac Hazan err_free_pattern:
742edc0f494SIsaac Hazan 	kfree(dma_test_pattern);
743edc0f494SIsaac Hazan 
744edc0f494SIsaac Hazan 	return ret;
745edc0f494SIsaac Hazan }
746edc0f494SIsaac Hazan module_init(dma_test_init);
747edc0f494SIsaac Hazan 
dma_test_exit(void)748edc0f494SIsaac Hazan static void __exit dma_test_exit(void)
749edc0f494SIsaac Hazan {
750edc0f494SIsaac Hazan 	tb_unregister_service_driver(&dma_test_driver);
751edc0f494SIsaac Hazan 	tb_unregister_property_dir("dma_test", dma_test_dir);
752edc0f494SIsaac Hazan 	tb_property_free_dir(dma_test_dir);
753edc0f494SIsaac Hazan 	kfree(dma_test_pattern);
754edc0f494SIsaac Hazan }
755edc0f494SIsaac Hazan module_exit(dma_test_exit);
756edc0f494SIsaac Hazan 
757edc0f494SIsaac Hazan MODULE_AUTHOR("Isaac Hazan <isaac.hazan@intel.com>");
758edc0f494SIsaac Hazan MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
75988a9ded9SMika Westerberg MODULE_DESCRIPTION("Thunderbolt/USB4 DMA traffic test driver");
760edc0f494SIsaac Hazan MODULE_LICENSE("GPL v2");
761