159dfa54cSAmit Daniel Kachhap /* 259dfa54cSAmit Daniel Kachhap * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit) 359dfa54cSAmit Daniel Kachhap * 459dfa54cSAmit Daniel Kachhap * Copyright (C) 2011 Samsung Electronics 559dfa54cSAmit Daniel Kachhap * Donggeun Kim <dg77.kim@samsung.com> 659dfa54cSAmit Daniel Kachhap * Amit Daniel Kachhap <amit.kachhap@linaro.org> 759dfa54cSAmit Daniel Kachhap * 859dfa54cSAmit Daniel Kachhap * This program is free software; you can redistribute it and/or modify 959dfa54cSAmit Daniel Kachhap * it under the terms of the GNU General Public License as published by 1059dfa54cSAmit Daniel Kachhap * the Free Software Foundation; either version 2 of the License, or 1159dfa54cSAmit Daniel Kachhap * (at your option) any later version. 1259dfa54cSAmit Daniel Kachhap * 1359dfa54cSAmit Daniel Kachhap * This program is distributed in the hope that it will be useful, 1459dfa54cSAmit Daniel Kachhap * but WITHOUT ANY WARRANTY; without even the implied warranty of 1559dfa54cSAmit Daniel Kachhap * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1659dfa54cSAmit Daniel Kachhap * GNU General Public License for more details. 1759dfa54cSAmit Daniel Kachhap * 1859dfa54cSAmit Daniel Kachhap * You should have received a copy of the GNU General Public License 1959dfa54cSAmit Daniel Kachhap * along with this program; if not, write to the Free Software 2059dfa54cSAmit Daniel Kachhap * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 2159dfa54cSAmit Daniel Kachhap * 2259dfa54cSAmit Daniel Kachhap */ 2359dfa54cSAmit Daniel Kachhap 2459dfa54cSAmit Daniel Kachhap #include <linux/clk.h> 2559dfa54cSAmit Daniel Kachhap #include <linux/io.h> 2659dfa54cSAmit Daniel Kachhap #include <linux/interrupt.h> 2759dfa54cSAmit Daniel Kachhap #include <linux/module.h> 2859dfa54cSAmit Daniel Kachhap #include <linux/of.h> 29cebe7373SAmit Daniel Kachhap #include <linux/of_address.h> 30cebe7373SAmit Daniel Kachhap #include <linux/of_irq.h> 3159dfa54cSAmit Daniel Kachhap #include <linux/platform_device.h> 3259dfa54cSAmit Daniel Kachhap 3359dfa54cSAmit Daniel Kachhap #include "exynos_thermal_common.h" 340c1836a6SAmit Daniel Kachhap #include "exynos_tmu.h" 35e6b7991eSAmit Daniel Kachhap #include "exynos_tmu_data.h" 3659dfa54cSAmit Daniel Kachhap 37cebe7373SAmit Daniel Kachhap /** 38cebe7373SAmit Daniel Kachhap * struct exynos_tmu_data : A structure to hold the private data of the TMU 39cebe7373SAmit Daniel Kachhap driver 40cebe7373SAmit Daniel Kachhap * @id: identifier of the one instance of the TMU controller. 41cebe7373SAmit Daniel Kachhap * @pdata: pointer to the tmu platform/configuration data 42cebe7373SAmit Daniel Kachhap * @base: base address of the single instance of the TMU controller. 43d9b6ee14SAmit Daniel Kachhap * @base_common: base address of the common registers of the TMU controller. 44cebe7373SAmit Daniel Kachhap * @irq: irq number of the TMU controller. 45cebe7373SAmit Daniel Kachhap * @soc: id of the SOC type. 46cebe7373SAmit Daniel Kachhap * @irq_work: pointer to the irq work structure. 47cebe7373SAmit Daniel Kachhap * @lock: lock to implement synchronization. 48cebe7373SAmit Daniel Kachhap * @clk: pointer to the clock structure. 49cebe7373SAmit Daniel Kachhap * @temp_error1: fused value of the first point trim. 50cebe7373SAmit Daniel Kachhap * @temp_error2: fused value of the second point trim. 51cebe7373SAmit Daniel Kachhap * @reg_conf: pointer to structure to register with core thermal. 52cebe7373SAmit Daniel Kachhap */ 5359dfa54cSAmit Daniel Kachhap struct exynos_tmu_data { 54cebe7373SAmit Daniel Kachhap int id; 5559dfa54cSAmit Daniel Kachhap struct exynos_tmu_platform_data *pdata; 5659dfa54cSAmit Daniel Kachhap void __iomem *base; 57d9b6ee14SAmit Daniel Kachhap void __iomem *base_common; 5859dfa54cSAmit Daniel Kachhap int irq; 5959dfa54cSAmit Daniel Kachhap enum soc_type soc; 6059dfa54cSAmit Daniel Kachhap struct work_struct irq_work; 6159dfa54cSAmit Daniel Kachhap struct mutex lock; 6259dfa54cSAmit Daniel Kachhap struct clk *clk; 6359dfa54cSAmit Daniel Kachhap u8 temp_error1, temp_error2; 64cebe7373SAmit Daniel Kachhap struct thermal_sensor_conf *reg_conf; 6559dfa54cSAmit Daniel Kachhap }; 6659dfa54cSAmit Daniel Kachhap 6759dfa54cSAmit Daniel Kachhap /* 6859dfa54cSAmit Daniel Kachhap * TMU treats temperature as a mapped temperature code. 6959dfa54cSAmit Daniel Kachhap * The temperature is converted differently depending on the calibration type. 7059dfa54cSAmit Daniel Kachhap */ 7159dfa54cSAmit Daniel Kachhap static int temp_to_code(struct exynos_tmu_data *data, u8 temp) 7259dfa54cSAmit Daniel Kachhap { 7359dfa54cSAmit Daniel Kachhap struct exynos_tmu_platform_data *pdata = data->pdata; 7459dfa54cSAmit Daniel Kachhap int temp_code; 7559dfa54cSAmit Daniel Kachhap 76*1928457eSAmit Daniel Kachhap if (pdata->cal_mode == HW_MODE) 77*1928457eSAmit Daniel Kachhap return temp; 78*1928457eSAmit Daniel Kachhap 7959dfa54cSAmit Daniel Kachhap if (data->soc == SOC_ARCH_EXYNOS4210) 8059dfa54cSAmit Daniel Kachhap /* temp should range between 25 and 125 */ 8159dfa54cSAmit Daniel Kachhap if (temp < 25 || temp > 125) { 8259dfa54cSAmit Daniel Kachhap temp_code = -EINVAL; 8359dfa54cSAmit Daniel Kachhap goto out; 8459dfa54cSAmit Daniel Kachhap } 8559dfa54cSAmit Daniel Kachhap 8659dfa54cSAmit Daniel Kachhap switch (pdata->cal_type) { 8759dfa54cSAmit Daniel Kachhap case TYPE_TWO_POINT_TRIMMING: 88bb34b4c8SAmit Daniel Kachhap temp_code = (temp - pdata->first_point_trim) * 8959dfa54cSAmit Daniel Kachhap (data->temp_error2 - data->temp_error1) / 90bb34b4c8SAmit Daniel Kachhap (pdata->second_point_trim - pdata->first_point_trim) + 91bb34b4c8SAmit Daniel Kachhap data->temp_error1; 9259dfa54cSAmit Daniel Kachhap break; 9359dfa54cSAmit Daniel Kachhap case TYPE_ONE_POINT_TRIMMING: 94bb34b4c8SAmit Daniel Kachhap temp_code = temp + data->temp_error1 - pdata->first_point_trim; 9559dfa54cSAmit Daniel Kachhap break; 9659dfa54cSAmit Daniel Kachhap default: 97bb34b4c8SAmit Daniel Kachhap temp_code = temp + pdata->default_temp_offset; 9859dfa54cSAmit Daniel Kachhap break; 9959dfa54cSAmit Daniel Kachhap } 10059dfa54cSAmit Daniel Kachhap out: 10159dfa54cSAmit Daniel Kachhap return temp_code; 10259dfa54cSAmit Daniel Kachhap } 10359dfa54cSAmit Daniel Kachhap 10459dfa54cSAmit Daniel Kachhap /* 10559dfa54cSAmit Daniel Kachhap * Calculate a temperature value from a temperature code. 10659dfa54cSAmit Daniel Kachhap * The unit of the temperature is degree Celsius. 10759dfa54cSAmit Daniel Kachhap */ 10859dfa54cSAmit Daniel Kachhap static int code_to_temp(struct exynos_tmu_data *data, u8 temp_code) 10959dfa54cSAmit Daniel Kachhap { 11059dfa54cSAmit Daniel Kachhap struct exynos_tmu_platform_data *pdata = data->pdata; 11159dfa54cSAmit Daniel Kachhap int temp; 11259dfa54cSAmit Daniel Kachhap 113*1928457eSAmit Daniel Kachhap if (pdata->cal_mode == HW_MODE) 114*1928457eSAmit Daniel Kachhap return temp_code; 115*1928457eSAmit Daniel Kachhap 11659dfa54cSAmit Daniel Kachhap if (data->soc == SOC_ARCH_EXYNOS4210) 11759dfa54cSAmit Daniel Kachhap /* temp_code should range between 75 and 175 */ 11859dfa54cSAmit Daniel Kachhap if (temp_code < 75 || temp_code > 175) { 11959dfa54cSAmit Daniel Kachhap temp = -ENODATA; 12059dfa54cSAmit Daniel Kachhap goto out; 12159dfa54cSAmit Daniel Kachhap } 12259dfa54cSAmit Daniel Kachhap 12359dfa54cSAmit Daniel Kachhap switch (pdata->cal_type) { 12459dfa54cSAmit Daniel Kachhap case TYPE_TWO_POINT_TRIMMING: 125bb34b4c8SAmit Daniel Kachhap temp = (temp_code - data->temp_error1) * 126bb34b4c8SAmit Daniel Kachhap (pdata->second_point_trim - pdata->first_point_trim) / 127bb34b4c8SAmit Daniel Kachhap (data->temp_error2 - data->temp_error1) + 128bb34b4c8SAmit Daniel Kachhap pdata->first_point_trim; 12959dfa54cSAmit Daniel Kachhap break; 13059dfa54cSAmit Daniel Kachhap case TYPE_ONE_POINT_TRIMMING: 131bb34b4c8SAmit Daniel Kachhap temp = temp_code - data->temp_error1 + pdata->first_point_trim; 13259dfa54cSAmit Daniel Kachhap break; 13359dfa54cSAmit Daniel Kachhap default: 134bb34b4c8SAmit Daniel Kachhap temp = temp_code - pdata->default_temp_offset; 13559dfa54cSAmit Daniel Kachhap break; 13659dfa54cSAmit Daniel Kachhap } 13759dfa54cSAmit Daniel Kachhap out: 13859dfa54cSAmit Daniel Kachhap return temp; 13959dfa54cSAmit Daniel Kachhap } 14059dfa54cSAmit Daniel Kachhap 14159dfa54cSAmit Daniel Kachhap static int exynos_tmu_initialize(struct platform_device *pdev) 14259dfa54cSAmit Daniel Kachhap { 14359dfa54cSAmit Daniel Kachhap struct exynos_tmu_data *data = platform_get_drvdata(pdev); 14459dfa54cSAmit Daniel Kachhap struct exynos_tmu_platform_data *pdata = data->pdata; 145b8d582b9SAmit Daniel Kachhap const struct exynos_tmu_registers *reg = pdata->registers; 1467ca04e58SAmit Daniel Kachhap unsigned int status, trim_info = 0, con; 14759dfa54cSAmit Daniel Kachhap unsigned int rising_threshold = 0, falling_threshold = 0; 14859dfa54cSAmit Daniel Kachhap int ret = 0, threshold_code, i, trigger_levs = 0; 14959dfa54cSAmit Daniel Kachhap 15059dfa54cSAmit Daniel Kachhap mutex_lock(&data->lock); 15159dfa54cSAmit Daniel Kachhap clk_enable(data->clk); 15259dfa54cSAmit Daniel Kachhap 153f4dae753SAmit Daniel Kachhap if (TMU_SUPPORTS(pdata, READY_STATUS)) { 154b8d582b9SAmit Daniel Kachhap status = readb(data->base + reg->tmu_status); 15559dfa54cSAmit Daniel Kachhap if (!status) { 15659dfa54cSAmit Daniel Kachhap ret = -EBUSY; 15759dfa54cSAmit Daniel Kachhap goto out; 15859dfa54cSAmit Daniel Kachhap } 159f4dae753SAmit Daniel Kachhap } 16059dfa54cSAmit Daniel Kachhap 161f4dae753SAmit Daniel Kachhap if (TMU_SUPPORTS(pdata, TRIM_RELOAD)) 162b8d582b9SAmit Daniel Kachhap __raw_writel(1, data->base + reg->triminfo_ctrl); 163b8d582b9SAmit Daniel Kachhap 164*1928457eSAmit Daniel Kachhap if (pdata->cal_mode == HW_MODE) 165*1928457eSAmit Daniel Kachhap goto skip_calib_data; 166*1928457eSAmit Daniel Kachhap 16759dfa54cSAmit Daniel Kachhap /* Save trimming info in order to perform calibration */ 168a0395eeeSAmit Daniel Kachhap if (data->soc == SOC_ARCH_EXYNOS5440) { 169a0395eeeSAmit Daniel Kachhap /* 170a0395eeeSAmit Daniel Kachhap * For exynos5440 soc triminfo value is swapped between TMU0 and 171a0395eeeSAmit Daniel Kachhap * TMU2, so the below logic is needed. 172a0395eeeSAmit Daniel Kachhap */ 173a0395eeeSAmit Daniel Kachhap switch (data->id) { 174a0395eeeSAmit Daniel Kachhap case 0: 175a0395eeeSAmit Daniel Kachhap trim_info = readl(data->base + 176a0395eeeSAmit Daniel Kachhap EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data); 177a0395eeeSAmit Daniel Kachhap break; 178a0395eeeSAmit Daniel Kachhap case 1: 179b8d582b9SAmit Daniel Kachhap trim_info = readl(data->base + reg->triminfo_data); 180a0395eeeSAmit Daniel Kachhap break; 181a0395eeeSAmit Daniel Kachhap case 2: 182a0395eeeSAmit Daniel Kachhap trim_info = readl(data->base - 183a0395eeeSAmit Daniel Kachhap EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data); 184a0395eeeSAmit Daniel Kachhap } 185a0395eeeSAmit Daniel Kachhap } else { 186a0395eeeSAmit Daniel Kachhap trim_info = readl(data->base + reg->triminfo_data); 187a0395eeeSAmit Daniel Kachhap } 188b8d582b9SAmit Daniel Kachhap data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK; 189b8d582b9SAmit Daniel Kachhap data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) & 190b8d582b9SAmit Daniel Kachhap EXYNOS_TMU_TEMP_MASK); 19159dfa54cSAmit Daniel Kachhap 1925000806cSAmit Daniel Kachhap if (!data->temp_error1 || 1935000806cSAmit Daniel Kachhap (pdata->min_efuse_value > data->temp_error1) || 1945000806cSAmit Daniel Kachhap (data->temp_error1 > pdata->max_efuse_value)) 1955000806cSAmit Daniel Kachhap data->temp_error1 = pdata->efuse_value & EXYNOS_TMU_TEMP_MASK; 1965000806cSAmit Daniel Kachhap 1975000806cSAmit Daniel Kachhap if (!data->temp_error2) 1985000806cSAmit Daniel Kachhap data->temp_error2 = 1995000806cSAmit Daniel Kachhap (pdata->efuse_value >> reg->triminfo_85_shift) & 2005000806cSAmit Daniel Kachhap EXYNOS_TMU_TEMP_MASK; 20159dfa54cSAmit Daniel Kachhap 202*1928457eSAmit Daniel Kachhap skip_calib_data: 2037ca04e58SAmit Daniel Kachhap if (pdata->max_trigger_level > MAX_THRESHOLD_LEVS) { 2047ca04e58SAmit Daniel Kachhap dev_err(&pdev->dev, "Invalid max trigger level\n"); 2057ca04e58SAmit Daniel Kachhap goto out; 2067ca04e58SAmit Daniel Kachhap } 2077ca04e58SAmit Daniel Kachhap 2087ca04e58SAmit Daniel Kachhap for (i = 0; i < pdata->max_trigger_level; i++) { 2097ca04e58SAmit Daniel Kachhap if (!pdata->trigger_levels[i]) 2107ca04e58SAmit Daniel Kachhap continue; 2117ca04e58SAmit Daniel Kachhap 2127ca04e58SAmit Daniel Kachhap if ((pdata->trigger_type[i] == HW_TRIP) && 2137ca04e58SAmit Daniel Kachhap (!pdata->trigger_levels[pdata->max_trigger_level - 1])) { 2147ca04e58SAmit Daniel Kachhap dev_err(&pdev->dev, "Invalid hw trigger level\n"); 2157ca04e58SAmit Daniel Kachhap ret = -EINVAL; 2167ca04e58SAmit Daniel Kachhap goto out; 2177ca04e58SAmit Daniel Kachhap } 2187ca04e58SAmit Daniel Kachhap 2197ca04e58SAmit Daniel Kachhap /* Count trigger levels except the HW trip*/ 2207ca04e58SAmit Daniel Kachhap if (!(pdata->trigger_type[i] == HW_TRIP)) 22159dfa54cSAmit Daniel Kachhap trigger_levs++; 2227ca04e58SAmit Daniel Kachhap } 22359dfa54cSAmit Daniel Kachhap 22459dfa54cSAmit Daniel Kachhap if (data->soc == SOC_ARCH_EXYNOS4210) { 22559dfa54cSAmit Daniel Kachhap /* Write temperature code for threshold */ 22659dfa54cSAmit Daniel Kachhap threshold_code = temp_to_code(data, pdata->threshold); 22759dfa54cSAmit Daniel Kachhap if (threshold_code < 0) { 22859dfa54cSAmit Daniel Kachhap ret = threshold_code; 22959dfa54cSAmit Daniel Kachhap goto out; 23059dfa54cSAmit Daniel Kachhap } 23159dfa54cSAmit Daniel Kachhap writeb(threshold_code, 232b8d582b9SAmit Daniel Kachhap data->base + reg->threshold_temp); 23359dfa54cSAmit Daniel Kachhap for (i = 0; i < trigger_levs; i++) 234b8d582b9SAmit Daniel Kachhap writeb(pdata->trigger_levels[i], data->base + 235b8d582b9SAmit Daniel Kachhap reg->threshold_th0 + i * sizeof(reg->threshold_th0)); 23659dfa54cSAmit Daniel Kachhap 237b8d582b9SAmit Daniel Kachhap writel(reg->inten_rise_mask, data->base + reg->tmu_intclear); 238a0395eeeSAmit Daniel Kachhap } else { 23959dfa54cSAmit Daniel Kachhap /* Write temperature code for rising and falling threshold */ 2407ca04e58SAmit Daniel Kachhap for (i = 0; 2417ca04e58SAmit Daniel Kachhap i < trigger_levs && i < EXYNOS_MAX_TRIGGER_PER_REG; i++) { 24259dfa54cSAmit Daniel Kachhap threshold_code = temp_to_code(data, 24359dfa54cSAmit Daniel Kachhap pdata->trigger_levels[i]); 24459dfa54cSAmit Daniel Kachhap if (threshold_code < 0) { 24559dfa54cSAmit Daniel Kachhap ret = threshold_code; 24659dfa54cSAmit Daniel Kachhap goto out; 24759dfa54cSAmit Daniel Kachhap } 24859dfa54cSAmit Daniel Kachhap rising_threshold |= threshold_code << 8 * i; 24959dfa54cSAmit Daniel Kachhap if (pdata->threshold_falling) { 25059dfa54cSAmit Daniel Kachhap threshold_code = temp_to_code(data, 25159dfa54cSAmit Daniel Kachhap pdata->trigger_levels[i] - 25259dfa54cSAmit Daniel Kachhap pdata->threshold_falling); 25359dfa54cSAmit Daniel Kachhap if (threshold_code > 0) 25459dfa54cSAmit Daniel Kachhap falling_threshold |= 25559dfa54cSAmit Daniel Kachhap threshold_code << 8 * i; 25659dfa54cSAmit Daniel Kachhap } 25759dfa54cSAmit Daniel Kachhap } 25859dfa54cSAmit Daniel Kachhap 25959dfa54cSAmit Daniel Kachhap writel(rising_threshold, 260b8d582b9SAmit Daniel Kachhap data->base + reg->threshold_th0); 26159dfa54cSAmit Daniel Kachhap writel(falling_threshold, 262b8d582b9SAmit Daniel Kachhap data->base + reg->threshold_th1); 26359dfa54cSAmit Daniel Kachhap 264b8d582b9SAmit Daniel Kachhap writel((reg->inten_rise_mask << reg->inten_rise_shift) | 265b8d582b9SAmit Daniel Kachhap (reg->inten_fall_mask << reg->inten_fall_shift), 266b8d582b9SAmit Daniel Kachhap data->base + reg->tmu_intclear); 2677ca04e58SAmit Daniel Kachhap 2687ca04e58SAmit Daniel Kachhap /* if last threshold limit is also present */ 2697ca04e58SAmit Daniel Kachhap i = pdata->max_trigger_level - 1; 2707ca04e58SAmit Daniel Kachhap if (pdata->trigger_levels[i] && 2717ca04e58SAmit Daniel Kachhap (pdata->trigger_type[i] == HW_TRIP)) { 2727ca04e58SAmit Daniel Kachhap threshold_code = temp_to_code(data, 2737ca04e58SAmit Daniel Kachhap pdata->trigger_levels[i]); 2747ca04e58SAmit Daniel Kachhap if (threshold_code < 0) { 2757ca04e58SAmit Daniel Kachhap ret = threshold_code; 2767ca04e58SAmit Daniel Kachhap goto out; 2777ca04e58SAmit Daniel Kachhap } 278a0395eeeSAmit Daniel Kachhap if (i == EXYNOS_MAX_TRIGGER_PER_REG - 1) { 279a0395eeeSAmit Daniel Kachhap /* 1-4 level to be assigned in th0 reg */ 2807ca04e58SAmit Daniel Kachhap rising_threshold |= threshold_code << 8 * i; 2817ca04e58SAmit Daniel Kachhap writel(rising_threshold, 2827ca04e58SAmit Daniel Kachhap data->base + reg->threshold_th0); 283a0395eeeSAmit Daniel Kachhap } else if (i == EXYNOS_MAX_TRIGGER_PER_REG) { 284a0395eeeSAmit Daniel Kachhap /* 5th level to be assigned in th2 reg */ 285a0395eeeSAmit Daniel Kachhap rising_threshold = 286a0395eeeSAmit Daniel Kachhap threshold_code << reg->threshold_th3_l0_shift; 287a0395eeeSAmit Daniel Kachhap writel(rising_threshold, 288a0395eeeSAmit Daniel Kachhap data->base + reg->threshold_th2); 289a0395eeeSAmit Daniel Kachhap } 2907ca04e58SAmit Daniel Kachhap con = readl(data->base + reg->tmu_ctrl); 2917ca04e58SAmit Daniel Kachhap con |= (1 << reg->therm_trip_en_shift); 2927ca04e58SAmit Daniel Kachhap writel(con, data->base + reg->tmu_ctrl); 2937ca04e58SAmit Daniel Kachhap } 29459dfa54cSAmit Daniel Kachhap } 295a0395eeeSAmit Daniel Kachhap /*Clear the PMIN in the common TMU register*/ 296a0395eeeSAmit Daniel Kachhap if (reg->tmu_pmin && !data->id) 297a0395eeeSAmit Daniel Kachhap writel(0, data->base_common + reg->tmu_pmin); 29859dfa54cSAmit Daniel Kachhap out: 29959dfa54cSAmit Daniel Kachhap clk_disable(data->clk); 30059dfa54cSAmit Daniel Kachhap mutex_unlock(&data->lock); 30159dfa54cSAmit Daniel Kachhap 30259dfa54cSAmit Daniel Kachhap return ret; 30359dfa54cSAmit Daniel Kachhap } 30459dfa54cSAmit Daniel Kachhap 30559dfa54cSAmit Daniel Kachhap static void exynos_tmu_control(struct platform_device *pdev, bool on) 30659dfa54cSAmit Daniel Kachhap { 30759dfa54cSAmit Daniel Kachhap struct exynos_tmu_data *data = platform_get_drvdata(pdev); 30859dfa54cSAmit Daniel Kachhap struct exynos_tmu_platform_data *pdata = data->pdata; 309b8d582b9SAmit Daniel Kachhap const struct exynos_tmu_registers *reg = pdata->registers; 310*1928457eSAmit Daniel Kachhap unsigned int con, interrupt_en, cal_val; 31159dfa54cSAmit Daniel Kachhap 31259dfa54cSAmit Daniel Kachhap mutex_lock(&data->lock); 31359dfa54cSAmit Daniel Kachhap clk_enable(data->clk); 31459dfa54cSAmit Daniel Kachhap 315b8d582b9SAmit Daniel Kachhap con = readl(data->base + reg->tmu_ctrl); 31659dfa54cSAmit Daniel Kachhap 317d0a0ce3eSAmit Daniel Kachhap if (pdata->reference_voltage) { 318b8d582b9SAmit Daniel Kachhap con &= ~(reg->buf_vref_sel_mask << reg->buf_vref_sel_shift); 319b8d582b9SAmit Daniel Kachhap con |= pdata->reference_voltage << reg->buf_vref_sel_shift; 320d0a0ce3eSAmit Daniel Kachhap } 321d0a0ce3eSAmit Daniel Kachhap 322d0a0ce3eSAmit Daniel Kachhap if (pdata->gain) { 323b8d582b9SAmit Daniel Kachhap con &= ~(reg->buf_slope_sel_mask << reg->buf_slope_sel_shift); 324b8d582b9SAmit Daniel Kachhap con |= (pdata->gain << reg->buf_slope_sel_shift); 325d0a0ce3eSAmit Daniel Kachhap } 326d0a0ce3eSAmit Daniel Kachhap 327d0a0ce3eSAmit Daniel Kachhap if (pdata->noise_cancel_mode) { 328b8d582b9SAmit Daniel Kachhap con &= ~(reg->therm_trip_mode_mask << 329b8d582b9SAmit Daniel Kachhap reg->therm_trip_mode_shift); 330b8d582b9SAmit Daniel Kachhap con |= (pdata->noise_cancel_mode << reg->therm_trip_mode_shift); 33159dfa54cSAmit Daniel Kachhap } 33259dfa54cSAmit Daniel Kachhap 333*1928457eSAmit Daniel Kachhap if (pdata->cal_mode == HW_MODE) { 334*1928457eSAmit Daniel Kachhap con &= ~(reg->calib_mode_mask << reg->calib_mode_shift); 335*1928457eSAmit Daniel Kachhap cal_val = 0; 336*1928457eSAmit Daniel Kachhap switch (pdata->cal_type) { 337*1928457eSAmit Daniel Kachhap case TYPE_TWO_POINT_TRIMMING: 338*1928457eSAmit Daniel Kachhap cal_val = 3; 339*1928457eSAmit Daniel Kachhap break; 340*1928457eSAmit Daniel Kachhap case TYPE_ONE_POINT_TRIMMING_85: 341*1928457eSAmit Daniel Kachhap cal_val = 2; 342*1928457eSAmit Daniel Kachhap break; 343*1928457eSAmit Daniel Kachhap case TYPE_ONE_POINT_TRIMMING_25: 344*1928457eSAmit Daniel Kachhap cal_val = 1; 345*1928457eSAmit Daniel Kachhap break; 346*1928457eSAmit Daniel Kachhap case TYPE_NONE: 347*1928457eSAmit Daniel Kachhap break; 348*1928457eSAmit Daniel Kachhap default: 349*1928457eSAmit Daniel Kachhap dev_err(&pdev->dev, "Invalid calibration type, using none\n"); 350*1928457eSAmit Daniel Kachhap } 351*1928457eSAmit Daniel Kachhap con |= cal_val << reg->calib_mode_shift; 352*1928457eSAmit Daniel Kachhap } 353*1928457eSAmit Daniel Kachhap 35459dfa54cSAmit Daniel Kachhap if (on) { 355b8d582b9SAmit Daniel Kachhap con |= (1 << reg->core_en_shift); 356d0a0ce3eSAmit Daniel Kachhap interrupt_en = 357b8d582b9SAmit Daniel Kachhap pdata->trigger_enable[3] << reg->inten_rise3_shift | 358b8d582b9SAmit Daniel Kachhap pdata->trigger_enable[2] << reg->inten_rise2_shift | 359b8d582b9SAmit Daniel Kachhap pdata->trigger_enable[1] << reg->inten_rise1_shift | 360b8d582b9SAmit Daniel Kachhap pdata->trigger_enable[0] << reg->inten_rise0_shift; 361f4dae753SAmit Daniel Kachhap if (TMU_SUPPORTS(pdata, FALLING_TRIP)) 362d0a0ce3eSAmit Daniel Kachhap interrupt_en |= 363b8d582b9SAmit Daniel Kachhap interrupt_en << reg->inten_fall0_shift; 36459dfa54cSAmit Daniel Kachhap } else { 365b8d582b9SAmit Daniel Kachhap con &= ~(1 << reg->core_en_shift); 36659dfa54cSAmit Daniel Kachhap interrupt_en = 0; /* Disable all interrupts */ 36759dfa54cSAmit Daniel Kachhap } 368b8d582b9SAmit Daniel Kachhap writel(interrupt_en, data->base + reg->tmu_inten); 369b8d582b9SAmit Daniel Kachhap writel(con, data->base + reg->tmu_ctrl); 37059dfa54cSAmit Daniel Kachhap 37159dfa54cSAmit Daniel Kachhap clk_disable(data->clk); 37259dfa54cSAmit Daniel Kachhap mutex_unlock(&data->lock); 37359dfa54cSAmit Daniel Kachhap } 37459dfa54cSAmit Daniel Kachhap 37559dfa54cSAmit Daniel Kachhap static int exynos_tmu_read(struct exynos_tmu_data *data) 37659dfa54cSAmit Daniel Kachhap { 377b8d582b9SAmit Daniel Kachhap struct exynos_tmu_platform_data *pdata = data->pdata; 378b8d582b9SAmit Daniel Kachhap const struct exynos_tmu_registers *reg = pdata->registers; 37959dfa54cSAmit Daniel Kachhap u8 temp_code; 38059dfa54cSAmit Daniel Kachhap int temp; 38159dfa54cSAmit Daniel Kachhap 38259dfa54cSAmit Daniel Kachhap mutex_lock(&data->lock); 38359dfa54cSAmit Daniel Kachhap clk_enable(data->clk); 38459dfa54cSAmit Daniel Kachhap 385b8d582b9SAmit Daniel Kachhap temp_code = readb(data->base + reg->tmu_cur_temp); 38659dfa54cSAmit Daniel Kachhap temp = code_to_temp(data, temp_code); 38759dfa54cSAmit Daniel Kachhap 38859dfa54cSAmit Daniel Kachhap clk_disable(data->clk); 38959dfa54cSAmit Daniel Kachhap mutex_unlock(&data->lock); 39059dfa54cSAmit Daniel Kachhap 39159dfa54cSAmit Daniel Kachhap return temp; 39259dfa54cSAmit Daniel Kachhap } 39359dfa54cSAmit Daniel Kachhap 39459dfa54cSAmit Daniel Kachhap #ifdef CONFIG_THERMAL_EMULATION 39559dfa54cSAmit Daniel Kachhap static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp) 39659dfa54cSAmit Daniel Kachhap { 39759dfa54cSAmit Daniel Kachhap struct exynos_tmu_data *data = drv_data; 398b8d582b9SAmit Daniel Kachhap struct exynos_tmu_platform_data *pdata = data->pdata; 399b8d582b9SAmit Daniel Kachhap const struct exynos_tmu_registers *reg = pdata->registers; 400b8d582b9SAmit Daniel Kachhap unsigned int val; 40159dfa54cSAmit Daniel Kachhap int ret = -EINVAL; 40259dfa54cSAmit Daniel Kachhap 403f4dae753SAmit Daniel Kachhap if (!TMU_SUPPORTS(pdata, EMULATION)) 40459dfa54cSAmit Daniel Kachhap goto out; 40559dfa54cSAmit Daniel Kachhap 40659dfa54cSAmit Daniel Kachhap if (temp && temp < MCELSIUS) 40759dfa54cSAmit Daniel Kachhap goto out; 40859dfa54cSAmit Daniel Kachhap 40959dfa54cSAmit Daniel Kachhap mutex_lock(&data->lock); 41059dfa54cSAmit Daniel Kachhap clk_enable(data->clk); 41159dfa54cSAmit Daniel Kachhap 412b8d582b9SAmit Daniel Kachhap val = readl(data->base + reg->emul_con); 41359dfa54cSAmit Daniel Kachhap 41459dfa54cSAmit Daniel Kachhap if (temp) { 41559dfa54cSAmit Daniel Kachhap temp /= MCELSIUS; 41659dfa54cSAmit Daniel Kachhap 417f4dae753SAmit Daniel Kachhap if (TMU_SUPPORTS(pdata, EMUL_TIME)) { 418f4dae753SAmit Daniel Kachhap val &= ~(EXYNOS_EMUL_TIME_MASK << reg->emul_time_shift); 419f4dae753SAmit Daniel Kachhap val |= (EXYNOS_EMUL_TIME << reg->emul_time_shift); 420f4dae753SAmit Daniel Kachhap } 421f4dae753SAmit Daniel Kachhap val &= ~(EXYNOS_EMUL_DATA_MASK << reg->emul_temp_shift); 422f4dae753SAmit Daniel Kachhap val |= (temp_to_code(data, temp) << reg->emul_temp_shift) | 423f4dae753SAmit Daniel Kachhap EXYNOS_EMUL_ENABLE; 42459dfa54cSAmit Daniel Kachhap } else { 425b8d582b9SAmit Daniel Kachhap val &= ~EXYNOS_EMUL_ENABLE; 42659dfa54cSAmit Daniel Kachhap } 42759dfa54cSAmit Daniel Kachhap 428b8d582b9SAmit Daniel Kachhap writel(val, data->base + reg->emul_con); 42959dfa54cSAmit Daniel Kachhap 43059dfa54cSAmit Daniel Kachhap clk_disable(data->clk); 43159dfa54cSAmit Daniel Kachhap mutex_unlock(&data->lock); 43259dfa54cSAmit Daniel Kachhap return 0; 43359dfa54cSAmit Daniel Kachhap out: 43459dfa54cSAmit Daniel Kachhap return ret; 43559dfa54cSAmit Daniel Kachhap } 43659dfa54cSAmit Daniel Kachhap #else 43759dfa54cSAmit Daniel Kachhap static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp) 43859dfa54cSAmit Daniel Kachhap { return -EINVAL; } 43959dfa54cSAmit Daniel Kachhap #endif/*CONFIG_THERMAL_EMULATION*/ 44059dfa54cSAmit Daniel Kachhap 44159dfa54cSAmit Daniel Kachhap static void exynos_tmu_work(struct work_struct *work) 44259dfa54cSAmit Daniel Kachhap { 44359dfa54cSAmit Daniel Kachhap struct exynos_tmu_data *data = container_of(work, 44459dfa54cSAmit Daniel Kachhap struct exynos_tmu_data, irq_work); 445b8d582b9SAmit Daniel Kachhap struct exynos_tmu_platform_data *pdata = data->pdata; 446b8d582b9SAmit Daniel Kachhap const struct exynos_tmu_registers *reg = pdata->registers; 447a0395eeeSAmit Daniel Kachhap unsigned int val_irq, val_type; 448a0395eeeSAmit Daniel Kachhap 449a0395eeeSAmit Daniel Kachhap /* Find which sensor generated this interrupt */ 450a0395eeeSAmit Daniel Kachhap if (reg->tmu_irqstatus) { 451a0395eeeSAmit Daniel Kachhap val_type = readl(data->base_common + reg->tmu_irqstatus); 452a0395eeeSAmit Daniel Kachhap if (!((val_type >> data->id) & 0x1)) 453a0395eeeSAmit Daniel Kachhap goto out; 454a0395eeeSAmit Daniel Kachhap } 45559dfa54cSAmit Daniel Kachhap 456cebe7373SAmit Daniel Kachhap exynos_report_trigger(data->reg_conf); 45759dfa54cSAmit Daniel Kachhap mutex_lock(&data->lock); 45859dfa54cSAmit Daniel Kachhap clk_enable(data->clk); 459b8d582b9SAmit Daniel Kachhap 460a4463c4fSAmit Daniel Kachhap /* TODO: take action based on particular interrupt */ 461a4463c4fSAmit Daniel Kachhap val_irq = readl(data->base + reg->tmu_intstat); 462a4463c4fSAmit Daniel Kachhap /* clear the interrupts */ 463a4463c4fSAmit Daniel Kachhap writel(val_irq, data->base + reg->tmu_intclear); 464b8d582b9SAmit Daniel Kachhap 46559dfa54cSAmit Daniel Kachhap clk_disable(data->clk); 46659dfa54cSAmit Daniel Kachhap mutex_unlock(&data->lock); 467a0395eeeSAmit Daniel Kachhap out: 46859dfa54cSAmit Daniel Kachhap enable_irq(data->irq); 46959dfa54cSAmit Daniel Kachhap } 47059dfa54cSAmit Daniel Kachhap 47159dfa54cSAmit Daniel Kachhap static irqreturn_t exynos_tmu_irq(int irq, void *id) 47259dfa54cSAmit Daniel Kachhap { 47359dfa54cSAmit Daniel Kachhap struct exynos_tmu_data *data = id; 47459dfa54cSAmit Daniel Kachhap 47559dfa54cSAmit Daniel Kachhap disable_irq_nosync(irq); 47659dfa54cSAmit Daniel Kachhap schedule_work(&data->irq_work); 47759dfa54cSAmit Daniel Kachhap 47859dfa54cSAmit Daniel Kachhap return IRQ_HANDLED; 47959dfa54cSAmit Daniel Kachhap } 48059dfa54cSAmit Daniel Kachhap 48159dfa54cSAmit Daniel Kachhap #ifdef CONFIG_OF 48259dfa54cSAmit Daniel Kachhap static const struct of_device_id exynos_tmu_match[] = { 48359dfa54cSAmit Daniel Kachhap { 48459dfa54cSAmit Daniel Kachhap .compatible = "samsung,exynos4210-tmu", 48559dfa54cSAmit Daniel Kachhap .data = (void *)EXYNOS4210_TMU_DRV_DATA, 48659dfa54cSAmit Daniel Kachhap }, 48759dfa54cSAmit Daniel Kachhap { 48859dfa54cSAmit Daniel Kachhap .compatible = "samsung,exynos4412-tmu", 489e6b7991eSAmit Daniel Kachhap .data = (void *)EXYNOS5250_TMU_DRV_DATA, 49059dfa54cSAmit Daniel Kachhap }, 49159dfa54cSAmit Daniel Kachhap { 49259dfa54cSAmit Daniel Kachhap .compatible = "samsung,exynos5250-tmu", 493e6b7991eSAmit Daniel Kachhap .data = (void *)EXYNOS5250_TMU_DRV_DATA, 49459dfa54cSAmit Daniel Kachhap }, 49590542546SAmit Daniel Kachhap { 49690542546SAmit Daniel Kachhap .compatible = "samsung,exynos5440-tmu", 49790542546SAmit Daniel Kachhap .data = (void *)EXYNOS5440_TMU_DRV_DATA, 49890542546SAmit Daniel Kachhap }, 49959dfa54cSAmit Daniel Kachhap {}, 50059dfa54cSAmit Daniel Kachhap }; 50159dfa54cSAmit Daniel Kachhap MODULE_DEVICE_TABLE(of, exynos_tmu_match); 50259dfa54cSAmit Daniel Kachhap #endif 50359dfa54cSAmit Daniel Kachhap 50459dfa54cSAmit Daniel Kachhap static inline struct exynos_tmu_platform_data *exynos_get_driver_data( 505cebe7373SAmit Daniel Kachhap struct platform_device *pdev, int id) 50659dfa54cSAmit Daniel Kachhap { 50759dfa54cSAmit Daniel Kachhap #ifdef CONFIG_OF 508cebe7373SAmit Daniel Kachhap struct exynos_tmu_init_data *data_table; 509cebe7373SAmit Daniel Kachhap struct exynos_tmu_platform_data *tmu_data; 51059dfa54cSAmit Daniel Kachhap if (pdev->dev.of_node) { 51159dfa54cSAmit Daniel Kachhap const struct of_device_id *match; 51259dfa54cSAmit Daniel Kachhap match = of_match_node(exynos_tmu_match, pdev->dev.of_node); 51359dfa54cSAmit Daniel Kachhap if (!match) 51459dfa54cSAmit Daniel Kachhap return NULL; 515cebe7373SAmit Daniel Kachhap data_table = (struct exynos_tmu_init_data *) match->data; 516cebe7373SAmit Daniel Kachhap if (!data_table || id >= data_table->tmu_count) 517cebe7373SAmit Daniel Kachhap return NULL; 518cebe7373SAmit Daniel Kachhap tmu_data = data_table->tmu_data; 519cebe7373SAmit Daniel Kachhap return (struct exynos_tmu_platform_data *) (tmu_data + id); 52059dfa54cSAmit Daniel Kachhap } 52159dfa54cSAmit Daniel Kachhap #endif 5221cd1ecb6SAmit Daniel Kachhap return NULL; 52359dfa54cSAmit Daniel Kachhap } 52459dfa54cSAmit Daniel Kachhap 525cebe7373SAmit Daniel Kachhap static int exynos_map_dt_data(struct platform_device *pdev) 52659dfa54cSAmit Daniel Kachhap { 527cebe7373SAmit Daniel Kachhap struct exynos_tmu_data *data = platform_get_drvdata(pdev); 528cebe7373SAmit Daniel Kachhap struct exynos_tmu_platform_data *pdata; 529cebe7373SAmit Daniel Kachhap struct resource res; 53059dfa54cSAmit Daniel Kachhap 531cebe7373SAmit Daniel Kachhap if (!data) 532cebe7373SAmit Daniel Kachhap return -ENODEV; 53359dfa54cSAmit Daniel Kachhap 534cebe7373SAmit Daniel Kachhap data->id = of_alias_get_id(pdev->dev.of_node, "tmuctrl"); 535cebe7373SAmit Daniel Kachhap if (data->id < 0) 536cebe7373SAmit Daniel Kachhap data->id = 0; 537cebe7373SAmit Daniel Kachhap 538cebe7373SAmit Daniel Kachhap data->irq = irq_of_parse_and_map(pdev->dev.of_node, 0); 539cebe7373SAmit Daniel Kachhap if (data->irq <= 0) { 540cebe7373SAmit Daniel Kachhap dev_err(&pdev->dev, "failed to get IRQ\n"); 541cebe7373SAmit Daniel Kachhap return -ENODEV; 542cebe7373SAmit Daniel Kachhap } 543cebe7373SAmit Daniel Kachhap 544cebe7373SAmit Daniel Kachhap if (of_address_to_resource(pdev->dev.of_node, 0, &res)) { 545cebe7373SAmit Daniel Kachhap dev_err(&pdev->dev, "failed to get Resource 0\n"); 546cebe7373SAmit Daniel Kachhap return -ENODEV; 547cebe7373SAmit Daniel Kachhap } 548cebe7373SAmit Daniel Kachhap 549cebe7373SAmit Daniel Kachhap data->base = devm_ioremap(&pdev->dev, res.start, resource_size(&res)); 550cebe7373SAmit Daniel Kachhap if (!data->base) { 551cebe7373SAmit Daniel Kachhap dev_err(&pdev->dev, "Failed to ioremap memory\n"); 552cebe7373SAmit Daniel Kachhap return -EADDRNOTAVAIL; 553cebe7373SAmit Daniel Kachhap } 554cebe7373SAmit Daniel Kachhap 555cebe7373SAmit Daniel Kachhap pdata = exynos_get_driver_data(pdev, data->id); 55659dfa54cSAmit Daniel Kachhap if (!pdata) { 55759dfa54cSAmit Daniel Kachhap dev_err(&pdev->dev, "No platform init data supplied.\n"); 55859dfa54cSAmit Daniel Kachhap return -ENODEV; 55959dfa54cSAmit Daniel Kachhap } 560cebe7373SAmit Daniel Kachhap data->pdata = pdata; 561d9b6ee14SAmit Daniel Kachhap /* 562d9b6ee14SAmit Daniel Kachhap * Check if the TMU shares some registers and then try to map the 563d9b6ee14SAmit Daniel Kachhap * memory of common registers. 564d9b6ee14SAmit Daniel Kachhap */ 565d9b6ee14SAmit Daniel Kachhap if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) 566d9b6ee14SAmit Daniel Kachhap return 0; 567d9b6ee14SAmit Daniel Kachhap 568d9b6ee14SAmit Daniel Kachhap if (of_address_to_resource(pdev->dev.of_node, 1, &res)) { 569d9b6ee14SAmit Daniel Kachhap dev_err(&pdev->dev, "failed to get Resource 1\n"); 570d9b6ee14SAmit Daniel Kachhap return -ENODEV; 571d9b6ee14SAmit Daniel Kachhap } 572d9b6ee14SAmit Daniel Kachhap 573d9b6ee14SAmit Daniel Kachhap data->base_common = devm_ioremap(&pdev->dev, res.start, 574d9b6ee14SAmit Daniel Kachhap resource_size(&res)); 575d9b6ee14SAmit Daniel Kachhap if (!data->base) { 576d9b6ee14SAmit Daniel Kachhap dev_err(&pdev->dev, "Failed to ioremap memory\n"); 577d9b6ee14SAmit Daniel Kachhap return -ENOMEM; 578d9b6ee14SAmit Daniel Kachhap } 579cebe7373SAmit Daniel Kachhap 580cebe7373SAmit Daniel Kachhap return 0; 581cebe7373SAmit Daniel Kachhap } 582cebe7373SAmit Daniel Kachhap 583cebe7373SAmit Daniel Kachhap static int exynos_tmu_probe(struct platform_device *pdev) 584cebe7373SAmit Daniel Kachhap { 585cebe7373SAmit Daniel Kachhap struct exynos_tmu_data *data; 586cebe7373SAmit Daniel Kachhap struct exynos_tmu_platform_data *pdata; 587cebe7373SAmit Daniel Kachhap struct thermal_sensor_conf *sensor_conf; 588cebe7373SAmit Daniel Kachhap int ret, i; 589cebe7373SAmit Daniel Kachhap 59059dfa54cSAmit Daniel Kachhap data = devm_kzalloc(&pdev->dev, sizeof(struct exynos_tmu_data), 59159dfa54cSAmit Daniel Kachhap GFP_KERNEL); 59259dfa54cSAmit Daniel Kachhap if (!data) { 59359dfa54cSAmit Daniel Kachhap dev_err(&pdev->dev, "Failed to allocate driver structure\n"); 59459dfa54cSAmit Daniel Kachhap return -ENOMEM; 59559dfa54cSAmit Daniel Kachhap } 59659dfa54cSAmit Daniel Kachhap 597cebe7373SAmit Daniel Kachhap platform_set_drvdata(pdev, data); 598cebe7373SAmit Daniel Kachhap mutex_init(&data->lock); 599cebe7373SAmit Daniel Kachhap 600cebe7373SAmit Daniel Kachhap ret = exynos_map_dt_data(pdev); 601cebe7373SAmit Daniel Kachhap if (ret) 602cebe7373SAmit Daniel Kachhap return ret; 603cebe7373SAmit Daniel Kachhap 604cebe7373SAmit Daniel Kachhap pdata = data->pdata; 60559dfa54cSAmit Daniel Kachhap 60659dfa54cSAmit Daniel Kachhap INIT_WORK(&data->irq_work, exynos_tmu_work); 60759dfa54cSAmit Daniel Kachhap 60859dfa54cSAmit Daniel Kachhap data->clk = devm_clk_get(&pdev->dev, "tmu_apbif"); 60959dfa54cSAmit Daniel Kachhap if (IS_ERR(data->clk)) { 61059dfa54cSAmit Daniel Kachhap dev_err(&pdev->dev, "Failed to get clock\n"); 61159dfa54cSAmit Daniel Kachhap return PTR_ERR(data->clk); 61259dfa54cSAmit Daniel Kachhap } 61359dfa54cSAmit Daniel Kachhap 61459dfa54cSAmit Daniel Kachhap ret = clk_prepare(data->clk); 61559dfa54cSAmit Daniel Kachhap if (ret) 61659dfa54cSAmit Daniel Kachhap return ret; 61759dfa54cSAmit Daniel Kachhap 61859dfa54cSAmit Daniel Kachhap if (pdata->type == SOC_ARCH_EXYNOS || 619a0395eeeSAmit Daniel Kachhap pdata->type == SOC_ARCH_EXYNOS4210 || 620a0395eeeSAmit Daniel Kachhap pdata->type == SOC_ARCH_EXYNOS5440) 62159dfa54cSAmit Daniel Kachhap data->soc = pdata->type; 62259dfa54cSAmit Daniel Kachhap else { 62359dfa54cSAmit Daniel Kachhap ret = -EINVAL; 62459dfa54cSAmit Daniel Kachhap dev_err(&pdev->dev, "Platform not supported\n"); 62559dfa54cSAmit Daniel Kachhap goto err_clk; 62659dfa54cSAmit Daniel Kachhap } 62759dfa54cSAmit Daniel Kachhap 62859dfa54cSAmit Daniel Kachhap ret = exynos_tmu_initialize(pdev); 62959dfa54cSAmit Daniel Kachhap if (ret) { 63059dfa54cSAmit Daniel Kachhap dev_err(&pdev->dev, "Failed to initialize TMU\n"); 63159dfa54cSAmit Daniel Kachhap goto err_clk; 63259dfa54cSAmit Daniel Kachhap } 63359dfa54cSAmit Daniel Kachhap 63459dfa54cSAmit Daniel Kachhap exynos_tmu_control(pdev, true); 63559dfa54cSAmit Daniel Kachhap 636cebe7373SAmit Daniel Kachhap /* Allocate a structure to register with the exynos core thermal */ 637cebe7373SAmit Daniel Kachhap sensor_conf = devm_kzalloc(&pdev->dev, 638cebe7373SAmit Daniel Kachhap sizeof(struct thermal_sensor_conf), GFP_KERNEL); 639cebe7373SAmit Daniel Kachhap if (!sensor_conf) { 640cebe7373SAmit Daniel Kachhap dev_err(&pdev->dev, "Failed to allocate registration struct\n"); 641cebe7373SAmit Daniel Kachhap ret = -ENOMEM; 642cebe7373SAmit Daniel Kachhap goto err_clk; 643cebe7373SAmit Daniel Kachhap } 644cebe7373SAmit Daniel Kachhap sprintf(sensor_conf->name, "therm_zone%d", data->id); 645cebe7373SAmit Daniel Kachhap sensor_conf->read_temperature = (int (*)(void *))exynos_tmu_read; 646cebe7373SAmit Daniel Kachhap sensor_conf->write_emul_temp = 647cebe7373SAmit Daniel Kachhap (int (*)(void *, unsigned long))exynos_tmu_set_emulation; 648cebe7373SAmit Daniel Kachhap sensor_conf->driver_data = data; 649cebe7373SAmit Daniel Kachhap sensor_conf->trip_data.trip_count = pdata->trigger_enable[0] + 650bb34b4c8SAmit Daniel Kachhap pdata->trigger_enable[1] + pdata->trigger_enable[2]+ 651bb34b4c8SAmit Daniel Kachhap pdata->trigger_enable[3]; 65259dfa54cSAmit Daniel Kachhap 653cebe7373SAmit Daniel Kachhap for (i = 0; i < sensor_conf->trip_data.trip_count; i++) { 654cebe7373SAmit Daniel Kachhap sensor_conf->trip_data.trip_val[i] = 65559dfa54cSAmit Daniel Kachhap pdata->threshold + pdata->trigger_levels[i]; 656cebe7373SAmit Daniel Kachhap sensor_conf->trip_data.trip_type[i] = 6575c3cf552SAmit Daniel Kachhap pdata->trigger_type[i]; 6585c3cf552SAmit Daniel Kachhap } 65959dfa54cSAmit Daniel Kachhap 660cebe7373SAmit Daniel Kachhap sensor_conf->trip_data.trigger_falling = pdata->threshold_falling; 66159dfa54cSAmit Daniel Kachhap 662cebe7373SAmit Daniel Kachhap sensor_conf->cooling_data.freq_clip_count = pdata->freq_tab_count; 66359dfa54cSAmit Daniel Kachhap for (i = 0; i < pdata->freq_tab_count; i++) { 664cebe7373SAmit Daniel Kachhap sensor_conf->cooling_data.freq_data[i].freq_clip_max = 66559dfa54cSAmit Daniel Kachhap pdata->freq_tab[i].freq_clip_max; 666cebe7373SAmit Daniel Kachhap sensor_conf->cooling_data.freq_data[i].temp_level = 66759dfa54cSAmit Daniel Kachhap pdata->freq_tab[i].temp_level; 66859dfa54cSAmit Daniel Kachhap } 669cebe7373SAmit Daniel Kachhap sensor_conf->dev = &pdev->dev; 670cebe7373SAmit Daniel Kachhap /* Register the sensor with thermal management interface */ 671cebe7373SAmit Daniel Kachhap ret = exynos_register_thermal(sensor_conf); 67259dfa54cSAmit Daniel Kachhap if (ret) { 67359dfa54cSAmit Daniel Kachhap dev_err(&pdev->dev, "Failed to register thermal interface\n"); 67459dfa54cSAmit Daniel Kachhap goto err_clk; 67559dfa54cSAmit Daniel Kachhap } 676cebe7373SAmit Daniel Kachhap data->reg_conf = sensor_conf; 677cebe7373SAmit Daniel Kachhap 678cebe7373SAmit Daniel Kachhap ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq, 679cebe7373SAmit Daniel Kachhap IRQF_TRIGGER_RISING | IRQF_SHARED, dev_name(&pdev->dev), data); 680cebe7373SAmit Daniel Kachhap if (ret) { 681cebe7373SAmit Daniel Kachhap dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq); 682cebe7373SAmit Daniel Kachhap goto err_clk; 683cebe7373SAmit Daniel Kachhap } 68459dfa54cSAmit Daniel Kachhap 68559dfa54cSAmit Daniel Kachhap return 0; 68659dfa54cSAmit Daniel Kachhap err_clk: 68759dfa54cSAmit Daniel Kachhap clk_unprepare(data->clk); 68859dfa54cSAmit Daniel Kachhap return ret; 68959dfa54cSAmit Daniel Kachhap } 69059dfa54cSAmit Daniel Kachhap 69159dfa54cSAmit Daniel Kachhap static int exynos_tmu_remove(struct platform_device *pdev) 69259dfa54cSAmit Daniel Kachhap { 69359dfa54cSAmit Daniel Kachhap struct exynos_tmu_data *data = platform_get_drvdata(pdev); 69459dfa54cSAmit Daniel Kachhap 69559dfa54cSAmit Daniel Kachhap exynos_tmu_control(pdev, false); 69659dfa54cSAmit Daniel Kachhap 697cebe7373SAmit Daniel Kachhap exynos_unregister_thermal(data->reg_conf); 69859dfa54cSAmit Daniel Kachhap 69959dfa54cSAmit Daniel Kachhap clk_unprepare(data->clk); 70059dfa54cSAmit Daniel Kachhap 70159dfa54cSAmit Daniel Kachhap return 0; 70259dfa54cSAmit Daniel Kachhap } 70359dfa54cSAmit Daniel Kachhap 70459dfa54cSAmit Daniel Kachhap #ifdef CONFIG_PM_SLEEP 70559dfa54cSAmit Daniel Kachhap static int exynos_tmu_suspend(struct device *dev) 70659dfa54cSAmit Daniel Kachhap { 70759dfa54cSAmit Daniel Kachhap exynos_tmu_control(to_platform_device(dev), false); 70859dfa54cSAmit Daniel Kachhap 70959dfa54cSAmit Daniel Kachhap return 0; 71059dfa54cSAmit Daniel Kachhap } 71159dfa54cSAmit Daniel Kachhap 71259dfa54cSAmit Daniel Kachhap static int exynos_tmu_resume(struct device *dev) 71359dfa54cSAmit Daniel Kachhap { 71459dfa54cSAmit Daniel Kachhap struct platform_device *pdev = to_platform_device(dev); 71559dfa54cSAmit Daniel Kachhap 71659dfa54cSAmit Daniel Kachhap exynos_tmu_initialize(pdev); 71759dfa54cSAmit Daniel Kachhap exynos_tmu_control(pdev, true); 71859dfa54cSAmit Daniel Kachhap 71959dfa54cSAmit Daniel Kachhap return 0; 72059dfa54cSAmit Daniel Kachhap } 72159dfa54cSAmit Daniel Kachhap 72259dfa54cSAmit Daniel Kachhap static SIMPLE_DEV_PM_OPS(exynos_tmu_pm, 72359dfa54cSAmit Daniel Kachhap exynos_tmu_suspend, exynos_tmu_resume); 72459dfa54cSAmit Daniel Kachhap #define EXYNOS_TMU_PM (&exynos_tmu_pm) 72559dfa54cSAmit Daniel Kachhap #else 72659dfa54cSAmit Daniel Kachhap #define EXYNOS_TMU_PM NULL 72759dfa54cSAmit Daniel Kachhap #endif 72859dfa54cSAmit Daniel Kachhap 72959dfa54cSAmit Daniel Kachhap static struct platform_driver exynos_tmu_driver = { 73059dfa54cSAmit Daniel Kachhap .driver = { 73159dfa54cSAmit Daniel Kachhap .name = "exynos-tmu", 73259dfa54cSAmit Daniel Kachhap .owner = THIS_MODULE, 73359dfa54cSAmit Daniel Kachhap .pm = EXYNOS_TMU_PM, 73459dfa54cSAmit Daniel Kachhap .of_match_table = of_match_ptr(exynos_tmu_match), 73559dfa54cSAmit Daniel Kachhap }, 73659dfa54cSAmit Daniel Kachhap .probe = exynos_tmu_probe, 73759dfa54cSAmit Daniel Kachhap .remove = exynos_tmu_remove, 73859dfa54cSAmit Daniel Kachhap }; 73959dfa54cSAmit Daniel Kachhap 74059dfa54cSAmit Daniel Kachhap module_platform_driver(exynos_tmu_driver); 74159dfa54cSAmit Daniel Kachhap 74259dfa54cSAmit Daniel Kachhap MODULE_DESCRIPTION("EXYNOS TMU Driver"); 74359dfa54cSAmit Daniel Kachhap MODULE_AUTHOR("Donggeun Kim <dg77.kim@samsung.com>"); 74459dfa54cSAmit Daniel Kachhap MODULE_LICENSE("GPL"); 74559dfa54cSAmit Daniel Kachhap MODULE_ALIAS("platform:exynos-tmu"); 746