1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2019, Linaro Limited 4 */ 5 6 #include <linux/bitops.h> 7 #include <linux/regmap.h> 8 #include <linux/delay.h> 9 #include <linux/slab.h> 10 #include "tsens.h" 11 12 /* ----- SROT ------ */ 13 #define SROT_HW_VER_OFF 0x0000 14 #define SROT_CTRL_OFF 0x0004 15 16 /* ----- TM ------ */ 17 #define TM_INT_EN_OFF 0x0000 18 #define TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF 0x0004 19 #define TM_Sn_STATUS_OFF 0x0044 20 #define TM_TRDY_OFF 0x0084 21 #define TM_HIGH_LOW_INT_STATUS_OFF 0x0088 22 #define TM_HIGH_LOW_Sn_INT_THRESHOLD_OFF 0x0090 23 24 static struct tsens_legacy_calibration_format tsens_qcs404_nvmem = { 25 .base_len = 8, 26 .base_shift = 2, 27 .sp_len = 6, 28 .mode = { 4, 0 }, 29 .invalid = { 4, 2 }, 30 .base = { { 4, 3 }, { 4, 11 } }, 31 .sp = { 32 { { 0, 0 }, { 0, 6 } }, 33 { { 0, 12 }, { 0, 18 } }, 34 { { 0, 24 }, { 0, 30 } }, 35 { { 1, 4 }, { 1, 10 } }, 36 { { 1, 16 }, { 1, 22 } }, 37 { { 2, 0 }, { 2, 6 } }, 38 { { 2, 12 }, { 2, 18 } }, 39 { { 2, 24 }, { 2, 30 } }, 40 { { 3, 4 }, { 3, 10 } }, 41 { { 3, 16 }, { 3, 22 } }, 42 }, 43 }; 44 45 static int calibrate_v1(struct tsens_priv *priv) 46 { 47 u32 p1[10], p2[10]; 48 u32 *qfprom_cdata; 49 int mode, ret; 50 51 ret = tsens_calibrate_common(priv); 52 if (!ret) 53 return 0; 54 55 qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib"); 56 if (IS_ERR(qfprom_cdata)) 57 return PTR_ERR(qfprom_cdata); 58 59 mode = tsens_read_calibration_legacy(priv, &tsens_qcs404_nvmem, 60 p1, p2, 61 qfprom_cdata, NULL); 62 63 compute_intercept_slope(priv, p1, p2, mode); 64 kfree(qfprom_cdata); 65 66 return 0; 67 } 68 69 /* v1.x: msm8956,8976,qcs404,405 */ 70 71 static struct tsens_features tsens_v1_feat = { 72 .ver_major = VER_1_X, 73 .crit_int = 0, 74 .combo_int = 0, 75 .adc = 1, 76 .srot_split = 1, 77 .max_sensors = 11, 78 .trip_min_temp = -40000, 79 .trip_max_temp = 120000, 80 }; 81 82 static struct tsens_features tsens_v1_no_rpm_feat = { 83 .ver_major = VER_1_X_NO_RPM, 84 .crit_int = 0, 85 .combo_int = 0, 86 .adc = 1, 87 .srot_split = 1, 88 .max_sensors = 11, 89 .trip_min_temp = -40000, 90 .trip_max_temp = 120000, 91 }; 92 93 static const struct reg_field tsens_v1_regfields[MAX_REGFIELDS] = { 94 /* ----- SROT ------ */ 95 /* VERSION */ 96 [VER_MAJOR] = REG_FIELD(SROT_HW_VER_OFF, 28, 31), 97 [VER_MINOR] = REG_FIELD(SROT_HW_VER_OFF, 16, 27), 98 [VER_STEP] = REG_FIELD(SROT_HW_VER_OFF, 0, 15), 99 /* CTRL_OFFSET */ 100 [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0), 101 [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1), 102 [SENSOR_EN] = REG_FIELD(SROT_CTRL_OFF, 3, 13), 103 104 /* ----- TM ------ */ 105 /* INTERRUPT ENABLE */ 106 [INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 0), 107 108 /* UPPER/LOWER TEMPERATURE THRESHOLDS */ 109 REG_FIELD_FOR_EACH_SENSOR11(LOW_THRESH, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 0, 9), 110 REG_FIELD_FOR_EACH_SENSOR11(UP_THRESH, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 10, 19), 111 112 /* UPPER/LOWER INTERRUPTS [CLEAR/STATUS] */ 113 REG_FIELD_FOR_EACH_SENSOR11(LOW_INT_CLEAR, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 20, 20), 114 REG_FIELD_FOR_EACH_SENSOR11(UP_INT_CLEAR, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 21, 21), 115 [LOW_INT_STATUS_0] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 0, 0), 116 [LOW_INT_STATUS_1] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 1, 1), 117 [LOW_INT_STATUS_2] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 2, 2), 118 [LOW_INT_STATUS_3] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 3, 3), 119 [LOW_INT_STATUS_4] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 4, 4), 120 [LOW_INT_STATUS_5] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 5, 5), 121 [LOW_INT_STATUS_6] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 6, 6), 122 [LOW_INT_STATUS_7] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 7, 7), 123 [UP_INT_STATUS_0] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 8, 8), 124 [UP_INT_STATUS_1] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 9, 9), 125 [UP_INT_STATUS_2] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 10, 10), 126 [UP_INT_STATUS_3] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 11, 11), 127 [UP_INT_STATUS_4] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 12, 12), 128 [UP_INT_STATUS_5] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 13, 13), 129 [UP_INT_STATUS_6] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 14, 14), 130 [UP_INT_STATUS_7] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 15, 15), 131 132 /* NO CRITICAL INTERRUPT SUPPORT on v1 */ 133 134 /* Sn_STATUS */ 135 REG_FIELD_FOR_EACH_SENSOR11(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 9), 136 REG_FIELD_FOR_EACH_SENSOR11(VALID, TM_Sn_STATUS_OFF, 14, 14), 137 /* xxx_STATUS bits: 1 == threshold violated */ 138 REG_FIELD_FOR_EACH_SENSOR11(MIN_STATUS, TM_Sn_STATUS_OFF, 10, 10), 139 REG_FIELD_FOR_EACH_SENSOR11(LOWER_STATUS, TM_Sn_STATUS_OFF, 11, 11), 140 REG_FIELD_FOR_EACH_SENSOR11(UPPER_STATUS, TM_Sn_STATUS_OFF, 12, 12), 141 /* No CRITICAL field on v1.x */ 142 REG_FIELD_FOR_EACH_SENSOR11(MAX_STATUS, TM_Sn_STATUS_OFF, 13, 13), 143 144 /* TRDY: 1=ready, 0=in progress */ 145 [TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0), 146 }; 147 148 static int __init init_8956(struct tsens_priv *priv) { 149 priv->sensor[0].slope = 3313; 150 priv->sensor[1].slope = 3275; 151 priv->sensor[2].slope = 3320; 152 priv->sensor[3].slope = 3246; 153 priv->sensor[4].slope = 3279; 154 priv->sensor[5].slope = 3257; 155 priv->sensor[6].slope = 3234; 156 priv->sensor[7].slope = 3269; 157 priv->sensor[8].slope = 3255; 158 priv->sensor[9].slope = 3239; 159 priv->sensor[10].slope = 3286; 160 161 return init_common(priv); 162 } 163 164 static int __init init_tsens_v1_no_rpm(struct tsens_priv *priv) 165 { 166 int i, ret; 167 u32 mask = 0; 168 169 ret = init_common(priv); 170 if (ret < 0) { 171 dev_err(priv->dev, "Init common failed %d\n", ret); 172 return ret; 173 } 174 175 ret = regmap_field_write(priv->rf[TSENS_SW_RST], 1); 176 if (ret) { 177 dev_err(priv->dev, "Reset failed\n"); 178 return ret; 179 } 180 181 for (i = 0; i < priv->num_sensors; i++) 182 mask |= BIT(priv->sensor[i].hw_id); 183 184 ret = regmap_field_update_bits(priv->rf[SENSOR_EN], mask, mask); 185 if (ret) { 186 dev_err(priv->dev, "Sensor Enable failed\n"); 187 return ret; 188 } 189 190 ret = regmap_field_write(priv->rf[TSENS_EN], 1); 191 if (ret) { 192 dev_err(priv->dev, "Enable failed\n"); 193 return ret; 194 } 195 196 ret = regmap_field_write(priv->rf[TSENS_SW_RST], 0); 197 198 return ret; 199 } 200 201 static const struct tsens_ops ops_generic_v1 = { 202 .init = init_common, 203 .calibrate = calibrate_v1, 204 .get_temp = get_temp_tsens_valid, 205 }; 206 207 struct tsens_plat_data data_tsens_v1 = { 208 .ops = &ops_generic_v1, 209 .feat = &tsens_v1_feat, 210 .fields = tsens_v1_regfields, 211 }; 212 213 static const struct tsens_ops ops_common = { 214 .init = init_common, 215 .calibrate = tsens_calibrate_common, 216 .get_temp = get_temp_tsens_valid, 217 }; 218 219 struct tsens_plat_data data_8937 = { 220 .num_sensors = 11, 221 .ops = &ops_common, 222 .feat = &tsens_v1_feat, 223 .fields = tsens_v1_regfields, 224 }; 225 226 static const struct tsens_ops ops_8956 = { 227 .init = init_8956, 228 .calibrate = tsens_calibrate_common, 229 .get_temp = get_temp_tsens_valid, 230 }; 231 232 struct tsens_plat_data data_8956 = { 233 .num_sensors = 11, 234 .ops = &ops_8956, 235 .feat = &tsens_v1_feat, 236 .fields = tsens_v1_regfields, 237 }; 238 239 struct tsens_plat_data data_8976 = { 240 .num_sensors = 11, 241 .ops = &ops_common, 242 .feat = &tsens_v1_feat, 243 .fields = tsens_v1_regfields, 244 }; 245 246 static const struct tsens_ops ops_ipq5018 = { 247 .init = init_tsens_v1_no_rpm, 248 .calibrate = tsens_calibrate_common, 249 .get_temp = get_temp_tsens_valid, 250 }; 251 252 const struct tsens_plat_data data_ipq5018 = { 253 .num_sensors = 5, 254 .ops = &ops_ipq5018, 255 .hw_ids = (unsigned int []){0, 1, 2, 3, 4}, 256 .feat = &tsens_v1_no_rpm_feat, 257 .fields = tsens_v1_regfields, 258 }; 259