xref: /linux/drivers/thermal/qcom/tsens-v0_1.c (revision a4eb44a6435d6d8f9e642407a4a06f65eb90ca04)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
4  */
5 
6 #include <linux/platform_device.h>
7 #include "tsens.h"
8 
9 /* ----- SROT ------ */
10 #define SROT_CTRL_OFF 0x0000
11 
12 /* ----- TM ------ */
13 #define TM_INT_EN_OFF				0x0000
14 #define TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF	0x0004
15 #define TM_Sn_STATUS_OFF			0x0030
16 #define TM_TRDY_OFF				0x005c
17 
18 /* eeprom layout data for 8916 */
19 #define MSM8916_BASE0_MASK	0x0000007f
20 #define MSM8916_BASE1_MASK	0xfe000000
21 #define MSM8916_BASE0_SHIFT	0
22 #define MSM8916_BASE1_SHIFT	25
23 
24 #define MSM8916_S0_P1_MASK	0x00000f80
25 #define MSM8916_S1_P1_MASK	0x003e0000
26 #define MSM8916_S2_P1_MASK	0xf8000000
27 #define MSM8916_S3_P1_MASK	0x000003e0
28 #define MSM8916_S4_P1_MASK	0x000f8000
29 
30 #define MSM8916_S0_P2_MASK	0x0001f000
31 #define MSM8916_S1_P2_MASK	0x07c00000
32 #define MSM8916_S2_P2_MASK	0x0000001f
33 #define MSM8916_S3_P2_MASK	0x00007c00
34 #define MSM8916_S4_P2_MASK	0x01f00000
35 
36 #define MSM8916_S0_P1_SHIFT	7
37 #define MSM8916_S1_P1_SHIFT	17
38 #define MSM8916_S2_P1_SHIFT	27
39 #define MSM8916_S3_P1_SHIFT	5
40 #define MSM8916_S4_P1_SHIFT	15
41 
42 #define MSM8916_S0_P2_SHIFT	12
43 #define MSM8916_S1_P2_SHIFT	22
44 #define MSM8916_S2_P2_SHIFT	0
45 #define MSM8916_S3_P2_SHIFT	10
46 #define MSM8916_S4_P2_SHIFT	20
47 
48 #define MSM8916_CAL_SEL_MASK	0xe0000000
49 #define MSM8916_CAL_SEL_SHIFT	29
50 
51 /* eeprom layout data for 8939 */
52 #define MSM8939_BASE0_MASK	0x000000ff
53 #define MSM8939_BASE1_MASK	0xff000000
54 #define MSM8939_BASE0_SHIFT	0
55 #define MSM8939_BASE1_SHIFT	24
56 
57 #define MSM8939_S0_P1_MASK	0x000001f8
58 #define MSM8939_S1_P1_MASK	0x001f8000
59 #define MSM8939_S2_P1_MASK_0_4	0xf8000000
60 #define MSM8939_S2_P1_MASK_5	0x00000001
61 #define MSM8939_S3_P1_MASK	0x00001f80
62 #define MSM8939_S4_P1_MASK	0x01f80000
63 #define MSM8939_S5_P1_MASK	0x00003f00
64 #define MSM8939_S6_P1_MASK	0x03f00000
65 #define MSM8939_S7_P1_MASK	0x0000003f
66 #define MSM8939_S8_P1_MASK	0x0003f000
67 #define MSM8939_S9_P1_MASK	0x07e00000
68 
69 #define MSM8939_S0_P2_MASK	0x00007e00
70 #define MSM8939_S1_P2_MASK	0x07e00000
71 #define MSM8939_S2_P2_MASK	0x0000007e
72 #define MSM8939_S3_P2_MASK	0x0007e000
73 #define MSM8939_S4_P2_MASK	0x7e000000
74 #define MSM8939_S5_P2_MASK	0x000fc000
75 #define MSM8939_S6_P2_MASK	0xfc000000
76 #define MSM8939_S7_P2_MASK	0x00000fc0
77 #define MSM8939_S8_P2_MASK	0x00fc0000
78 #define MSM8939_S9_P2_MASK_0_4	0xf8000000
79 #define MSM8939_S9_P2_MASK_5	0x00002000
80 
81 #define MSM8939_S0_P1_SHIFT	3
82 #define MSM8939_S1_P1_SHIFT	15
83 #define MSM8939_S2_P1_SHIFT_0_4	27
84 #define MSM8939_S2_P1_SHIFT_5	0
85 #define MSM8939_S3_P1_SHIFT	7
86 #define MSM8939_S4_P1_SHIFT	19
87 #define MSM8939_S5_P1_SHIFT	8
88 #define MSM8939_S6_P1_SHIFT	20
89 #define MSM8939_S7_P1_SHIFT	0
90 #define MSM8939_S8_P1_SHIFT	12
91 #define MSM8939_S9_P1_SHIFT	21
92 
93 #define MSM8939_S0_P2_SHIFT	9
94 #define MSM8939_S1_P2_SHIFT	21
95 #define MSM8939_S2_P2_SHIFT	1
96 #define MSM8939_S3_P2_SHIFT	13
97 #define MSM8939_S4_P2_SHIFT	25
98 #define MSM8939_S5_P2_SHIFT	14
99 #define MSM8939_S6_P2_SHIFT	26
100 #define MSM8939_S7_P2_SHIFT	6
101 #define MSM8939_S8_P2_SHIFT	18
102 #define MSM8939_S9_P2_SHIFT_0_4	27
103 #define MSM8939_S9_P2_SHIFT_5	13
104 
105 #define MSM8939_CAL_SEL_MASK	0x7
106 #define MSM8939_CAL_SEL_SHIFT	0
107 
108 /* eeprom layout data for 8974 */
109 #define BASE1_MASK		0xff
110 #define S0_P1_MASK		0x3f00
111 #define S1_P1_MASK		0xfc000
112 #define S2_P1_MASK		0x3f00000
113 #define S3_P1_MASK		0xfc000000
114 #define S4_P1_MASK		0x3f
115 #define S5_P1_MASK		0xfc0
116 #define S6_P1_MASK		0x3f000
117 #define S7_P1_MASK		0xfc0000
118 #define S8_P1_MASK		0x3f000000
119 #define S8_P1_MASK_BKP		0x3f
120 #define S9_P1_MASK		0x3f
121 #define S9_P1_MASK_BKP		0xfc0
122 #define S10_P1_MASK		0xfc0
123 #define S10_P1_MASK_BKP		0x3f000
124 #define CAL_SEL_0_1		0xc0000000
125 #define CAL_SEL_2		0x40000000
126 #define CAL_SEL_SHIFT		30
127 #define CAL_SEL_SHIFT_2		28
128 
129 #define S0_P1_SHIFT		8
130 #define S1_P1_SHIFT		14
131 #define S2_P1_SHIFT		20
132 #define S3_P1_SHIFT		26
133 #define S5_P1_SHIFT		6
134 #define S6_P1_SHIFT		12
135 #define S7_P1_SHIFT		18
136 #define S8_P1_SHIFT		24
137 #define S9_P1_BKP_SHIFT		6
138 #define S10_P1_SHIFT		6
139 #define S10_P1_BKP_SHIFT	12
140 
141 #define BASE2_SHIFT		12
142 #define BASE2_BKP_SHIFT		18
143 #define S0_P2_SHIFT		20
144 #define S0_P2_BKP_SHIFT		26
145 #define S1_P2_SHIFT		26
146 #define S2_P2_BKP_SHIFT		6
147 #define S3_P2_SHIFT		6
148 #define S3_P2_BKP_SHIFT		12
149 #define S4_P2_SHIFT		12
150 #define S4_P2_BKP_SHIFT		18
151 #define S5_P2_SHIFT		18
152 #define S5_P2_BKP_SHIFT		24
153 #define S6_P2_SHIFT		24
154 #define S7_P2_BKP_SHIFT		6
155 #define S8_P2_SHIFT		6
156 #define S8_P2_BKP_SHIFT		12
157 #define S9_P2_SHIFT		12
158 #define S9_P2_BKP_SHIFT		18
159 #define S10_P2_SHIFT		18
160 #define S10_P2_BKP_SHIFT	24
161 
162 #define BASE2_MASK		0xff000
163 #define BASE2_BKP_MASK		0xfc0000
164 #define S0_P2_MASK		0x3f00000
165 #define S0_P2_BKP_MASK		0xfc000000
166 #define S1_P2_MASK		0xfc000000
167 #define S1_P2_BKP_MASK		0x3f
168 #define S2_P2_MASK		0x3f
169 #define S2_P2_BKP_MASK		0xfc0
170 #define S3_P2_MASK		0xfc0
171 #define S3_P2_BKP_MASK		0x3f000
172 #define S4_P2_MASK		0x3f000
173 #define S4_P2_BKP_MASK		0xfc0000
174 #define S5_P2_MASK		0xfc0000
175 #define S5_P2_BKP_MASK		0x3f000000
176 #define S6_P2_MASK		0x3f000000
177 #define S6_P2_BKP_MASK		0x3f
178 #define S7_P2_MASK		0x3f
179 #define S7_P2_BKP_MASK		0xfc0
180 #define S8_P2_MASK		0xfc0
181 #define S8_P2_BKP_MASK		0x3f000
182 #define S9_P2_MASK		0x3f000
183 #define S9_P2_BKP_MASK		0xfc0000
184 #define S10_P2_MASK		0xfc0000
185 #define S10_P2_BKP_MASK		0x3f000000
186 
187 #define BKP_SEL			0x3
188 #define BKP_REDUN_SEL		0xe0000000
189 #define BKP_REDUN_SHIFT		29
190 
191 #define BIT_APPEND		0x3
192 
193 /* eeprom layout data for mdm9607 */
194 #define MDM9607_BASE0_MASK	0x000000ff
195 #define MDM9607_BASE1_MASK	0x000ff000
196 #define MDM9607_BASE0_SHIFT	0
197 #define MDM9607_BASE1_SHIFT	12
198 
199 #define MDM9607_S0_P1_MASK	0x00003f00
200 #define MDM9607_S1_P1_MASK	0x03f00000
201 #define MDM9607_S2_P1_MASK	0x0000003f
202 #define MDM9607_S3_P1_MASK	0x0003f000
203 #define MDM9607_S4_P1_MASK	0x0000003f
204 
205 #define MDM9607_S0_P2_MASK	0x000fc000
206 #define MDM9607_S1_P2_MASK	0xfc000000
207 #define MDM9607_S2_P2_MASK	0x00000fc0
208 #define MDM9607_S3_P2_MASK	0x00fc0000
209 #define MDM9607_S4_P2_MASK	0x00000fc0
210 
211 #define MDM9607_S0_P1_SHIFT	8
212 #define MDM9607_S1_P1_SHIFT	20
213 #define MDM9607_S2_P1_SHIFT	0
214 #define MDM9607_S3_P1_SHIFT	12
215 #define MDM9607_S4_P1_SHIFT	0
216 
217 #define MDM9607_S0_P2_SHIFT	14
218 #define MDM9607_S1_P2_SHIFT	26
219 #define MDM9607_S2_P2_SHIFT	6
220 #define MDM9607_S3_P2_SHIFT	18
221 #define MDM9607_S4_P2_SHIFT	6
222 
223 #define MDM9607_CAL_SEL_MASK	0x00700000
224 #define MDM9607_CAL_SEL_SHIFT	20
225 
226 static int calibrate_8916(struct tsens_priv *priv)
227 {
228 	int base0 = 0, base1 = 0, i;
229 	u32 p1[5], p2[5];
230 	int mode = 0;
231 	u32 *qfprom_cdata, *qfprom_csel;
232 
233 	qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib");
234 	if (IS_ERR(qfprom_cdata))
235 		return PTR_ERR(qfprom_cdata);
236 
237 	qfprom_csel = (u32 *)qfprom_read(priv->dev, "calib_sel");
238 	if (IS_ERR(qfprom_csel)) {
239 		kfree(qfprom_cdata);
240 		return PTR_ERR(qfprom_csel);
241 	}
242 
243 	mode = (qfprom_csel[0] & MSM8916_CAL_SEL_MASK) >> MSM8916_CAL_SEL_SHIFT;
244 	dev_dbg(priv->dev, "calibration mode is %d\n", mode);
245 
246 	switch (mode) {
247 	case TWO_PT_CALIB:
248 		base1 = (qfprom_cdata[1] & MSM8916_BASE1_MASK) >> MSM8916_BASE1_SHIFT;
249 		p2[0] = (qfprom_cdata[0] & MSM8916_S0_P2_MASK) >> MSM8916_S0_P2_SHIFT;
250 		p2[1] = (qfprom_cdata[0] & MSM8916_S1_P2_MASK) >> MSM8916_S1_P2_SHIFT;
251 		p2[2] = (qfprom_cdata[1] & MSM8916_S2_P2_MASK) >> MSM8916_S2_P2_SHIFT;
252 		p2[3] = (qfprom_cdata[1] & MSM8916_S3_P2_MASK) >> MSM8916_S3_P2_SHIFT;
253 		p2[4] = (qfprom_cdata[1] & MSM8916_S4_P2_MASK) >> MSM8916_S4_P2_SHIFT;
254 		for (i = 0; i < priv->num_sensors; i++)
255 			p2[i] = ((base1 + p2[i]) << 3);
256 		fallthrough;
257 	case ONE_PT_CALIB2:
258 		base0 = (qfprom_cdata[0] & MSM8916_BASE0_MASK);
259 		p1[0] = (qfprom_cdata[0] & MSM8916_S0_P1_MASK) >> MSM8916_S0_P1_SHIFT;
260 		p1[1] = (qfprom_cdata[0] & MSM8916_S1_P1_MASK) >> MSM8916_S1_P1_SHIFT;
261 		p1[2] = (qfprom_cdata[0] & MSM8916_S2_P1_MASK) >> MSM8916_S2_P1_SHIFT;
262 		p1[3] = (qfprom_cdata[1] & MSM8916_S3_P1_MASK) >> MSM8916_S3_P1_SHIFT;
263 		p1[4] = (qfprom_cdata[1] & MSM8916_S4_P1_MASK) >> MSM8916_S4_P1_SHIFT;
264 		for (i = 0; i < priv->num_sensors; i++)
265 			p1[i] = (((base0) + p1[i]) << 3);
266 		break;
267 	default:
268 		for (i = 0; i < priv->num_sensors; i++) {
269 			p1[i] = 500;
270 			p2[i] = 780;
271 		}
272 		break;
273 	}
274 
275 	compute_intercept_slope(priv, p1, p2, mode);
276 	kfree(qfprom_cdata);
277 	kfree(qfprom_csel);
278 
279 	return 0;
280 }
281 
282 static int calibrate_8939(struct tsens_priv *priv)
283 {
284 	int base0 = 0, base1 = 0, i;
285 	u32 p1[10], p2[10];
286 	int mode = 0;
287 	u32 *qfprom_cdata;
288 	u32 cdata[6];
289 
290 	qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib");
291 	if (IS_ERR(qfprom_cdata))
292 		return PTR_ERR(qfprom_cdata);
293 
294 	/* Mapping between qfprom nvmem and calibration data */
295 	cdata[0] = qfprom_cdata[12];
296 	cdata[1] = qfprom_cdata[13];
297 	cdata[2] = qfprom_cdata[0];
298 	cdata[3] = qfprom_cdata[1];
299 	cdata[4] = qfprom_cdata[22];
300 	cdata[5] = qfprom_cdata[21];
301 
302 	mode = (cdata[0] & MSM8939_CAL_SEL_MASK) >> MSM8939_CAL_SEL_SHIFT;
303 	dev_dbg(priv->dev, "calibration mode is %d\n", mode);
304 
305 	switch (mode) {
306 	case TWO_PT_CALIB:
307 		base1 = (cdata[3] & MSM8939_BASE1_MASK) >> MSM8939_BASE1_SHIFT;
308 		p2[0] = (cdata[0] & MSM8939_S0_P2_MASK) >> MSM8939_S0_P2_SHIFT;
309 		p2[1] = (cdata[0] & MSM8939_S1_P2_MASK) >> MSM8939_S1_P2_SHIFT;
310 		p2[2] = (cdata[1] & MSM8939_S2_P2_MASK) >> MSM8939_S2_P2_SHIFT;
311 		p2[3] = (cdata[1] & MSM8939_S3_P2_MASK) >> MSM8939_S3_P2_SHIFT;
312 		p2[4] = (cdata[1] & MSM8939_S4_P2_MASK) >> MSM8939_S4_P2_SHIFT;
313 		p2[5] = (cdata[2] & MSM8939_S5_P2_MASK) >> MSM8939_S5_P2_SHIFT;
314 		p2[6] = (cdata[2] & MSM8939_S6_P2_MASK) >> MSM8939_S6_P2_SHIFT;
315 		p2[7] = (cdata[3] & MSM8939_S7_P2_MASK) >> MSM8939_S7_P2_SHIFT;
316 		p2[8] = (cdata[3] & MSM8939_S8_P2_MASK) >> MSM8939_S8_P2_SHIFT;
317 		p2[9] = (cdata[4] & MSM8939_S9_P2_MASK_0_4) >> MSM8939_S9_P2_SHIFT_0_4;
318 		p2[9] |= ((cdata[5] & MSM8939_S9_P2_MASK_5) >> MSM8939_S9_P2_SHIFT_5) << 5;
319 		for (i = 0; i < priv->num_sensors; i++)
320 			p2[i] = (base1 + p2[i]) << 2;
321 		fallthrough;
322 	case ONE_PT_CALIB2:
323 		base0 = (cdata[2] & MSM8939_BASE0_MASK) >> MSM8939_BASE0_SHIFT;
324 		p1[0] = (cdata[0] & MSM8939_S0_P1_MASK) >> MSM8939_S0_P1_SHIFT;
325 		p1[1] = (cdata[0] & MSM8939_S1_P1_MASK) >> MSM8939_S1_P1_SHIFT;
326 		p1[2] = (cdata[0] & MSM8939_S2_P1_MASK_0_4) >> MSM8939_S2_P1_SHIFT_0_4;
327 		p1[2] |= ((cdata[1] & MSM8939_S2_P1_MASK_5) >> MSM8939_S2_P1_SHIFT_5) << 5;
328 		p1[3] = (cdata[1] & MSM8939_S3_P1_MASK) >> MSM8939_S3_P1_SHIFT;
329 		p1[4] = (cdata[1] & MSM8939_S4_P1_MASK) >> MSM8939_S4_P1_SHIFT;
330 		p1[5] = (cdata[2] & MSM8939_S5_P1_MASK) >> MSM8939_S5_P1_SHIFT;
331 		p1[6] = (cdata[2] & MSM8939_S6_P1_MASK) >> MSM8939_S6_P1_SHIFT;
332 		p1[7] = (cdata[3] & MSM8939_S7_P1_MASK) >> MSM8939_S7_P1_SHIFT;
333 		p1[8] = (cdata[3] & MSM8939_S8_P1_MASK) >> MSM8939_S8_P1_SHIFT;
334 		p1[9] = (cdata[4] & MSM8939_S9_P1_MASK) >> MSM8939_S9_P1_SHIFT;
335 		for (i = 0; i < priv->num_sensors; i++)
336 			p1[i] = ((base0) + p1[i]) << 2;
337 		break;
338 	default:
339 		for (i = 0; i < priv->num_sensors; i++) {
340 			p1[i] = 500;
341 			p2[i] = 780;
342 		}
343 		break;
344 	}
345 
346 	compute_intercept_slope(priv, p1, p2, mode);
347 	kfree(qfprom_cdata);
348 
349 	return 0;
350 }
351 
352 static int calibrate_8974(struct tsens_priv *priv)
353 {
354 	int base1 = 0, base2 = 0, i;
355 	u32 p1[11], p2[11];
356 	int mode = 0;
357 	u32 *calib, *bkp;
358 	u32 calib_redun_sel;
359 
360 	calib = (u32 *)qfprom_read(priv->dev, "calib");
361 	if (IS_ERR(calib))
362 		return PTR_ERR(calib);
363 
364 	bkp = (u32 *)qfprom_read(priv->dev, "calib_backup");
365 	if (IS_ERR(bkp)) {
366 		kfree(calib);
367 		return PTR_ERR(bkp);
368 	}
369 
370 	calib_redun_sel =  bkp[1] & BKP_REDUN_SEL;
371 	calib_redun_sel >>= BKP_REDUN_SHIFT;
372 
373 	if (calib_redun_sel == BKP_SEL) {
374 		mode = (calib[4] & CAL_SEL_0_1) >> CAL_SEL_SHIFT;
375 		mode |= (calib[5] & CAL_SEL_2) >> CAL_SEL_SHIFT_2;
376 
377 		switch (mode) {
378 		case TWO_PT_CALIB:
379 			base2 = (bkp[2] & BASE2_BKP_MASK) >> BASE2_BKP_SHIFT;
380 			p2[0] = (bkp[2] & S0_P2_BKP_MASK) >> S0_P2_BKP_SHIFT;
381 			p2[1] = (bkp[3] & S1_P2_BKP_MASK);
382 			p2[2] = (bkp[3] & S2_P2_BKP_MASK) >> S2_P2_BKP_SHIFT;
383 			p2[3] = (bkp[3] & S3_P2_BKP_MASK) >> S3_P2_BKP_SHIFT;
384 			p2[4] = (bkp[3] & S4_P2_BKP_MASK) >> S4_P2_BKP_SHIFT;
385 			p2[5] = (calib[4] & S5_P2_BKP_MASK) >> S5_P2_BKP_SHIFT;
386 			p2[6] = (calib[5] & S6_P2_BKP_MASK);
387 			p2[7] = (calib[5] & S7_P2_BKP_MASK) >> S7_P2_BKP_SHIFT;
388 			p2[8] = (calib[5] & S8_P2_BKP_MASK) >> S8_P2_BKP_SHIFT;
389 			p2[9] = (calib[5] & S9_P2_BKP_MASK) >> S9_P2_BKP_SHIFT;
390 			p2[10] = (calib[5] & S10_P2_BKP_MASK) >> S10_P2_BKP_SHIFT;
391 			fallthrough;
392 		case ONE_PT_CALIB:
393 		case ONE_PT_CALIB2:
394 			base1 = bkp[0] & BASE1_MASK;
395 			p1[0] = (bkp[0] & S0_P1_MASK) >> S0_P1_SHIFT;
396 			p1[1] = (bkp[0] & S1_P1_MASK) >> S1_P1_SHIFT;
397 			p1[2] = (bkp[0] & S2_P1_MASK) >> S2_P1_SHIFT;
398 			p1[3] = (bkp[0] & S3_P1_MASK) >> S3_P1_SHIFT;
399 			p1[4] = (bkp[1] & S4_P1_MASK);
400 			p1[5] = (bkp[1] & S5_P1_MASK) >> S5_P1_SHIFT;
401 			p1[6] = (bkp[1] & S6_P1_MASK) >> S6_P1_SHIFT;
402 			p1[7] = (bkp[1] & S7_P1_MASK) >> S7_P1_SHIFT;
403 			p1[8] = (bkp[2] & S8_P1_MASK_BKP) >> S8_P1_SHIFT;
404 			p1[9] = (bkp[2] & S9_P1_MASK_BKP) >> S9_P1_BKP_SHIFT;
405 			p1[10] = (bkp[2] & S10_P1_MASK_BKP) >> S10_P1_BKP_SHIFT;
406 			break;
407 		}
408 	} else {
409 		mode = (calib[1] & CAL_SEL_0_1) >> CAL_SEL_SHIFT;
410 		mode |= (calib[3] & CAL_SEL_2) >> CAL_SEL_SHIFT_2;
411 
412 		switch (mode) {
413 		case TWO_PT_CALIB:
414 			base2 = (calib[2] & BASE2_MASK) >> BASE2_SHIFT;
415 			p2[0] = (calib[2] & S0_P2_MASK) >> S0_P2_SHIFT;
416 			p2[1] = (calib[2] & S1_P2_MASK) >> S1_P2_SHIFT;
417 			p2[2] = (calib[3] & S2_P2_MASK);
418 			p2[3] = (calib[3] & S3_P2_MASK) >> S3_P2_SHIFT;
419 			p2[4] = (calib[3] & S4_P2_MASK) >> S4_P2_SHIFT;
420 			p2[5] = (calib[3] & S5_P2_MASK) >> S5_P2_SHIFT;
421 			p2[6] = (calib[3] & S6_P2_MASK) >> S6_P2_SHIFT;
422 			p2[7] = (calib[4] & S7_P2_MASK);
423 			p2[8] = (calib[4] & S8_P2_MASK) >> S8_P2_SHIFT;
424 			p2[9] = (calib[4] & S9_P2_MASK) >> S9_P2_SHIFT;
425 			p2[10] = (calib[4] & S10_P2_MASK) >> S10_P2_SHIFT;
426 			fallthrough;
427 		case ONE_PT_CALIB:
428 		case ONE_PT_CALIB2:
429 			base1 = calib[0] & BASE1_MASK;
430 			p1[0] = (calib[0] & S0_P1_MASK) >> S0_P1_SHIFT;
431 			p1[1] = (calib[0] & S1_P1_MASK) >> S1_P1_SHIFT;
432 			p1[2] = (calib[0] & S2_P1_MASK) >> S2_P1_SHIFT;
433 			p1[3] = (calib[0] & S3_P1_MASK) >> S3_P1_SHIFT;
434 			p1[4] = (calib[1] & S4_P1_MASK);
435 			p1[5] = (calib[1] & S5_P1_MASK) >> S5_P1_SHIFT;
436 			p1[6] = (calib[1] & S6_P1_MASK) >> S6_P1_SHIFT;
437 			p1[7] = (calib[1] & S7_P1_MASK) >> S7_P1_SHIFT;
438 			p1[8] = (calib[1] & S8_P1_MASK) >> S8_P1_SHIFT;
439 			p1[9] = (calib[2] & S9_P1_MASK);
440 			p1[10] = (calib[2] & S10_P1_MASK) >> S10_P1_SHIFT;
441 			break;
442 		}
443 	}
444 
445 	switch (mode) {
446 	case ONE_PT_CALIB:
447 		for (i = 0; i < priv->num_sensors; i++)
448 			p1[i] += (base1 << 2) | BIT_APPEND;
449 		break;
450 	case TWO_PT_CALIB:
451 		for (i = 0; i < priv->num_sensors; i++) {
452 			p2[i] += base2;
453 			p2[i] <<= 2;
454 			p2[i] |= BIT_APPEND;
455 		}
456 		fallthrough;
457 	case ONE_PT_CALIB2:
458 		for (i = 0; i < priv->num_sensors; i++) {
459 			p1[i] += base1;
460 			p1[i] <<= 2;
461 			p1[i] |= BIT_APPEND;
462 		}
463 		break;
464 	default:
465 		for (i = 0; i < priv->num_sensors; i++)
466 			p2[i] = 780;
467 		p1[0] = 502;
468 		p1[1] = 509;
469 		p1[2] = 503;
470 		p1[3] = 509;
471 		p1[4] = 505;
472 		p1[5] = 509;
473 		p1[6] = 507;
474 		p1[7] = 510;
475 		p1[8] = 508;
476 		p1[9] = 509;
477 		p1[10] = 508;
478 		break;
479 	}
480 
481 	compute_intercept_slope(priv, p1, p2, mode);
482 	kfree(calib);
483 	kfree(bkp);
484 
485 	return 0;
486 }
487 
488 static int calibrate_9607(struct tsens_priv *priv)
489 {
490 	int base, i;
491 	u32 p1[5], p2[5];
492 	int mode = 0;
493 	u32 *qfprom_cdata;
494 
495 	qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib");
496 	if (IS_ERR(qfprom_cdata))
497 		return PTR_ERR(qfprom_cdata);
498 
499 	mode = (qfprom_cdata[2] & MDM9607_CAL_SEL_MASK) >> MDM9607_CAL_SEL_SHIFT;
500 	dev_dbg(priv->dev, "calibration mode is %d\n", mode);
501 
502 	switch (mode) {
503 	case TWO_PT_CALIB:
504 		base = (qfprom_cdata[2] & MDM9607_BASE1_MASK) >> MDM9607_BASE1_SHIFT;
505 		p2[0] = (qfprom_cdata[0] & MDM9607_S0_P2_MASK) >> MDM9607_S0_P2_SHIFT;
506 		p2[1] = (qfprom_cdata[0] & MDM9607_S1_P2_MASK) >> MDM9607_S1_P2_SHIFT;
507 		p2[2] = (qfprom_cdata[1] & MDM9607_S2_P2_MASK) >> MDM9607_S2_P2_SHIFT;
508 		p2[3] = (qfprom_cdata[1] & MDM9607_S3_P2_MASK) >> MDM9607_S3_P2_SHIFT;
509 		p2[4] = (qfprom_cdata[2] & MDM9607_S4_P2_MASK) >> MDM9607_S4_P2_SHIFT;
510 		for (i = 0; i < priv->num_sensors; i++)
511 			p2[i] = ((base + p2[i]) << 2);
512 		fallthrough;
513 	case ONE_PT_CALIB2:
514 		base = (qfprom_cdata[0] & MDM9607_BASE0_MASK);
515 		p1[0] = (qfprom_cdata[0] & MDM9607_S0_P1_MASK) >> MDM9607_S0_P1_SHIFT;
516 		p1[1] = (qfprom_cdata[0] & MDM9607_S1_P1_MASK) >> MDM9607_S1_P1_SHIFT;
517 		p1[2] = (qfprom_cdata[1] & MDM9607_S2_P1_MASK) >> MDM9607_S2_P1_SHIFT;
518 		p1[3] = (qfprom_cdata[1] & MDM9607_S3_P1_MASK) >> MDM9607_S3_P1_SHIFT;
519 		p1[4] = (qfprom_cdata[2] & MDM9607_S4_P1_MASK) >> MDM9607_S4_P1_SHIFT;
520 		for (i = 0; i < priv->num_sensors; i++)
521 			p1[i] = ((base + p1[i]) << 2);
522 		break;
523 	default:
524 		for (i = 0; i < priv->num_sensors; i++) {
525 			p1[i] = 500;
526 			p2[i] = 780;
527 		}
528 		break;
529 	}
530 
531 	compute_intercept_slope(priv, p1, p2, mode);
532 	kfree(qfprom_cdata);
533 
534 	return 0;
535 }
536 
537 /* v0.1: 8916, 8939, 8974, 9607 */
538 
539 static struct tsens_features tsens_v0_1_feat = {
540 	.ver_major	= VER_0_1,
541 	.crit_int	= 0,
542 	.adc		= 1,
543 	.srot_split	= 1,
544 	.max_sensors	= 11,
545 };
546 
547 static const struct reg_field tsens_v0_1_regfields[MAX_REGFIELDS] = {
548 	/* ----- SROT ------ */
549 	/* No VERSION information */
550 
551 	/* CTRL_OFFSET */
552 	[TSENS_EN]     = REG_FIELD(SROT_CTRL_OFF, 0,  0),
553 	[TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1,  1),
554 
555 	/* ----- TM ------ */
556 	/* INTERRUPT ENABLE */
557 	[INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 0),
558 
559 	/* UPPER/LOWER TEMPERATURE THRESHOLDS */
560 	REG_FIELD_FOR_EACH_SENSOR11(LOW_THRESH,    TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF,  0,  9),
561 	REG_FIELD_FOR_EACH_SENSOR11(UP_THRESH,     TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 10, 19),
562 
563 	/* UPPER/LOWER INTERRUPTS [CLEAR/STATUS] */
564 	REG_FIELD_FOR_EACH_SENSOR11(LOW_INT_CLEAR, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 20, 20),
565 	REG_FIELD_FOR_EACH_SENSOR11(UP_INT_CLEAR,  TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 21, 21),
566 
567 	/* NO CRITICAL INTERRUPT SUPPORT on v0.1 */
568 
569 	/* Sn_STATUS */
570 	REG_FIELD_FOR_EACH_SENSOR11(LAST_TEMP,    TM_Sn_STATUS_OFF,  0,  9),
571 	/* No VALID field on v0.1 */
572 	/* xxx_STATUS bits: 1 == threshold violated */
573 	REG_FIELD_FOR_EACH_SENSOR11(MIN_STATUS,   TM_Sn_STATUS_OFF, 10, 10),
574 	REG_FIELD_FOR_EACH_SENSOR11(LOWER_STATUS, TM_Sn_STATUS_OFF, 11, 11),
575 	REG_FIELD_FOR_EACH_SENSOR11(UPPER_STATUS, TM_Sn_STATUS_OFF, 12, 12),
576 	/* No CRITICAL field on v0.1 */
577 	REG_FIELD_FOR_EACH_SENSOR11(MAX_STATUS,   TM_Sn_STATUS_OFF, 13, 13),
578 
579 	/* TRDY: 1=ready, 0=in progress */
580 	[TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
581 };
582 
583 static const struct tsens_ops ops_8916 = {
584 	.init		= init_common,
585 	.calibrate	= calibrate_8916,
586 	.get_temp	= get_temp_common,
587 };
588 
589 struct tsens_plat_data data_8916 = {
590 	.num_sensors	= 5,
591 	.ops		= &ops_8916,
592 	.hw_ids		= (unsigned int []){0, 1, 2, 4, 5 },
593 
594 	.feat		= &tsens_v0_1_feat,
595 	.fields	= tsens_v0_1_regfields,
596 };
597 
598 static const struct tsens_ops ops_8939 = {
599 	.init		= init_common,
600 	.calibrate	= calibrate_8939,
601 	.get_temp	= get_temp_common,
602 };
603 
604 struct tsens_plat_data data_8939 = {
605 	.num_sensors	= 10,
606 	.ops		= &ops_8939,
607 	.hw_ids		= (unsigned int []){ 0, 1, 2, 4, 5, 6, 7, 8, 9, 10 },
608 
609 	.feat		= &tsens_v0_1_feat,
610 	.fields	= tsens_v0_1_regfields,
611 };
612 
613 static const struct tsens_ops ops_8974 = {
614 	.init		= init_common,
615 	.calibrate	= calibrate_8974,
616 	.get_temp	= get_temp_common,
617 };
618 
619 struct tsens_plat_data data_8974 = {
620 	.num_sensors	= 11,
621 	.ops		= &ops_8974,
622 	.feat		= &tsens_v0_1_feat,
623 	.fields	= tsens_v0_1_regfields,
624 };
625 
626 static const struct tsens_ops ops_9607 = {
627 	.init		= init_common,
628 	.calibrate	= calibrate_9607,
629 	.get_temp	= get_temp_common,
630 };
631 
632 struct tsens_plat_data data_9607 = {
633 	.num_sensors	= 5,
634 	.ops		= &ops_9607,
635 	.hw_ids		= (unsigned int []){ 0, 1, 2, 3, 4 },
636 	.feat		= &tsens_v0_1_feat,
637 	.fields	= tsens_v0_1_regfields,
638 };
639