1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2011-2015, 2017, 2020, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/bitops.h> 7 #include <linux/delay.h> 8 #include <linux/err.h> 9 #include <linux/iio/consumer.h> 10 #include <linux/interrupt.h> 11 #include <linux/module.h> 12 #include <linux/of.h> 13 #include <linux/of_device.h> 14 #include <linux/platform_device.h> 15 #include <linux/regmap.h> 16 #include <linux/thermal.h> 17 18 #include "../thermal_hwmon.h" 19 20 #define QPNP_TM_REG_DIG_MAJOR 0x01 21 #define QPNP_TM_REG_TYPE 0x04 22 #define QPNP_TM_REG_SUBTYPE 0x05 23 #define QPNP_TM_REG_STATUS 0x08 24 #define QPNP_TM_REG_SHUTDOWN_CTRL1 0x40 25 #define QPNP_TM_REG_ALARM_CTRL 0x46 26 27 #define QPNP_TM_TYPE 0x09 28 #define QPNP_TM_SUBTYPE_GEN1 0x08 29 #define QPNP_TM_SUBTYPE_GEN2 0x09 30 31 #define STATUS_GEN1_STAGE_MASK GENMASK(1, 0) 32 #define STATUS_GEN2_STATE_MASK GENMASK(6, 4) 33 #define STATUS_GEN2_STATE_SHIFT 4 34 35 #define SHUTDOWN_CTRL1_OVERRIDE_S2 BIT(6) 36 #define SHUTDOWN_CTRL1_THRESHOLD_MASK GENMASK(1, 0) 37 38 #define SHUTDOWN_CTRL1_RATE_25HZ BIT(3) 39 40 #define ALARM_CTRL_FORCE_ENABLE BIT(7) 41 42 #define THRESH_COUNT 4 43 #define STAGE_COUNT 3 44 45 /* Over-temperature trip point values in mC */ 46 static const long temp_map_gen1[THRESH_COUNT][STAGE_COUNT] = { 47 { 105000, 125000, 145000 }, 48 { 110000, 130000, 150000 }, 49 { 115000, 135000, 155000 }, 50 { 120000, 140000, 160000 }, 51 }; 52 53 static const long temp_map_gen2_v1[THRESH_COUNT][STAGE_COUNT] = { 54 { 90000, 110000, 140000 }, 55 { 95000, 115000, 145000 }, 56 { 100000, 120000, 150000 }, 57 { 105000, 125000, 155000 }, 58 }; 59 60 #define TEMP_THRESH_STEP 5000 /* Threshold step: 5 C */ 61 62 #define THRESH_MIN 0 63 #define THRESH_MAX 3 64 65 #define TEMP_STAGE_HYSTERESIS 2000 66 67 /* Temperature in Milli Celsius reported during stage 0 if no ADC is present */ 68 #define DEFAULT_TEMP 37000 69 70 struct qpnp_tm_chip { 71 struct regmap *map; 72 struct device *dev; 73 struct thermal_zone_device *tz_dev; 74 unsigned int subtype; 75 long temp; 76 unsigned int thresh; 77 unsigned int stage; 78 unsigned int prev_stage; 79 unsigned int base; 80 /* protects .thresh, .stage and chip registers */ 81 struct mutex lock; 82 bool initialized; 83 84 struct iio_channel *adc; 85 const long (*temp_map)[THRESH_COUNT][STAGE_COUNT]; 86 }; 87 88 /* This array maps from GEN2 alarm state to GEN1 alarm stage */ 89 static const unsigned int alarm_state_map[8] = {0, 1, 1, 2, 2, 3, 3, 3}; 90 91 static int qpnp_tm_read(struct qpnp_tm_chip *chip, u16 addr, u8 *data) 92 { 93 unsigned int val; 94 int ret; 95 96 ret = regmap_read(chip->map, chip->base + addr, &val); 97 if (ret < 0) 98 return ret; 99 100 *data = val; 101 return 0; 102 } 103 104 static int qpnp_tm_write(struct qpnp_tm_chip *chip, u16 addr, u8 data) 105 { 106 return regmap_write(chip->map, chip->base + addr, data); 107 } 108 109 /** 110 * qpnp_tm_decode_temp() - return temperature in mC corresponding to the 111 * specified over-temperature stage 112 * @chip: Pointer to the qpnp_tm chip 113 * @stage: Over-temperature stage 114 * 115 * Return: temperature in mC 116 */ 117 static long qpnp_tm_decode_temp(struct qpnp_tm_chip *chip, unsigned int stage) 118 { 119 if (!chip->temp_map || chip->thresh >= THRESH_COUNT || stage == 0 || 120 stage > STAGE_COUNT) 121 return 0; 122 123 return (*chip->temp_map)[chip->thresh][stage - 1]; 124 } 125 126 /** 127 * qpnp_tm_get_temp_stage() - return over-temperature stage 128 * @chip: Pointer to the qpnp_tm chip 129 * 130 * Return: stage (GEN1) or state (GEN2) on success, or errno on failure. 131 */ 132 static int qpnp_tm_get_temp_stage(struct qpnp_tm_chip *chip) 133 { 134 int ret; 135 u8 reg = 0; 136 137 ret = qpnp_tm_read(chip, QPNP_TM_REG_STATUS, ®); 138 if (ret < 0) 139 return ret; 140 141 if (chip->subtype == QPNP_TM_SUBTYPE_GEN1) 142 ret = reg & STATUS_GEN1_STAGE_MASK; 143 else 144 ret = (reg & STATUS_GEN2_STATE_MASK) >> STATUS_GEN2_STATE_SHIFT; 145 146 return ret; 147 } 148 149 /* 150 * This function updates the internal temp value based on the 151 * current thermal stage and threshold as well as the previous stage 152 */ 153 static int qpnp_tm_update_temp_no_adc(struct qpnp_tm_chip *chip) 154 { 155 unsigned int stage, stage_new, stage_old; 156 int ret; 157 158 WARN_ON(!mutex_is_locked(&chip->lock)); 159 160 ret = qpnp_tm_get_temp_stage(chip); 161 if (ret < 0) 162 return ret; 163 stage = ret; 164 165 if (chip->subtype == QPNP_TM_SUBTYPE_GEN1) { 166 stage_new = stage; 167 stage_old = chip->stage; 168 } else { 169 stage_new = alarm_state_map[stage]; 170 stage_old = alarm_state_map[chip->stage]; 171 } 172 173 if (stage_new > stage_old) { 174 /* increasing stage, use lower bound */ 175 chip->temp = qpnp_tm_decode_temp(chip, stage_new) 176 + TEMP_STAGE_HYSTERESIS; 177 } else if (stage_new < stage_old) { 178 /* decreasing stage, use upper bound */ 179 chip->temp = qpnp_tm_decode_temp(chip, stage_new + 1) 180 - TEMP_STAGE_HYSTERESIS; 181 } 182 183 chip->stage = stage; 184 185 return 0; 186 } 187 188 static int qpnp_tm_get_temp(struct thermal_zone_device *tz, int *temp) 189 { 190 struct qpnp_tm_chip *chip = thermal_zone_device_priv(tz); 191 int ret, mili_celsius; 192 193 if (!temp) 194 return -EINVAL; 195 196 if (!chip->initialized) { 197 *temp = DEFAULT_TEMP; 198 return 0; 199 } 200 201 if (!chip->adc) { 202 mutex_lock(&chip->lock); 203 ret = qpnp_tm_update_temp_no_adc(chip); 204 mutex_unlock(&chip->lock); 205 if (ret < 0) 206 return ret; 207 } else { 208 ret = iio_read_channel_processed(chip->adc, &mili_celsius); 209 if (ret < 0) 210 return ret; 211 212 chip->temp = mili_celsius; 213 } 214 215 *temp = chip->temp; 216 217 return 0; 218 } 219 220 static int qpnp_tm_update_critical_trip_temp(struct qpnp_tm_chip *chip, 221 int temp) 222 { 223 long stage2_threshold_min = (*chip->temp_map)[THRESH_MIN][1]; 224 long stage2_threshold_max = (*chip->temp_map)[THRESH_MAX][1]; 225 bool disable_s2_shutdown = false; 226 u8 reg; 227 228 WARN_ON(!mutex_is_locked(&chip->lock)); 229 230 /* 231 * Default: S2 and S3 shutdown enabled, thresholds at 232 * lowest threshold set, monitoring at 25Hz 233 */ 234 reg = SHUTDOWN_CTRL1_RATE_25HZ; 235 236 if (temp == THERMAL_TEMP_INVALID || 237 temp < stage2_threshold_min) { 238 chip->thresh = THRESH_MIN; 239 goto skip; 240 } 241 242 if (temp <= stage2_threshold_max) { 243 chip->thresh = THRESH_MAX - 244 ((stage2_threshold_max - temp) / 245 TEMP_THRESH_STEP); 246 disable_s2_shutdown = true; 247 } else { 248 chip->thresh = THRESH_MAX; 249 250 if (chip->adc) 251 disable_s2_shutdown = true; 252 else 253 dev_warn(chip->dev, 254 "No ADC is configured and critical temperature %d mC is above the maximum stage 2 threshold of %ld mC! Configuring stage 2 shutdown at %ld mC.\n", 255 temp, stage2_threshold_max, stage2_threshold_max); 256 } 257 258 skip: 259 reg |= chip->thresh; 260 if (disable_s2_shutdown) 261 reg |= SHUTDOWN_CTRL1_OVERRIDE_S2; 262 263 return qpnp_tm_write(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, reg); 264 } 265 266 static int qpnp_tm_set_trip_temp(struct thermal_zone_device *tz, int trip_id, int temp) 267 { 268 struct qpnp_tm_chip *chip = thermal_zone_device_priv(tz); 269 struct thermal_trip trip; 270 int ret; 271 272 ret = __thermal_zone_get_trip(chip->tz_dev, trip_id, &trip); 273 if (ret) 274 return ret; 275 276 if (trip.type != THERMAL_TRIP_CRITICAL) 277 return 0; 278 279 mutex_lock(&chip->lock); 280 ret = qpnp_tm_update_critical_trip_temp(chip, temp); 281 mutex_unlock(&chip->lock); 282 283 return ret; 284 } 285 286 static const struct thermal_zone_device_ops qpnp_tm_sensor_ops = { 287 .get_temp = qpnp_tm_get_temp, 288 .set_trip_temp = qpnp_tm_set_trip_temp, 289 }; 290 291 static irqreturn_t qpnp_tm_isr(int irq, void *data) 292 { 293 struct qpnp_tm_chip *chip = data; 294 295 thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED); 296 297 return IRQ_HANDLED; 298 } 299 300 static int qpnp_tm_get_critical_trip_temp(struct qpnp_tm_chip *chip) 301 { 302 struct thermal_trip trip; 303 int i, ret; 304 305 for (i = 0; i < thermal_zone_get_num_trips(chip->tz_dev); i++) { 306 307 ret = thermal_zone_get_trip(chip->tz_dev, i, &trip); 308 if (ret) 309 continue; 310 311 if (trip.type == THERMAL_TRIP_CRITICAL) 312 return trip.temperature; 313 } 314 315 return THERMAL_TEMP_INVALID; 316 } 317 318 /* 319 * This function initializes the internal temp value based on only the 320 * current thermal stage and threshold. Setup threshold control and 321 * disable shutdown override. 322 */ 323 static int qpnp_tm_init(struct qpnp_tm_chip *chip) 324 { 325 unsigned int stage; 326 int ret; 327 u8 reg = 0; 328 int crit_temp; 329 330 mutex_lock(&chip->lock); 331 332 ret = qpnp_tm_read(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, ®); 333 if (ret < 0) 334 goto out; 335 336 chip->thresh = reg & SHUTDOWN_CTRL1_THRESHOLD_MASK; 337 chip->temp = DEFAULT_TEMP; 338 339 ret = qpnp_tm_get_temp_stage(chip); 340 if (ret < 0) 341 goto out; 342 chip->stage = ret; 343 344 stage = chip->subtype == QPNP_TM_SUBTYPE_GEN1 345 ? chip->stage : alarm_state_map[chip->stage]; 346 347 if (stage) 348 chip->temp = qpnp_tm_decode_temp(chip, stage); 349 350 mutex_unlock(&chip->lock); 351 352 crit_temp = qpnp_tm_get_critical_trip_temp(chip); 353 354 mutex_lock(&chip->lock); 355 356 ret = qpnp_tm_update_critical_trip_temp(chip, crit_temp); 357 if (ret < 0) 358 goto out; 359 360 /* Enable the thermal alarm PMIC module in always-on mode. */ 361 reg = ALARM_CTRL_FORCE_ENABLE; 362 ret = qpnp_tm_write(chip, QPNP_TM_REG_ALARM_CTRL, reg); 363 364 chip->initialized = true; 365 366 out: 367 mutex_unlock(&chip->lock); 368 return ret; 369 } 370 371 static int qpnp_tm_probe(struct platform_device *pdev) 372 { 373 struct qpnp_tm_chip *chip; 374 struct device_node *node; 375 u8 type, subtype, dig_major; 376 u32 res; 377 int ret, irq; 378 379 node = pdev->dev.of_node; 380 381 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); 382 if (!chip) 383 return -ENOMEM; 384 385 dev_set_drvdata(&pdev->dev, chip); 386 chip->dev = &pdev->dev; 387 388 mutex_init(&chip->lock); 389 390 chip->map = dev_get_regmap(pdev->dev.parent, NULL); 391 if (!chip->map) 392 return -ENXIO; 393 394 ret = of_property_read_u32(node, "reg", &res); 395 if (ret < 0) 396 return ret; 397 398 irq = platform_get_irq(pdev, 0); 399 if (irq < 0) 400 return irq; 401 402 /* ADC based measurements are optional */ 403 chip->adc = devm_iio_channel_get(&pdev->dev, "thermal"); 404 if (IS_ERR(chip->adc)) { 405 ret = PTR_ERR(chip->adc); 406 chip->adc = NULL; 407 if (ret == -EPROBE_DEFER) 408 return ret; 409 } 410 411 chip->base = res; 412 413 ret = qpnp_tm_read(chip, QPNP_TM_REG_TYPE, &type); 414 if (ret < 0) 415 return dev_err_probe(&pdev->dev, ret, 416 "could not read type\n"); 417 418 ret = qpnp_tm_read(chip, QPNP_TM_REG_SUBTYPE, &subtype); 419 if (ret < 0) 420 return dev_err_probe(&pdev->dev, ret, 421 "could not read subtype\n"); 422 423 ret = qpnp_tm_read(chip, QPNP_TM_REG_DIG_MAJOR, &dig_major); 424 if (ret < 0) 425 return dev_err_probe(&pdev->dev, ret, 426 "could not read dig_major\n"); 427 428 if (type != QPNP_TM_TYPE || (subtype != QPNP_TM_SUBTYPE_GEN1 429 && subtype != QPNP_TM_SUBTYPE_GEN2)) { 430 dev_err(&pdev->dev, "invalid type 0x%02x or subtype 0x%02x\n", 431 type, subtype); 432 return -ENODEV; 433 } 434 435 chip->subtype = subtype; 436 if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major >= 1) 437 chip->temp_map = &temp_map_gen2_v1; 438 else 439 chip->temp_map = &temp_map_gen1; 440 441 /* 442 * Register the sensor before initializing the hardware to be able to 443 * read the trip points. get_temp() returns the default temperature 444 * before the hardware initialization is completed. 445 */ 446 chip->tz_dev = devm_thermal_of_zone_register( 447 &pdev->dev, 0, chip, &qpnp_tm_sensor_ops); 448 if (IS_ERR(chip->tz_dev)) 449 return dev_err_probe(&pdev->dev, PTR_ERR(chip->tz_dev), 450 "failed to register sensor\n"); 451 452 ret = qpnp_tm_init(chip); 453 if (ret < 0) 454 return dev_err_probe(&pdev->dev, ret, "init failed\n"); 455 456 devm_thermal_add_hwmon_sysfs(&pdev->dev, chip->tz_dev); 457 458 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, qpnp_tm_isr, 459 IRQF_ONESHOT, node->name, chip); 460 if (ret < 0) 461 return ret; 462 463 thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED); 464 465 return 0; 466 } 467 468 static const struct of_device_id qpnp_tm_match_table[] = { 469 { .compatible = "qcom,spmi-temp-alarm" }, 470 { } 471 }; 472 MODULE_DEVICE_TABLE(of, qpnp_tm_match_table); 473 474 static struct platform_driver qpnp_tm_driver = { 475 .driver = { 476 .name = "spmi-temp-alarm", 477 .of_match_table = qpnp_tm_match_table, 478 }, 479 .probe = qpnp_tm_probe, 480 }; 481 module_platform_driver(qpnp_tm_driver); 482 483 MODULE_ALIAS("platform:spmi-temp-alarm"); 484 MODULE_DESCRIPTION("QPNP PMIC Temperature Alarm driver"); 485 MODULE_LICENSE("GPL v2"); 486