1# SPDX-License-Identifier: GPL-2.0-only 2config QCOM_TSENS 3 tristate "Qualcomm TSENS Temperature Alarm" 4 depends on NVMEM_QCOM_QFPROM 5 depends on ARCH_QCOM || COMPILE_TEST 6 help 7 This enables the thermal sysfs driver for the TSENS device. It shows 8 up in Sysfs as a thermal zone with multiple trip points. Disabling the 9 thermal zone device via the mode file results in disabling the sensor. 10 Also able to set threshold temperature for both hot and cold and update 11 when a threshold is reached. 12 13config QCOM_SPMI_ADC_TM5 14 tristate "Qualcomm SPMI PMIC Thermal Monitor ADC5" 15 depends on OF && SPMI && IIO 16 select REGMAP_SPMI 17 select QCOM_VADC_COMMON 18 help 19 This enables the thermal driver for the ADC thermal monitoring 20 device. It shows up as a thermal zone with multiple trip points. 21 Thermal client sets threshold temperature for both warm and cool and 22 gets updated when a threshold is reached. 23 24config QCOM_SPMI_MBG_TM 25 tristate "Qualcomm SPMI PMIC MBG Temperature monitor" 26 depends on QCOM_SPMI_ADC5_GEN3 27 select REGMAP_SPMI 28 help 29 This enables Qualcomm PMIC MBG (Master Bandgap) thermal monitor. 30 31 The MBG block monitors PMIC die temperature in hardware and raises an 32 interrupt when the programmed threshold is crossed. 33 34 Temperature is read from the associated ADC channel, and threshold 35 interrupts are forwarded to the thermal framework as trip-violation 36 events. Current support handles a single LVL1 upper (hot) trip. 37 38config QCOM_SPMI_TEMP_ALARM 39 tristate "Qualcomm SPMI PMIC Temperature Alarm" 40 depends on OF && SPMI && IIO 41 select REGMAP_SPMI 42 help 43 This enables a thermal sysfs driver for Qualcomm plug-and-play (QPNP) 44 PMIC devices. It shows up in sysfs as a thermal sensor with multiple 45 trip points. The temperature reported by the thermal sensor reflects the 46 real time die temperature if an ADC is present or an estimate of the 47 temperature based upon the over temperature stage value. 48 49config QCOM_LMH 50 tristate "Qualcomm Limits Management Hardware" 51 depends on ARCH_QCOM || COMPILE_TEST 52 select QCOM_SCM 53 help 54 This enables initialization of Qualcomm limits management 55 hardware(LMh). LMh allows for hardware-enforced mitigation for cpus based on 56 input from temperature and current sensors. On many newer Qualcomm SoCs 57 LMh is configured in the firmware and this feature need not be enabled. 58 However, on certain SoCs like sdm845 LMh has to be configured from kernel. 59