xref: /linux/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h (revision 58809f614e0e3f4e12b489bddf680bfeb31c0a20)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * processor_thermal_device.h
4  * Copyright (c) 2020, Intel Corporation.
5  */
6 
7 #ifndef __PROCESSOR_THERMAL_DEVICE_H__
8 #define __PROCESSOR_THERMAL_DEVICE_H__
9 
10 #include <linux/intel_rapl.h>
11 
12 #define PCI_DEVICE_ID_INTEL_ADL_THERMAL	0x461d
13 #define PCI_DEVICE_ID_INTEL_ARL_S_THERMAL 0xAD03
14 #define PCI_DEVICE_ID_INTEL_BDW_THERMAL	0x1603
15 #define PCI_DEVICE_ID_INTEL_BSW_THERMAL	0x22DC
16 
17 #define PCI_DEVICE_ID_INTEL_BXT0_THERMAL	0x0A8C
18 #define PCI_DEVICE_ID_INTEL_BXT1_THERMAL	0x1A8C
19 #define PCI_DEVICE_ID_INTEL_BXTX_THERMAL	0x4A8C
20 #define PCI_DEVICE_ID_INTEL_BXTP_THERMAL	0x5A8C
21 
22 #define PCI_DEVICE_ID_INTEL_CNL_THERMAL	0x5a03
23 #define PCI_DEVICE_ID_INTEL_CFL_THERMAL	0x3E83
24 #define PCI_DEVICE_ID_INTEL_GLK_THERMAL	0x318C
25 #define PCI_DEVICE_ID_INTEL_HSB_THERMAL	0x0A03
26 #define PCI_DEVICE_ID_INTEL_ICL_THERMAL	0x8a03
27 #define PCI_DEVICE_ID_INTEL_JSL_THERMAL	0x4E03
28 #define PCI_DEVICE_ID_INTEL_LNLM_THERMAL	0x641D
29 #define PCI_DEVICE_ID_INTEL_MTLP_THERMAL	0x7D03
30 #define PCI_DEVICE_ID_INTEL_RPL_THERMAL	0xA71D
31 #define PCI_DEVICE_ID_INTEL_SKL_THERMAL	0x1903
32 #define PCI_DEVICE_ID_INTEL_TGL_THERMAL	0x9A03
33 #define PCI_DEVICE_ID_INTEL_PTL_THERMAL	0xB01D
34 #define PCI_DEVICE_ID_INTEL_WCL_THERMAL	0xFD1D
35 
36 struct power_config {
37 	u32	index;
38 	u32	min_uw;
39 	u32	max_uw;
40 	u32	tmin_us;
41 	u32	tmax_us;
42 	u32	step_uw;
43 };
44 
45 struct proc_thermal_device {
46 	struct device *dev;
47 	struct acpi_device *adev;
48 	struct power_config power_limits[2];
49 	struct int34x_thermal_zone *int340x_zone;
50 	struct intel_soc_dts_sensors *soc_dts;
51 	u32 mmio_feature_mask;
52 	void __iomem *mmio_base;
53 	void *priv_data;
54 };
55 
56 struct rapl_mmio_regs {
57 	u64 reg_unit;
58 	u64 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
59 	int limits[RAPL_DOMAIN_MAX];
60 };
61 
62 #define PROC_THERMAL_FEATURE_NONE	0x00
63 #define PROC_THERMAL_FEATURE_RAPL	0x01
64 #define PROC_THERMAL_FEATURE_FIVR	0x02
65 #define PROC_THERMAL_FEATURE_DVFS	0x04
66 #define PROC_THERMAL_FEATURE_WT_REQ	0x08
67 #define PROC_THERMAL_FEATURE_DLVR	0x10
68 #define PROC_THERMAL_FEATURE_WT_HINT	0x20
69 #define PROC_THERMAL_FEATURE_POWER_FLOOR	0x40
70 #define PROC_THERMAL_FEATURE_MSI_SUPPORT	0x80
71 #define PROC_THERMAL_FEATURE_PTC	0x100
72 #define PROC_THERMAL_FEATURE_SOC_POWER_SLIDER	0x200
73 
74 #if IS_ENABLED(CONFIG_PROC_THERMAL_MMIO_RAPL)
75 int proc_thermal_rapl_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
76 void proc_thermal_rapl_remove(void);
77 #else
78 static int __maybe_unused proc_thermal_rapl_add(struct pci_dev *pdev,
79 						struct proc_thermal_device *proc_priv)
80 {
81 	return 0;
82 }
83 
84 static void __maybe_unused proc_thermal_rapl_remove(void)
85 {
86 }
87 #endif
88 
89 int proc_thermal_rfim_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
90 void proc_thermal_rfim_remove(struct pci_dev *pdev);
91 
92 int proc_thermal_wt_req_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
93 void proc_thermal_wt_req_remove(struct pci_dev *pdev);
94 
95 #define MBOX_CMD_WORKLOAD_TYPE_READ	0x0E
96 #define MBOX_CMD_WORKLOAD_TYPE_WRITE	0x0F
97 
98 #define MBOX_DATA_BIT_AC_DC		30
99 #define MBOX_DATA_BIT_VALID		31
100 
101 #define SOC_WT_RES_INT_STATUS_OFFSET	0x5B18
102 #define SOC_WT_RES_INT_STATUS_MASK	GENMASK_ULL(3, 2)
103 
104 int proc_thermal_read_power_floor_status(struct proc_thermal_device *proc_priv);
105 int proc_thermal_power_floor_set_state(struct proc_thermal_device *proc_priv, bool enable);
106 bool proc_thermal_power_floor_get_state(struct proc_thermal_device *proc_priv);
107 void proc_thermal_power_floor_intr_callback(struct pci_dev *pdev,
108 					    struct proc_thermal_device *proc_priv);
109 bool proc_thermal_check_power_floor_intr(struct proc_thermal_device *proc_priv);
110 
111 int processor_thermal_send_mbox_read_cmd(struct pci_dev *pdev, u16 id, u64 *resp);
112 int processor_thermal_send_mbox_write_cmd(struct pci_dev *pdev, u16 id, u32 data);
113 int processor_thermal_mbox_interrupt_config(struct pci_dev *pdev, bool enable, int enable_bit,
114 					    int time_window);
115 int proc_thermal_add(struct device *dev, struct proc_thermal_device *priv);
116 void proc_thermal_remove(struct proc_thermal_device *proc_priv);
117 
118 int proc_thermal_wt_hint_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
119 void proc_thermal_wt_hint_remove(struct pci_dev *pdev);
120 void proc_thermal_wt_intr_callback(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
121 bool proc_thermal_check_wt_intr(struct proc_thermal_device *proc_priv);
122 
123 int proc_thermal_suspend(struct device *dev);
124 int proc_thermal_resume(struct device *dev);
125 int proc_thermal_mmio_add(struct pci_dev *pdev,
126 			  struct proc_thermal_device *proc_priv,
127 			  kernel_ulong_t feature_mask);
128 void proc_thermal_mmio_remove(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
129 int proc_thermal_ptc_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
130 void proc_thermal_ptc_remove(struct pci_dev *pdev);
131 
132 int proc_thermal_soc_power_slider_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
133 void proc_thermal_soc_power_slider_suspend(struct proc_thermal_device *proc_priv);
134 void proc_thermal_soc_power_slider_resume(struct proc_thermal_device *proc_priv);
135 
136 #endif
137