xref: /linux/drivers/target/iscsi/cxgbit/cxgbit_lro.h (revision e7d759f31ca295d589f7420719c311870bb3166f)
1 /*
2  * Copyright (c) 2016 Chelsio Communications, Inc.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation.
7  *
8  */
9 
10 #ifndef	__CXGBIT_LRO_H__
11 #define	__CXGBIT_LRO_H__
12 
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/errno.h>
16 #include <linux/types.h>
17 #include <linux/skbuff.h>
18 
19 #define LRO_FLUSH_LEN_MAX	65535
20 
21 struct cxgbit_lro_cb {
22 	struct cxgbit_sock *csk;
23 	u32 pdu_totallen;
24 	u32 offset;
25 	u8 pdu_idx;
26 	bool complete;
27 };
28 
29 enum cxgbit_pducb_flags {
30 	PDUCBF_RX_HDR		= (1 << 0), /* received pdu header */
31 	PDUCBF_RX_DATA		= (1 << 1), /* received pdu payload */
32 	PDUCBF_RX_STATUS	= (1 << 2), /* received ddp status */
33 	PDUCBF_RX_DATA_DDPD	= (1 << 3), /* pdu payload ddp'd */
34 	PDUCBF_RX_DDP_CMP	= (1 << 4), /* ddp completion */
35 	PDUCBF_RX_HCRC_ERR	= (1 << 5), /* header digest error */
36 	PDUCBF_RX_DCRC_ERR	= (1 << 6), /* data digest error */
37 };
38 
39 struct cxgbit_lro_pdu_cb {
40 	u8 flags;
41 	u8 frags;
42 	u8 hfrag_idx;
43 	u8 nr_dfrags;
44 	u8 dfrag_idx;
45 	bool complete;
46 	u32 seq;
47 	u32 pdulen;
48 	u32 hlen;
49 	u32 dlen;
50 	u32 doffset;
51 	u32 ddigest;
52 	void *hdr;
53 };
54 
55 #define LRO_SKB_MAX_HEADROOM  \
56 		(sizeof(struct cxgbit_lro_cb) + \
57 		 (MAX_SKB_FRAGS * sizeof(struct cxgbit_lro_pdu_cb)))
58 
59 #define LRO_SKB_MIN_HEADROOM  \
60 		(sizeof(struct cxgbit_lro_cb) + \
61 		 sizeof(struct cxgbit_lro_pdu_cb))
62 
63 #define cxgbit_skb_lro_cb(skb)	((struct cxgbit_lro_cb *)skb->data)
64 #define cxgbit_skb_lro_pdu_cb(skb, i)	\
65 	((struct cxgbit_lro_pdu_cb *)(skb->data + sizeof(struct cxgbit_lro_cb) \
66 		+ (i * sizeof(struct cxgbit_lro_pdu_cb))))
67 
68 #define CPL_RX_ISCSI_DDP_STATUS_DDP_SHIFT	16 /* ddp'able */
69 #define CPL_RX_ISCSI_DDP_STATUS_PAD_SHIFT	19 /* pad error */
70 #define CPL_RX_ISCSI_DDP_STATUS_HCRC_SHIFT	20 /* hcrc error */
71 #define CPL_RX_ISCSI_DDP_STATUS_DCRC_SHIFT	21 /* dcrc error */
72 
73 #endif	/*__CXGBIT_LRO_H_*/
74