1 /* 2 * Sonics Silicon Backplane 3 * Subsystem core 4 * 5 * Copyright 2005, Broadcom Corporation 6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> 7 * 8 * Licensed under the GNU/GPL. See COPYING for details. 9 */ 10 11 #include "ssb_private.h" 12 13 #include <linux/delay.h> 14 #include <linux/io.h> 15 #include <linux/ssb/ssb.h> 16 #include <linux/ssb/ssb_regs.h> 17 #include <linux/ssb/ssb_driver_gige.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/pci.h> 20 #include <linux/mmc/sdio_func.h> 21 #include <linux/slab.h> 22 23 #include <pcmcia/cs_types.h> 24 #include <pcmcia/cs.h> 25 #include <pcmcia/cistpl.h> 26 #include <pcmcia/ds.h> 27 28 29 MODULE_DESCRIPTION("Sonics Silicon Backplane driver"); 30 MODULE_LICENSE("GPL"); 31 32 33 /* Temporary list of yet-to-be-attached buses */ 34 static LIST_HEAD(attach_queue); 35 /* List if running buses */ 36 static LIST_HEAD(buses); 37 /* Software ID counter */ 38 static unsigned int next_busnumber; 39 /* buses_mutes locks the two buslists and the next_busnumber. 40 * Don't lock this directly, but use ssb_buses_[un]lock() below. */ 41 static DEFINE_MUTEX(buses_mutex); 42 43 /* There are differences in the codeflow, if the bus is 44 * initialized from early boot, as various needed services 45 * are not available early. This is a mechanism to delay 46 * these initializations to after early boot has finished. 47 * It's also used to avoid mutex locking, as that's not 48 * available and needed early. */ 49 static bool ssb_is_early_boot = 1; 50 51 static void ssb_buses_lock(void); 52 static void ssb_buses_unlock(void); 53 54 55 #ifdef CONFIG_SSB_PCIHOST 56 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev) 57 { 58 struct ssb_bus *bus; 59 60 ssb_buses_lock(); 61 list_for_each_entry(bus, &buses, list) { 62 if (bus->bustype == SSB_BUSTYPE_PCI && 63 bus->host_pci == pdev) 64 goto found; 65 } 66 bus = NULL; 67 found: 68 ssb_buses_unlock(); 69 70 return bus; 71 } 72 #endif /* CONFIG_SSB_PCIHOST */ 73 74 #ifdef CONFIG_SSB_PCMCIAHOST 75 struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev) 76 { 77 struct ssb_bus *bus; 78 79 ssb_buses_lock(); 80 list_for_each_entry(bus, &buses, list) { 81 if (bus->bustype == SSB_BUSTYPE_PCMCIA && 82 bus->host_pcmcia == pdev) 83 goto found; 84 } 85 bus = NULL; 86 found: 87 ssb_buses_unlock(); 88 89 return bus; 90 } 91 #endif /* CONFIG_SSB_PCMCIAHOST */ 92 93 #ifdef CONFIG_SSB_SDIOHOST 94 struct ssb_bus *ssb_sdio_func_to_bus(struct sdio_func *func) 95 { 96 struct ssb_bus *bus; 97 98 ssb_buses_lock(); 99 list_for_each_entry(bus, &buses, list) { 100 if (bus->bustype == SSB_BUSTYPE_SDIO && 101 bus->host_sdio == func) 102 goto found; 103 } 104 bus = NULL; 105 found: 106 ssb_buses_unlock(); 107 108 return bus; 109 } 110 #endif /* CONFIG_SSB_SDIOHOST */ 111 112 int ssb_for_each_bus_call(unsigned long data, 113 int (*func)(struct ssb_bus *bus, unsigned long data)) 114 { 115 struct ssb_bus *bus; 116 int res; 117 118 ssb_buses_lock(); 119 list_for_each_entry(bus, &buses, list) { 120 res = func(bus, data); 121 if (res >= 0) { 122 ssb_buses_unlock(); 123 return res; 124 } 125 } 126 ssb_buses_unlock(); 127 128 return -ENODEV; 129 } 130 131 static struct ssb_device *ssb_device_get(struct ssb_device *dev) 132 { 133 if (dev) 134 get_device(dev->dev); 135 return dev; 136 } 137 138 static void ssb_device_put(struct ssb_device *dev) 139 { 140 if (dev) 141 put_device(dev->dev); 142 } 143 144 static inline struct ssb_driver *ssb_driver_get(struct ssb_driver *drv) 145 { 146 if (drv) 147 get_driver(&drv->drv); 148 return drv; 149 } 150 151 static inline void ssb_driver_put(struct ssb_driver *drv) 152 { 153 if (drv) 154 put_driver(&drv->drv); 155 } 156 157 static int ssb_device_resume(struct device *dev) 158 { 159 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 160 struct ssb_driver *ssb_drv; 161 int err = 0; 162 163 if (dev->driver) { 164 ssb_drv = drv_to_ssb_drv(dev->driver); 165 if (ssb_drv && ssb_drv->resume) 166 err = ssb_drv->resume(ssb_dev); 167 if (err) 168 goto out; 169 } 170 out: 171 return err; 172 } 173 174 static int ssb_device_suspend(struct device *dev, pm_message_t state) 175 { 176 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 177 struct ssb_driver *ssb_drv; 178 int err = 0; 179 180 if (dev->driver) { 181 ssb_drv = drv_to_ssb_drv(dev->driver); 182 if (ssb_drv && ssb_drv->suspend) 183 err = ssb_drv->suspend(ssb_dev, state); 184 if (err) 185 goto out; 186 } 187 out: 188 return err; 189 } 190 191 int ssb_bus_resume(struct ssb_bus *bus) 192 { 193 int err; 194 195 /* Reset HW state information in memory, so that HW is 196 * completely reinitialized. */ 197 bus->mapped_device = NULL; 198 #ifdef CONFIG_SSB_DRIVER_PCICORE 199 bus->pcicore.setup_done = 0; 200 #endif 201 202 err = ssb_bus_powerup(bus, 0); 203 if (err) 204 return err; 205 err = ssb_pcmcia_hardware_setup(bus); 206 if (err) { 207 ssb_bus_may_powerdown(bus); 208 return err; 209 } 210 ssb_chipco_resume(&bus->chipco); 211 ssb_bus_may_powerdown(bus); 212 213 return 0; 214 } 215 EXPORT_SYMBOL(ssb_bus_resume); 216 217 int ssb_bus_suspend(struct ssb_bus *bus) 218 { 219 ssb_chipco_suspend(&bus->chipco); 220 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); 221 222 return 0; 223 } 224 EXPORT_SYMBOL(ssb_bus_suspend); 225 226 #ifdef CONFIG_SSB_SPROM 227 /** ssb_devices_freeze - Freeze all devices on the bus. 228 * 229 * After freezing no device driver will be handling a device 230 * on this bus anymore. ssb_devices_thaw() must be called after 231 * a successful freeze to reactivate the devices. 232 * 233 * @bus: The bus. 234 * @ctx: Context structure. Pass this to ssb_devices_thaw(). 235 */ 236 int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx) 237 { 238 struct ssb_device *sdev; 239 struct ssb_driver *sdrv; 240 unsigned int i; 241 242 memset(ctx, 0, sizeof(*ctx)); 243 ctx->bus = bus; 244 SSB_WARN_ON(bus->nr_devices > ARRAY_SIZE(ctx->device_frozen)); 245 246 for (i = 0; i < bus->nr_devices; i++) { 247 sdev = ssb_device_get(&bus->devices[i]); 248 249 if (!sdev->dev || !sdev->dev->driver || 250 !device_is_registered(sdev->dev)) { 251 ssb_device_put(sdev); 252 continue; 253 } 254 sdrv = ssb_driver_get(drv_to_ssb_drv(sdev->dev->driver)); 255 if (!sdrv || SSB_WARN_ON(!sdrv->remove)) { 256 ssb_device_put(sdev); 257 continue; 258 } 259 sdrv->remove(sdev); 260 ctx->device_frozen[i] = 1; 261 } 262 263 return 0; 264 } 265 266 /** ssb_devices_thaw - Unfreeze all devices on the bus. 267 * 268 * This will re-attach the device drivers and re-init the devices. 269 * 270 * @ctx: The context structure from ssb_devices_freeze() 271 */ 272 int ssb_devices_thaw(struct ssb_freeze_context *ctx) 273 { 274 struct ssb_bus *bus = ctx->bus; 275 struct ssb_device *sdev; 276 struct ssb_driver *sdrv; 277 unsigned int i; 278 int err, result = 0; 279 280 for (i = 0; i < bus->nr_devices; i++) { 281 if (!ctx->device_frozen[i]) 282 continue; 283 sdev = &bus->devices[i]; 284 285 if (SSB_WARN_ON(!sdev->dev || !sdev->dev->driver)) 286 continue; 287 sdrv = drv_to_ssb_drv(sdev->dev->driver); 288 if (SSB_WARN_ON(!sdrv || !sdrv->probe)) 289 continue; 290 291 err = sdrv->probe(sdev, &sdev->id); 292 if (err) { 293 ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n", 294 dev_name(sdev->dev)); 295 result = err; 296 } 297 ssb_driver_put(sdrv); 298 ssb_device_put(sdev); 299 } 300 301 return result; 302 } 303 #endif /* CONFIG_SSB_SPROM */ 304 305 static void ssb_device_shutdown(struct device *dev) 306 { 307 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 308 struct ssb_driver *ssb_drv; 309 310 if (!dev->driver) 311 return; 312 ssb_drv = drv_to_ssb_drv(dev->driver); 313 if (ssb_drv && ssb_drv->shutdown) 314 ssb_drv->shutdown(ssb_dev); 315 } 316 317 static int ssb_device_remove(struct device *dev) 318 { 319 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 320 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver); 321 322 if (ssb_drv && ssb_drv->remove) 323 ssb_drv->remove(ssb_dev); 324 ssb_device_put(ssb_dev); 325 326 return 0; 327 } 328 329 static int ssb_device_probe(struct device *dev) 330 { 331 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 332 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver); 333 int err = 0; 334 335 ssb_device_get(ssb_dev); 336 if (ssb_drv && ssb_drv->probe) 337 err = ssb_drv->probe(ssb_dev, &ssb_dev->id); 338 if (err) 339 ssb_device_put(ssb_dev); 340 341 return err; 342 } 343 344 static int ssb_match_devid(const struct ssb_device_id *tabid, 345 const struct ssb_device_id *devid) 346 { 347 if ((tabid->vendor != devid->vendor) && 348 tabid->vendor != SSB_ANY_VENDOR) 349 return 0; 350 if ((tabid->coreid != devid->coreid) && 351 tabid->coreid != SSB_ANY_ID) 352 return 0; 353 if ((tabid->revision != devid->revision) && 354 tabid->revision != SSB_ANY_REV) 355 return 0; 356 return 1; 357 } 358 359 static int ssb_bus_match(struct device *dev, struct device_driver *drv) 360 { 361 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 362 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv); 363 const struct ssb_device_id *id; 364 365 for (id = ssb_drv->id_table; 366 id->vendor || id->coreid || id->revision; 367 id++) { 368 if (ssb_match_devid(id, &ssb_dev->id)) 369 return 1; /* found */ 370 } 371 372 return 0; 373 } 374 375 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env) 376 { 377 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 378 379 if (!dev) 380 return -ENODEV; 381 382 return add_uevent_var(env, 383 "MODALIAS=ssb:v%04Xid%04Xrev%02X", 384 ssb_dev->id.vendor, ssb_dev->id.coreid, 385 ssb_dev->id.revision); 386 } 387 388 static struct bus_type ssb_bustype = { 389 .name = "ssb", 390 .match = ssb_bus_match, 391 .probe = ssb_device_probe, 392 .remove = ssb_device_remove, 393 .shutdown = ssb_device_shutdown, 394 .suspend = ssb_device_suspend, 395 .resume = ssb_device_resume, 396 .uevent = ssb_device_uevent, 397 }; 398 399 static void ssb_buses_lock(void) 400 { 401 /* See the comment at the ssb_is_early_boot definition */ 402 if (!ssb_is_early_boot) 403 mutex_lock(&buses_mutex); 404 } 405 406 static void ssb_buses_unlock(void) 407 { 408 /* See the comment at the ssb_is_early_boot definition */ 409 if (!ssb_is_early_boot) 410 mutex_unlock(&buses_mutex); 411 } 412 413 static void ssb_devices_unregister(struct ssb_bus *bus) 414 { 415 struct ssb_device *sdev; 416 int i; 417 418 for (i = bus->nr_devices - 1; i >= 0; i--) { 419 sdev = &(bus->devices[i]); 420 if (sdev->dev) 421 device_unregister(sdev->dev); 422 } 423 } 424 425 void ssb_bus_unregister(struct ssb_bus *bus) 426 { 427 ssb_buses_lock(); 428 ssb_devices_unregister(bus); 429 list_del(&bus->list); 430 ssb_buses_unlock(); 431 432 ssb_pcmcia_exit(bus); 433 ssb_pci_exit(bus); 434 ssb_iounmap(bus); 435 } 436 EXPORT_SYMBOL(ssb_bus_unregister); 437 438 static void ssb_release_dev(struct device *dev) 439 { 440 struct __ssb_dev_wrapper *devwrap; 441 442 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev); 443 kfree(devwrap); 444 } 445 446 static int ssb_devices_register(struct ssb_bus *bus) 447 { 448 struct ssb_device *sdev; 449 struct device *dev; 450 struct __ssb_dev_wrapper *devwrap; 451 int i, err = 0; 452 int dev_idx = 0; 453 454 for (i = 0; i < bus->nr_devices; i++) { 455 sdev = &(bus->devices[i]); 456 457 /* We don't register SSB-system devices to the kernel, 458 * as the drivers for them are built into SSB. */ 459 switch (sdev->id.coreid) { 460 case SSB_DEV_CHIPCOMMON: 461 case SSB_DEV_PCI: 462 case SSB_DEV_PCIE: 463 case SSB_DEV_PCMCIA: 464 case SSB_DEV_MIPS: 465 case SSB_DEV_MIPS_3302: 466 case SSB_DEV_EXTIF: 467 continue; 468 } 469 470 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL); 471 if (!devwrap) { 472 ssb_printk(KERN_ERR PFX 473 "Could not allocate device\n"); 474 err = -ENOMEM; 475 goto error; 476 } 477 dev = &devwrap->dev; 478 devwrap->sdev = sdev; 479 480 dev->release = ssb_release_dev; 481 dev->bus = &ssb_bustype; 482 dev_set_name(dev, "ssb%u:%d", bus->busnumber, dev_idx); 483 484 switch (bus->bustype) { 485 case SSB_BUSTYPE_PCI: 486 #ifdef CONFIG_SSB_PCIHOST 487 sdev->irq = bus->host_pci->irq; 488 dev->parent = &bus->host_pci->dev; 489 #endif 490 break; 491 case SSB_BUSTYPE_PCMCIA: 492 #ifdef CONFIG_SSB_PCMCIAHOST 493 sdev->irq = bus->host_pcmcia->irq; 494 dev->parent = &bus->host_pcmcia->dev; 495 #endif 496 break; 497 case SSB_BUSTYPE_SDIO: 498 #ifdef CONFIG_SSB_SDIOHOST 499 dev->parent = &bus->host_sdio->dev; 500 #endif 501 break; 502 case SSB_BUSTYPE_SSB: 503 dev->dma_mask = &dev->coherent_dma_mask; 504 break; 505 } 506 507 sdev->dev = dev; 508 err = device_register(dev); 509 if (err) { 510 ssb_printk(KERN_ERR PFX 511 "Could not register %s\n", 512 dev_name(dev)); 513 /* Set dev to NULL to not unregister 514 * dev on error unwinding. */ 515 sdev->dev = NULL; 516 kfree(devwrap); 517 goto error; 518 } 519 dev_idx++; 520 } 521 522 return 0; 523 error: 524 /* Unwind the already registered devices. */ 525 ssb_devices_unregister(bus); 526 return err; 527 } 528 529 /* Needs ssb_buses_lock() */ 530 static int ssb_attach_queued_buses(void) 531 { 532 struct ssb_bus *bus, *n; 533 int err = 0; 534 int drop_them_all = 0; 535 536 list_for_each_entry_safe(bus, n, &attach_queue, list) { 537 if (drop_them_all) { 538 list_del(&bus->list); 539 continue; 540 } 541 /* Can't init the PCIcore in ssb_bus_register(), as that 542 * is too early in boot for embedded systems 543 * (no udelay() available). So do it here in attach stage. 544 */ 545 err = ssb_bus_powerup(bus, 0); 546 if (err) 547 goto error; 548 ssb_pcicore_init(&bus->pcicore); 549 ssb_bus_may_powerdown(bus); 550 551 err = ssb_devices_register(bus); 552 error: 553 if (err) { 554 drop_them_all = 1; 555 list_del(&bus->list); 556 continue; 557 } 558 list_move_tail(&bus->list, &buses); 559 } 560 561 return err; 562 } 563 564 static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset) 565 { 566 struct ssb_bus *bus = dev->bus; 567 568 offset += dev->core_index * SSB_CORE_SIZE; 569 return readb(bus->mmio + offset); 570 } 571 572 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset) 573 { 574 struct ssb_bus *bus = dev->bus; 575 576 offset += dev->core_index * SSB_CORE_SIZE; 577 return readw(bus->mmio + offset); 578 } 579 580 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset) 581 { 582 struct ssb_bus *bus = dev->bus; 583 584 offset += dev->core_index * SSB_CORE_SIZE; 585 return readl(bus->mmio + offset); 586 } 587 588 #ifdef CONFIG_SSB_BLOCKIO 589 static void ssb_ssb_block_read(struct ssb_device *dev, void *buffer, 590 size_t count, u16 offset, u8 reg_width) 591 { 592 struct ssb_bus *bus = dev->bus; 593 void __iomem *addr; 594 595 offset += dev->core_index * SSB_CORE_SIZE; 596 addr = bus->mmio + offset; 597 598 switch (reg_width) { 599 case sizeof(u8): { 600 u8 *buf = buffer; 601 602 while (count) { 603 *buf = __raw_readb(addr); 604 buf++; 605 count--; 606 } 607 break; 608 } 609 case sizeof(u16): { 610 __le16 *buf = buffer; 611 612 SSB_WARN_ON(count & 1); 613 while (count) { 614 *buf = (__force __le16)__raw_readw(addr); 615 buf++; 616 count -= 2; 617 } 618 break; 619 } 620 case sizeof(u32): { 621 __le32 *buf = buffer; 622 623 SSB_WARN_ON(count & 3); 624 while (count) { 625 *buf = (__force __le32)__raw_readl(addr); 626 buf++; 627 count -= 4; 628 } 629 break; 630 } 631 default: 632 SSB_WARN_ON(1); 633 } 634 } 635 #endif /* CONFIG_SSB_BLOCKIO */ 636 637 static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value) 638 { 639 struct ssb_bus *bus = dev->bus; 640 641 offset += dev->core_index * SSB_CORE_SIZE; 642 writeb(value, bus->mmio + offset); 643 } 644 645 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value) 646 { 647 struct ssb_bus *bus = dev->bus; 648 649 offset += dev->core_index * SSB_CORE_SIZE; 650 writew(value, bus->mmio + offset); 651 } 652 653 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value) 654 { 655 struct ssb_bus *bus = dev->bus; 656 657 offset += dev->core_index * SSB_CORE_SIZE; 658 writel(value, bus->mmio + offset); 659 } 660 661 #ifdef CONFIG_SSB_BLOCKIO 662 static void ssb_ssb_block_write(struct ssb_device *dev, const void *buffer, 663 size_t count, u16 offset, u8 reg_width) 664 { 665 struct ssb_bus *bus = dev->bus; 666 void __iomem *addr; 667 668 offset += dev->core_index * SSB_CORE_SIZE; 669 addr = bus->mmio + offset; 670 671 switch (reg_width) { 672 case sizeof(u8): { 673 const u8 *buf = buffer; 674 675 while (count) { 676 __raw_writeb(*buf, addr); 677 buf++; 678 count--; 679 } 680 break; 681 } 682 case sizeof(u16): { 683 const __le16 *buf = buffer; 684 685 SSB_WARN_ON(count & 1); 686 while (count) { 687 __raw_writew((__force u16)(*buf), addr); 688 buf++; 689 count -= 2; 690 } 691 break; 692 } 693 case sizeof(u32): { 694 const __le32 *buf = buffer; 695 696 SSB_WARN_ON(count & 3); 697 while (count) { 698 __raw_writel((__force u32)(*buf), addr); 699 buf++; 700 count -= 4; 701 } 702 break; 703 } 704 default: 705 SSB_WARN_ON(1); 706 } 707 } 708 #endif /* CONFIG_SSB_BLOCKIO */ 709 710 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */ 711 static const struct ssb_bus_ops ssb_ssb_ops = { 712 .read8 = ssb_ssb_read8, 713 .read16 = ssb_ssb_read16, 714 .read32 = ssb_ssb_read32, 715 .write8 = ssb_ssb_write8, 716 .write16 = ssb_ssb_write16, 717 .write32 = ssb_ssb_write32, 718 #ifdef CONFIG_SSB_BLOCKIO 719 .block_read = ssb_ssb_block_read, 720 .block_write = ssb_ssb_block_write, 721 #endif 722 }; 723 724 static int ssb_fetch_invariants(struct ssb_bus *bus, 725 ssb_invariants_func_t get_invariants) 726 { 727 struct ssb_init_invariants iv; 728 int err; 729 730 memset(&iv, 0, sizeof(iv)); 731 err = get_invariants(bus, &iv); 732 if (err) 733 goto out; 734 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo)); 735 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom)); 736 bus->has_cardbus_slot = iv.has_cardbus_slot; 737 out: 738 return err; 739 } 740 741 static int ssb_bus_register(struct ssb_bus *bus, 742 ssb_invariants_func_t get_invariants, 743 unsigned long baseaddr) 744 { 745 int err; 746 747 spin_lock_init(&bus->bar_lock); 748 INIT_LIST_HEAD(&bus->list); 749 #ifdef CONFIG_SSB_EMBEDDED 750 spin_lock_init(&bus->gpio_lock); 751 #endif 752 753 /* Powerup the bus */ 754 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); 755 if (err) 756 goto out; 757 758 /* Init SDIO-host device (if any), before the scan */ 759 err = ssb_sdio_init(bus); 760 if (err) 761 goto err_disable_xtal; 762 763 ssb_buses_lock(); 764 bus->busnumber = next_busnumber; 765 /* Scan for devices (cores) */ 766 err = ssb_bus_scan(bus, baseaddr); 767 if (err) 768 goto err_sdio_exit; 769 770 /* Init PCI-host device (if any) */ 771 err = ssb_pci_init(bus); 772 if (err) 773 goto err_unmap; 774 /* Init PCMCIA-host device (if any) */ 775 err = ssb_pcmcia_init(bus); 776 if (err) 777 goto err_pci_exit; 778 779 /* Initialize basic system devices (if available) */ 780 err = ssb_bus_powerup(bus, 0); 781 if (err) 782 goto err_pcmcia_exit; 783 ssb_chipcommon_init(&bus->chipco); 784 ssb_mipscore_init(&bus->mipscore); 785 err = ssb_fetch_invariants(bus, get_invariants); 786 if (err) { 787 ssb_bus_may_powerdown(bus); 788 goto err_pcmcia_exit; 789 } 790 ssb_bus_may_powerdown(bus); 791 792 /* Queue it for attach. 793 * See the comment at the ssb_is_early_boot definition. */ 794 list_add_tail(&bus->list, &attach_queue); 795 if (!ssb_is_early_boot) { 796 /* This is not early boot, so we must attach the bus now */ 797 err = ssb_attach_queued_buses(); 798 if (err) 799 goto err_dequeue; 800 } 801 next_busnumber++; 802 ssb_buses_unlock(); 803 804 out: 805 return err; 806 807 err_dequeue: 808 list_del(&bus->list); 809 err_pcmcia_exit: 810 ssb_pcmcia_exit(bus); 811 err_pci_exit: 812 ssb_pci_exit(bus); 813 err_unmap: 814 ssb_iounmap(bus); 815 err_sdio_exit: 816 ssb_sdio_exit(bus); 817 err_disable_xtal: 818 ssb_buses_unlock(); 819 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); 820 return err; 821 } 822 823 #ifdef CONFIG_SSB_PCIHOST 824 int ssb_bus_pcibus_register(struct ssb_bus *bus, 825 struct pci_dev *host_pci) 826 { 827 int err; 828 829 bus->bustype = SSB_BUSTYPE_PCI; 830 bus->host_pci = host_pci; 831 bus->ops = &ssb_pci_ops; 832 833 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0); 834 if (!err) { 835 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on " 836 "PCI device %s\n", dev_name(&host_pci->dev)); 837 } else { 838 ssb_printk(KERN_ERR PFX "Failed to register PCI version" 839 " of SSB with error %d\n", err); 840 } 841 842 return err; 843 } 844 EXPORT_SYMBOL(ssb_bus_pcibus_register); 845 #endif /* CONFIG_SSB_PCIHOST */ 846 847 #ifdef CONFIG_SSB_PCMCIAHOST 848 int ssb_bus_pcmciabus_register(struct ssb_bus *bus, 849 struct pcmcia_device *pcmcia_dev, 850 unsigned long baseaddr) 851 { 852 int err; 853 854 bus->bustype = SSB_BUSTYPE_PCMCIA; 855 bus->host_pcmcia = pcmcia_dev; 856 bus->ops = &ssb_pcmcia_ops; 857 858 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr); 859 if (!err) { 860 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on " 861 "PCMCIA device %s\n", pcmcia_dev->devname); 862 } 863 864 return err; 865 } 866 EXPORT_SYMBOL(ssb_bus_pcmciabus_register); 867 #endif /* CONFIG_SSB_PCMCIAHOST */ 868 869 #ifdef CONFIG_SSB_SDIOHOST 870 int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func, 871 unsigned int quirks) 872 { 873 int err; 874 875 bus->bustype = SSB_BUSTYPE_SDIO; 876 bus->host_sdio = func; 877 bus->ops = &ssb_sdio_ops; 878 bus->quirks = quirks; 879 880 err = ssb_bus_register(bus, ssb_sdio_get_invariants, ~0); 881 if (!err) { 882 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on " 883 "SDIO device %s\n", sdio_func_id(func)); 884 } 885 886 return err; 887 } 888 EXPORT_SYMBOL(ssb_bus_sdiobus_register); 889 #endif /* CONFIG_SSB_PCMCIAHOST */ 890 891 int ssb_bus_ssbbus_register(struct ssb_bus *bus, 892 unsigned long baseaddr, 893 ssb_invariants_func_t get_invariants) 894 { 895 int err; 896 897 bus->bustype = SSB_BUSTYPE_SSB; 898 bus->ops = &ssb_ssb_ops; 899 900 err = ssb_bus_register(bus, get_invariants, baseaddr); 901 if (!err) { 902 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at " 903 "address 0x%08lX\n", baseaddr); 904 } 905 906 return err; 907 } 908 909 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner) 910 { 911 drv->drv.name = drv->name; 912 drv->drv.bus = &ssb_bustype; 913 drv->drv.owner = owner; 914 915 return driver_register(&drv->drv); 916 } 917 EXPORT_SYMBOL(__ssb_driver_register); 918 919 void ssb_driver_unregister(struct ssb_driver *drv) 920 { 921 driver_unregister(&drv->drv); 922 } 923 EXPORT_SYMBOL(ssb_driver_unregister); 924 925 void ssb_set_devtypedata(struct ssb_device *dev, void *data) 926 { 927 struct ssb_bus *bus = dev->bus; 928 struct ssb_device *ent; 929 int i; 930 931 for (i = 0; i < bus->nr_devices; i++) { 932 ent = &(bus->devices[i]); 933 if (ent->id.vendor != dev->id.vendor) 934 continue; 935 if (ent->id.coreid != dev->id.coreid) 936 continue; 937 938 ent->devtypedata = data; 939 } 940 } 941 EXPORT_SYMBOL(ssb_set_devtypedata); 942 943 static u32 clkfactor_f6_resolve(u32 v) 944 { 945 /* map the magic values */ 946 switch (v) { 947 case SSB_CHIPCO_CLK_F6_2: 948 return 2; 949 case SSB_CHIPCO_CLK_F6_3: 950 return 3; 951 case SSB_CHIPCO_CLK_F6_4: 952 return 4; 953 case SSB_CHIPCO_CLK_F6_5: 954 return 5; 955 case SSB_CHIPCO_CLK_F6_6: 956 return 6; 957 case SSB_CHIPCO_CLK_F6_7: 958 return 7; 959 } 960 return 0; 961 } 962 963 /* Calculate the speed the backplane would run at a given set of clockcontrol values */ 964 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m) 965 { 966 u32 n1, n2, clock, m1, m2, m3, mc; 967 968 n1 = (n & SSB_CHIPCO_CLK_N1); 969 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT); 970 971 switch (plltype) { 972 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */ 973 if (m & SSB_CHIPCO_CLK_T6_MMASK) 974 return SSB_CHIPCO_CLK_T6_M0; 975 return SSB_CHIPCO_CLK_T6_M1; 976 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ 977 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ 978 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ 979 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ 980 n1 = clkfactor_f6_resolve(n1); 981 n2 += SSB_CHIPCO_CLK_F5_BIAS; 982 break; 983 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */ 984 n1 += SSB_CHIPCO_CLK_T2_BIAS; 985 n2 += SSB_CHIPCO_CLK_T2_BIAS; 986 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7))); 987 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23))); 988 break; 989 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */ 990 return 100000000; 991 default: 992 SSB_WARN_ON(1); 993 } 994 995 switch (plltype) { 996 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ 997 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ 998 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2; 999 break; 1000 default: 1001 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2; 1002 } 1003 if (!clock) 1004 return 0; 1005 1006 m1 = (m & SSB_CHIPCO_CLK_M1); 1007 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT); 1008 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT); 1009 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT); 1010 1011 switch (plltype) { 1012 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ 1013 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ 1014 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ 1015 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ 1016 m1 = clkfactor_f6_resolve(m1); 1017 if ((plltype == SSB_PLLTYPE_1) || 1018 (plltype == SSB_PLLTYPE_3)) 1019 m2 += SSB_CHIPCO_CLK_F5_BIAS; 1020 else 1021 m2 = clkfactor_f6_resolve(m2); 1022 m3 = clkfactor_f6_resolve(m3); 1023 1024 switch (mc) { 1025 case SSB_CHIPCO_CLK_MC_BYPASS: 1026 return clock; 1027 case SSB_CHIPCO_CLK_MC_M1: 1028 return (clock / m1); 1029 case SSB_CHIPCO_CLK_MC_M1M2: 1030 return (clock / (m1 * m2)); 1031 case SSB_CHIPCO_CLK_MC_M1M2M3: 1032 return (clock / (m1 * m2 * m3)); 1033 case SSB_CHIPCO_CLK_MC_M1M3: 1034 return (clock / (m1 * m3)); 1035 } 1036 return 0; 1037 case SSB_PLLTYPE_2: 1038 m1 += SSB_CHIPCO_CLK_T2_BIAS; 1039 m2 += SSB_CHIPCO_CLK_T2M2_BIAS; 1040 m3 += SSB_CHIPCO_CLK_T2_BIAS; 1041 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7))); 1042 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10))); 1043 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7))); 1044 1045 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP)) 1046 clock /= m1; 1047 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP)) 1048 clock /= m2; 1049 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP)) 1050 clock /= m3; 1051 return clock; 1052 default: 1053 SSB_WARN_ON(1); 1054 } 1055 return 0; 1056 } 1057 1058 /* Get the current speed the backplane is running at */ 1059 u32 ssb_clockspeed(struct ssb_bus *bus) 1060 { 1061 u32 rate; 1062 u32 plltype; 1063 u32 clkctl_n, clkctl_m; 1064 1065 if (ssb_extif_available(&bus->extif)) 1066 ssb_extif_get_clockcontrol(&bus->extif, &plltype, 1067 &clkctl_n, &clkctl_m); 1068 else if (bus->chipco.dev) 1069 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype, 1070 &clkctl_n, &clkctl_m); 1071 else 1072 return 0; 1073 1074 if (bus->chip_id == 0x5365) { 1075 rate = 100000000; 1076 } else { 1077 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m); 1078 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */ 1079 rate /= 2; 1080 } 1081 1082 return rate; 1083 } 1084 EXPORT_SYMBOL(ssb_clockspeed); 1085 1086 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev) 1087 { 1088 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV; 1089 1090 /* The REJECT bit changed position in TMSLOW between 1091 * Backplane revisions. */ 1092 switch (rev) { 1093 case SSB_IDLOW_SSBREV_22: 1094 return SSB_TMSLOW_REJECT_22; 1095 case SSB_IDLOW_SSBREV_23: 1096 return SSB_TMSLOW_REJECT_23; 1097 case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */ 1098 case SSB_IDLOW_SSBREV_25: /* same here */ 1099 case SSB_IDLOW_SSBREV_26: /* same here */ 1100 case SSB_IDLOW_SSBREV_27: /* same here */ 1101 return SSB_TMSLOW_REJECT_23; /* this is a guess */ 1102 default: 1103 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev); 1104 WARN_ON(1); 1105 } 1106 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23); 1107 } 1108 1109 int ssb_device_is_enabled(struct ssb_device *dev) 1110 { 1111 u32 val; 1112 u32 reject; 1113 1114 reject = ssb_tmslow_reject_bitmask(dev); 1115 val = ssb_read32(dev, SSB_TMSLOW); 1116 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject; 1117 1118 return (val == SSB_TMSLOW_CLOCK); 1119 } 1120 EXPORT_SYMBOL(ssb_device_is_enabled); 1121 1122 static void ssb_flush_tmslow(struct ssb_device *dev) 1123 { 1124 /* Make _really_ sure the device has finished the TMSLOW 1125 * register write transaction, as we risk running into 1126 * a machine check exception otherwise. 1127 * Do this by reading the register back to commit the 1128 * PCI write and delay an additional usec for the device 1129 * to react to the change. */ 1130 ssb_read32(dev, SSB_TMSLOW); 1131 udelay(1); 1132 } 1133 1134 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags) 1135 { 1136 u32 val; 1137 1138 ssb_device_disable(dev, core_specific_flags); 1139 ssb_write32(dev, SSB_TMSLOW, 1140 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK | 1141 SSB_TMSLOW_FGC | core_specific_flags); 1142 ssb_flush_tmslow(dev); 1143 1144 /* Clear SERR if set. This is a hw bug workaround. */ 1145 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR) 1146 ssb_write32(dev, SSB_TMSHIGH, 0); 1147 1148 val = ssb_read32(dev, SSB_IMSTATE); 1149 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) { 1150 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO); 1151 ssb_write32(dev, SSB_IMSTATE, val); 1152 } 1153 1154 ssb_write32(dev, SSB_TMSLOW, 1155 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC | 1156 core_specific_flags); 1157 ssb_flush_tmslow(dev); 1158 1159 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK | 1160 core_specific_flags); 1161 ssb_flush_tmslow(dev); 1162 } 1163 EXPORT_SYMBOL(ssb_device_enable); 1164 1165 /* Wait for a bit in a register to get set or unset. 1166 * timeout is in units of ten-microseconds */ 1167 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask, 1168 int timeout, int set) 1169 { 1170 int i; 1171 u32 val; 1172 1173 for (i = 0; i < timeout; i++) { 1174 val = ssb_read32(dev, reg); 1175 if (set) { 1176 if (val & bitmask) 1177 return 0; 1178 } else { 1179 if (!(val & bitmask)) 1180 return 0; 1181 } 1182 udelay(10); 1183 } 1184 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on " 1185 "register %04X to %s.\n", 1186 bitmask, reg, (set ? "set" : "clear")); 1187 1188 return -ETIMEDOUT; 1189 } 1190 1191 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags) 1192 { 1193 u32 reject; 1194 1195 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET) 1196 return; 1197 1198 reject = ssb_tmslow_reject_bitmask(dev); 1199 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK); 1200 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1); 1201 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0); 1202 ssb_write32(dev, SSB_TMSLOW, 1203 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | 1204 reject | SSB_TMSLOW_RESET | 1205 core_specific_flags); 1206 ssb_flush_tmslow(dev); 1207 1208 ssb_write32(dev, SSB_TMSLOW, 1209 reject | SSB_TMSLOW_RESET | 1210 core_specific_flags); 1211 ssb_flush_tmslow(dev); 1212 } 1213 EXPORT_SYMBOL(ssb_device_disable); 1214 1215 u32 ssb_dma_translation(struct ssb_device *dev) 1216 { 1217 switch (dev->bus->bustype) { 1218 case SSB_BUSTYPE_SSB: 1219 return 0; 1220 case SSB_BUSTYPE_PCI: 1221 return SSB_PCI_DMA; 1222 default: 1223 __ssb_dma_not_implemented(dev); 1224 } 1225 return 0; 1226 } 1227 EXPORT_SYMBOL(ssb_dma_translation); 1228 1229 int ssb_dma_set_mask(struct ssb_device *dev, u64 mask) 1230 { 1231 #ifdef CONFIG_SSB_PCIHOST 1232 int err; 1233 #endif 1234 1235 switch (dev->bus->bustype) { 1236 case SSB_BUSTYPE_PCI: 1237 #ifdef CONFIG_SSB_PCIHOST 1238 err = pci_set_dma_mask(dev->bus->host_pci, mask); 1239 if (err) 1240 return err; 1241 err = pci_set_consistent_dma_mask(dev->bus->host_pci, mask); 1242 return err; 1243 #endif 1244 case SSB_BUSTYPE_SSB: 1245 return dma_set_mask(dev->dev, mask); 1246 default: 1247 __ssb_dma_not_implemented(dev); 1248 } 1249 return -ENOSYS; 1250 } 1251 EXPORT_SYMBOL(ssb_dma_set_mask); 1252 1253 void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size, 1254 dma_addr_t *dma_handle, gfp_t gfp_flags) 1255 { 1256 switch (dev->bus->bustype) { 1257 case SSB_BUSTYPE_PCI: 1258 #ifdef CONFIG_SSB_PCIHOST 1259 if (gfp_flags & GFP_DMA) { 1260 /* Workaround: The PCI API does not support passing 1261 * a GFP flag. */ 1262 return dma_alloc_coherent(&dev->bus->host_pci->dev, 1263 size, dma_handle, gfp_flags); 1264 } 1265 return pci_alloc_consistent(dev->bus->host_pci, size, dma_handle); 1266 #endif 1267 case SSB_BUSTYPE_SSB: 1268 return dma_alloc_coherent(dev->dev, size, dma_handle, gfp_flags); 1269 default: 1270 __ssb_dma_not_implemented(dev); 1271 } 1272 return NULL; 1273 } 1274 EXPORT_SYMBOL(ssb_dma_alloc_consistent); 1275 1276 void ssb_dma_free_consistent(struct ssb_device *dev, size_t size, 1277 void *vaddr, dma_addr_t dma_handle, 1278 gfp_t gfp_flags) 1279 { 1280 switch (dev->bus->bustype) { 1281 case SSB_BUSTYPE_PCI: 1282 #ifdef CONFIG_SSB_PCIHOST 1283 if (gfp_flags & GFP_DMA) { 1284 /* Workaround: The PCI API does not support passing 1285 * a GFP flag. */ 1286 dma_free_coherent(&dev->bus->host_pci->dev, 1287 size, vaddr, dma_handle); 1288 return; 1289 } 1290 pci_free_consistent(dev->bus->host_pci, size, 1291 vaddr, dma_handle); 1292 return; 1293 #endif 1294 case SSB_BUSTYPE_SSB: 1295 dma_free_coherent(dev->dev, size, vaddr, dma_handle); 1296 return; 1297 default: 1298 __ssb_dma_not_implemented(dev); 1299 } 1300 } 1301 EXPORT_SYMBOL(ssb_dma_free_consistent); 1302 1303 int ssb_bus_may_powerdown(struct ssb_bus *bus) 1304 { 1305 struct ssb_chipcommon *cc; 1306 int err = 0; 1307 1308 /* On buses where more than one core may be working 1309 * at a time, we must not powerdown stuff if there are 1310 * still cores that may want to run. */ 1311 if (bus->bustype == SSB_BUSTYPE_SSB) 1312 goto out; 1313 1314 cc = &bus->chipco; 1315 1316 if (!cc->dev) 1317 goto out; 1318 if (cc->dev->id.revision < 5) 1319 goto out; 1320 1321 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW); 1322 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); 1323 if (err) 1324 goto error; 1325 out: 1326 #ifdef CONFIG_SSB_DEBUG 1327 bus->powered_up = 0; 1328 #endif 1329 return err; 1330 error: 1331 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n"); 1332 goto out; 1333 } 1334 EXPORT_SYMBOL(ssb_bus_may_powerdown); 1335 1336 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl) 1337 { 1338 struct ssb_chipcommon *cc; 1339 int err; 1340 enum ssb_clkmode mode; 1341 1342 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); 1343 if (err) 1344 goto error; 1345 cc = &bus->chipco; 1346 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST; 1347 ssb_chipco_set_clockmode(cc, mode); 1348 1349 #ifdef CONFIG_SSB_DEBUG 1350 bus->powered_up = 1; 1351 #endif 1352 return 0; 1353 error: 1354 ssb_printk(KERN_ERR PFX "Bus powerup failed\n"); 1355 return err; 1356 } 1357 EXPORT_SYMBOL(ssb_bus_powerup); 1358 1359 u32 ssb_admatch_base(u32 adm) 1360 { 1361 u32 base = 0; 1362 1363 switch (adm & SSB_ADM_TYPE) { 1364 case SSB_ADM_TYPE0: 1365 base = (adm & SSB_ADM_BASE0); 1366 break; 1367 case SSB_ADM_TYPE1: 1368 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ 1369 base = (adm & SSB_ADM_BASE1); 1370 break; 1371 case SSB_ADM_TYPE2: 1372 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ 1373 base = (adm & SSB_ADM_BASE2); 1374 break; 1375 default: 1376 SSB_WARN_ON(1); 1377 } 1378 1379 return base; 1380 } 1381 EXPORT_SYMBOL(ssb_admatch_base); 1382 1383 u32 ssb_admatch_size(u32 adm) 1384 { 1385 u32 size = 0; 1386 1387 switch (adm & SSB_ADM_TYPE) { 1388 case SSB_ADM_TYPE0: 1389 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT); 1390 break; 1391 case SSB_ADM_TYPE1: 1392 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ 1393 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT); 1394 break; 1395 case SSB_ADM_TYPE2: 1396 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ 1397 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT); 1398 break; 1399 default: 1400 SSB_WARN_ON(1); 1401 } 1402 size = (1 << (size + 1)); 1403 1404 return size; 1405 } 1406 EXPORT_SYMBOL(ssb_admatch_size); 1407 1408 static int __init ssb_modinit(void) 1409 { 1410 int err; 1411 1412 /* See the comment at the ssb_is_early_boot definition */ 1413 ssb_is_early_boot = 0; 1414 err = bus_register(&ssb_bustype); 1415 if (err) 1416 return err; 1417 1418 /* Maybe we already registered some buses at early boot. 1419 * Check for this and attach them 1420 */ 1421 ssb_buses_lock(); 1422 err = ssb_attach_queued_buses(); 1423 ssb_buses_unlock(); 1424 if (err) { 1425 bus_unregister(&ssb_bustype); 1426 goto out; 1427 } 1428 1429 err = b43_pci_ssb_bridge_init(); 1430 if (err) { 1431 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge " 1432 "initialization failed\n"); 1433 /* don't fail SSB init because of this */ 1434 err = 0; 1435 } 1436 err = ssb_gige_init(); 1437 if (err) { 1438 ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet " 1439 "driver initialization failed\n"); 1440 /* don't fail SSB init because of this */ 1441 err = 0; 1442 } 1443 out: 1444 return err; 1445 } 1446 /* ssb must be initialized after PCI but before the ssb drivers. 1447 * That means we must use some initcall between subsys_initcall 1448 * and device_initcall. */ 1449 fs_initcall(ssb_modinit); 1450 1451 static void __exit ssb_modexit(void) 1452 { 1453 ssb_gige_exit(); 1454 b43_pci_ssb_bridge_exit(); 1455 bus_unregister(&ssb_bustype); 1456 } 1457 module_exit(ssb_modexit) 1458