1 /* 2 * Sonics Silicon Backplane 3 * Subsystem core 4 * 5 * Copyright 2005, Broadcom Corporation 6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> 7 * 8 * Licensed under the GNU/GPL. See COPYING for details. 9 */ 10 11 #include "ssb_private.h" 12 13 #include <linux/delay.h> 14 #include <linux/io.h> 15 #include <linux/ssb/ssb.h> 16 #include <linux/ssb/ssb_regs.h> 17 #include <linux/dma-mapping.h> 18 #include <linux/pci.h> 19 20 #include <pcmcia/cs_types.h> 21 #include <pcmcia/cs.h> 22 #include <pcmcia/cistpl.h> 23 #include <pcmcia/ds.h> 24 25 26 MODULE_DESCRIPTION("Sonics Silicon Backplane driver"); 27 MODULE_LICENSE("GPL"); 28 29 30 /* Temporary list of yet-to-be-attached buses */ 31 static LIST_HEAD(attach_queue); 32 /* List if running buses */ 33 static LIST_HEAD(buses); 34 /* Software ID counter */ 35 static unsigned int next_busnumber; 36 /* buses_mutes locks the two buslists and the next_busnumber. 37 * Don't lock this directly, but use ssb_buses_[un]lock() below. */ 38 static DEFINE_MUTEX(buses_mutex); 39 40 /* There are differences in the codeflow, if the bus is 41 * initialized from early boot, as various needed services 42 * are not available early. This is a mechanism to delay 43 * these initializations to after early boot has finished. 44 * It's also used to avoid mutex locking, as that's not 45 * available and needed early. */ 46 static bool ssb_is_early_boot = 1; 47 48 static void ssb_buses_lock(void); 49 static void ssb_buses_unlock(void); 50 51 52 #ifdef CONFIG_SSB_PCIHOST 53 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev) 54 { 55 struct ssb_bus *bus; 56 57 ssb_buses_lock(); 58 list_for_each_entry(bus, &buses, list) { 59 if (bus->bustype == SSB_BUSTYPE_PCI && 60 bus->host_pci == pdev) 61 goto found; 62 } 63 bus = NULL; 64 found: 65 ssb_buses_unlock(); 66 67 return bus; 68 } 69 #endif /* CONFIG_SSB_PCIHOST */ 70 71 static struct ssb_device *ssb_device_get(struct ssb_device *dev) 72 { 73 if (dev) 74 get_device(dev->dev); 75 return dev; 76 } 77 78 static void ssb_device_put(struct ssb_device *dev) 79 { 80 if (dev) 81 put_device(dev->dev); 82 } 83 84 static int ssb_bus_resume(struct ssb_bus *bus) 85 { 86 int err; 87 88 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); 89 err = ssb_pcmcia_init(bus); 90 if (err) { 91 /* No need to disable XTAL, as we don't have one on PCMCIA. */ 92 return err; 93 } 94 ssb_chipco_resume(&bus->chipco); 95 96 return 0; 97 } 98 99 static int ssb_device_resume(struct device *dev) 100 { 101 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 102 struct ssb_driver *ssb_drv; 103 struct ssb_bus *bus; 104 int err = 0; 105 106 bus = ssb_dev->bus; 107 if (bus->suspend_cnt == bus->nr_devices) { 108 err = ssb_bus_resume(bus); 109 if (err) 110 return err; 111 } 112 bus->suspend_cnt--; 113 if (dev->driver) { 114 ssb_drv = drv_to_ssb_drv(dev->driver); 115 if (ssb_drv && ssb_drv->resume) 116 err = ssb_drv->resume(ssb_dev); 117 if (err) 118 goto out; 119 } 120 out: 121 return err; 122 } 123 124 static void ssb_bus_suspend(struct ssb_bus *bus, pm_message_t state) 125 { 126 ssb_chipco_suspend(&bus->chipco, state); 127 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); 128 129 /* Reset HW state information in memory, so that HW is 130 * completely reinitialized on resume. */ 131 bus->mapped_device = NULL; 132 #ifdef CONFIG_SSB_DRIVER_PCICORE 133 bus->pcicore.setup_done = 0; 134 #endif 135 #ifdef CONFIG_SSB_DEBUG 136 bus->powered_up = 0; 137 #endif 138 } 139 140 static int ssb_device_suspend(struct device *dev, pm_message_t state) 141 { 142 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 143 struct ssb_driver *ssb_drv; 144 struct ssb_bus *bus; 145 int err = 0; 146 147 if (dev->driver) { 148 ssb_drv = drv_to_ssb_drv(dev->driver); 149 if (ssb_drv && ssb_drv->suspend) 150 err = ssb_drv->suspend(ssb_dev, state); 151 if (err) 152 goto out; 153 } 154 155 bus = ssb_dev->bus; 156 bus->suspend_cnt++; 157 if (bus->suspend_cnt == bus->nr_devices) { 158 /* All devices suspended. Shutdown the bus. */ 159 ssb_bus_suspend(bus, state); 160 } 161 162 out: 163 return err; 164 } 165 166 #ifdef CONFIG_SSB_PCIHOST 167 int ssb_devices_freeze(struct ssb_bus *bus) 168 { 169 struct ssb_device *dev; 170 struct ssb_driver *drv; 171 int err = 0; 172 int i; 173 pm_message_t state = PMSG_FREEZE; 174 175 /* First check that we are capable to freeze all devices. */ 176 for (i = 0; i < bus->nr_devices; i++) { 177 dev = &(bus->devices[i]); 178 if (!dev->dev || 179 !dev->dev->driver || 180 !device_is_registered(dev->dev)) 181 continue; 182 drv = drv_to_ssb_drv(dev->dev->driver); 183 if (!drv) 184 continue; 185 if (!drv->suspend) { 186 /* Nope, can't suspend this one. */ 187 return -EOPNOTSUPP; 188 } 189 } 190 /* Now suspend all devices */ 191 for (i = 0; i < bus->nr_devices; i++) { 192 dev = &(bus->devices[i]); 193 if (!dev->dev || 194 !dev->dev->driver || 195 !device_is_registered(dev->dev)) 196 continue; 197 drv = drv_to_ssb_drv(dev->dev->driver); 198 if (!drv) 199 continue; 200 err = drv->suspend(dev, state); 201 if (err) { 202 ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n", 203 dev->dev->bus_id); 204 goto err_unwind; 205 } 206 } 207 208 return 0; 209 err_unwind: 210 for (i--; i >= 0; i--) { 211 dev = &(bus->devices[i]); 212 if (!dev->dev || 213 !dev->dev->driver || 214 !device_is_registered(dev->dev)) 215 continue; 216 drv = drv_to_ssb_drv(dev->dev->driver); 217 if (!drv) 218 continue; 219 if (drv->resume) 220 drv->resume(dev); 221 } 222 return err; 223 } 224 225 int ssb_devices_thaw(struct ssb_bus *bus) 226 { 227 struct ssb_device *dev; 228 struct ssb_driver *drv; 229 int err; 230 int i; 231 232 for (i = 0; i < bus->nr_devices; i++) { 233 dev = &(bus->devices[i]); 234 if (!dev->dev || 235 !dev->dev->driver || 236 !device_is_registered(dev->dev)) 237 continue; 238 drv = drv_to_ssb_drv(dev->dev->driver); 239 if (!drv) 240 continue; 241 if (SSB_WARN_ON(!drv->resume)) 242 continue; 243 err = drv->resume(dev); 244 if (err) { 245 ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n", 246 dev->dev->bus_id); 247 } 248 } 249 250 return 0; 251 } 252 #endif /* CONFIG_SSB_PCIHOST */ 253 254 static void ssb_device_shutdown(struct device *dev) 255 { 256 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 257 struct ssb_driver *ssb_drv; 258 259 if (!dev->driver) 260 return; 261 ssb_drv = drv_to_ssb_drv(dev->driver); 262 if (ssb_drv && ssb_drv->shutdown) 263 ssb_drv->shutdown(ssb_dev); 264 } 265 266 static int ssb_device_remove(struct device *dev) 267 { 268 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 269 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver); 270 271 if (ssb_drv && ssb_drv->remove) 272 ssb_drv->remove(ssb_dev); 273 ssb_device_put(ssb_dev); 274 275 return 0; 276 } 277 278 static int ssb_device_probe(struct device *dev) 279 { 280 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 281 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver); 282 int err = 0; 283 284 ssb_device_get(ssb_dev); 285 if (ssb_drv && ssb_drv->probe) 286 err = ssb_drv->probe(ssb_dev, &ssb_dev->id); 287 if (err) 288 ssb_device_put(ssb_dev); 289 290 return err; 291 } 292 293 static int ssb_match_devid(const struct ssb_device_id *tabid, 294 const struct ssb_device_id *devid) 295 { 296 if ((tabid->vendor != devid->vendor) && 297 tabid->vendor != SSB_ANY_VENDOR) 298 return 0; 299 if ((tabid->coreid != devid->coreid) && 300 tabid->coreid != SSB_ANY_ID) 301 return 0; 302 if ((tabid->revision != devid->revision) && 303 tabid->revision != SSB_ANY_REV) 304 return 0; 305 return 1; 306 } 307 308 static int ssb_bus_match(struct device *dev, struct device_driver *drv) 309 { 310 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 311 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv); 312 const struct ssb_device_id *id; 313 314 for (id = ssb_drv->id_table; 315 id->vendor || id->coreid || id->revision; 316 id++) { 317 if (ssb_match_devid(id, &ssb_dev->id)) 318 return 1; /* found */ 319 } 320 321 return 0; 322 } 323 324 static int ssb_device_uevent(struct device *dev, char **envp, int num_envp, 325 char *buffer, int buffer_size) 326 { 327 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 328 int ret, i = 0, length = 0; 329 330 if (!dev) 331 return -ENODEV; 332 333 ret = add_uevent_var(envp, num_envp, &i, 334 buffer, buffer_size, &length, 335 "MODALIAS=ssb:v%04Xid%04Xrev%02X", 336 ssb_dev->id.vendor, ssb_dev->id.coreid, 337 ssb_dev->id.revision); 338 envp[i] = NULL; 339 340 return ret; 341 } 342 343 static struct bus_type ssb_bustype = { 344 .name = "ssb", 345 .match = ssb_bus_match, 346 .probe = ssb_device_probe, 347 .remove = ssb_device_remove, 348 .shutdown = ssb_device_shutdown, 349 .suspend = ssb_device_suspend, 350 .resume = ssb_device_resume, 351 .uevent = ssb_device_uevent, 352 }; 353 354 static void ssb_buses_lock(void) 355 { 356 /* See the comment at the ssb_is_early_boot definition */ 357 if (!ssb_is_early_boot) 358 mutex_lock(&buses_mutex); 359 } 360 361 static void ssb_buses_unlock(void) 362 { 363 /* See the comment at the ssb_is_early_boot definition */ 364 if (!ssb_is_early_boot) 365 mutex_unlock(&buses_mutex); 366 } 367 368 static void ssb_devices_unregister(struct ssb_bus *bus) 369 { 370 struct ssb_device *sdev; 371 int i; 372 373 for (i = bus->nr_devices - 1; i >= 0; i--) { 374 sdev = &(bus->devices[i]); 375 if (sdev->dev) 376 device_unregister(sdev->dev); 377 } 378 } 379 380 void ssb_bus_unregister(struct ssb_bus *bus) 381 { 382 ssb_buses_lock(); 383 ssb_devices_unregister(bus); 384 list_del(&bus->list); 385 ssb_buses_unlock(); 386 387 /* ssb_pcmcia_exit(bus); */ 388 ssb_pci_exit(bus); 389 ssb_iounmap(bus); 390 } 391 EXPORT_SYMBOL(ssb_bus_unregister); 392 393 static void ssb_release_dev(struct device *dev) 394 { 395 struct __ssb_dev_wrapper *devwrap; 396 397 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev); 398 kfree(devwrap); 399 } 400 401 static int ssb_devices_register(struct ssb_bus *bus) 402 { 403 struct ssb_device *sdev; 404 struct device *dev; 405 struct __ssb_dev_wrapper *devwrap; 406 int i, err = 0; 407 int dev_idx = 0; 408 409 for (i = 0; i < bus->nr_devices; i++) { 410 sdev = &(bus->devices[i]); 411 412 /* We don't register SSB-system devices to the kernel, 413 * as the drivers for them are built into SSB. */ 414 switch (sdev->id.coreid) { 415 case SSB_DEV_CHIPCOMMON: 416 case SSB_DEV_PCI: 417 case SSB_DEV_PCIE: 418 case SSB_DEV_PCMCIA: 419 case SSB_DEV_MIPS: 420 case SSB_DEV_MIPS_3302: 421 case SSB_DEV_EXTIF: 422 continue; 423 } 424 425 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL); 426 if (!devwrap) { 427 ssb_printk(KERN_ERR PFX 428 "Could not allocate device\n"); 429 err = -ENOMEM; 430 goto error; 431 } 432 dev = &devwrap->dev; 433 devwrap->sdev = sdev; 434 435 dev->release = ssb_release_dev; 436 dev->bus = &ssb_bustype; 437 snprintf(dev->bus_id, sizeof(dev->bus_id), 438 "ssb%u:%d", bus->busnumber, dev_idx); 439 440 switch (bus->bustype) { 441 case SSB_BUSTYPE_PCI: 442 #ifdef CONFIG_SSB_PCIHOST 443 sdev->irq = bus->host_pci->irq; 444 dev->parent = &bus->host_pci->dev; 445 #endif 446 break; 447 case SSB_BUSTYPE_PCMCIA: 448 #ifdef CONFIG_SSB_PCMCIAHOST 449 dev->parent = &bus->host_pcmcia->dev; 450 #endif 451 break; 452 case SSB_BUSTYPE_SSB: 453 break; 454 } 455 456 sdev->dev = dev; 457 err = device_register(dev); 458 if (err) { 459 ssb_printk(KERN_ERR PFX 460 "Could not register %s\n", 461 dev->bus_id); 462 /* Set dev to NULL to not unregister 463 * dev on error unwinding. */ 464 sdev->dev = NULL; 465 kfree(devwrap); 466 goto error; 467 } 468 dev_idx++; 469 } 470 471 return 0; 472 error: 473 /* Unwind the already registered devices. */ 474 ssb_devices_unregister(bus); 475 return err; 476 } 477 478 /* Needs ssb_buses_lock() */ 479 static int ssb_attach_queued_buses(void) 480 { 481 struct ssb_bus *bus, *n; 482 int err = 0; 483 int drop_them_all = 0; 484 485 list_for_each_entry_safe(bus, n, &attach_queue, list) { 486 if (drop_them_all) { 487 list_del(&bus->list); 488 continue; 489 } 490 /* Can't init the PCIcore in ssb_bus_register(), as that 491 * is too early in boot for embedded systems 492 * (no udelay() available). So do it here in attach stage. 493 */ 494 err = ssb_bus_powerup(bus, 0); 495 if (err) 496 goto error; 497 ssb_pcicore_init(&bus->pcicore); 498 ssb_bus_may_powerdown(bus); 499 500 err = ssb_devices_register(bus); 501 error: 502 if (err) { 503 drop_them_all = 1; 504 list_del(&bus->list); 505 continue; 506 } 507 list_move_tail(&bus->list, &buses); 508 } 509 510 return err; 511 } 512 513 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset) 514 { 515 struct ssb_bus *bus = dev->bus; 516 517 offset += dev->core_index * SSB_CORE_SIZE; 518 return readw(bus->mmio + offset); 519 } 520 521 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset) 522 { 523 struct ssb_bus *bus = dev->bus; 524 525 offset += dev->core_index * SSB_CORE_SIZE; 526 return readl(bus->mmio + offset); 527 } 528 529 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value) 530 { 531 struct ssb_bus *bus = dev->bus; 532 533 offset += dev->core_index * SSB_CORE_SIZE; 534 writew(value, bus->mmio + offset); 535 } 536 537 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value) 538 { 539 struct ssb_bus *bus = dev->bus; 540 541 offset += dev->core_index * SSB_CORE_SIZE; 542 writel(value, bus->mmio + offset); 543 } 544 545 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */ 546 static const struct ssb_bus_ops ssb_ssb_ops = { 547 .read16 = ssb_ssb_read16, 548 .read32 = ssb_ssb_read32, 549 .write16 = ssb_ssb_write16, 550 .write32 = ssb_ssb_write32, 551 }; 552 553 static int ssb_fetch_invariants(struct ssb_bus *bus, 554 ssb_invariants_func_t get_invariants) 555 { 556 struct ssb_init_invariants iv; 557 int err; 558 559 memset(&iv, 0, sizeof(iv)); 560 err = get_invariants(bus, &iv); 561 if (err) 562 goto out; 563 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo)); 564 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom)); 565 out: 566 return err; 567 } 568 569 static int ssb_bus_register(struct ssb_bus *bus, 570 ssb_invariants_func_t get_invariants, 571 unsigned long baseaddr) 572 { 573 int err; 574 575 spin_lock_init(&bus->bar_lock); 576 INIT_LIST_HEAD(&bus->list); 577 578 /* Powerup the bus */ 579 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); 580 if (err) 581 goto out; 582 ssb_buses_lock(); 583 bus->busnumber = next_busnumber; 584 /* Scan for devices (cores) */ 585 err = ssb_bus_scan(bus, baseaddr); 586 if (err) 587 goto err_disable_xtal; 588 589 /* Init PCI-host device (if any) */ 590 err = ssb_pci_init(bus); 591 if (err) 592 goto err_unmap; 593 /* Init PCMCIA-host device (if any) */ 594 err = ssb_pcmcia_init(bus); 595 if (err) 596 goto err_pci_exit; 597 598 /* Initialize basic system devices (if available) */ 599 err = ssb_bus_powerup(bus, 0); 600 if (err) 601 goto err_pcmcia_exit; 602 ssb_chipcommon_init(&bus->chipco); 603 ssb_mipscore_init(&bus->mipscore); 604 err = ssb_fetch_invariants(bus, get_invariants); 605 if (err) { 606 ssb_bus_may_powerdown(bus); 607 goto err_pcmcia_exit; 608 } 609 ssb_bus_may_powerdown(bus); 610 611 /* Queue it for attach. 612 * See the comment at the ssb_is_early_boot definition. */ 613 list_add_tail(&bus->list, &attach_queue); 614 if (!ssb_is_early_boot) { 615 /* This is not early boot, so we must attach the bus now */ 616 err = ssb_attach_queued_buses(); 617 if (err) 618 goto err_dequeue; 619 } 620 next_busnumber++; 621 ssb_buses_unlock(); 622 623 out: 624 return err; 625 626 err_dequeue: 627 list_del(&bus->list); 628 err_pcmcia_exit: 629 /* ssb_pcmcia_exit(bus); */ 630 err_pci_exit: 631 ssb_pci_exit(bus); 632 err_unmap: 633 ssb_iounmap(bus); 634 err_disable_xtal: 635 ssb_buses_unlock(); 636 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); 637 return err; 638 } 639 640 #ifdef CONFIG_SSB_PCIHOST 641 int ssb_bus_pcibus_register(struct ssb_bus *bus, 642 struct pci_dev *host_pci) 643 { 644 int err; 645 646 bus->bustype = SSB_BUSTYPE_PCI; 647 bus->host_pci = host_pci; 648 bus->ops = &ssb_pci_ops; 649 650 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0); 651 if (!err) { 652 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on " 653 "PCI device %s\n", host_pci->dev.bus_id); 654 } 655 656 return err; 657 } 658 EXPORT_SYMBOL(ssb_bus_pcibus_register); 659 #endif /* CONFIG_SSB_PCIHOST */ 660 661 #ifdef CONFIG_SSB_PCMCIAHOST 662 int ssb_bus_pcmciabus_register(struct ssb_bus *bus, 663 struct pcmcia_device *pcmcia_dev, 664 unsigned long baseaddr) 665 { 666 int err; 667 668 bus->bustype = SSB_BUSTYPE_PCMCIA; 669 bus->host_pcmcia = pcmcia_dev; 670 bus->ops = &ssb_pcmcia_ops; 671 672 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr); 673 if (!err) { 674 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on " 675 "PCMCIA device %s\n", pcmcia_dev->devname); 676 } 677 678 return err; 679 } 680 EXPORT_SYMBOL(ssb_bus_pcmciabus_register); 681 #endif /* CONFIG_SSB_PCMCIAHOST */ 682 683 int ssb_bus_ssbbus_register(struct ssb_bus *bus, 684 unsigned long baseaddr, 685 ssb_invariants_func_t get_invariants) 686 { 687 int err; 688 689 bus->bustype = SSB_BUSTYPE_SSB; 690 bus->ops = &ssb_ssb_ops; 691 692 err = ssb_bus_register(bus, get_invariants, baseaddr); 693 if (!err) { 694 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at " 695 "address 0x%08lX\n", baseaddr); 696 } 697 698 return err; 699 } 700 701 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner) 702 { 703 drv->drv.name = drv->name; 704 drv->drv.bus = &ssb_bustype; 705 drv->drv.owner = owner; 706 707 return driver_register(&drv->drv); 708 } 709 EXPORT_SYMBOL(__ssb_driver_register); 710 711 void ssb_driver_unregister(struct ssb_driver *drv) 712 { 713 driver_unregister(&drv->drv); 714 } 715 EXPORT_SYMBOL(ssb_driver_unregister); 716 717 void ssb_set_devtypedata(struct ssb_device *dev, void *data) 718 { 719 struct ssb_bus *bus = dev->bus; 720 struct ssb_device *ent; 721 int i; 722 723 for (i = 0; i < bus->nr_devices; i++) { 724 ent = &(bus->devices[i]); 725 if (ent->id.vendor != dev->id.vendor) 726 continue; 727 if (ent->id.coreid != dev->id.coreid) 728 continue; 729 730 ent->devtypedata = data; 731 } 732 } 733 EXPORT_SYMBOL(ssb_set_devtypedata); 734 735 static u32 clkfactor_f6_resolve(u32 v) 736 { 737 /* map the magic values */ 738 switch (v) { 739 case SSB_CHIPCO_CLK_F6_2: 740 return 2; 741 case SSB_CHIPCO_CLK_F6_3: 742 return 3; 743 case SSB_CHIPCO_CLK_F6_4: 744 return 4; 745 case SSB_CHIPCO_CLK_F6_5: 746 return 5; 747 case SSB_CHIPCO_CLK_F6_6: 748 return 6; 749 case SSB_CHIPCO_CLK_F6_7: 750 return 7; 751 } 752 return 0; 753 } 754 755 /* Calculate the speed the backplane would run at a given set of clockcontrol values */ 756 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m) 757 { 758 u32 n1, n2, clock, m1, m2, m3, mc; 759 760 n1 = (n & SSB_CHIPCO_CLK_N1); 761 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT); 762 763 switch (plltype) { 764 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */ 765 if (m & SSB_CHIPCO_CLK_T6_MMASK) 766 return SSB_CHIPCO_CLK_T6_M0; 767 return SSB_CHIPCO_CLK_T6_M1; 768 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ 769 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ 770 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ 771 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ 772 n1 = clkfactor_f6_resolve(n1); 773 n2 += SSB_CHIPCO_CLK_F5_BIAS; 774 break; 775 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */ 776 n1 += SSB_CHIPCO_CLK_T2_BIAS; 777 n2 += SSB_CHIPCO_CLK_T2_BIAS; 778 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7))); 779 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23))); 780 break; 781 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */ 782 return 100000000; 783 default: 784 SSB_WARN_ON(1); 785 } 786 787 switch (plltype) { 788 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ 789 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ 790 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2; 791 break; 792 default: 793 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2; 794 } 795 if (!clock) 796 return 0; 797 798 m1 = (m & SSB_CHIPCO_CLK_M1); 799 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT); 800 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT); 801 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT); 802 803 switch (plltype) { 804 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ 805 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ 806 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ 807 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ 808 m1 = clkfactor_f6_resolve(m1); 809 if ((plltype == SSB_PLLTYPE_1) || 810 (plltype == SSB_PLLTYPE_3)) 811 m2 += SSB_CHIPCO_CLK_F5_BIAS; 812 else 813 m2 = clkfactor_f6_resolve(m2); 814 m3 = clkfactor_f6_resolve(m3); 815 816 switch (mc) { 817 case SSB_CHIPCO_CLK_MC_BYPASS: 818 return clock; 819 case SSB_CHIPCO_CLK_MC_M1: 820 return (clock / m1); 821 case SSB_CHIPCO_CLK_MC_M1M2: 822 return (clock / (m1 * m2)); 823 case SSB_CHIPCO_CLK_MC_M1M2M3: 824 return (clock / (m1 * m2 * m3)); 825 case SSB_CHIPCO_CLK_MC_M1M3: 826 return (clock / (m1 * m3)); 827 } 828 return 0; 829 case SSB_PLLTYPE_2: 830 m1 += SSB_CHIPCO_CLK_T2_BIAS; 831 m2 += SSB_CHIPCO_CLK_T2M2_BIAS; 832 m3 += SSB_CHIPCO_CLK_T2_BIAS; 833 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7))); 834 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10))); 835 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7))); 836 837 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP)) 838 clock /= m1; 839 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP)) 840 clock /= m2; 841 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP)) 842 clock /= m3; 843 return clock; 844 default: 845 SSB_WARN_ON(1); 846 } 847 return 0; 848 } 849 850 /* Get the current speed the backplane is running at */ 851 u32 ssb_clockspeed(struct ssb_bus *bus) 852 { 853 u32 rate; 854 u32 plltype; 855 u32 clkctl_n, clkctl_m; 856 857 if (ssb_extif_available(&bus->extif)) 858 ssb_extif_get_clockcontrol(&bus->extif, &plltype, 859 &clkctl_n, &clkctl_m); 860 else if (bus->chipco.dev) 861 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype, 862 &clkctl_n, &clkctl_m); 863 else 864 return 0; 865 866 if (bus->chip_id == 0x5365) { 867 rate = 100000000; 868 } else { 869 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m); 870 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */ 871 rate /= 2; 872 } 873 874 return rate; 875 } 876 EXPORT_SYMBOL(ssb_clockspeed); 877 878 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev) 879 { 880 /* The REJECT bit changed position in TMSLOW between 881 * Backplane revisions. */ 882 switch (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV) { 883 case SSB_IDLOW_SSBREV_22: 884 return SSB_TMSLOW_REJECT_22; 885 case SSB_IDLOW_SSBREV_23: 886 return SSB_TMSLOW_REJECT_23; 887 default: 888 WARN_ON(1); 889 } 890 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23); 891 } 892 893 int ssb_device_is_enabled(struct ssb_device *dev) 894 { 895 u32 val; 896 u32 reject; 897 898 reject = ssb_tmslow_reject_bitmask(dev); 899 val = ssb_read32(dev, SSB_TMSLOW); 900 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject; 901 902 return (val == SSB_TMSLOW_CLOCK); 903 } 904 EXPORT_SYMBOL(ssb_device_is_enabled); 905 906 static void ssb_flush_tmslow(struct ssb_device *dev) 907 { 908 /* Make _really_ sure the device has finished the TMSLOW 909 * register write transaction, as we risk running into 910 * a machine check exception otherwise. 911 * Do this by reading the register back to commit the 912 * PCI write and delay an additional usec for the device 913 * to react to the change. */ 914 ssb_read32(dev, SSB_TMSLOW); 915 udelay(1); 916 } 917 918 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags) 919 { 920 u32 val; 921 922 ssb_device_disable(dev, core_specific_flags); 923 ssb_write32(dev, SSB_TMSLOW, 924 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK | 925 SSB_TMSLOW_FGC | core_specific_flags); 926 ssb_flush_tmslow(dev); 927 928 /* Clear SERR if set. This is a hw bug workaround. */ 929 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR) 930 ssb_write32(dev, SSB_TMSHIGH, 0); 931 932 val = ssb_read32(dev, SSB_IMSTATE); 933 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) { 934 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO); 935 ssb_write32(dev, SSB_IMSTATE, val); 936 } 937 938 ssb_write32(dev, SSB_TMSLOW, 939 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC | 940 core_specific_flags); 941 ssb_flush_tmslow(dev); 942 943 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK | 944 core_specific_flags); 945 ssb_flush_tmslow(dev); 946 } 947 EXPORT_SYMBOL(ssb_device_enable); 948 949 /* Wait for a bit in a register to get set or unset. 950 * timeout is in units of ten-microseconds */ 951 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask, 952 int timeout, int set) 953 { 954 int i; 955 u32 val; 956 957 for (i = 0; i < timeout; i++) { 958 val = ssb_read32(dev, reg); 959 if (set) { 960 if (val & bitmask) 961 return 0; 962 } else { 963 if (!(val & bitmask)) 964 return 0; 965 } 966 udelay(10); 967 } 968 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on " 969 "register %04X to %s.\n", 970 bitmask, reg, (set ? "set" : "clear")); 971 972 return -ETIMEDOUT; 973 } 974 975 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags) 976 { 977 u32 reject; 978 979 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET) 980 return; 981 982 reject = ssb_tmslow_reject_bitmask(dev); 983 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK); 984 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1); 985 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0); 986 ssb_write32(dev, SSB_TMSLOW, 987 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | 988 reject | SSB_TMSLOW_RESET | 989 core_specific_flags); 990 ssb_flush_tmslow(dev); 991 992 ssb_write32(dev, SSB_TMSLOW, 993 reject | SSB_TMSLOW_RESET | 994 core_specific_flags); 995 ssb_flush_tmslow(dev); 996 } 997 EXPORT_SYMBOL(ssb_device_disable); 998 999 u32 ssb_dma_translation(struct ssb_device *dev) 1000 { 1001 switch (dev->bus->bustype) { 1002 case SSB_BUSTYPE_SSB: 1003 return 0; 1004 case SSB_BUSTYPE_PCI: 1005 case SSB_BUSTYPE_PCMCIA: 1006 return SSB_PCI_DMA; 1007 } 1008 return 0; 1009 } 1010 EXPORT_SYMBOL(ssb_dma_translation); 1011 1012 int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask) 1013 { 1014 struct device *dev = ssb_dev->dev; 1015 1016 #ifdef CONFIG_SSB_PCIHOST 1017 if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI && 1018 !dma_supported(dev, mask)) 1019 return -EIO; 1020 #endif 1021 dev->coherent_dma_mask = mask; 1022 dev->dma_mask = &dev->coherent_dma_mask; 1023 1024 return 0; 1025 } 1026 EXPORT_SYMBOL(ssb_dma_set_mask); 1027 1028 int ssb_bus_may_powerdown(struct ssb_bus *bus) 1029 { 1030 struct ssb_chipcommon *cc; 1031 int err = 0; 1032 1033 /* On buses where more than one core may be working 1034 * at a time, we must not powerdown stuff if there are 1035 * still cores that may want to run. */ 1036 if (bus->bustype == SSB_BUSTYPE_SSB) 1037 goto out; 1038 1039 cc = &bus->chipco; 1040 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW); 1041 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); 1042 if (err) 1043 goto error; 1044 out: 1045 #ifdef CONFIG_SSB_DEBUG 1046 bus->powered_up = 0; 1047 #endif 1048 return err; 1049 error: 1050 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n"); 1051 goto out; 1052 } 1053 EXPORT_SYMBOL(ssb_bus_may_powerdown); 1054 1055 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl) 1056 { 1057 struct ssb_chipcommon *cc; 1058 int err; 1059 enum ssb_clkmode mode; 1060 1061 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); 1062 if (err) 1063 goto error; 1064 cc = &bus->chipco; 1065 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST; 1066 ssb_chipco_set_clockmode(cc, mode); 1067 1068 #ifdef CONFIG_SSB_DEBUG 1069 bus->powered_up = 1; 1070 #endif 1071 return 0; 1072 error: 1073 ssb_printk(KERN_ERR PFX "Bus powerup failed\n"); 1074 return err; 1075 } 1076 EXPORT_SYMBOL(ssb_bus_powerup); 1077 1078 u32 ssb_admatch_base(u32 adm) 1079 { 1080 u32 base = 0; 1081 1082 switch (adm & SSB_ADM_TYPE) { 1083 case SSB_ADM_TYPE0: 1084 base = (adm & SSB_ADM_BASE0); 1085 break; 1086 case SSB_ADM_TYPE1: 1087 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ 1088 base = (adm & SSB_ADM_BASE1); 1089 break; 1090 case SSB_ADM_TYPE2: 1091 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ 1092 base = (adm & SSB_ADM_BASE2); 1093 break; 1094 default: 1095 SSB_WARN_ON(1); 1096 } 1097 1098 return base; 1099 } 1100 EXPORT_SYMBOL(ssb_admatch_base); 1101 1102 u32 ssb_admatch_size(u32 adm) 1103 { 1104 u32 size = 0; 1105 1106 switch (adm & SSB_ADM_TYPE) { 1107 case SSB_ADM_TYPE0: 1108 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT); 1109 break; 1110 case SSB_ADM_TYPE1: 1111 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ 1112 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT); 1113 break; 1114 case SSB_ADM_TYPE2: 1115 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ 1116 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT); 1117 break; 1118 default: 1119 SSB_WARN_ON(1); 1120 } 1121 size = (1 << (size + 1)); 1122 1123 return size; 1124 } 1125 EXPORT_SYMBOL(ssb_admatch_size); 1126 1127 static int __init ssb_modinit(void) 1128 { 1129 int err; 1130 1131 /* See the comment at the ssb_is_early_boot definition */ 1132 ssb_is_early_boot = 0; 1133 err = bus_register(&ssb_bustype); 1134 if (err) 1135 return err; 1136 1137 /* Maybe we already registered some buses at early boot. 1138 * Check for this and attach them 1139 */ 1140 ssb_buses_lock(); 1141 err = ssb_attach_queued_buses(); 1142 ssb_buses_unlock(); 1143 if (err) 1144 bus_unregister(&ssb_bustype); 1145 1146 err = b43_pci_ssb_bridge_init(); 1147 if (err) { 1148 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge " 1149 "initialization failed"); 1150 /* don't fail SSB init because of this */ 1151 err = 0; 1152 } 1153 1154 return err; 1155 } 1156 subsys_initcall(ssb_modinit); 1157 1158 static void __exit ssb_modexit(void) 1159 { 1160 b43_pci_ssb_bridge_exit(); 1161 bus_unregister(&ssb_bustype); 1162 } 1163 module_exit(ssb_modexit) 1164