1 /* 2 * Sonics Silicon Backplane 3 * GPIO driver 4 * 5 * Copyright 2011, Broadcom Corporation 6 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de> 7 * 8 * Licensed under the GNU/GPL. See COPYING for details. 9 */ 10 11 #include "ssb_private.h" 12 13 #include <linux/gpio/driver.h> 14 #include <linux/irq.h> 15 #include <linux/interrupt.h> 16 #include <linux/irqdomain.h> 17 #include <linux/export.h> 18 #include <linux/ssb/ssb.h> 19 20 21 /************************************************** 22 * Shared 23 **************************************************/ 24 25 #if IS_ENABLED(CONFIG_SSB_EMBEDDED) 26 static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned int gpio) 27 { 28 struct ssb_bus *bus = gpiochip_get_data(chip); 29 30 if (bus->bustype == SSB_BUSTYPE_SSB) 31 return irq_find_mapping(bus->irq_domain, gpio); 32 else 33 return -EINVAL; 34 } 35 #endif 36 37 /************************************************** 38 * ChipCommon 39 **************************************************/ 40 41 static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned int gpio) 42 { 43 struct ssb_bus *bus = gpiochip_get_data(chip); 44 45 return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio); 46 } 47 48 static int ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned int gpio, 49 int value) 50 { 51 struct ssb_bus *bus = gpiochip_get_data(chip); 52 53 ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0); 54 55 return 0; 56 } 57 58 static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip, 59 unsigned int gpio) 60 { 61 struct ssb_bus *bus = gpiochip_get_data(chip); 62 63 ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 0); 64 return 0; 65 } 66 67 static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip, 68 unsigned int gpio, int value) 69 { 70 struct ssb_bus *bus = gpiochip_get_data(chip); 71 72 ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 1 << gpio); 73 ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0); 74 return 0; 75 } 76 77 static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned int gpio) 78 { 79 struct ssb_bus *bus = gpiochip_get_data(chip); 80 81 ssb_chipco_gpio_control(&bus->chipco, 1 << gpio, 0); 82 /* clear pulldown */ 83 ssb_chipco_gpio_pulldown(&bus->chipco, 1 << gpio, 0); 84 /* Set pullup */ 85 ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 1 << gpio); 86 87 return 0; 88 } 89 90 static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned int gpio) 91 { 92 struct ssb_bus *bus = gpiochip_get_data(chip); 93 94 /* clear pullup */ 95 ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0); 96 } 97 98 #if IS_ENABLED(CONFIG_SSB_EMBEDDED) 99 static void ssb_gpio_irq_chipco_mask(struct irq_data *d) 100 { 101 struct ssb_bus *bus = irq_data_get_irq_chip_data(d); 102 int gpio = irqd_to_hwirq(d); 103 104 ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), 0); 105 } 106 107 static void ssb_gpio_irq_chipco_unmask(struct irq_data *d) 108 { 109 struct ssb_bus *bus = irq_data_get_irq_chip_data(d); 110 int gpio = irqd_to_hwirq(d); 111 u32 val = ssb_chipco_gpio_in(&bus->chipco, BIT(gpio)); 112 113 ssb_chipco_gpio_polarity(&bus->chipco, BIT(gpio), val); 114 ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), BIT(gpio)); 115 } 116 117 static struct irq_chip ssb_gpio_irq_chipco_chip = { 118 .name = "SSB-GPIO-CC", 119 .irq_mask = ssb_gpio_irq_chipco_mask, 120 .irq_unmask = ssb_gpio_irq_chipco_unmask, 121 }; 122 123 static irqreturn_t ssb_gpio_irq_chipco_handler(int irq, void *dev_id) 124 { 125 struct ssb_bus *bus = dev_id; 126 struct ssb_chipcommon *chipco = &bus->chipco; 127 u32 val = chipco_read32(chipco, SSB_CHIPCO_GPIOIN); 128 u32 mask = chipco_read32(chipco, SSB_CHIPCO_GPIOIRQ); 129 u32 pol = chipco_read32(chipco, SSB_CHIPCO_GPIOPOL); 130 unsigned long irqs = (val ^ pol) & mask; 131 int gpio; 132 133 if (!irqs) 134 return IRQ_NONE; 135 136 for_each_set_bit(gpio, &irqs, bus->gpio.ngpio) 137 generic_handle_domain_irq_safe(bus->irq_domain, gpio); 138 139 ssb_chipco_gpio_polarity(chipco, irqs, val & irqs); 140 141 return IRQ_HANDLED; 142 } 143 144 static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus) 145 { 146 struct ssb_chipcommon *chipco = &bus->chipco; 147 struct gpio_chip *chip = &bus->gpio; 148 int gpio, hwirq, err; 149 150 if (bus->bustype != SSB_BUSTYPE_SSB) 151 return 0; 152 153 bus->irq_domain = irq_domain_create_linear(NULL, chip->ngpio, &irq_domain_simple_ops, 154 chipco); 155 if (!bus->irq_domain) { 156 err = -ENODEV; 157 goto err_irq_domain; 158 } 159 for (gpio = 0; gpio < chip->ngpio; gpio++) { 160 int irq = irq_create_mapping(bus->irq_domain, gpio); 161 162 irq_set_chip_data(irq, bus); 163 irq_set_chip_and_handler(irq, &ssb_gpio_irq_chipco_chip, 164 handle_simple_irq); 165 } 166 167 hwirq = ssb_mips_irq(bus->chipco.dev) + 2; 168 err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED, 169 "gpio", bus); 170 if (err) 171 goto err_req_irq; 172 173 ssb_chipco_gpio_intmask(&bus->chipco, ~0, 0); 174 chipco_set32(chipco, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO); 175 176 return 0; 177 178 err_req_irq: 179 for (gpio = 0; gpio < chip->ngpio; gpio++) { 180 int irq = irq_find_mapping(bus->irq_domain, gpio); 181 182 irq_dispose_mapping(irq); 183 } 184 irq_domain_remove(bus->irq_domain); 185 err_irq_domain: 186 return err; 187 } 188 189 static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus) 190 { 191 struct ssb_chipcommon *chipco = &bus->chipco; 192 struct gpio_chip *chip = &bus->gpio; 193 int gpio; 194 195 if (bus->bustype != SSB_BUSTYPE_SSB) 196 return; 197 198 chipco_mask32(chipco, SSB_CHIPCO_IRQMASK, ~SSB_CHIPCO_IRQ_GPIO); 199 free_irq(ssb_mips_irq(bus->chipco.dev) + 2, chipco); 200 for (gpio = 0; gpio < chip->ngpio; gpio++) { 201 int irq = irq_find_mapping(bus->irq_domain, gpio); 202 203 irq_dispose_mapping(irq); 204 } 205 irq_domain_remove(bus->irq_domain); 206 } 207 #else 208 static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus) 209 { 210 return 0; 211 } 212 213 static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus) 214 { 215 } 216 #endif 217 218 static int ssb_gpio_chipco_init(struct ssb_bus *bus) 219 { 220 struct gpio_chip *chip = &bus->gpio; 221 int err; 222 223 chip->label = "ssb_chipco_gpio"; 224 chip->owner = THIS_MODULE; 225 chip->request = ssb_gpio_chipco_request; 226 chip->free = ssb_gpio_chipco_free; 227 chip->get = ssb_gpio_chipco_get_value; 228 chip->set_rv = ssb_gpio_chipco_set_value; 229 chip->direction_input = ssb_gpio_chipco_direction_input; 230 chip->direction_output = ssb_gpio_chipco_direction_output; 231 #if IS_ENABLED(CONFIG_SSB_EMBEDDED) 232 chip->to_irq = ssb_gpio_to_irq; 233 #endif 234 chip->ngpio = 16; 235 /* There is just one SoC in one device and its GPIO addresses should be 236 * deterministic to address them more easily. The other buses could get 237 * a random base number. 238 */ 239 if (bus->bustype == SSB_BUSTYPE_SSB) 240 chip->base = 0; 241 else 242 chip->base = -1; 243 244 err = ssb_gpio_irq_chipco_domain_init(bus); 245 if (err) 246 return err; 247 248 err = gpiochip_add_data(chip, bus); 249 if (err) { 250 ssb_gpio_irq_chipco_domain_exit(bus); 251 return err; 252 } 253 254 return 0; 255 } 256 257 /************************************************** 258 * EXTIF 259 **************************************************/ 260 261 #ifdef CONFIG_SSB_DRIVER_EXTIF 262 263 static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned int gpio) 264 { 265 struct ssb_bus *bus = gpiochip_get_data(chip); 266 267 return !!ssb_extif_gpio_in(&bus->extif, 1 << gpio); 268 } 269 270 static int ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned int gpio, 271 int value) 272 { 273 struct ssb_bus *bus = gpiochip_get_data(chip); 274 275 ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0); 276 277 return 0; 278 } 279 280 static int ssb_gpio_extif_direction_input(struct gpio_chip *chip, 281 unsigned int gpio) 282 { 283 struct ssb_bus *bus = gpiochip_get_data(chip); 284 285 ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 0); 286 return 0; 287 } 288 289 static int ssb_gpio_extif_direction_output(struct gpio_chip *chip, 290 unsigned int gpio, int value) 291 { 292 struct ssb_bus *bus = gpiochip_get_data(chip); 293 294 ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 1 << gpio); 295 ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0); 296 return 0; 297 } 298 299 #if IS_ENABLED(CONFIG_SSB_EMBEDDED) 300 static void ssb_gpio_irq_extif_mask(struct irq_data *d) 301 { 302 struct ssb_bus *bus = irq_data_get_irq_chip_data(d); 303 int gpio = irqd_to_hwirq(d); 304 305 ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), 0); 306 } 307 308 static void ssb_gpio_irq_extif_unmask(struct irq_data *d) 309 { 310 struct ssb_bus *bus = irq_data_get_irq_chip_data(d); 311 int gpio = irqd_to_hwirq(d); 312 u32 val = ssb_extif_gpio_in(&bus->extif, BIT(gpio)); 313 314 ssb_extif_gpio_polarity(&bus->extif, BIT(gpio), val); 315 ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), BIT(gpio)); 316 } 317 318 static struct irq_chip ssb_gpio_irq_extif_chip = { 319 .name = "SSB-GPIO-EXTIF", 320 .irq_mask = ssb_gpio_irq_extif_mask, 321 .irq_unmask = ssb_gpio_irq_extif_unmask, 322 }; 323 324 static irqreturn_t ssb_gpio_irq_extif_handler(int irq, void *dev_id) 325 { 326 struct ssb_bus *bus = dev_id; 327 struct ssb_extif *extif = &bus->extif; 328 u32 val = ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN); 329 u32 mask = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTMASK); 330 u32 pol = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTPOL); 331 unsigned long irqs = (val ^ pol) & mask; 332 int gpio; 333 334 if (!irqs) 335 return IRQ_NONE; 336 337 for_each_set_bit(gpio, &irqs, bus->gpio.ngpio) 338 generic_handle_domain_irq_safe(bus->irq_domain, gpio); 339 340 ssb_extif_gpio_polarity(extif, irqs, val & irqs); 341 342 return IRQ_HANDLED; 343 } 344 345 static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus) 346 { 347 struct ssb_extif *extif = &bus->extif; 348 struct gpio_chip *chip = &bus->gpio; 349 int gpio, hwirq, err; 350 351 if (bus->bustype != SSB_BUSTYPE_SSB) 352 return 0; 353 354 bus->irq_domain = irq_domain_create_linear(NULL, chip->ngpio, &irq_domain_simple_ops, 355 extif); 356 if (!bus->irq_domain) { 357 err = -ENODEV; 358 goto err_irq_domain; 359 } 360 for (gpio = 0; gpio < chip->ngpio; gpio++) { 361 int irq = irq_create_mapping(bus->irq_domain, gpio); 362 363 irq_set_chip_data(irq, bus); 364 irq_set_chip_and_handler(irq, &ssb_gpio_irq_extif_chip, 365 handle_simple_irq); 366 } 367 368 hwirq = ssb_mips_irq(bus->extif.dev) + 2; 369 err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED, 370 "gpio", bus); 371 if (err) 372 goto err_req_irq; 373 374 ssb_extif_gpio_intmask(&bus->extif, ~0, 0); 375 376 return 0; 377 378 err_req_irq: 379 for (gpio = 0; gpio < chip->ngpio; gpio++) { 380 int irq = irq_find_mapping(bus->irq_domain, gpio); 381 382 irq_dispose_mapping(irq); 383 } 384 irq_domain_remove(bus->irq_domain); 385 err_irq_domain: 386 return err; 387 } 388 389 static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus) 390 { 391 struct ssb_extif *extif = &bus->extif; 392 struct gpio_chip *chip = &bus->gpio; 393 int gpio; 394 395 if (bus->bustype != SSB_BUSTYPE_SSB) 396 return; 397 398 free_irq(ssb_mips_irq(bus->extif.dev) + 2, extif); 399 for (gpio = 0; gpio < chip->ngpio; gpio++) { 400 int irq = irq_find_mapping(bus->irq_domain, gpio); 401 402 irq_dispose_mapping(irq); 403 } 404 irq_domain_remove(bus->irq_domain); 405 } 406 #else 407 static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus) 408 { 409 return 0; 410 } 411 412 static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus) 413 { 414 } 415 #endif 416 417 static int ssb_gpio_extif_init(struct ssb_bus *bus) 418 { 419 struct gpio_chip *chip = &bus->gpio; 420 int err; 421 422 chip->label = "ssb_extif_gpio"; 423 chip->owner = THIS_MODULE; 424 chip->get = ssb_gpio_extif_get_value; 425 chip->set_rv = ssb_gpio_extif_set_value; 426 chip->direction_input = ssb_gpio_extif_direction_input; 427 chip->direction_output = ssb_gpio_extif_direction_output; 428 #if IS_ENABLED(CONFIG_SSB_EMBEDDED) 429 chip->to_irq = ssb_gpio_to_irq; 430 #endif 431 chip->ngpio = 5; 432 /* There is just one SoC in one device and its GPIO addresses should be 433 * deterministic to address them more easily. The other buses could get 434 * a random base number. 435 */ 436 if (bus->bustype == SSB_BUSTYPE_SSB) 437 chip->base = 0; 438 else 439 chip->base = -1; 440 441 err = ssb_gpio_irq_extif_domain_init(bus); 442 if (err) 443 return err; 444 445 err = gpiochip_add_data(chip, bus); 446 if (err) { 447 ssb_gpio_irq_extif_domain_exit(bus); 448 return err; 449 } 450 451 return 0; 452 } 453 454 #else 455 static int ssb_gpio_extif_init(struct ssb_bus *bus) 456 { 457 return -ENOTSUPP; 458 } 459 #endif 460 461 /************************************************** 462 * Init 463 **************************************************/ 464 465 int ssb_gpio_init(struct ssb_bus *bus) 466 { 467 if (ssb_chipco_available(&bus->chipco)) 468 return ssb_gpio_chipco_init(bus); 469 else if (ssb_extif_available(&bus->extif)) 470 return ssb_gpio_extif_init(bus); 471 return -1; 472 } 473 474 int ssb_gpio_unregister(struct ssb_bus *bus) 475 { 476 if (ssb_chipco_available(&bus->chipco) || 477 ssb_extif_available(&bus->extif)) { 478 gpiochip_remove(&bus->gpio); 479 return 0; 480 } 481 return -1; 482 } 483