xref: /linux/drivers/spi/spi-xtensa-xtfpga.c (revision 1fd1dc41724319406b0aff221a352a400b0ddfc5)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Xtensa xtfpga SPI controller driver
4  *
5  * Copyright (c) 2014 Cadence Design Systems Inc.
6  */
7 
8 #include <linux/delay.h>
9 #include <linux/io.h>
10 #include <linux/module.h>
11 #include <linux/of.h>
12 #include <linux/platform_device.h>
13 #include <linux/spi/spi.h>
14 #include <linux/spi/spi_bitbang.h>
15 
16 #define XTFPGA_SPI_NAME "xtfpga_spi"
17 
18 #define XTFPGA_SPI_START	0x0
19 #define XTFPGA_SPI_BUSY		0x4
20 #define XTFPGA_SPI_DATA		0x8
21 
22 #define BUSY_WAIT_US		100
23 
24 struct xtfpga_spi {
25 	struct spi_bitbang bitbang;
26 	void __iomem *regs;
27 	u32 data;
28 	unsigned data_sz;
29 };
30 
31 static inline void xtfpga_spi_write32(const struct xtfpga_spi *spi,
32 				      unsigned addr, u32 val)
33 {
34 	__raw_writel(val, spi->regs + addr);
35 }
36 
37 static inline unsigned int xtfpga_spi_read32(const struct xtfpga_spi *spi,
38 					     unsigned addr)
39 {
40 	return __raw_readl(spi->regs + addr);
41 }
42 
43 static inline void xtfpga_spi_wait_busy(struct xtfpga_spi *xspi)
44 {
45 	unsigned i;
46 
47 	for (i = 0; xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY) &&
48 	     i < BUSY_WAIT_US; ++i)
49 		udelay(1);
50 	WARN_ON_ONCE(i == BUSY_WAIT_US);
51 }
52 
53 static u32 xtfpga_spi_txrx_word(struct spi_device *spi, unsigned nsecs,
54 				u32 v, u8 bits, unsigned flags)
55 {
56 	struct xtfpga_spi *xspi = spi_controller_get_devdata(spi->controller);
57 
58 	xspi->data = (xspi->data << bits) | (v & GENMASK(bits - 1, 0));
59 	xspi->data_sz += bits;
60 	if (xspi->data_sz >= 16) {
61 		xtfpga_spi_write32(xspi, XTFPGA_SPI_DATA,
62 				   xspi->data >> (xspi->data_sz - 16));
63 		xspi->data_sz -= 16;
64 		xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 1);
65 		xtfpga_spi_wait_busy(xspi);
66 		xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 0);
67 	}
68 
69 	return 0;
70 }
71 
72 static void xtfpga_spi_chipselect(struct spi_device *spi, int is_on)
73 {
74 	struct xtfpga_spi *xspi = spi_controller_get_devdata(spi->controller);
75 
76 	WARN_ON(xspi->data_sz != 0);
77 	xspi->data_sz = 0;
78 }
79 
80 static int xtfpga_spi_probe(struct platform_device *pdev)
81 {
82 	struct xtfpga_spi *xspi;
83 	int ret;
84 	struct spi_controller *host;
85 
86 	host = devm_spi_alloc_host(&pdev->dev, sizeof(struct xtfpga_spi));
87 	if (!host)
88 		return -ENOMEM;
89 
90 	host->flags = SPI_CONTROLLER_NO_RX;
91 	host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
92 	host->bus_num = pdev->dev.id;
93 
94 	xspi = spi_controller_get_devdata(host);
95 	xspi->bitbang.ctlr = host;
96 	xspi->bitbang.chipselect = xtfpga_spi_chipselect;
97 	xspi->bitbang.txrx_word[SPI_MODE_0] = xtfpga_spi_txrx_word;
98 	xspi->regs = devm_platform_ioremap_resource(pdev, 0);
99 	if (IS_ERR(xspi->regs))
100 		return PTR_ERR(xspi->regs);
101 
102 	xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 0);
103 	usleep_range(1000, 2000);
104 	if (xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY)) {
105 		dev_err(&pdev->dev, "Device stuck in busy state\n");
106 		return -EBUSY;
107 	}
108 
109 	ret = spi_bitbang_start(&xspi->bitbang);
110 	if (ret < 0) {
111 		dev_err(&pdev->dev, "spi_bitbang_start failed\n");
112 		return ret;
113 	}
114 
115 	platform_set_drvdata(pdev, host);
116 	return 0;
117 }
118 
119 static void xtfpga_spi_remove(struct platform_device *pdev)
120 {
121 	struct spi_controller *host = platform_get_drvdata(pdev);
122 	struct xtfpga_spi *xspi = spi_controller_get_devdata(host);
123 
124 	spi_bitbang_stop(&xspi->bitbang);
125 	spi_controller_put(host);
126 }
127 
128 MODULE_ALIAS("platform:" XTFPGA_SPI_NAME);
129 
130 #ifdef CONFIG_OF
131 static const struct of_device_id xtfpga_spi_of_match[] = {
132 	{ .compatible = "cdns,xtfpga-spi", },
133 	{}
134 };
135 MODULE_DEVICE_TABLE(of, xtfpga_spi_of_match);
136 #endif
137 
138 static struct platform_driver xtfpga_spi_driver = {
139 	.probe = xtfpga_spi_probe,
140 	.remove = xtfpga_spi_remove,
141 	.driver = {
142 		.name = XTFPGA_SPI_NAME,
143 		.of_match_table = of_match_ptr(xtfpga_spi_of_match),
144 	},
145 };
146 module_platform_driver(xtfpga_spi_driver);
147 
148 MODULE_AUTHOR("Max Filippov <jcmvbkbc@gmail.com>");
149 MODULE_DESCRIPTION("xtensa xtfpga SPI driver");
150 MODULE_LICENSE("GPL");
151