1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * SPI bus driver for the Virtio SPI controller 4 * Copyright (C) 2023 OpenSynergy GmbH 5 * Copyright (C) 2025 Qualcomm Innovation Center, Inc. All rights reserved. 6 */ 7 8 #include <linux/completion.h> 9 #include <linux/interrupt.h> 10 #include <linux/io.h> 11 #include <linux/module.h> 12 #include <linux/spi/spi.h> 13 #include <linux/stddef.h> 14 #include <linux/virtio.h> 15 #include <linux/virtio_ring.h> 16 #include <linux/virtio_spi.h> 17 18 #define VIRTIO_SPI_MODE_MASK \ 19 (SPI_MODE_X_MASK | SPI_CS_HIGH | SPI_LSB_FIRST) 20 21 struct virtio_spi_req { 22 struct completion completion; 23 const u8 *tx_buf; 24 u8 *rx_buf; 25 struct spi_transfer_head transfer_head ____cacheline_aligned; 26 struct spi_transfer_result result; 27 }; 28 29 struct virtio_spi_priv { 30 /* The virtio device we're associated with */ 31 struct virtio_device *vdev; 32 /* Pointer to the virtqueue */ 33 struct virtqueue *vq; 34 }; 35 36 static void virtio_spi_msg_done(struct virtqueue *vq) 37 { 38 struct virtio_spi_req *req; 39 unsigned int len; 40 41 while ((req = virtqueue_get_buf(vq, &len))) 42 complete(&req->completion); 43 } 44 45 /* 46 * virtio_spi_set_delays - Set delay parameters for SPI transfer 47 * 48 * This function sets various delay parameters for SPI transfer, 49 * including delay after CS asserted, timing intervals between 50 * adjacent words within a transfer, delay before and after CS 51 * deasserted. It converts these delay parameters to nanoseconds 52 * using spi_delay_to_ns and stores the results in spi_transfer_head 53 * structure. 54 * If the conversion fails, the function logs a warning message and 55 * returns an error code. 56 * . . . . . . . . . . 57 * Delay + A + + B + + C + D + E + F + A + 58 * . . . . . . . . . . 59 * ___. . . . . . .___.___. . 60 * CS# |___.______.____.____.___.___| . |___._____________ 61 * . . . . . . . . . . 62 * . . . . . . . . . . 63 * SCLK__.___.___NNN_____NNN__.___.___.___.___.___.___NNN_______ 64 * 65 * NOTE: 1st transfer has two words, the delay between these two words are 66 * 'B' in the diagram. 67 * 68 * A => struct spi_device -> cs_setup 69 * B => max{struct spi_transfer -> word_delay, struct spi_device -> word_delay} 70 * Note: spi_device and spi_transfer both have word_delay, Linux 71 * choose the bigger one, refer to _spi_xfer_word_delay_update function 72 * C => struct spi_transfer -> delay 73 * D => struct spi_device -> cs_hold 74 * E => struct spi_device -> cs_inactive 75 * F => struct spi_transfer -> cs_change_delay 76 * 77 * So the corresponding relationship: 78 * A <===> cs_setup_ns (after CS asserted) 79 * B <===> word_delay_ns (delay between adjacent words within a transfer) 80 * C+D <===> cs_delay_hold_ns (before CS deasserted) 81 * E+F <===> cs_change_delay_inactive_ns (after CS deasserted, these two 82 * values are also recommended in the Linux driver to be added up) 83 */ 84 static int virtio_spi_set_delays(struct spi_transfer_head *th, 85 struct spi_device *spi, 86 struct spi_transfer *xfer) 87 { 88 int cs_setup; 89 int cs_word_delay_xfer; 90 int cs_word_delay_spi; 91 int delay; 92 int cs_hold; 93 int cs_inactive; 94 int cs_change_delay; 95 96 cs_setup = spi_delay_to_ns(&spi->cs_setup, xfer); 97 if (cs_setup < 0) { 98 dev_warn(&spi->dev, "Cannot convert cs_setup\n"); 99 return cs_setup; 100 } 101 th->cs_setup_ns = cpu_to_le32(cs_setup); 102 103 cs_word_delay_xfer = spi_delay_to_ns(&xfer->word_delay, xfer); 104 if (cs_word_delay_xfer < 0) { 105 dev_warn(&spi->dev, "Cannot convert cs_word_delay_xfer\n"); 106 return cs_word_delay_xfer; 107 } 108 cs_word_delay_spi = spi_delay_to_ns(&spi->word_delay, xfer); 109 if (cs_word_delay_spi < 0) { 110 dev_warn(&spi->dev, "Cannot convert cs_word_delay_spi\n"); 111 return cs_word_delay_spi; 112 } 113 114 th->word_delay_ns = cpu_to_le32(max(cs_word_delay_spi, cs_word_delay_xfer)); 115 116 delay = spi_delay_to_ns(&xfer->delay, xfer); 117 if (delay < 0) { 118 dev_warn(&spi->dev, "Cannot convert delay\n"); 119 return delay; 120 } 121 cs_hold = spi_delay_to_ns(&spi->cs_hold, xfer); 122 if (cs_hold < 0) { 123 dev_warn(&spi->dev, "Cannot convert cs_hold\n"); 124 return cs_hold; 125 } 126 th->cs_delay_hold_ns = cpu_to_le32(delay + cs_hold); 127 128 cs_inactive = spi_delay_to_ns(&spi->cs_inactive, xfer); 129 if (cs_inactive < 0) { 130 dev_warn(&spi->dev, "Cannot convert cs_inactive\n"); 131 return cs_inactive; 132 } 133 cs_change_delay = spi_delay_to_ns(&xfer->cs_change_delay, xfer); 134 if (cs_change_delay < 0) { 135 dev_warn(&spi->dev, "Cannot convert cs_change_delay\n"); 136 return cs_change_delay; 137 } 138 th->cs_change_delay_inactive_ns = 139 cpu_to_le32(cs_inactive + cs_change_delay); 140 141 return 0; 142 } 143 144 static int virtio_spi_transfer_one(struct spi_controller *ctrl, 145 struct spi_device *spi, 146 struct spi_transfer *xfer) 147 { 148 struct virtio_spi_priv *priv = spi_controller_get_devdata(ctrl); 149 struct spi_transfer_head *th; 150 struct scatterlist sg_out_head, sg_out_payload; 151 struct scatterlist sg_in_result, sg_in_payload; 152 struct scatterlist *sgs[4]; 153 unsigned int outcnt = 0; 154 unsigned int incnt = 0; 155 int ret; 156 157 struct virtio_spi_req *spi_req __free(kfree) = kzalloc_obj(*spi_req); 158 if (!spi_req) 159 return -ENOMEM; 160 161 th = &spi_req->transfer_head; 162 163 /* Fill struct spi_transfer_head */ 164 th->chip_select_id = spi_get_chipselect(spi, 0); 165 th->bits_per_word = xfer->bits_per_word; 166 th->cs_change = xfer->cs_change; 167 th->tx_nbits = xfer->tx_nbits; 168 th->rx_nbits = xfer->rx_nbits; 169 th->reserved[0] = 0; 170 th->reserved[1] = 0; 171 th->reserved[2] = 0; 172 173 static_assert(VIRTIO_SPI_CPHA == SPI_CPHA, 174 "VIRTIO_SPI_CPHA must match SPI_CPHA"); 175 static_assert(VIRTIO_SPI_CPOL == SPI_CPOL, 176 "VIRTIO_SPI_CPOL must match SPI_CPOL"); 177 static_assert(VIRTIO_SPI_CS_HIGH == SPI_CS_HIGH, 178 "VIRTIO_SPI_CS_HIGH must match SPI_CS_HIGH"); 179 static_assert(VIRTIO_SPI_MODE_LSB_FIRST == SPI_LSB_FIRST, 180 "VIRTIO_SPI_MODE_LSB_FIRST must match SPI_LSB_FIRST"); 181 182 th->mode = cpu_to_le32(spi->mode & VIRTIO_SPI_MODE_MASK); 183 if (spi->mode & SPI_LOOP) 184 th->mode |= cpu_to_le32(VIRTIO_SPI_MODE_LOOP); 185 186 th->freq = cpu_to_le32(xfer->speed_hz); 187 188 ret = virtio_spi_set_delays(th, spi, xfer); 189 if (ret) 190 goto msg_done; 191 192 /* Set buffers */ 193 spi_req->tx_buf = xfer->tx_buf; 194 spi_req->rx_buf = xfer->rx_buf; 195 196 /* Prepare sending of virtio message */ 197 init_completion(&spi_req->completion); 198 199 sg_init_one(&sg_out_head, th, sizeof(*th)); 200 sgs[outcnt] = &sg_out_head; 201 outcnt++; 202 203 if (spi_req->tx_buf) { 204 sg_init_one(&sg_out_payload, spi_req->tx_buf, xfer->len); 205 sgs[outcnt] = &sg_out_payload; 206 outcnt++; 207 } 208 209 if (spi_req->rx_buf) { 210 sg_init_one(&sg_in_payload, spi_req->rx_buf, xfer->len); 211 sgs[outcnt] = &sg_in_payload; 212 incnt++; 213 } 214 215 sg_init_one(&sg_in_result, &spi_req->result, 216 sizeof(struct spi_transfer_result)); 217 sgs[outcnt + incnt] = &sg_in_result; 218 incnt++; 219 220 ret = virtqueue_add_sgs(priv->vq, sgs, outcnt, incnt, spi_req, 221 GFP_KERNEL); 222 if (ret) 223 goto msg_done; 224 225 /* Simple implementation: There can be only one transfer in flight */ 226 virtqueue_kick(priv->vq); 227 228 wait_for_completion(&spi_req->completion); 229 230 /* Read result from message and translate return code */ 231 switch (spi_req->result.result) { 232 case VIRTIO_SPI_TRANS_OK: 233 break; 234 case VIRTIO_SPI_PARAM_ERR: 235 ret = -EINVAL; 236 break; 237 case VIRTIO_SPI_TRANS_ERR: 238 ret = -EIO; 239 break; 240 default: 241 ret = -EIO; 242 break; 243 } 244 245 msg_done: 246 if (ret) 247 ctrl->cur_msg->status = ret; 248 249 return ret; 250 } 251 252 static void virtio_spi_read_config(struct virtio_device *vdev) 253 { 254 struct spi_controller *ctrl = dev_get_drvdata(&vdev->dev); 255 u32 mode_func_supported; 256 u8 cs_max_number; 257 u8 tx_nbits_supported; 258 u8 rx_nbits_supported; 259 260 cs_max_number = virtio_cread8(vdev, offsetof(struct virtio_spi_config, 261 cs_max_number)); 262 ctrl->num_chipselect = cs_max_number; 263 264 /* Set the mode bits which are understood by this driver */ 265 mode_func_supported = 266 virtio_cread32(vdev, offsetof(struct virtio_spi_config, 267 mode_func_supported)); 268 ctrl->mode_bits = mode_func_supported & 269 (VIRTIO_SPI_CS_HIGH | VIRTIO_SPI_MODE_LSB_FIRST); 270 if (mode_func_supported & VIRTIO_SPI_MF_SUPPORT_CPHA_1) 271 ctrl->mode_bits |= VIRTIO_SPI_CPHA; 272 if (mode_func_supported & VIRTIO_SPI_MF_SUPPORT_CPOL_1) 273 ctrl->mode_bits |= VIRTIO_SPI_CPOL; 274 if (mode_func_supported & VIRTIO_SPI_MF_SUPPORT_LSB_FIRST) 275 ctrl->mode_bits |= SPI_LSB_FIRST; 276 if (mode_func_supported & VIRTIO_SPI_MF_SUPPORT_LOOPBACK) 277 ctrl->mode_bits |= SPI_LOOP; 278 tx_nbits_supported = 279 virtio_cread8(vdev, offsetof(struct virtio_spi_config, 280 tx_nbits_supported)); 281 if (tx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_DUAL) 282 ctrl->mode_bits |= SPI_TX_DUAL; 283 if (tx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_QUAD) 284 ctrl->mode_bits |= SPI_TX_QUAD; 285 if (tx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_OCTAL) 286 ctrl->mode_bits |= SPI_TX_OCTAL; 287 rx_nbits_supported = 288 virtio_cread8(vdev, offsetof(struct virtio_spi_config, 289 rx_nbits_supported)); 290 if (rx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_DUAL) 291 ctrl->mode_bits |= SPI_RX_DUAL; 292 if (rx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_QUAD) 293 ctrl->mode_bits |= SPI_RX_QUAD; 294 if (rx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_OCTAL) 295 ctrl->mode_bits |= SPI_RX_OCTAL; 296 297 ctrl->bits_per_word_mask = 298 virtio_cread32(vdev, offsetof(struct virtio_spi_config, 299 bits_per_word_mask)); 300 301 ctrl->max_speed_hz = 302 virtio_cread32(vdev, offsetof(struct virtio_spi_config, 303 max_freq_hz)); 304 } 305 306 static int virtio_spi_find_vqs(struct virtio_spi_priv *priv) 307 { 308 struct virtqueue *vq; 309 310 vq = virtio_find_single_vq(priv->vdev, virtio_spi_msg_done, "spi-rq"); 311 if (IS_ERR(vq)) 312 return PTR_ERR(vq); 313 priv->vq = vq; 314 return 0; 315 } 316 317 /* Function must not be called before virtio_spi_find_vqs() has been run */ 318 static void virtio_spi_del_vq(void *data) 319 { 320 struct virtio_device *vdev = data; 321 322 virtio_reset_device(vdev); 323 vdev->config->del_vqs(vdev); 324 } 325 326 static int virtio_spi_probe(struct virtio_device *vdev) 327 { 328 struct virtio_spi_priv *priv; 329 struct spi_controller *ctrl; 330 int ret; 331 332 ctrl = devm_spi_alloc_host(&vdev->dev, sizeof(*priv)); 333 if (!ctrl) 334 return -ENOMEM; 335 336 priv = spi_controller_get_devdata(ctrl); 337 priv->vdev = vdev; 338 vdev->priv = priv; 339 340 dev_set_drvdata(&vdev->dev, ctrl); 341 342 virtio_spi_read_config(vdev); 343 344 ctrl->transfer_one = virtio_spi_transfer_one; 345 346 ret = virtio_spi_find_vqs(priv); 347 if (ret) 348 return dev_err_probe(&vdev->dev, ret, "Cannot setup virtqueues\n"); 349 350 /* Register cleanup for virtqueues using devm */ 351 ret = devm_add_action_or_reset(&vdev->dev, virtio_spi_del_vq, vdev); 352 if (ret) 353 return dev_err_probe(&vdev->dev, ret, "Cannot register virtqueue cleanup\n"); 354 355 virtio_device_ready(vdev); 356 357 /* Use devm version to register controller */ 358 ret = devm_spi_register_controller(&vdev->dev, ctrl); 359 if (ret) 360 return dev_err_probe(&vdev->dev, ret, "Cannot register controller\n"); 361 362 return 0; 363 } 364 365 static int virtio_spi_freeze(struct device *dev) 366 { 367 struct spi_controller *ctrl = dev_get_drvdata(dev); 368 struct virtio_device *vdev = dev_to_virtio(dev); 369 int ret; 370 371 ret = spi_controller_suspend(ctrl); 372 if (ret) { 373 dev_warn(dev, "cannot suspend controller (%d)\n", ret); 374 return ret; 375 } 376 377 virtio_spi_del_vq(vdev); 378 return 0; 379 } 380 381 static int virtio_spi_restore(struct device *dev) 382 { 383 struct spi_controller *ctrl = dev_get_drvdata(dev); 384 struct virtio_device *vdev = dev_to_virtio(dev); 385 int ret; 386 387 ret = virtio_spi_find_vqs(vdev->priv); 388 if (ret) { 389 dev_err(dev, "problem starting vqueue (%d)\n", ret); 390 return ret; 391 } 392 393 ret = spi_controller_resume(ctrl); 394 if (ret) 395 dev_err(dev, "problem resuming controller (%d)\n", ret); 396 397 return ret; 398 } 399 400 static struct virtio_device_id virtio_spi_id_table[] = { 401 { VIRTIO_ID_SPI, VIRTIO_DEV_ANY_ID }, 402 {} 403 }; 404 MODULE_DEVICE_TABLE(virtio, virtio_spi_id_table); 405 406 static const struct dev_pm_ops virtio_spi_pm_ops = { 407 .freeze = pm_sleep_ptr(virtio_spi_freeze), 408 .restore = pm_sleep_ptr(virtio_spi_restore), 409 }; 410 411 static struct virtio_driver virtio_spi_driver = { 412 .driver = { 413 .name = KBUILD_MODNAME, 414 .pm = &virtio_spi_pm_ops, 415 }, 416 .id_table = virtio_spi_id_table, 417 .probe = virtio_spi_probe, 418 }; 419 module_virtio_driver(virtio_spi_driver); 420 421 MODULE_AUTHOR("OpenSynergy GmbH"); 422 MODULE_AUTHOR("Haixu Cui <quic_haixcui@quicinc.com>"); 423 MODULE_LICENSE("GPL"); 424 MODULE_DESCRIPTION("Virtio SPI bus driver"); 425