xref: /linux/drivers/spi/spi-sc18is602.c (revision e0bf6c5ca2d3281f231c5f0c9bf145e9513644de)
1 /*
2  * NXP SC18IS602/603 SPI driver
3  *
4  * Copyright (C) Guenter Roeck <linux@roeck-us.net>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  */
16 
17 #include <linux/kernel.h>
18 #include <linux/err.h>
19 #include <linux/module.h>
20 #include <linux/spi/spi.h>
21 #include <linux/i2c.h>
22 #include <linux/delay.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/of.h>
25 #include <linux/platform_data/sc18is602.h>
26 
27 enum chips { sc18is602, sc18is602b, sc18is603 };
28 
29 #define SC18IS602_BUFSIZ		200
30 #define SC18IS602_CLOCK			7372000
31 
32 #define SC18IS602_MODE_CPHA		BIT(2)
33 #define SC18IS602_MODE_CPOL		BIT(3)
34 #define SC18IS602_MODE_LSB_FIRST	BIT(5)
35 #define SC18IS602_MODE_CLOCK_DIV_4	0x0
36 #define SC18IS602_MODE_CLOCK_DIV_16	0x1
37 #define SC18IS602_MODE_CLOCK_DIV_64	0x2
38 #define SC18IS602_MODE_CLOCK_DIV_128	0x3
39 
40 struct sc18is602 {
41 	struct spi_master	*master;
42 	struct device		*dev;
43 	u8			ctrl;
44 	u32			freq;
45 	u32			speed;
46 
47 	/* I2C data */
48 	struct i2c_client	*client;
49 	enum chips		id;
50 	u8			buffer[SC18IS602_BUFSIZ + 1];
51 	int			tlen;	/* Data queued for tx in buffer */
52 	int			rindex;	/* Receive data index in buffer */
53 };
54 
55 static int sc18is602_wait_ready(struct sc18is602 *hw, int len)
56 {
57 	int i, err;
58 	int usecs = 1000000 * len / hw->speed + 1;
59 	u8 dummy[1];
60 
61 	for (i = 0; i < 10; i++) {
62 		err = i2c_master_recv(hw->client, dummy, 1);
63 		if (err >= 0)
64 			return 0;
65 		usleep_range(usecs, usecs * 2);
66 	}
67 	return -ETIMEDOUT;
68 }
69 
70 static int sc18is602_txrx(struct sc18is602 *hw, struct spi_message *msg,
71 			  struct spi_transfer *t, bool do_transfer)
72 {
73 	unsigned int len = t->len;
74 	int ret;
75 
76 	if (hw->tlen == 0) {
77 		/* First byte (I2C command) is chip select */
78 		hw->buffer[0] = 1 << msg->spi->chip_select;
79 		hw->tlen = 1;
80 		hw->rindex = 0;
81 	}
82 	/*
83 	 * We can not immediately send data to the chip, since each I2C message
84 	 * resembles a full SPI message (from CS active to CS inactive).
85 	 * Enqueue messages up to the first read or until do_transfer is true.
86 	 */
87 	if (t->tx_buf) {
88 		memcpy(&hw->buffer[hw->tlen], t->tx_buf, len);
89 		hw->tlen += len;
90 		if (t->rx_buf)
91 			do_transfer = true;
92 		else
93 			hw->rindex = hw->tlen - 1;
94 	} else if (t->rx_buf) {
95 		/*
96 		 * For receive-only transfers we still need to perform a dummy
97 		 * write to receive data from the SPI chip.
98 		 * Read data starts at the end of transmit data (minus 1 to
99 		 * account for CS).
100 		 */
101 		hw->rindex = hw->tlen - 1;
102 		memset(&hw->buffer[hw->tlen], 0, len);
103 		hw->tlen += len;
104 		do_transfer = true;
105 	}
106 
107 	if (do_transfer && hw->tlen > 1) {
108 		ret = sc18is602_wait_ready(hw, SC18IS602_BUFSIZ);
109 		if (ret < 0)
110 			return ret;
111 		ret = i2c_master_send(hw->client, hw->buffer, hw->tlen);
112 		if (ret < 0)
113 			return ret;
114 		if (ret != hw->tlen)
115 			return -EIO;
116 
117 		if (t->rx_buf) {
118 			int rlen = hw->rindex + len;
119 
120 			ret = sc18is602_wait_ready(hw, hw->tlen);
121 			if (ret < 0)
122 				return ret;
123 			ret = i2c_master_recv(hw->client, hw->buffer, rlen);
124 			if (ret < 0)
125 				return ret;
126 			if (ret != rlen)
127 				return -EIO;
128 			memcpy(t->rx_buf, &hw->buffer[hw->rindex], len);
129 		}
130 		hw->tlen = 0;
131 	}
132 	return len;
133 }
134 
135 static int sc18is602_setup_transfer(struct sc18is602 *hw, u32 hz, u8 mode)
136 {
137 	u8 ctrl = 0;
138 	int ret;
139 
140 	if (mode & SPI_CPHA)
141 		ctrl |= SC18IS602_MODE_CPHA;
142 	if (mode & SPI_CPOL)
143 		ctrl |= SC18IS602_MODE_CPOL;
144 	if (mode & SPI_LSB_FIRST)
145 		ctrl |= SC18IS602_MODE_LSB_FIRST;
146 
147 	/* Find the closest clock speed */
148 	if (hz >= hw->freq / 4) {
149 		ctrl |= SC18IS602_MODE_CLOCK_DIV_4;
150 		hw->speed = hw->freq / 4;
151 	} else if (hz >= hw->freq / 16) {
152 		ctrl |= SC18IS602_MODE_CLOCK_DIV_16;
153 		hw->speed = hw->freq / 16;
154 	} else if (hz >= hw->freq / 64) {
155 		ctrl |= SC18IS602_MODE_CLOCK_DIV_64;
156 		hw->speed = hw->freq / 64;
157 	} else {
158 		ctrl |= SC18IS602_MODE_CLOCK_DIV_128;
159 		hw->speed = hw->freq / 128;
160 	}
161 
162 	/*
163 	 * Don't do anything if the control value did not change. The initial
164 	 * value of 0xff for hw->ctrl ensures that the correct mode will be set
165 	 * with the first call to this function.
166 	 */
167 	if (ctrl == hw->ctrl)
168 		return 0;
169 
170 	ret = i2c_smbus_write_byte_data(hw->client, 0xf0, ctrl);
171 	if (ret < 0)
172 		return ret;
173 
174 	hw->ctrl = ctrl;
175 
176 	return 0;
177 }
178 
179 static int sc18is602_check_transfer(struct spi_device *spi,
180 				    struct spi_transfer *t, int tlen)
181 {
182 	if (t && t->len + tlen > SC18IS602_BUFSIZ)
183 		return -EINVAL;
184 
185 	return 0;
186 }
187 
188 static int sc18is602_transfer_one(struct spi_master *master,
189 				  struct spi_message *m)
190 {
191 	struct sc18is602 *hw = spi_master_get_devdata(master);
192 	struct spi_device *spi = m->spi;
193 	struct spi_transfer *t;
194 	int status = 0;
195 
196 	hw->tlen = 0;
197 	list_for_each_entry(t, &m->transfers, transfer_list) {
198 		bool do_transfer;
199 
200 		status = sc18is602_check_transfer(spi, t, hw->tlen);
201 		if (status < 0)
202 			break;
203 
204 		status = sc18is602_setup_transfer(hw, t->speed_hz, spi->mode);
205 		if (status < 0)
206 			break;
207 
208 		do_transfer = t->cs_change || list_is_last(&t->transfer_list,
209 							   &m->transfers);
210 
211 		if (t->len) {
212 			status = sc18is602_txrx(hw, m, t, do_transfer);
213 			if (status < 0)
214 				break;
215 			m->actual_length += status;
216 		}
217 		status = 0;
218 
219 		if (t->delay_usecs)
220 			udelay(t->delay_usecs);
221 	}
222 	m->status = status;
223 	spi_finalize_current_message(master);
224 
225 	return status;
226 }
227 
228 static int sc18is602_setup(struct spi_device *spi)
229 {
230 	struct sc18is602 *hw = spi_master_get_devdata(spi->master);
231 
232 	/* SC18IS602 does not support CS2 */
233 	if (hw->id == sc18is602 && spi->chip_select == 2)
234 		return -ENXIO;
235 
236 	return 0;
237 }
238 
239 static int sc18is602_probe(struct i2c_client *client,
240 			   const struct i2c_device_id *id)
241 {
242 	struct device *dev = &client->dev;
243 	struct device_node *np = dev->of_node;
244 	struct sc18is602_platform_data *pdata = dev_get_platdata(dev);
245 	struct sc18is602 *hw;
246 	struct spi_master *master;
247 	int error;
248 
249 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
250 				     I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
251 		return -EINVAL;
252 
253 	master = spi_alloc_master(dev, sizeof(struct sc18is602));
254 	if (!master)
255 		return -ENOMEM;
256 
257 	hw = spi_master_get_devdata(master);
258 	i2c_set_clientdata(client, hw);
259 
260 	hw->master = master;
261 	hw->client = client;
262 	hw->dev = dev;
263 	hw->ctrl = 0xff;
264 
265 	hw->id = id->driver_data;
266 
267 	switch (hw->id) {
268 	case sc18is602:
269 	case sc18is602b:
270 		master->num_chipselect = 4;
271 		hw->freq = SC18IS602_CLOCK;
272 		break;
273 	case sc18is603:
274 		master->num_chipselect = 2;
275 		if (pdata) {
276 			hw->freq = pdata->clock_frequency;
277 		} else {
278 			const __be32 *val;
279 			int len;
280 
281 			val = of_get_property(np, "clock-frequency", &len);
282 			if (val && len >= sizeof(__be32))
283 				hw->freq = be32_to_cpup(val);
284 		}
285 		if (!hw->freq)
286 			hw->freq = SC18IS602_CLOCK;
287 		break;
288 	}
289 	master->bus_num = client->adapter->nr;
290 	master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST;
291 	master->bits_per_word_mask = SPI_BPW_MASK(8);
292 	master->setup = sc18is602_setup;
293 	master->transfer_one_message = sc18is602_transfer_one;
294 	master->dev.of_node = np;
295 	master->min_speed_hz = hw->freq / 128;
296 	master->max_speed_hz = hw->freq / 4;
297 
298 	error = devm_spi_register_master(dev, master);
299 	if (error)
300 		goto error_reg;
301 
302 	return 0;
303 
304 error_reg:
305 	spi_master_put(master);
306 	return error;
307 }
308 
309 static const struct i2c_device_id sc18is602_id[] = {
310 	{ "sc18is602", sc18is602 },
311 	{ "sc18is602b", sc18is602b },
312 	{ "sc18is603", sc18is603 },
313 	{ }
314 };
315 MODULE_DEVICE_TABLE(i2c, sc18is602_id);
316 
317 static struct i2c_driver sc18is602_driver = {
318 	.driver = {
319 		.name = "sc18is602",
320 	},
321 	.probe = sc18is602_probe,
322 	.id_table = sc18is602_id,
323 };
324 
325 module_i2c_driver(sc18is602_driver);
326 
327 MODULE_DESCRIPTION("SC18IC602/603 SPI Master Driver");
328 MODULE_AUTHOR("Guenter Roeck");
329 MODULE_LICENSE("GPL");
330