1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2018 Exceet Electronics GmbH 4 * Copyright (C) 2018 Bootlin 5 * 6 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 7 */ 8 #include <linux/dmaengine.h> 9 #include <linux/pm_runtime.h> 10 #include <linux/spi/spi.h> 11 #include <linux/spi/spi-mem.h> 12 13 #include "internals.h" 14 15 /** 16 * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a 17 * memory operation 18 * @ctlr: the SPI controller requesting this dma_map() 19 * @op: the memory operation containing the buffer to map 20 * @sgt: a pointer to a non-initialized sg_table that will be filled by this 21 * function 22 * 23 * Some controllers might want to do DMA on the data buffer embedded in @op. 24 * This helper prepares everything for you and provides a ready-to-use 25 * sg_table. This function is not intended to be called from spi drivers. 26 * Only SPI controller drivers should use it. 27 * Note that the caller must ensure the memory region pointed by 28 * op->data.buf.{in,out} is DMA-able before calling this function. 29 * 30 * Return: 0 in case of success, a negative error code otherwise. 31 */ 32 int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr, 33 const struct spi_mem_op *op, 34 struct sg_table *sgt) 35 { 36 struct device *dmadev; 37 38 if (!op->data.nbytes) 39 return -EINVAL; 40 41 if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx) 42 dmadev = ctlr->dma_tx->device->dev; 43 else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx) 44 dmadev = ctlr->dma_rx->device->dev; 45 else 46 dmadev = ctlr->dev.parent; 47 48 if (!dmadev) 49 return -EINVAL; 50 51 return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes, 52 op->data.dir == SPI_MEM_DATA_IN ? 53 DMA_FROM_DEVICE : DMA_TO_DEVICE); 54 } 55 EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data); 56 57 /** 58 * spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a 59 * memory operation 60 * @ctlr: the SPI controller requesting this dma_unmap() 61 * @op: the memory operation containing the buffer to unmap 62 * @sgt: a pointer to an sg_table previously initialized by 63 * spi_controller_dma_map_mem_op_data() 64 * 65 * Some controllers might want to do DMA on the data buffer embedded in @op. 66 * This helper prepares things so that the CPU can access the 67 * op->data.buf.{in,out} buffer again. 68 * 69 * This function is not intended to be called from SPI drivers. Only SPI 70 * controller drivers should use it. 71 * 72 * This function should be called after the DMA operation has finished and is 73 * only valid if the previous spi_controller_dma_map_mem_op_data() call 74 * returned 0. 75 * 76 * Return: 0 in case of success, a negative error code otherwise. 77 */ 78 void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr, 79 const struct spi_mem_op *op, 80 struct sg_table *sgt) 81 { 82 struct device *dmadev; 83 84 if (!op->data.nbytes) 85 return; 86 87 if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx) 88 dmadev = ctlr->dma_tx->device->dev; 89 else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx) 90 dmadev = ctlr->dma_rx->device->dev; 91 else 92 dmadev = ctlr->dev.parent; 93 94 spi_unmap_buf(ctlr, dmadev, sgt, 95 op->data.dir == SPI_MEM_DATA_IN ? 96 DMA_FROM_DEVICE : DMA_TO_DEVICE); 97 } 98 EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data); 99 100 static int spi_check_buswidth_req(struct spi_mem *mem, u8 buswidth, bool tx) 101 { 102 u32 mode = mem->spi->mode; 103 104 switch (buswidth) { 105 case 1: 106 return 0; 107 108 case 2: 109 if ((tx && (mode & (SPI_TX_DUAL | SPI_TX_QUAD))) || 110 (!tx && (mode & (SPI_RX_DUAL | SPI_RX_QUAD)))) 111 return 0; 112 113 break; 114 115 case 4: 116 if ((tx && (mode & SPI_TX_QUAD)) || 117 (!tx && (mode & SPI_RX_QUAD))) 118 return 0; 119 120 break; 121 122 default: 123 break; 124 } 125 126 return -ENOTSUPP; 127 } 128 129 static bool spi_mem_default_supports_op(struct spi_mem *mem, 130 const struct spi_mem_op *op) 131 { 132 if (spi_check_buswidth_req(mem, op->cmd.buswidth, true)) 133 return false; 134 135 if (op->addr.nbytes && 136 spi_check_buswidth_req(mem, op->addr.buswidth, true)) 137 return false; 138 139 if (op->dummy.nbytes && 140 spi_check_buswidth_req(mem, op->dummy.buswidth, true)) 141 return false; 142 143 if (op->data.nbytes && 144 spi_check_buswidth_req(mem, op->data.buswidth, 145 op->data.dir == SPI_MEM_DATA_OUT)) 146 return false; 147 148 return true; 149 } 150 EXPORT_SYMBOL_GPL(spi_mem_default_supports_op); 151 152 /** 153 * spi_mem_supports_op() - Check if a memory device and the controller it is 154 * connected to support a specific memory operation 155 * @mem: the SPI memory 156 * @op: the memory operation to check 157 * 158 * Some controllers are only supporting Single or Dual IOs, others might only 159 * support specific opcodes, or it can even be that the controller and device 160 * both support Quad IOs but the hardware prevents you from using it because 161 * only 2 IO lines are connected. 162 * 163 * This function checks whether a specific operation is supported. 164 * 165 * Return: true if @op is supported, false otherwise. 166 */ 167 bool spi_mem_supports_op(struct spi_mem *mem, const struct spi_mem_op *op) 168 { 169 struct spi_controller *ctlr = mem->spi->controller; 170 171 if (ctlr->mem_ops && ctlr->mem_ops->supports_op) 172 return ctlr->mem_ops->supports_op(mem, op); 173 174 return spi_mem_default_supports_op(mem, op); 175 } 176 EXPORT_SYMBOL_GPL(spi_mem_supports_op); 177 178 /** 179 * spi_mem_exec_op() - Execute a memory operation 180 * @mem: the SPI memory 181 * @op: the memory operation to execute 182 * 183 * Executes a memory operation. 184 * 185 * This function first checks that @op is supported and then tries to execute 186 * it. 187 * 188 * Return: 0 in case of success, a negative error code otherwise. 189 */ 190 int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) 191 { 192 unsigned int tmpbufsize, xferpos = 0, totalxferlen = 0; 193 struct spi_controller *ctlr = mem->spi->controller; 194 struct spi_transfer xfers[4] = { }; 195 struct spi_message msg; 196 u8 *tmpbuf; 197 int ret; 198 199 if (!spi_mem_supports_op(mem, op)) 200 return -ENOTSUPP; 201 202 if (ctlr->mem_ops) { 203 /* 204 * Flush the message queue before executing our SPI memory 205 * operation to prevent preemption of regular SPI transfers. 206 */ 207 spi_flush_queue(ctlr); 208 209 if (ctlr->auto_runtime_pm) { 210 ret = pm_runtime_get_sync(ctlr->dev.parent); 211 if (ret < 0) { 212 dev_err(&ctlr->dev, 213 "Failed to power device: %d\n", 214 ret); 215 return ret; 216 } 217 } 218 219 mutex_lock(&ctlr->bus_lock_mutex); 220 mutex_lock(&ctlr->io_mutex); 221 ret = ctlr->mem_ops->exec_op(mem, op); 222 mutex_unlock(&ctlr->io_mutex); 223 mutex_unlock(&ctlr->bus_lock_mutex); 224 225 if (ctlr->auto_runtime_pm) 226 pm_runtime_put(ctlr->dev.parent); 227 228 /* 229 * Some controllers only optimize specific paths (typically the 230 * read path) and expect the core to use the regular SPI 231 * interface in other cases. 232 */ 233 if (!ret || ret != -ENOTSUPP) 234 return ret; 235 } 236 237 tmpbufsize = sizeof(op->cmd.opcode) + op->addr.nbytes + 238 op->dummy.nbytes; 239 240 /* 241 * Allocate a buffer to transmit the CMD, ADDR cycles with kmalloc() so 242 * we're guaranteed that this buffer is DMA-able, as required by the 243 * SPI layer. 244 */ 245 tmpbuf = kzalloc(tmpbufsize, GFP_KERNEL | GFP_DMA); 246 if (!tmpbuf) 247 return -ENOMEM; 248 249 spi_message_init(&msg); 250 251 tmpbuf[0] = op->cmd.opcode; 252 xfers[xferpos].tx_buf = tmpbuf; 253 xfers[xferpos].len = sizeof(op->cmd.opcode); 254 xfers[xferpos].tx_nbits = op->cmd.buswidth; 255 spi_message_add_tail(&xfers[xferpos], &msg); 256 xferpos++; 257 totalxferlen++; 258 259 if (op->addr.nbytes) { 260 int i; 261 262 for (i = 0; i < op->addr.nbytes; i++) 263 tmpbuf[i + 1] = op->addr.val >> 264 (8 * (op->addr.nbytes - i - 1)); 265 266 xfers[xferpos].tx_buf = tmpbuf + 1; 267 xfers[xferpos].len = op->addr.nbytes; 268 xfers[xferpos].tx_nbits = op->addr.buswidth; 269 spi_message_add_tail(&xfers[xferpos], &msg); 270 xferpos++; 271 totalxferlen += op->addr.nbytes; 272 } 273 274 if (op->dummy.nbytes) { 275 memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes); 276 xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1; 277 xfers[xferpos].len = op->dummy.nbytes; 278 xfers[xferpos].tx_nbits = op->dummy.buswidth; 279 spi_message_add_tail(&xfers[xferpos], &msg); 280 xferpos++; 281 totalxferlen += op->dummy.nbytes; 282 } 283 284 if (op->data.nbytes) { 285 if (op->data.dir == SPI_MEM_DATA_IN) { 286 xfers[xferpos].rx_buf = op->data.buf.in; 287 xfers[xferpos].rx_nbits = op->data.buswidth; 288 } else { 289 xfers[xferpos].tx_buf = op->data.buf.out; 290 xfers[xferpos].tx_nbits = op->data.buswidth; 291 } 292 293 xfers[xferpos].len = op->data.nbytes; 294 spi_message_add_tail(&xfers[xferpos], &msg); 295 xferpos++; 296 totalxferlen += op->data.nbytes; 297 } 298 299 ret = spi_sync(mem->spi, &msg); 300 301 kfree(tmpbuf); 302 303 if (ret) 304 return ret; 305 306 if (msg.actual_length != totalxferlen) 307 return -EIO; 308 309 return 0; 310 } 311 EXPORT_SYMBOL_GPL(spi_mem_exec_op); 312 313 /** 314 * spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to 315 * match controller limitations 316 * @mem: the SPI memory 317 * @op: the operation to adjust 318 * 319 * Some controllers have FIFO limitations and must split a data transfer 320 * operation into multiple ones, others require a specific alignment for 321 * optimized accesses. This function allows SPI mem drivers to split a single 322 * operation into multiple sub-operations when required. 323 * 324 * Return: a negative error code if the controller can't properly adjust @op, 325 * 0 otherwise. Note that @op->data.nbytes will be updated if @op 326 * can't be handled in a single step. 327 */ 328 int spi_mem_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) 329 { 330 struct spi_controller *ctlr = mem->spi->controller; 331 332 if (ctlr->mem_ops && ctlr->mem_ops->adjust_op_size) 333 return ctlr->mem_ops->adjust_op_size(mem, op); 334 335 return 0; 336 } 337 EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size); 338 339 static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv) 340 { 341 return container_of(drv, struct spi_mem_driver, spidrv.driver); 342 } 343 344 static int spi_mem_probe(struct spi_device *spi) 345 { 346 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver); 347 struct spi_mem *mem; 348 349 mem = devm_kzalloc(&spi->dev, sizeof(*mem), GFP_KERNEL); 350 if (!mem) 351 return -ENOMEM; 352 353 mem->spi = spi; 354 spi_set_drvdata(spi, mem); 355 356 return memdrv->probe(mem); 357 } 358 359 static int spi_mem_remove(struct spi_device *spi) 360 { 361 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver); 362 struct spi_mem *mem = spi_get_drvdata(spi); 363 364 if (memdrv->remove) 365 return memdrv->remove(mem); 366 367 return 0; 368 } 369 370 static void spi_mem_shutdown(struct spi_device *spi) 371 { 372 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver); 373 struct spi_mem *mem = spi_get_drvdata(spi); 374 375 if (memdrv->shutdown) 376 memdrv->shutdown(mem); 377 } 378 379 /** 380 * spi_mem_driver_register_with_owner() - Register a SPI memory driver 381 * @memdrv: the SPI memory driver to register 382 * @owner: the owner of this driver 383 * 384 * Registers a SPI memory driver. 385 * 386 * Return: 0 in case of success, a negative error core otherwise. 387 */ 388 389 int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv, 390 struct module *owner) 391 { 392 memdrv->spidrv.probe = spi_mem_probe; 393 memdrv->spidrv.remove = spi_mem_remove; 394 memdrv->spidrv.shutdown = spi_mem_shutdown; 395 396 return __spi_register_driver(owner, &memdrv->spidrv); 397 } 398 EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner); 399 400 /** 401 * spi_mem_driver_unregister_with_owner() - Unregister a SPI memory driver 402 * @memdrv: the SPI memory driver to unregister 403 * 404 * Unregisters a SPI memory driver. 405 */ 406 void spi_mem_driver_unregister(struct spi_mem_driver *memdrv) 407 { 408 spi_unregister_driver(&memdrv->spidrv); 409 } 410 EXPORT_SYMBOL_GPL(spi_mem_driver_unregister); 411