1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * SPI host driver using generic bitbanged GPIO 4 * 5 * Copyright (C) 2006,2008 David Brownell 6 * Copyright (C) 2017 Linus Walleij 7 */ 8 #include <linux/gpio/consumer.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/platform_device.h> 12 #include <linux/property.h> 13 14 #include <linux/spi/spi.h> 15 #include <linux/spi/spi_bitbang.h> 16 #include <linux/spi/spi_gpio.h> 17 18 /* 19 * This bitbanging SPI host driver should help make systems usable 20 * when a native hardware SPI engine is not available, perhaps because 21 * its driver isn't yet working or because the I/O pins it requires 22 * are used for other purposes. 23 * 24 * platform_device->driver_data ... points to spi_gpio 25 * 26 * spi->controller_state ... reserved for bitbang framework code 27 * 28 * spi->controller->dev.driver_data ... points to spi_gpio->bitbang 29 */ 30 31 struct spi_gpio { 32 struct spi_bitbang bitbang; 33 struct gpio_desc *sck; 34 struct gpio_desc *miso; 35 struct gpio_desc *mosi; 36 struct gpio_desc **cs_gpios; 37 }; 38 39 /*----------------------------------------------------------------------*/ 40 41 #define DRIVER_NAME "spi_gpio" 42 43 /*----------------------------------------------------------------------*/ 44 45 static inline struct spi_gpio *__pure 46 spi_to_spi_gpio(const struct spi_device *spi) 47 { 48 struct spi_bitbang *bang; 49 struct spi_gpio *spi_gpio; 50 51 bang = spi_controller_get_devdata(spi->controller); 52 spi_gpio = container_of(bang, struct spi_gpio, bitbang); 53 return spi_gpio; 54 } 55 56 /* These helpers are in turn called by the bitbang inlines */ 57 static inline void setsck(const struct spi_device *spi, int is_on) 58 { 59 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); 60 61 gpiod_set_value_cansleep(spi_gpio->sck, is_on); 62 } 63 64 static inline void setmosi(const struct spi_device *spi, int is_on) 65 { 66 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); 67 68 gpiod_set_value_cansleep(spi_gpio->mosi, is_on); 69 } 70 71 static inline int getmiso(const struct spi_device *spi) 72 { 73 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); 74 75 if (spi->mode & SPI_3WIRE) 76 return !!gpiod_get_value_cansleep(spi_gpio->mosi); 77 else 78 return !!gpiod_get_value_cansleep(spi_gpio->miso); 79 } 80 81 /* 82 * NOTE: this clocks "as fast as we can". It "should" be a function of the 83 * requested device clock. Software overhead means we usually have trouble 84 * reaching even one Mbit/sec (except when we can inline bitops), so for now 85 * we'll just assume we never need additional per-bit slowdowns. 86 */ 87 #define spidelay(nsecs) do {} while (0) 88 89 #include "spi-bitbang-txrx.h" 90 91 /* 92 * These functions can leverage inline expansion of GPIO calls to shrink 93 * costs for a txrx bit, often by factors of around ten (by instruction 94 * count). That is particularly visible for larger word sizes, but helps 95 * even with default 8-bit words. 96 * 97 * REVISIT overheads calling these functions for each word also have 98 * significant performance costs. Having txrx_bufs() calls that inline 99 * the txrx_word() logic would help performance, e.g. on larger blocks 100 * used with flash storage or MMC/SD. There should also be ways to make 101 * GCC be less stupid about reloading registers inside the I/O loops, 102 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3? 103 */ 104 105 static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi, 106 unsigned int nsecs, u32 word, u8 bits, unsigned int flags) 107 { 108 if (unlikely(spi->mode & SPI_LSB_FIRST)) 109 return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits); 110 else 111 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); 112 } 113 114 static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi, 115 unsigned int nsecs, u32 word, u8 bits, unsigned int flags) 116 { 117 if (unlikely(spi->mode & SPI_LSB_FIRST)) 118 return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits); 119 else 120 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); 121 } 122 123 static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi, 124 unsigned int nsecs, u32 word, u8 bits, unsigned int flags) 125 { 126 if (unlikely(spi->mode & SPI_LSB_FIRST)) 127 return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits); 128 else 129 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); 130 } 131 132 static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi, 133 unsigned int nsecs, u32 word, u8 bits, unsigned int flags) 134 { 135 if (unlikely(spi->mode & SPI_LSB_FIRST)) 136 return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits); 137 else 138 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); 139 } 140 141 /* 142 * These functions do not call setmosi or getmiso if respective flag 143 * (SPI_CONTROLLER_NO_RX or SPI_CONTROLLER_NO_TX) is set, so they are safe to 144 * call when such pin is not present or defined in the controller. 145 * A separate set of callbacks is defined to get highest possible 146 * speed in the generic case (when both MISO and MOSI lines are 147 * available), as optimiser will remove the checks when argument is 148 * constant. 149 */ 150 151 static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi, 152 unsigned int nsecs, u32 word, u8 bits, unsigned int flags) 153 { 154 flags = spi->controller->flags; 155 if (unlikely(spi->mode & SPI_LSB_FIRST)) 156 return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits); 157 else 158 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); 159 } 160 161 static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi, 162 unsigned int nsecs, u32 word, u8 bits, unsigned int flags) 163 { 164 flags = spi->controller->flags; 165 if (unlikely(spi->mode & SPI_LSB_FIRST)) 166 return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits); 167 else 168 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); 169 } 170 171 static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi, 172 unsigned int nsecs, u32 word, u8 bits, unsigned int flags) 173 { 174 flags = spi->controller->flags; 175 if (unlikely(spi->mode & SPI_LSB_FIRST)) 176 return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits); 177 else 178 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); 179 } 180 181 static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi, 182 unsigned int nsecs, u32 word, u8 bits, unsigned int flags) 183 { 184 flags = spi->controller->flags; 185 if (unlikely(spi->mode & SPI_LSB_FIRST)) 186 return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits); 187 else 188 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); 189 } 190 191 /*----------------------------------------------------------------------*/ 192 193 static void spi_gpio_chipselect(struct spi_device *spi, int is_active) 194 { 195 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); 196 197 /* set initial clock line level */ 198 if (is_active) 199 gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL); 200 201 /* Drive chip select line, if we have one */ 202 if (spi_gpio->cs_gpios) { 203 struct gpio_desc *cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)]; 204 205 /* SPI chip selects are normally active-low */ 206 gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active); 207 } 208 } 209 210 static void spi_gpio_set_mosi_idle(struct spi_device *spi) 211 { 212 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); 213 214 gpiod_set_value_cansleep(spi_gpio->mosi, 215 !!(spi->mode & SPI_MOSI_IDLE_HIGH)); 216 } 217 218 static int spi_gpio_setup(struct spi_device *spi) 219 { 220 struct gpio_desc *cs; 221 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); 222 int ret; 223 224 /* 225 * The CS GPIOs have already been 226 * initialized from the descriptor lookup. 227 */ 228 if (spi_gpio->cs_gpios) { 229 cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)]; 230 if (!spi->controller_state && cs) { 231 ret = gpiod_direction_output(cs, !(spi->mode & SPI_CS_HIGH)); 232 if (ret) 233 return ret; 234 } 235 } 236 237 return spi_bitbang_setup(spi); 238 } 239 240 static int spi_gpio_set_direction(struct spi_device *spi, bool output) 241 { 242 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); 243 int ret; 244 245 if (output) 246 return gpiod_direction_output(spi_gpio->mosi, 1); 247 248 /* 249 * Only change MOSI to an input if using 3WIRE mode. 250 * Otherwise, MOSI could be left floating if there is 251 * no pull resistor connected to the I/O pin, or could 252 * be left logic high if there is a pull-up. Transmitting 253 * logic high when only clocking MISO data in can put some 254 * SPI devices in to a bad state. 255 */ 256 if (spi->mode & SPI_3WIRE) { 257 ret = gpiod_direction_input(spi_gpio->mosi); 258 if (ret) 259 return ret; 260 } 261 /* 262 * Send a turnaround high impedance cycle when switching 263 * from output to input. Theoretically there should be 264 * a clock delay here, but as has been noted above, the 265 * nsec delay function for bit-banged GPIO is simply 266 * {} because bit-banging just doesn't get fast enough 267 * anyway. 268 */ 269 if (spi->mode & SPI_3WIRE_HIZ) { 270 gpiod_set_value_cansleep(spi_gpio->sck, 271 !(spi->mode & SPI_CPOL)); 272 gpiod_set_value_cansleep(spi_gpio->sck, 273 !!(spi->mode & SPI_CPOL)); 274 } 275 return 0; 276 } 277 278 static void spi_gpio_cleanup(struct spi_device *spi) 279 { 280 spi_bitbang_cleanup(spi); 281 } 282 283 /* 284 * It can be convenient to use this driver with pins that have alternate 285 * functions associated with a "native" SPI controller if a driver for that 286 * controller is not available, or is missing important functionality. 287 * 288 * On platforms which can do so, configure MISO with a weak pullup unless 289 * there's an external pullup on that signal. That saves power by avoiding 290 * floating signals. (A weak pulldown would save power too, but many 291 * drivers expect to see all-ones data as the no target "response".) 292 */ 293 static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio) 294 { 295 spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW); 296 if (IS_ERR(spi_gpio->mosi)) 297 return PTR_ERR(spi_gpio->mosi); 298 299 spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN); 300 if (IS_ERR(spi_gpio->miso)) 301 return PTR_ERR(spi_gpio->miso); 302 303 spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW); 304 return PTR_ERR_OR_ZERO(spi_gpio->sck); 305 } 306 307 static int spi_gpio_probe_pdata(struct platform_device *pdev, 308 struct spi_controller *host) 309 { 310 struct device *dev = &pdev->dev; 311 struct spi_gpio_platform_data *pdata = dev_get_platdata(dev); 312 struct spi_gpio *spi_gpio = spi_controller_get_devdata(host); 313 int i; 314 315 if (!pdata) 316 return -ENODEV; 317 318 /* It's just one always-selected device, fine to continue */ 319 if (!pdata->num_chipselect) 320 return 0; 321 322 host->num_chipselect = pdata->num_chipselect; 323 spi_gpio->cs_gpios = devm_kcalloc(dev, host->num_chipselect, 324 sizeof(*spi_gpio->cs_gpios), 325 GFP_KERNEL); 326 if (!spi_gpio->cs_gpios) 327 return -ENOMEM; 328 329 for (i = 0; i < host->num_chipselect; i++) { 330 spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i, 331 GPIOD_OUT_HIGH); 332 if (IS_ERR(spi_gpio->cs_gpios[i])) 333 return PTR_ERR(spi_gpio->cs_gpios[i]); 334 } 335 336 return 0; 337 } 338 339 static int spi_gpio_probe(struct platform_device *pdev) 340 { 341 int status; 342 struct spi_controller *host; 343 struct spi_gpio *spi_gpio; 344 struct device *dev = &pdev->dev; 345 struct fwnode_handle *fwnode = dev_fwnode(dev); 346 struct spi_bitbang *bb; 347 348 host = devm_spi_alloc_host(dev, sizeof(*spi_gpio)); 349 if (!host) 350 return -ENOMEM; 351 352 if (fwnode) { 353 host->use_gpio_descriptors = true; 354 } else { 355 status = spi_gpio_probe_pdata(pdev, host); 356 if (status) 357 return status; 358 } 359 360 spi_gpio = spi_controller_get_devdata(host); 361 362 status = spi_gpio_request(dev, spi_gpio); 363 if (status) 364 return status; 365 366 host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); 367 host->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL | 368 SPI_CS_HIGH | SPI_LSB_FIRST | SPI_MOSI_IDLE_LOW | 369 SPI_MOSI_IDLE_HIGH; 370 if (!spi_gpio->mosi) { 371 /* HW configuration without MOSI pin 372 * 373 * No setting SPI_CONTROLLER_NO_RX here - if there is only 374 * a MOSI pin connected the host can still do RX by 375 * changing the direction of the line. 376 */ 377 host->flags = SPI_CONTROLLER_NO_TX; 378 } 379 380 host->bus_num = pdev->id; 381 host->setup = spi_gpio_setup; 382 host->cleanup = spi_gpio_cleanup; 383 384 bb = &spi_gpio->bitbang; 385 bb->ctlr = host; 386 /* 387 * There is some additional business, apart from driving the CS GPIO 388 * line, that we need to do on selection. This makes the local 389 * callback for chipselect always get called. 390 */ 391 host->flags |= SPI_CONTROLLER_GPIO_SS; 392 bb->chipselect = spi_gpio_chipselect; 393 bb->set_line_direction = spi_gpio_set_direction; 394 bb->set_mosi_idle = spi_gpio_set_mosi_idle; 395 396 if (host->flags & SPI_CONTROLLER_NO_TX) { 397 bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0; 398 bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1; 399 bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2; 400 bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3; 401 } else { 402 bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0; 403 bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1; 404 bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2; 405 bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3; 406 } 407 bb->setup_transfer = spi_bitbang_setup_transfer; 408 409 status = spi_bitbang_init(&spi_gpio->bitbang); 410 if (status) 411 return status; 412 413 return devm_spi_register_controller(&pdev->dev, host); 414 } 415 416 static const struct of_device_id spi_gpio_dt_ids[] = { 417 { .compatible = "spi-gpio" }, 418 {} 419 }; 420 MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids); 421 422 static struct platform_driver spi_gpio_driver = { 423 .driver = { 424 .name = DRIVER_NAME, 425 .of_match_table = spi_gpio_dt_ids, 426 }, 427 .probe = spi_gpio_probe, 428 }; 429 module_platform_driver(spi_gpio_driver); 430 431 MODULE_DESCRIPTION("SPI host driver using generic bitbanged GPIO "); 432 MODULE_AUTHOR("David Brownell"); 433 MODULE_LICENSE("GPL"); 434 MODULE_ALIAS("platform:" DRIVER_NAME); 435