1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2 // Copyright(c) 2015-17 Intel Corporation. 3 4 #include <linux/acpi.h> 5 #include <linux/delay.h> 6 #include <linux/mod_devicetable.h> 7 #include <linux/pm_runtime.h> 8 #include <linux/soundwire/sdw_registers.h> 9 #include <linux/soundwire/sdw.h> 10 #include "bus.h" 11 #include "sysfs_local.h" 12 13 static DEFINE_IDA(sdw_ida); 14 15 static int sdw_get_id(struct sdw_bus *bus) 16 { 17 int rc = ida_alloc(&sdw_ida, GFP_KERNEL); 18 19 if (rc < 0) 20 return rc; 21 22 bus->id = rc; 23 return 0; 24 } 25 26 /** 27 * sdw_bus_master_add() - add a bus Master instance 28 * @bus: bus instance 29 * @parent: parent device 30 * @fwnode: firmware node handle 31 * 32 * Initializes the bus instance, read properties and create child 33 * devices. 34 */ 35 int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent, 36 struct fwnode_handle *fwnode) 37 { 38 struct sdw_master_prop *prop = NULL; 39 int ret; 40 41 if (!parent) { 42 pr_err("SoundWire parent device is not set\n"); 43 return -ENODEV; 44 } 45 46 ret = sdw_get_id(bus); 47 if (ret < 0) { 48 dev_err(parent, "Failed to get bus id\n"); 49 return ret; 50 } 51 52 ret = sdw_master_device_add(bus, parent, fwnode); 53 if (ret < 0) { 54 dev_err(parent, "Failed to add master device at link %d\n", 55 bus->link_id); 56 return ret; 57 } 58 59 if (!bus->ops) { 60 dev_err(bus->dev, "SoundWire Bus ops are not set\n"); 61 return -EINVAL; 62 } 63 64 if (!bus->compute_params) { 65 dev_err(bus->dev, 66 "Bandwidth allocation not configured, compute_params no set\n"); 67 return -EINVAL; 68 } 69 70 mutex_init(&bus->msg_lock); 71 mutex_init(&bus->bus_lock); 72 INIT_LIST_HEAD(&bus->slaves); 73 INIT_LIST_HEAD(&bus->m_rt_list); 74 75 /* 76 * Initialize multi_link flag 77 * TODO: populate this flag by reading property from FW node 78 */ 79 bus->multi_link = false; 80 if (bus->ops->read_prop) { 81 ret = bus->ops->read_prop(bus); 82 if (ret < 0) { 83 dev_err(bus->dev, 84 "Bus read properties failed:%d\n", ret); 85 return ret; 86 } 87 } 88 89 sdw_bus_debugfs_init(bus); 90 91 /* 92 * Device numbers in SoundWire are 0 through 15. Enumeration device 93 * number (0), Broadcast device number (15), Group numbers (12 and 94 * 13) and Master device number (14) are not used for assignment so 95 * mask these and other higher bits. 96 */ 97 98 /* Set higher order bits */ 99 *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM); 100 101 /* Set enumuration device number and broadcast device number */ 102 set_bit(SDW_ENUM_DEV_NUM, bus->assigned); 103 set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned); 104 105 /* Set group device numbers and master device number */ 106 set_bit(SDW_GROUP12_DEV_NUM, bus->assigned); 107 set_bit(SDW_GROUP13_DEV_NUM, bus->assigned); 108 set_bit(SDW_MASTER_DEV_NUM, bus->assigned); 109 110 /* 111 * SDW is an enumerable bus, but devices can be powered off. So, 112 * they won't be able to report as present. 113 * 114 * Create Slave devices based on Slaves described in 115 * the respective firmware (ACPI/DT) 116 */ 117 if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev)) 118 ret = sdw_acpi_find_slaves(bus); 119 else if (IS_ENABLED(CONFIG_OF) && bus->dev->of_node) 120 ret = sdw_of_find_slaves(bus); 121 else 122 ret = -ENOTSUPP; /* No ACPI/DT so error out */ 123 124 if (ret < 0) { 125 dev_err(bus->dev, "Finding slaves failed:%d\n", ret); 126 return ret; 127 } 128 129 /* 130 * Initialize clock values based on Master properties. The max 131 * frequency is read from max_clk_freq property. Current assumption 132 * is that the bus will start at highest clock frequency when 133 * powered on. 134 * 135 * Default active bank will be 0 as out of reset the Slaves have 136 * to start with bank 0 (Table 40 of Spec) 137 */ 138 prop = &bus->prop; 139 bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR; 140 bus->params.curr_dr_freq = bus->params.max_dr_freq; 141 bus->params.curr_bank = SDW_BANK0; 142 bus->params.next_bank = SDW_BANK1; 143 144 return 0; 145 } 146 EXPORT_SYMBOL(sdw_bus_master_add); 147 148 static int sdw_delete_slave(struct device *dev, void *data) 149 { 150 struct sdw_slave *slave = dev_to_sdw_dev(dev); 151 struct sdw_bus *bus = slave->bus; 152 153 pm_runtime_disable(dev); 154 155 sdw_slave_debugfs_exit(slave); 156 157 mutex_lock(&bus->bus_lock); 158 159 if (slave->dev_num) /* clear dev_num if assigned */ 160 clear_bit(slave->dev_num, bus->assigned); 161 162 list_del_init(&slave->node); 163 mutex_unlock(&bus->bus_lock); 164 165 device_unregister(dev); 166 return 0; 167 } 168 169 /** 170 * sdw_bus_master_delete() - delete the bus master instance 171 * @bus: bus to be deleted 172 * 173 * Remove the instance, delete the child devices. 174 */ 175 void sdw_bus_master_delete(struct sdw_bus *bus) 176 { 177 device_for_each_child(bus->dev, NULL, sdw_delete_slave); 178 sdw_master_device_del(bus); 179 180 sdw_bus_debugfs_exit(bus); 181 ida_free(&sdw_ida, bus->id); 182 } 183 EXPORT_SYMBOL(sdw_bus_master_delete); 184 185 /* 186 * SDW IO Calls 187 */ 188 189 static inline int find_response_code(enum sdw_command_response resp) 190 { 191 switch (resp) { 192 case SDW_CMD_OK: 193 return 0; 194 195 case SDW_CMD_IGNORED: 196 return -ENODATA; 197 198 case SDW_CMD_TIMEOUT: 199 return -ETIMEDOUT; 200 201 default: 202 return -EIO; 203 } 204 } 205 206 static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg) 207 { 208 int retry = bus->prop.err_threshold; 209 enum sdw_command_response resp; 210 int ret = 0, i; 211 212 for (i = 0; i <= retry; i++) { 213 resp = bus->ops->xfer_msg(bus, msg); 214 ret = find_response_code(resp); 215 216 /* if cmd is ok or ignored return */ 217 if (ret == 0 || ret == -ENODATA) 218 return ret; 219 } 220 221 return ret; 222 } 223 224 static inline int do_transfer_defer(struct sdw_bus *bus, 225 struct sdw_msg *msg, 226 struct sdw_defer *defer) 227 { 228 int retry = bus->prop.err_threshold; 229 enum sdw_command_response resp; 230 int ret = 0, i; 231 232 defer->msg = msg; 233 defer->length = msg->len; 234 init_completion(&defer->complete); 235 236 for (i = 0; i <= retry; i++) { 237 resp = bus->ops->xfer_msg_defer(bus, msg, defer); 238 ret = find_response_code(resp); 239 /* if cmd is ok or ignored return */ 240 if (ret == 0 || ret == -ENODATA) 241 return ret; 242 } 243 244 return ret; 245 } 246 247 static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num) 248 { 249 int retry = bus->prop.err_threshold; 250 enum sdw_command_response resp; 251 int ret = 0, i; 252 253 for (i = 0; i <= retry; i++) { 254 resp = bus->ops->reset_page_addr(bus, dev_num); 255 ret = find_response_code(resp); 256 /* if cmd is ok or ignored return */ 257 if (ret == 0 || ret == -ENODATA) 258 return ret; 259 } 260 261 return ret; 262 } 263 264 static int sdw_transfer_unlocked(struct sdw_bus *bus, struct sdw_msg *msg) 265 { 266 int ret; 267 268 ret = do_transfer(bus, msg); 269 if (ret != 0 && ret != -ENODATA) 270 dev_err(bus->dev, "trf on Slave %d failed:%d %s addr %x count %d\n", 271 msg->dev_num, ret, 272 (msg->flags & SDW_MSG_FLAG_WRITE) ? "write" : "read", 273 msg->addr, msg->len); 274 275 if (msg->page) 276 sdw_reset_page(bus, msg->dev_num); 277 278 return ret; 279 } 280 281 /** 282 * sdw_transfer() - Synchronous transfer message to a SDW Slave device 283 * @bus: SDW bus 284 * @msg: SDW message to be xfered 285 */ 286 int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg) 287 { 288 int ret; 289 290 mutex_lock(&bus->msg_lock); 291 292 ret = sdw_transfer_unlocked(bus, msg); 293 294 mutex_unlock(&bus->msg_lock); 295 296 return ret; 297 } 298 299 /** 300 * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device 301 * @bus: SDW bus 302 * @msg: SDW message to be xfered 303 * @defer: Defer block for signal completion 304 * 305 * Caller needs to hold the msg_lock lock while calling this 306 */ 307 int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg, 308 struct sdw_defer *defer) 309 { 310 int ret; 311 312 if (!bus->ops->xfer_msg_defer) 313 return -ENOTSUPP; 314 315 ret = do_transfer_defer(bus, msg, defer); 316 if (ret != 0 && ret != -ENODATA) 317 dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n", 318 msg->dev_num, ret); 319 320 if (msg->page) 321 sdw_reset_page(bus, msg->dev_num); 322 323 return ret; 324 } 325 326 int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave, 327 u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf) 328 { 329 memset(msg, 0, sizeof(*msg)); 330 msg->addr = addr; /* addr is 16 bit and truncated here */ 331 msg->len = count; 332 msg->dev_num = dev_num; 333 msg->flags = flags; 334 msg->buf = buf; 335 336 if (addr < SDW_REG_NO_PAGE) /* no paging area */ 337 return 0; 338 339 if (addr >= SDW_REG_MAX) { /* illegal addr */ 340 pr_err("SDW: Invalid address %x passed\n", addr); 341 return -EINVAL; 342 } 343 344 if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */ 345 if (slave && !slave->prop.paging_support) 346 return 0; 347 /* no need for else as that will fall-through to paging */ 348 } 349 350 /* paging mandatory */ 351 if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) { 352 pr_err("SDW: Invalid device for paging :%d\n", dev_num); 353 return -EINVAL; 354 } 355 356 if (!slave) { 357 pr_err("SDW: No slave for paging addr\n"); 358 return -EINVAL; 359 } 360 361 if (!slave->prop.paging_support) { 362 dev_err(&slave->dev, 363 "address %x needs paging but no support\n", addr); 364 return -EINVAL; 365 } 366 367 msg->addr_page1 = FIELD_GET(SDW_SCP_ADDRPAGE1_MASK, addr); 368 msg->addr_page2 = FIELD_GET(SDW_SCP_ADDRPAGE2_MASK, addr); 369 msg->addr |= BIT(15); 370 msg->page = true; 371 372 return 0; 373 } 374 375 /* 376 * Read/Write IO functions. 377 * no_pm versions can only be called by the bus, e.g. while enumerating or 378 * handling suspend-resume sequences. 379 * all clients need to use the pm versions 380 */ 381 382 static int 383 sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) 384 { 385 struct sdw_msg msg; 386 int ret; 387 388 ret = sdw_fill_msg(&msg, slave, addr, count, 389 slave->dev_num, SDW_MSG_FLAG_READ, val); 390 if (ret < 0) 391 return ret; 392 393 return sdw_transfer(slave->bus, &msg); 394 } 395 396 static int 397 sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) 398 { 399 struct sdw_msg msg; 400 int ret; 401 402 ret = sdw_fill_msg(&msg, slave, addr, count, 403 slave->dev_num, SDW_MSG_FLAG_WRITE, val); 404 if (ret < 0) 405 return ret; 406 407 return sdw_transfer(slave->bus, &msg); 408 } 409 410 int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value) 411 { 412 return sdw_nwrite_no_pm(slave, addr, 1, &value); 413 } 414 EXPORT_SYMBOL(sdw_write_no_pm); 415 416 static int 417 sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr) 418 { 419 struct sdw_msg msg; 420 u8 buf; 421 int ret; 422 423 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, 424 SDW_MSG_FLAG_READ, &buf); 425 if (ret < 0) 426 return ret; 427 428 ret = sdw_transfer(bus, &msg); 429 if (ret < 0) 430 return ret; 431 432 return buf; 433 } 434 435 static int 436 sdw_bwrite_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value) 437 { 438 struct sdw_msg msg; 439 int ret; 440 441 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, 442 SDW_MSG_FLAG_WRITE, &value); 443 if (ret < 0) 444 return ret; 445 446 return sdw_transfer(bus, &msg); 447 } 448 449 int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr) 450 { 451 struct sdw_msg msg; 452 u8 buf; 453 int ret; 454 455 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, 456 SDW_MSG_FLAG_READ, &buf); 457 if (ret < 0) 458 return ret; 459 460 ret = sdw_transfer_unlocked(bus, &msg); 461 if (ret < 0) 462 return ret; 463 464 return buf; 465 } 466 EXPORT_SYMBOL(sdw_bread_no_pm_unlocked); 467 468 int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value) 469 { 470 struct sdw_msg msg; 471 int ret; 472 473 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, 474 SDW_MSG_FLAG_WRITE, &value); 475 if (ret < 0) 476 return ret; 477 478 return sdw_transfer_unlocked(bus, &msg); 479 } 480 EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked); 481 482 int sdw_read_no_pm(struct sdw_slave *slave, u32 addr) 483 { 484 u8 buf; 485 int ret; 486 487 ret = sdw_nread_no_pm(slave, addr, 1, &buf); 488 if (ret < 0) 489 return ret; 490 else 491 return buf; 492 } 493 EXPORT_SYMBOL(sdw_read_no_pm); 494 495 static int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) 496 { 497 int tmp; 498 499 tmp = sdw_read_no_pm(slave, addr); 500 if (tmp < 0) 501 return tmp; 502 503 tmp = (tmp & ~mask) | val; 504 return sdw_write_no_pm(slave, addr, tmp); 505 } 506 507 /** 508 * sdw_nread() - Read "n" contiguous SDW Slave registers 509 * @slave: SDW Slave 510 * @addr: Register address 511 * @count: length 512 * @val: Buffer for values to be read 513 */ 514 int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) 515 { 516 int ret; 517 518 ret = pm_runtime_get_sync(&slave->dev); 519 if (ret < 0 && ret != -EACCES) { 520 pm_runtime_put_noidle(&slave->dev); 521 return ret; 522 } 523 524 ret = sdw_nread_no_pm(slave, addr, count, val); 525 526 pm_runtime_mark_last_busy(&slave->dev); 527 pm_runtime_put(&slave->dev); 528 529 return ret; 530 } 531 EXPORT_SYMBOL(sdw_nread); 532 533 /** 534 * sdw_nwrite() - Write "n" contiguous SDW Slave registers 535 * @slave: SDW Slave 536 * @addr: Register address 537 * @count: length 538 * @val: Buffer for values to be read 539 */ 540 int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) 541 { 542 int ret; 543 544 ret = pm_runtime_get_sync(&slave->dev); 545 if (ret < 0 && ret != -EACCES) { 546 pm_runtime_put_noidle(&slave->dev); 547 return ret; 548 } 549 550 ret = sdw_nwrite_no_pm(slave, addr, count, val); 551 552 pm_runtime_mark_last_busy(&slave->dev); 553 pm_runtime_put(&slave->dev); 554 555 return ret; 556 } 557 EXPORT_SYMBOL(sdw_nwrite); 558 559 /** 560 * sdw_read() - Read a SDW Slave register 561 * @slave: SDW Slave 562 * @addr: Register address 563 */ 564 int sdw_read(struct sdw_slave *slave, u32 addr) 565 { 566 u8 buf; 567 int ret; 568 569 ret = sdw_nread(slave, addr, 1, &buf); 570 if (ret < 0) 571 return ret; 572 573 return buf; 574 } 575 EXPORT_SYMBOL(sdw_read); 576 577 /** 578 * sdw_write() - Write a SDW Slave register 579 * @slave: SDW Slave 580 * @addr: Register address 581 * @value: Register value 582 */ 583 int sdw_write(struct sdw_slave *slave, u32 addr, u8 value) 584 { 585 return sdw_nwrite(slave, addr, 1, &value); 586 } 587 EXPORT_SYMBOL(sdw_write); 588 589 /* 590 * SDW alert handling 591 */ 592 593 /* called with bus_lock held */ 594 static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i) 595 { 596 struct sdw_slave *slave; 597 598 list_for_each_entry(slave, &bus->slaves, node) { 599 if (slave->dev_num == i) 600 return slave; 601 } 602 603 return NULL; 604 } 605 606 int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id) 607 { 608 if (slave->id.mfg_id != id.mfg_id || 609 slave->id.part_id != id.part_id || 610 slave->id.class_id != id.class_id || 611 (slave->id.unique_id != SDW_IGNORED_UNIQUE_ID && 612 slave->id.unique_id != id.unique_id)) 613 return -ENODEV; 614 615 return 0; 616 } 617 EXPORT_SYMBOL(sdw_compare_devid); 618 619 /* called with bus_lock held */ 620 static int sdw_get_device_num(struct sdw_slave *slave) 621 { 622 int bit; 623 624 bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES); 625 if (bit == SDW_MAX_DEVICES) { 626 bit = -ENODEV; 627 goto err; 628 } 629 630 /* 631 * Do not update dev_num in Slave data structure here, 632 * Update once program dev_num is successful 633 */ 634 set_bit(bit, slave->bus->assigned); 635 636 err: 637 return bit; 638 } 639 640 static int sdw_assign_device_num(struct sdw_slave *slave) 641 { 642 struct sdw_bus *bus = slave->bus; 643 int ret, dev_num; 644 bool new_device = false; 645 646 /* check first if device number is assigned, if so reuse that */ 647 if (!slave->dev_num) { 648 if (!slave->dev_num_sticky) { 649 mutex_lock(&slave->bus->bus_lock); 650 dev_num = sdw_get_device_num(slave); 651 mutex_unlock(&slave->bus->bus_lock); 652 if (dev_num < 0) { 653 dev_err(bus->dev, "Get dev_num failed: %d\n", 654 dev_num); 655 return dev_num; 656 } 657 slave->dev_num = dev_num; 658 slave->dev_num_sticky = dev_num; 659 new_device = true; 660 } else { 661 slave->dev_num = slave->dev_num_sticky; 662 } 663 } 664 665 if (!new_device) 666 dev_dbg(bus->dev, 667 "Slave already registered, reusing dev_num:%d\n", 668 slave->dev_num); 669 670 /* Clear the slave->dev_num to transfer message on device 0 */ 671 dev_num = slave->dev_num; 672 slave->dev_num = 0; 673 674 ret = sdw_write_no_pm(slave, SDW_SCP_DEVNUMBER, dev_num); 675 if (ret < 0) { 676 dev_err(bus->dev, "Program device_num %d failed: %d\n", 677 dev_num, ret); 678 return ret; 679 } 680 681 /* After xfer of msg, restore dev_num */ 682 slave->dev_num = slave->dev_num_sticky; 683 684 return 0; 685 } 686 687 void sdw_extract_slave_id(struct sdw_bus *bus, 688 u64 addr, struct sdw_slave_id *id) 689 { 690 dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr); 691 692 id->sdw_version = SDW_VERSION(addr); 693 id->unique_id = SDW_UNIQUE_ID(addr); 694 id->mfg_id = SDW_MFG_ID(addr); 695 id->part_id = SDW_PART_ID(addr); 696 id->class_id = SDW_CLASS_ID(addr); 697 698 dev_dbg(bus->dev, 699 "SDW Slave class_id 0x%02x, mfg_id 0x%04x, part_id 0x%04x, unique_id 0x%x, version 0x%x\n", 700 id->class_id, id->mfg_id, id->part_id, id->unique_id, id->sdw_version); 701 } 702 EXPORT_SYMBOL(sdw_extract_slave_id); 703 704 static int sdw_program_device_num(struct sdw_bus *bus) 705 { 706 u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0}; 707 struct sdw_slave *slave, *_s; 708 struct sdw_slave_id id; 709 struct sdw_msg msg; 710 bool found; 711 int count = 0, ret; 712 u64 addr; 713 714 /* No Slave, so use raw xfer api */ 715 ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0, 716 SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf); 717 if (ret < 0) 718 return ret; 719 720 do { 721 ret = sdw_transfer(bus, &msg); 722 if (ret == -ENODATA) { /* end of device id reads */ 723 dev_dbg(bus->dev, "No more devices to enumerate\n"); 724 ret = 0; 725 break; 726 } 727 if (ret < 0) { 728 dev_err(bus->dev, "DEVID read fail:%d\n", ret); 729 break; 730 } 731 732 /* 733 * Construct the addr and extract. Cast the higher shift 734 * bits to avoid truncation due to size limit. 735 */ 736 addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) | 737 ((u64)buf[2] << 24) | ((u64)buf[1] << 32) | 738 ((u64)buf[0] << 40); 739 740 sdw_extract_slave_id(bus, addr, &id); 741 742 found = false; 743 /* Now compare with entries */ 744 list_for_each_entry_safe(slave, _s, &bus->slaves, node) { 745 if (sdw_compare_devid(slave, id) == 0) { 746 found = true; 747 748 /* 749 * Assign a new dev_num to this Slave and 750 * not mark it present. It will be marked 751 * present after it reports ATTACHED on new 752 * dev_num 753 */ 754 ret = sdw_assign_device_num(slave); 755 if (ret < 0) { 756 dev_err(bus->dev, 757 "Assign dev_num failed:%d\n", 758 ret); 759 return ret; 760 } 761 762 break; 763 } 764 } 765 766 if (!found) { 767 /* TODO: Park this device in Group 13 */ 768 769 /* 770 * add Slave device even if there is no platform 771 * firmware description. There will be no driver probe 772 * but the user/integration will be able to see the 773 * device, enumeration status and device number in sysfs 774 */ 775 sdw_slave_add(bus, &id, NULL); 776 777 dev_err(bus->dev, "Slave Entry not found\n"); 778 } 779 780 count++; 781 782 /* 783 * Check till error out or retry (count) exhausts. 784 * Device can drop off and rejoin during enumeration 785 * so count till twice the bound. 786 */ 787 788 } while (ret == 0 && count < (SDW_MAX_DEVICES * 2)); 789 790 return ret; 791 } 792 793 static void sdw_modify_slave_status(struct sdw_slave *slave, 794 enum sdw_slave_status status) 795 { 796 struct sdw_bus *bus = slave->bus; 797 798 mutex_lock(&bus->bus_lock); 799 800 dev_vdbg(bus->dev, 801 "%s: changing status slave %d status %d new status %d\n", 802 __func__, slave->dev_num, slave->status, status); 803 804 if (status == SDW_SLAVE_UNATTACHED) { 805 dev_dbg(&slave->dev, 806 "%s: initializing enumeration and init completion for Slave %d\n", 807 __func__, slave->dev_num); 808 809 init_completion(&slave->enumeration_complete); 810 init_completion(&slave->initialization_complete); 811 812 } else if ((status == SDW_SLAVE_ATTACHED) && 813 (slave->status == SDW_SLAVE_UNATTACHED)) { 814 dev_dbg(&slave->dev, 815 "%s: signaling enumeration completion for Slave %d\n", 816 __func__, slave->dev_num); 817 818 complete(&slave->enumeration_complete); 819 } 820 slave->status = status; 821 mutex_unlock(&bus->bus_lock); 822 } 823 824 static enum sdw_clk_stop_mode sdw_get_clk_stop_mode(struct sdw_slave *slave) 825 { 826 enum sdw_clk_stop_mode mode; 827 828 /* 829 * Query for clock stop mode if Slave implements 830 * ops->get_clk_stop_mode, else read from property. 831 */ 832 if (slave->ops && slave->ops->get_clk_stop_mode) { 833 mode = slave->ops->get_clk_stop_mode(slave); 834 } else { 835 if (slave->prop.clk_stop_mode1) 836 mode = SDW_CLK_STOP_MODE1; 837 else 838 mode = SDW_CLK_STOP_MODE0; 839 } 840 841 return mode; 842 } 843 844 static int sdw_slave_clk_stop_callback(struct sdw_slave *slave, 845 enum sdw_clk_stop_mode mode, 846 enum sdw_clk_stop_type type) 847 { 848 int ret; 849 850 if (slave->ops && slave->ops->clk_stop) { 851 ret = slave->ops->clk_stop(slave, mode, type); 852 if (ret < 0) { 853 dev_err(&slave->dev, 854 "Clk Stop type =%d failed: %d\n", type, ret); 855 return ret; 856 } 857 } 858 859 return 0; 860 } 861 862 static int sdw_slave_clk_stop_prepare(struct sdw_slave *slave, 863 enum sdw_clk_stop_mode mode, 864 bool prepare) 865 { 866 bool wake_en; 867 u32 val = 0; 868 int ret; 869 870 wake_en = slave->prop.wake_capable; 871 872 if (prepare) { 873 val = SDW_SCP_SYSTEMCTRL_CLK_STP_PREP; 874 875 if (mode == SDW_CLK_STOP_MODE1) 876 val |= SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1; 877 878 if (wake_en) 879 val |= SDW_SCP_SYSTEMCTRL_WAKE_UP_EN; 880 } else { 881 ret = sdw_read_no_pm(slave, SDW_SCP_SYSTEMCTRL); 882 if (ret < 0) { 883 dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL read failed:%d\n", ret); 884 return ret; 885 } 886 val = ret; 887 val &= ~(SDW_SCP_SYSTEMCTRL_CLK_STP_PREP); 888 } 889 890 ret = sdw_write_no_pm(slave, SDW_SCP_SYSTEMCTRL, val); 891 892 if (ret < 0) 893 dev_err(&slave->dev, 894 "Clock Stop prepare failed for slave: %d", ret); 895 896 return ret; 897 } 898 899 static int sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus *bus, u16 dev_num) 900 { 901 int retry = bus->clk_stop_timeout; 902 int val; 903 904 do { 905 val = sdw_bread_no_pm(bus, dev_num, SDW_SCP_STAT); 906 if (val < 0) { 907 dev_err(bus->dev, "SDW_SCP_STAT bread failed:%d\n", val); 908 return val; 909 } 910 val &= SDW_SCP_STAT_CLK_STP_NF; 911 if (!val) { 912 dev_dbg(bus->dev, "clock stop prep/de-prep done slave:%d", 913 dev_num); 914 return 0; 915 } 916 917 usleep_range(1000, 1500); 918 retry--; 919 } while (retry); 920 921 dev_err(bus->dev, "clock stop prep/de-prep failed slave:%d", 922 dev_num); 923 924 return -ETIMEDOUT; 925 } 926 927 /** 928 * sdw_bus_prep_clk_stop: prepare Slave(s) for clock stop 929 * 930 * @bus: SDW bus instance 931 * 932 * Query Slave for clock stop mode and prepare for that mode. 933 */ 934 int sdw_bus_prep_clk_stop(struct sdw_bus *bus) 935 { 936 enum sdw_clk_stop_mode slave_mode; 937 bool simple_clk_stop = true; 938 struct sdw_slave *slave; 939 bool is_slave = false; 940 int ret = 0; 941 942 /* 943 * In order to save on transition time, prepare 944 * each Slave and then wait for all Slave(s) to be 945 * prepared for clock stop. 946 */ 947 list_for_each_entry(slave, &bus->slaves, node) { 948 if (!slave->dev_num) 949 continue; 950 951 if (slave->status != SDW_SLAVE_ATTACHED && 952 slave->status != SDW_SLAVE_ALERT) 953 continue; 954 955 /* Identify if Slave(s) are available on Bus */ 956 is_slave = true; 957 958 slave_mode = sdw_get_clk_stop_mode(slave); 959 slave->curr_clk_stop_mode = slave_mode; 960 961 ret = sdw_slave_clk_stop_callback(slave, slave_mode, 962 SDW_CLK_PRE_PREPARE); 963 if (ret < 0) { 964 dev_err(&slave->dev, 965 "pre-prepare failed:%d", ret); 966 return ret; 967 } 968 969 ret = sdw_slave_clk_stop_prepare(slave, 970 slave_mode, true); 971 if (ret < 0) { 972 dev_err(&slave->dev, 973 "pre-prepare failed:%d", ret); 974 return ret; 975 } 976 977 if (slave_mode == SDW_CLK_STOP_MODE1) 978 simple_clk_stop = false; 979 } 980 981 /* Skip remaining clock stop preparation if no Slave is attached */ 982 if (!is_slave) 983 return ret; 984 985 if (!simple_clk_stop) { 986 ret = sdw_bus_wait_for_clk_prep_deprep(bus, 987 SDW_BROADCAST_DEV_NUM); 988 if (ret < 0) 989 return ret; 990 } 991 992 /* Inform slaves that prep is done */ 993 list_for_each_entry(slave, &bus->slaves, node) { 994 if (!slave->dev_num) 995 continue; 996 997 if (slave->status != SDW_SLAVE_ATTACHED && 998 slave->status != SDW_SLAVE_ALERT) 999 continue; 1000 1001 slave_mode = slave->curr_clk_stop_mode; 1002 1003 if (slave_mode == SDW_CLK_STOP_MODE1) { 1004 ret = sdw_slave_clk_stop_callback(slave, 1005 slave_mode, 1006 SDW_CLK_POST_PREPARE); 1007 1008 if (ret < 0) { 1009 dev_err(&slave->dev, 1010 "post-prepare failed:%d", ret); 1011 } 1012 } 1013 } 1014 1015 return ret; 1016 } 1017 EXPORT_SYMBOL(sdw_bus_prep_clk_stop); 1018 1019 /** 1020 * sdw_bus_clk_stop: stop bus clock 1021 * 1022 * @bus: SDW bus instance 1023 * 1024 * After preparing the Slaves for clock stop, stop the clock by broadcasting 1025 * write to SCP_CTRL register. 1026 */ 1027 int sdw_bus_clk_stop(struct sdw_bus *bus) 1028 { 1029 int ret; 1030 1031 /* 1032 * broadcast clock stop now, attached Slaves will ACK this, 1033 * unattached will ignore 1034 */ 1035 ret = sdw_bwrite_no_pm(bus, SDW_BROADCAST_DEV_NUM, 1036 SDW_SCP_CTRL, SDW_SCP_CTRL_CLK_STP_NOW); 1037 if (ret < 0) { 1038 if (ret == -ENODATA) 1039 dev_dbg(bus->dev, 1040 "ClockStopNow Broadcast msg ignored %d", ret); 1041 else 1042 dev_err(bus->dev, 1043 "ClockStopNow Broadcast msg failed %d", ret); 1044 return ret; 1045 } 1046 1047 return 0; 1048 } 1049 EXPORT_SYMBOL(sdw_bus_clk_stop); 1050 1051 /** 1052 * sdw_bus_exit_clk_stop: Exit clock stop mode 1053 * 1054 * @bus: SDW bus instance 1055 * 1056 * This De-prepares the Slaves by exiting Clock Stop Mode 0. For the Slaves 1057 * exiting Clock Stop Mode 1, they will be de-prepared after they enumerate 1058 * back. 1059 */ 1060 int sdw_bus_exit_clk_stop(struct sdw_bus *bus) 1061 { 1062 enum sdw_clk_stop_mode mode; 1063 bool simple_clk_stop = true; 1064 struct sdw_slave *slave; 1065 bool is_slave = false; 1066 int ret; 1067 1068 /* 1069 * In order to save on transition time, de-prepare 1070 * each Slave and then wait for all Slave(s) to be 1071 * de-prepared after clock resume. 1072 */ 1073 list_for_each_entry(slave, &bus->slaves, node) { 1074 if (!slave->dev_num) 1075 continue; 1076 1077 if (slave->status != SDW_SLAVE_ATTACHED && 1078 slave->status != SDW_SLAVE_ALERT) 1079 continue; 1080 1081 /* Identify if Slave(s) are available on Bus */ 1082 is_slave = true; 1083 1084 mode = slave->curr_clk_stop_mode; 1085 1086 if (mode == SDW_CLK_STOP_MODE1) { 1087 simple_clk_stop = false; 1088 continue; 1089 } 1090 1091 ret = sdw_slave_clk_stop_callback(slave, mode, 1092 SDW_CLK_PRE_DEPREPARE); 1093 if (ret < 0) 1094 dev_warn(&slave->dev, 1095 "clk stop deprep failed:%d", ret); 1096 1097 ret = sdw_slave_clk_stop_prepare(slave, mode, 1098 false); 1099 1100 if (ret < 0) 1101 dev_warn(&slave->dev, 1102 "clk stop deprep failed:%d", ret); 1103 } 1104 1105 /* Skip remaining clock stop de-preparation if no Slave is attached */ 1106 if (!is_slave) 1107 return 0; 1108 1109 if (!simple_clk_stop) 1110 sdw_bus_wait_for_clk_prep_deprep(bus, SDW_BROADCAST_DEV_NUM); 1111 1112 list_for_each_entry(slave, &bus->slaves, node) { 1113 if (!slave->dev_num) 1114 continue; 1115 1116 if (slave->status != SDW_SLAVE_ATTACHED && 1117 slave->status != SDW_SLAVE_ALERT) 1118 continue; 1119 1120 mode = slave->curr_clk_stop_mode; 1121 sdw_slave_clk_stop_callback(slave, mode, 1122 SDW_CLK_POST_DEPREPARE); 1123 } 1124 1125 return 0; 1126 } 1127 EXPORT_SYMBOL(sdw_bus_exit_clk_stop); 1128 1129 int sdw_configure_dpn_intr(struct sdw_slave *slave, 1130 int port, bool enable, int mask) 1131 { 1132 u32 addr; 1133 int ret; 1134 u8 val = 0; 1135 1136 if (slave->bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL) { 1137 dev_dbg(&slave->dev, "TEST FAIL interrupt %s\n", 1138 enable ? "on" : "off"); 1139 mask |= SDW_DPN_INT_TEST_FAIL; 1140 } 1141 1142 addr = SDW_DPN_INTMASK(port); 1143 1144 /* Set/Clear port ready interrupt mask */ 1145 if (enable) { 1146 val |= mask; 1147 val |= SDW_DPN_INT_PORT_READY; 1148 } else { 1149 val &= ~(mask); 1150 val &= ~SDW_DPN_INT_PORT_READY; 1151 } 1152 1153 ret = sdw_update(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val); 1154 if (ret < 0) 1155 dev_err(&slave->dev, 1156 "SDW_DPN_INTMASK write failed:%d\n", val); 1157 1158 return ret; 1159 } 1160 1161 static int sdw_slave_set_frequency(struct sdw_slave *slave) 1162 { 1163 u32 mclk_freq = slave->bus->prop.mclk_freq; 1164 u32 curr_freq = slave->bus->params.curr_dr_freq >> 1; 1165 unsigned int scale; 1166 u8 scale_index; 1167 u8 base; 1168 int ret; 1169 1170 /* 1171 * frequency base and scale registers are required for SDCA 1172 * devices. They may also be used for 1.2+/non-SDCA devices, 1173 * but we will need a DisCo property to cover this case 1174 */ 1175 if (!slave->id.class_id) 1176 return 0; 1177 1178 if (!mclk_freq) { 1179 dev_err(&slave->dev, 1180 "no bus MCLK, cannot set SDW_SCP_BUS_CLOCK_BASE\n"); 1181 return -EINVAL; 1182 } 1183 1184 /* 1185 * map base frequency using Table 89 of SoundWire 1.2 spec. 1186 * The order of the tests just follows the specification, this 1187 * is not a selection between possible values or a search for 1188 * the best value but just a mapping. Only one case per platform 1189 * is relevant. 1190 * Some BIOS have inconsistent values for mclk_freq but a 1191 * correct root so we force the mclk_freq to avoid variations. 1192 */ 1193 if (!(19200000 % mclk_freq)) { 1194 mclk_freq = 19200000; 1195 base = SDW_SCP_BASE_CLOCK_19200000_HZ; 1196 } else if (!(24000000 % mclk_freq)) { 1197 mclk_freq = 24000000; 1198 base = SDW_SCP_BASE_CLOCK_24000000_HZ; 1199 } else if (!(24576000 % mclk_freq)) { 1200 mclk_freq = 24576000; 1201 base = SDW_SCP_BASE_CLOCK_24576000_HZ; 1202 } else if (!(22579200 % mclk_freq)) { 1203 mclk_freq = 22579200; 1204 base = SDW_SCP_BASE_CLOCK_22579200_HZ; 1205 } else if (!(32000000 % mclk_freq)) { 1206 mclk_freq = 32000000; 1207 base = SDW_SCP_BASE_CLOCK_32000000_HZ; 1208 } else { 1209 dev_err(&slave->dev, 1210 "Unsupported clock base, mclk %d\n", 1211 mclk_freq); 1212 return -EINVAL; 1213 } 1214 1215 if (mclk_freq % curr_freq) { 1216 dev_err(&slave->dev, 1217 "mclk %d is not multiple of bus curr_freq %d\n", 1218 mclk_freq, curr_freq); 1219 return -EINVAL; 1220 } 1221 1222 scale = mclk_freq / curr_freq; 1223 1224 /* 1225 * map scale to Table 90 of SoundWire 1.2 spec - and check 1226 * that the scale is a power of two and maximum 64 1227 */ 1228 scale_index = ilog2(scale); 1229 1230 if (BIT(scale_index) != scale || scale_index > 6) { 1231 dev_err(&slave->dev, 1232 "No match found for scale %d, bus mclk %d curr_freq %d\n", 1233 scale, mclk_freq, curr_freq); 1234 return -EINVAL; 1235 } 1236 scale_index++; 1237 1238 ret = sdw_write_no_pm(slave, SDW_SCP_BUS_CLOCK_BASE, base); 1239 if (ret < 0) { 1240 dev_err(&slave->dev, 1241 "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret); 1242 return ret; 1243 } 1244 1245 /* initialize scale for both banks */ 1246 ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index); 1247 if (ret < 0) { 1248 dev_err(&slave->dev, 1249 "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret); 1250 return ret; 1251 } 1252 ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index); 1253 if (ret < 0) 1254 dev_err(&slave->dev, 1255 "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret); 1256 1257 dev_dbg(&slave->dev, 1258 "Configured bus base %d, scale %d, mclk %d, curr_freq %d\n", 1259 base, scale_index, mclk_freq, curr_freq); 1260 1261 return ret; 1262 } 1263 1264 static int sdw_initialize_slave(struct sdw_slave *slave) 1265 { 1266 struct sdw_slave_prop *prop = &slave->prop; 1267 int status; 1268 int ret; 1269 u8 val; 1270 1271 ret = sdw_slave_set_frequency(slave); 1272 if (ret < 0) 1273 return ret; 1274 1275 if (slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_CLASH) { 1276 /* Clear bus clash interrupt before enabling interrupt mask */ 1277 status = sdw_read_no_pm(slave, SDW_SCP_INT1); 1278 if (status < 0) { 1279 dev_err(&slave->dev, 1280 "SDW_SCP_INT1 (BUS_CLASH) read failed:%d\n", status); 1281 return status; 1282 } 1283 if (status & SDW_SCP_INT1_BUS_CLASH) { 1284 dev_warn(&slave->dev, "Bus clash detected before INT mask is enabled\n"); 1285 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_BUS_CLASH); 1286 if (ret < 0) { 1287 dev_err(&slave->dev, 1288 "SDW_SCP_INT1 (BUS_CLASH) write failed:%d\n", ret); 1289 return ret; 1290 } 1291 } 1292 } 1293 if ((slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_PARITY) && 1294 !(slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY)) { 1295 /* Clear parity interrupt before enabling interrupt mask */ 1296 status = sdw_read_no_pm(slave, SDW_SCP_INT1); 1297 if (status < 0) { 1298 dev_err(&slave->dev, 1299 "SDW_SCP_INT1 (PARITY) read failed:%d\n", status); 1300 return status; 1301 } 1302 if (status & SDW_SCP_INT1_PARITY) { 1303 dev_warn(&slave->dev, "PARITY error detected before INT mask is enabled\n"); 1304 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_PARITY); 1305 if (ret < 0) { 1306 dev_err(&slave->dev, 1307 "SDW_SCP_INT1 (PARITY) write failed:%d\n", ret); 1308 return ret; 1309 } 1310 } 1311 } 1312 1313 /* 1314 * Set SCP_INT1_MASK register, typically bus clash and 1315 * implementation-defined interrupt mask. The Parity detection 1316 * may not always be correct on startup so its use is 1317 * device-dependent, it might e.g. only be enabled in 1318 * steady-state after a couple of frames. 1319 */ 1320 val = slave->prop.scp_int1_mask; 1321 1322 /* Enable SCP interrupts */ 1323 ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, val, val); 1324 if (ret < 0) { 1325 dev_err(&slave->dev, 1326 "SDW_SCP_INTMASK1 write failed:%d\n", ret); 1327 return ret; 1328 } 1329 1330 /* No need to continue if DP0 is not present */ 1331 if (!slave->prop.dp0_prop) 1332 return 0; 1333 1334 /* Enable DP0 interrupts */ 1335 val = prop->dp0_prop->imp_def_interrupts; 1336 val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE; 1337 1338 ret = sdw_update_no_pm(slave, SDW_DP0_INTMASK, val, val); 1339 if (ret < 0) 1340 dev_err(&slave->dev, 1341 "SDW_DP0_INTMASK read failed:%d\n", ret); 1342 return ret; 1343 } 1344 1345 static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status) 1346 { 1347 u8 clear, impl_int_mask; 1348 int status, status2, ret, count = 0; 1349 1350 status = sdw_read_no_pm(slave, SDW_DP0_INT); 1351 if (status < 0) { 1352 dev_err(&slave->dev, 1353 "SDW_DP0_INT read failed:%d\n", status); 1354 return status; 1355 } 1356 1357 do { 1358 clear = status & ~SDW_DP0_INTERRUPTS; 1359 1360 if (status & SDW_DP0_INT_TEST_FAIL) { 1361 dev_err(&slave->dev, "Test fail for port 0\n"); 1362 clear |= SDW_DP0_INT_TEST_FAIL; 1363 } 1364 1365 /* 1366 * Assumption: PORT_READY interrupt will be received only for 1367 * ports implementing Channel Prepare state machine (CP_SM) 1368 */ 1369 1370 if (status & SDW_DP0_INT_PORT_READY) { 1371 complete(&slave->port_ready[0]); 1372 clear |= SDW_DP0_INT_PORT_READY; 1373 } 1374 1375 if (status & SDW_DP0_INT_BRA_FAILURE) { 1376 dev_err(&slave->dev, "BRA failed\n"); 1377 clear |= SDW_DP0_INT_BRA_FAILURE; 1378 } 1379 1380 impl_int_mask = SDW_DP0_INT_IMPDEF1 | 1381 SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3; 1382 1383 if (status & impl_int_mask) { 1384 clear |= impl_int_mask; 1385 *slave_status = clear; 1386 } 1387 1388 /* clear the interrupts but don't touch reserved and SDCA_CASCADE fields */ 1389 ret = sdw_write_no_pm(slave, SDW_DP0_INT, clear); 1390 if (ret < 0) { 1391 dev_err(&slave->dev, 1392 "SDW_DP0_INT write failed:%d\n", ret); 1393 return ret; 1394 } 1395 1396 /* Read DP0 interrupt again */ 1397 status2 = sdw_read_no_pm(slave, SDW_DP0_INT); 1398 if (status2 < 0) { 1399 dev_err(&slave->dev, 1400 "SDW_DP0_INT read failed:%d\n", status2); 1401 return status2; 1402 } 1403 /* filter to limit loop to interrupts identified in the first status read */ 1404 status &= status2; 1405 1406 count++; 1407 1408 /* we can get alerts while processing so keep retrying */ 1409 } while ((status & SDW_DP0_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY)); 1410 1411 if (count == SDW_READ_INTR_CLEAR_RETRY) 1412 dev_warn(&slave->dev, "Reached MAX_RETRY on DP0 read\n"); 1413 1414 return ret; 1415 } 1416 1417 static int sdw_handle_port_interrupt(struct sdw_slave *slave, 1418 int port, u8 *slave_status) 1419 { 1420 u8 clear, impl_int_mask; 1421 int status, status2, ret, count = 0; 1422 u32 addr; 1423 1424 if (port == 0) 1425 return sdw_handle_dp0_interrupt(slave, slave_status); 1426 1427 addr = SDW_DPN_INT(port); 1428 status = sdw_read_no_pm(slave, addr); 1429 if (status < 0) { 1430 dev_err(&slave->dev, 1431 "SDW_DPN_INT read failed:%d\n", status); 1432 1433 return status; 1434 } 1435 1436 do { 1437 clear = status & ~SDW_DPN_INTERRUPTS; 1438 1439 if (status & SDW_DPN_INT_TEST_FAIL) { 1440 dev_err(&slave->dev, "Test fail for port:%d\n", port); 1441 clear |= SDW_DPN_INT_TEST_FAIL; 1442 } 1443 1444 /* 1445 * Assumption: PORT_READY interrupt will be received only 1446 * for ports implementing CP_SM. 1447 */ 1448 if (status & SDW_DPN_INT_PORT_READY) { 1449 complete(&slave->port_ready[port]); 1450 clear |= SDW_DPN_INT_PORT_READY; 1451 } 1452 1453 impl_int_mask = SDW_DPN_INT_IMPDEF1 | 1454 SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3; 1455 1456 if (status & impl_int_mask) { 1457 clear |= impl_int_mask; 1458 *slave_status = clear; 1459 } 1460 1461 /* clear the interrupt but don't touch reserved fields */ 1462 ret = sdw_write_no_pm(slave, addr, clear); 1463 if (ret < 0) { 1464 dev_err(&slave->dev, 1465 "SDW_DPN_INT write failed:%d\n", ret); 1466 return ret; 1467 } 1468 1469 /* Read DPN interrupt again */ 1470 status2 = sdw_read_no_pm(slave, addr); 1471 if (status2 < 0) { 1472 dev_err(&slave->dev, 1473 "SDW_DPN_INT read failed:%d\n", status2); 1474 return status2; 1475 } 1476 /* filter to limit loop to interrupts identified in the first status read */ 1477 status &= status2; 1478 1479 count++; 1480 1481 /* we can get alerts while processing so keep retrying */ 1482 } while ((status & SDW_DPN_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY)); 1483 1484 if (count == SDW_READ_INTR_CLEAR_RETRY) 1485 dev_warn(&slave->dev, "Reached MAX_RETRY on port read"); 1486 1487 return ret; 1488 } 1489 1490 static int sdw_handle_slave_alerts(struct sdw_slave *slave) 1491 { 1492 struct sdw_slave_intr_status slave_intr; 1493 u8 clear = 0, bit, port_status[15] = {0}; 1494 int port_num, stat, ret, count = 0; 1495 unsigned long port; 1496 bool slave_notify; 1497 u8 sdca_cascade = 0; 1498 u8 buf, buf2[2], _buf, _buf2[2]; 1499 bool parity_check; 1500 bool parity_quirk; 1501 1502 sdw_modify_slave_status(slave, SDW_SLAVE_ALERT); 1503 1504 ret = pm_runtime_get_sync(&slave->dev); 1505 if (ret < 0 && ret != -EACCES) { 1506 dev_err(&slave->dev, "Failed to resume device: %d\n", ret); 1507 pm_runtime_put_noidle(&slave->dev); 1508 return ret; 1509 } 1510 1511 /* Read Intstat 1, Intstat 2 and Intstat 3 registers */ 1512 ret = sdw_read_no_pm(slave, SDW_SCP_INT1); 1513 if (ret < 0) { 1514 dev_err(&slave->dev, 1515 "SDW_SCP_INT1 read failed:%d\n", ret); 1516 goto io_err; 1517 } 1518 buf = ret; 1519 1520 ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, buf2); 1521 if (ret < 0) { 1522 dev_err(&slave->dev, 1523 "SDW_SCP_INT2/3 read failed:%d\n", ret); 1524 goto io_err; 1525 } 1526 1527 if (slave->prop.is_sdca) { 1528 ret = sdw_read_no_pm(slave, SDW_DP0_INT); 1529 if (ret < 0) { 1530 dev_err(&slave->dev, 1531 "SDW_DP0_INT read failed:%d\n", ret); 1532 goto io_err; 1533 } 1534 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; 1535 } 1536 1537 do { 1538 slave_notify = false; 1539 1540 /* 1541 * Check parity, bus clash and Slave (impl defined) 1542 * interrupt 1543 */ 1544 if (buf & SDW_SCP_INT1_PARITY) { 1545 parity_check = slave->prop.scp_int1_mask & SDW_SCP_INT1_PARITY; 1546 parity_quirk = !slave->first_interrupt_done && 1547 (slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY); 1548 1549 if (parity_check && !parity_quirk) 1550 dev_err(&slave->dev, "Parity error detected\n"); 1551 clear |= SDW_SCP_INT1_PARITY; 1552 } 1553 1554 if (buf & SDW_SCP_INT1_BUS_CLASH) { 1555 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_BUS_CLASH) 1556 dev_err(&slave->dev, "Bus clash detected\n"); 1557 clear |= SDW_SCP_INT1_BUS_CLASH; 1558 } 1559 1560 /* 1561 * When bus clash or parity errors are detected, such errors 1562 * are unlikely to be recoverable errors. 1563 * TODO: In such scenario, reset bus. Make this configurable 1564 * via sysfs property with bus reset being the default. 1565 */ 1566 1567 if (buf & SDW_SCP_INT1_IMPL_DEF) { 1568 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_IMPL_DEF) { 1569 dev_dbg(&slave->dev, "Slave impl defined interrupt\n"); 1570 slave_notify = true; 1571 } 1572 clear |= SDW_SCP_INT1_IMPL_DEF; 1573 } 1574 1575 /* the SDCA interrupts are cleared in the codec driver .interrupt_callback() */ 1576 if (sdca_cascade) 1577 slave_notify = true; 1578 1579 /* Check port 0 - 3 interrupts */ 1580 port = buf & SDW_SCP_INT1_PORT0_3; 1581 1582 /* To get port number corresponding to bits, shift it */ 1583 port = FIELD_GET(SDW_SCP_INT1_PORT0_3, port); 1584 for_each_set_bit(bit, &port, 8) { 1585 sdw_handle_port_interrupt(slave, bit, 1586 &port_status[bit]); 1587 } 1588 1589 /* Check if cascade 2 interrupt is present */ 1590 if (buf & SDW_SCP_INT1_SCP2_CASCADE) { 1591 port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10; 1592 for_each_set_bit(bit, &port, 8) { 1593 /* scp2 ports start from 4 */ 1594 port_num = bit + 3; 1595 sdw_handle_port_interrupt(slave, 1596 port_num, 1597 &port_status[port_num]); 1598 } 1599 } 1600 1601 /* now check last cascade */ 1602 if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) { 1603 port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14; 1604 for_each_set_bit(bit, &port, 8) { 1605 /* scp3 ports start from 11 */ 1606 port_num = bit + 10; 1607 sdw_handle_port_interrupt(slave, 1608 port_num, 1609 &port_status[port_num]); 1610 } 1611 } 1612 1613 /* Update the Slave driver */ 1614 if (slave_notify && slave->ops && 1615 slave->ops->interrupt_callback) { 1616 slave_intr.sdca_cascade = sdca_cascade; 1617 slave_intr.control_port = clear; 1618 memcpy(slave_intr.port, &port_status, 1619 sizeof(slave_intr.port)); 1620 1621 slave->ops->interrupt_callback(slave, &slave_intr); 1622 } 1623 1624 /* Ack interrupt */ 1625 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, clear); 1626 if (ret < 0) { 1627 dev_err(&slave->dev, 1628 "SDW_SCP_INT1 write failed:%d\n", ret); 1629 goto io_err; 1630 } 1631 1632 /* at this point all initial interrupt sources were handled */ 1633 slave->first_interrupt_done = true; 1634 1635 /* 1636 * Read status again to ensure no new interrupts arrived 1637 * while servicing interrupts. 1638 */ 1639 ret = sdw_read_no_pm(slave, SDW_SCP_INT1); 1640 if (ret < 0) { 1641 dev_err(&slave->dev, 1642 "SDW_SCP_INT1 recheck read failed:%d\n", ret); 1643 goto io_err; 1644 } 1645 _buf = ret; 1646 1647 ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, _buf2); 1648 if (ret < 0) { 1649 dev_err(&slave->dev, 1650 "SDW_SCP_INT2/3 recheck read failed:%d\n", ret); 1651 goto io_err; 1652 } 1653 1654 if (slave->prop.is_sdca) { 1655 ret = sdw_read_no_pm(slave, SDW_DP0_INT); 1656 if (ret < 0) { 1657 dev_err(&slave->dev, 1658 "SDW_DP0_INT recheck read failed:%d\n", ret); 1659 goto io_err; 1660 } 1661 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; 1662 } 1663 1664 /* 1665 * Make sure no interrupts are pending, but filter to limit loop 1666 * to interrupts identified in the first status read 1667 */ 1668 buf &= _buf; 1669 buf2[0] &= _buf2[0]; 1670 buf2[1] &= _buf2[1]; 1671 stat = buf || buf2[0] || buf2[1] || sdca_cascade; 1672 1673 /* 1674 * Exit loop if Slave is continuously in ALERT state even 1675 * after servicing the interrupt multiple times. 1676 */ 1677 count++; 1678 1679 /* we can get alerts while processing so keep retrying */ 1680 } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY); 1681 1682 if (count == SDW_READ_INTR_CLEAR_RETRY) 1683 dev_warn(&slave->dev, "Reached MAX_RETRY on alert read\n"); 1684 1685 io_err: 1686 pm_runtime_mark_last_busy(&slave->dev); 1687 pm_runtime_put_autosuspend(&slave->dev); 1688 1689 return ret; 1690 } 1691 1692 static int sdw_update_slave_status(struct sdw_slave *slave, 1693 enum sdw_slave_status status) 1694 { 1695 unsigned long time; 1696 1697 if (!slave->probed) { 1698 /* 1699 * the slave status update is typically handled in an 1700 * interrupt thread, which can race with the driver 1701 * probe, e.g. when a module needs to be loaded. 1702 * 1703 * make sure the probe is complete before updating 1704 * status. 1705 */ 1706 time = wait_for_completion_timeout(&slave->probe_complete, 1707 msecs_to_jiffies(DEFAULT_PROBE_TIMEOUT)); 1708 if (!time) { 1709 dev_err(&slave->dev, "Probe not complete, timed out\n"); 1710 return -ETIMEDOUT; 1711 } 1712 } 1713 1714 if (!slave->ops || !slave->ops->update_status) 1715 return 0; 1716 1717 return slave->ops->update_status(slave, status); 1718 } 1719 1720 /** 1721 * sdw_handle_slave_status() - Handle Slave status 1722 * @bus: SDW bus instance 1723 * @status: Status for all Slave(s) 1724 */ 1725 int sdw_handle_slave_status(struct sdw_bus *bus, 1726 enum sdw_slave_status status[]) 1727 { 1728 enum sdw_slave_status prev_status; 1729 struct sdw_slave *slave; 1730 bool attached_initializing; 1731 int i, ret = 0; 1732 1733 /* first check if any Slaves fell off the bus */ 1734 for (i = 1; i <= SDW_MAX_DEVICES; i++) { 1735 mutex_lock(&bus->bus_lock); 1736 if (test_bit(i, bus->assigned) == false) { 1737 mutex_unlock(&bus->bus_lock); 1738 continue; 1739 } 1740 mutex_unlock(&bus->bus_lock); 1741 1742 slave = sdw_get_slave(bus, i); 1743 if (!slave) 1744 continue; 1745 1746 if (status[i] == SDW_SLAVE_UNATTACHED && 1747 slave->status != SDW_SLAVE_UNATTACHED) 1748 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); 1749 } 1750 1751 if (status[0] == SDW_SLAVE_ATTACHED) { 1752 dev_dbg(bus->dev, "Slave attached, programming device number\n"); 1753 ret = sdw_program_device_num(bus); 1754 if (ret < 0) 1755 dev_err(bus->dev, "Slave attach failed: %d\n", ret); 1756 /* 1757 * programming a device number will have side effects, 1758 * so we deal with other devices at a later time 1759 */ 1760 return ret; 1761 } 1762 1763 /* Continue to check other slave statuses */ 1764 for (i = 1; i <= SDW_MAX_DEVICES; i++) { 1765 mutex_lock(&bus->bus_lock); 1766 if (test_bit(i, bus->assigned) == false) { 1767 mutex_unlock(&bus->bus_lock); 1768 continue; 1769 } 1770 mutex_unlock(&bus->bus_lock); 1771 1772 slave = sdw_get_slave(bus, i); 1773 if (!slave) 1774 continue; 1775 1776 attached_initializing = false; 1777 1778 switch (status[i]) { 1779 case SDW_SLAVE_UNATTACHED: 1780 if (slave->status == SDW_SLAVE_UNATTACHED) 1781 break; 1782 1783 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); 1784 break; 1785 1786 case SDW_SLAVE_ALERT: 1787 ret = sdw_handle_slave_alerts(slave); 1788 if (ret < 0) 1789 dev_err(&slave->dev, 1790 "Slave %d alert handling failed: %d\n", 1791 i, ret); 1792 break; 1793 1794 case SDW_SLAVE_ATTACHED: 1795 if (slave->status == SDW_SLAVE_ATTACHED) 1796 break; 1797 1798 prev_status = slave->status; 1799 sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED); 1800 1801 if (prev_status == SDW_SLAVE_ALERT) 1802 break; 1803 1804 attached_initializing = true; 1805 1806 ret = sdw_initialize_slave(slave); 1807 if (ret < 0) 1808 dev_err(&slave->dev, 1809 "Slave %d initialization failed: %d\n", 1810 i, ret); 1811 1812 break; 1813 1814 default: 1815 dev_err(&slave->dev, "Invalid slave %d status:%d\n", 1816 i, status[i]); 1817 break; 1818 } 1819 1820 ret = sdw_update_slave_status(slave, status[i]); 1821 if (ret < 0) 1822 dev_err(&slave->dev, 1823 "Update Slave status failed:%d\n", ret); 1824 if (attached_initializing) { 1825 dev_dbg(&slave->dev, 1826 "%s: signaling initialization completion for Slave %d\n", 1827 __func__, slave->dev_num); 1828 1829 complete(&slave->initialization_complete); 1830 } 1831 } 1832 1833 return ret; 1834 } 1835 EXPORT_SYMBOL(sdw_handle_slave_status); 1836 1837 void sdw_clear_slave_status(struct sdw_bus *bus, u32 request) 1838 { 1839 struct sdw_slave *slave; 1840 int i; 1841 1842 /* Check all non-zero devices */ 1843 for (i = 1; i <= SDW_MAX_DEVICES; i++) { 1844 mutex_lock(&bus->bus_lock); 1845 if (test_bit(i, bus->assigned) == false) { 1846 mutex_unlock(&bus->bus_lock); 1847 continue; 1848 } 1849 mutex_unlock(&bus->bus_lock); 1850 1851 slave = sdw_get_slave(bus, i); 1852 if (!slave) 1853 continue; 1854 1855 if (slave->status != SDW_SLAVE_UNATTACHED) { 1856 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); 1857 slave->first_interrupt_done = false; 1858 } 1859 1860 /* keep track of request, used in pm_runtime resume */ 1861 slave->unattach_request = request; 1862 } 1863 } 1864 EXPORT_SYMBOL(sdw_clear_slave_status); 1865