1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2 // Copyright(c) 2015-17 Intel Corporation. 3 4 #include <linux/acpi.h> 5 #include <linux/delay.h> 6 #include <linux/mod_devicetable.h> 7 #include <linux/pm_runtime.h> 8 #include <linux/soundwire/sdw_registers.h> 9 #include <linux/soundwire/sdw.h> 10 #include "bus.h" 11 #include "sysfs_local.h" 12 13 static DEFINE_IDA(sdw_ida); 14 15 static int sdw_get_id(struct sdw_bus *bus) 16 { 17 int rc = ida_alloc(&sdw_ida, GFP_KERNEL); 18 19 if (rc < 0) 20 return rc; 21 22 bus->id = rc; 23 return 0; 24 } 25 26 /** 27 * sdw_bus_master_add() - add a bus Master instance 28 * @bus: bus instance 29 * @parent: parent device 30 * @fwnode: firmware node handle 31 * 32 * Initializes the bus instance, read properties and create child 33 * devices. 34 */ 35 int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent, 36 struct fwnode_handle *fwnode) 37 { 38 struct sdw_master_prop *prop = NULL; 39 int ret; 40 41 if (!parent) { 42 pr_err("SoundWire parent device is not set\n"); 43 return -ENODEV; 44 } 45 46 ret = sdw_get_id(bus); 47 if (ret < 0) { 48 dev_err(parent, "Failed to get bus id\n"); 49 return ret; 50 } 51 52 ret = sdw_master_device_add(bus, parent, fwnode); 53 if (ret < 0) { 54 dev_err(parent, "Failed to add master device at link %d\n", 55 bus->link_id); 56 return ret; 57 } 58 59 if (!bus->ops) { 60 dev_err(bus->dev, "SoundWire Bus ops are not set\n"); 61 return -EINVAL; 62 } 63 64 if (!bus->compute_params) { 65 dev_err(bus->dev, 66 "Bandwidth allocation not configured, compute_params no set\n"); 67 return -EINVAL; 68 } 69 70 mutex_init(&bus->msg_lock); 71 mutex_init(&bus->bus_lock); 72 INIT_LIST_HEAD(&bus->slaves); 73 INIT_LIST_HEAD(&bus->m_rt_list); 74 75 /* 76 * Initialize multi_link flag 77 * TODO: populate this flag by reading property from FW node 78 */ 79 bus->multi_link = false; 80 if (bus->ops->read_prop) { 81 ret = bus->ops->read_prop(bus); 82 if (ret < 0) { 83 dev_err(bus->dev, 84 "Bus read properties failed:%d\n", ret); 85 return ret; 86 } 87 } 88 89 sdw_bus_debugfs_init(bus); 90 91 /* 92 * Device numbers in SoundWire are 0 through 15. Enumeration device 93 * number (0), Broadcast device number (15), Group numbers (12 and 94 * 13) and Master device number (14) are not used for assignment so 95 * mask these and other higher bits. 96 */ 97 98 /* Set higher order bits */ 99 *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM); 100 101 /* Set enumuration device number and broadcast device number */ 102 set_bit(SDW_ENUM_DEV_NUM, bus->assigned); 103 set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned); 104 105 /* Set group device numbers and master device number */ 106 set_bit(SDW_GROUP12_DEV_NUM, bus->assigned); 107 set_bit(SDW_GROUP13_DEV_NUM, bus->assigned); 108 set_bit(SDW_MASTER_DEV_NUM, bus->assigned); 109 110 /* 111 * SDW is an enumerable bus, but devices can be powered off. So, 112 * they won't be able to report as present. 113 * 114 * Create Slave devices based on Slaves described in 115 * the respective firmware (ACPI/DT) 116 */ 117 if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev)) 118 ret = sdw_acpi_find_slaves(bus); 119 else if (IS_ENABLED(CONFIG_OF) && bus->dev->of_node) 120 ret = sdw_of_find_slaves(bus); 121 else 122 ret = -ENOTSUPP; /* No ACPI/DT so error out */ 123 124 if (ret < 0) { 125 dev_err(bus->dev, "Finding slaves failed:%d\n", ret); 126 return ret; 127 } 128 129 /* 130 * Initialize clock values based on Master properties. The max 131 * frequency is read from max_clk_freq property. Current assumption 132 * is that the bus will start at highest clock frequency when 133 * powered on. 134 * 135 * Default active bank will be 0 as out of reset the Slaves have 136 * to start with bank 0 (Table 40 of Spec) 137 */ 138 prop = &bus->prop; 139 bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR; 140 bus->params.curr_dr_freq = bus->params.max_dr_freq; 141 bus->params.curr_bank = SDW_BANK0; 142 bus->params.next_bank = SDW_BANK1; 143 144 return 0; 145 } 146 EXPORT_SYMBOL(sdw_bus_master_add); 147 148 static int sdw_delete_slave(struct device *dev, void *data) 149 { 150 struct sdw_slave *slave = dev_to_sdw_dev(dev); 151 struct sdw_bus *bus = slave->bus; 152 153 pm_runtime_disable(dev); 154 155 sdw_slave_debugfs_exit(slave); 156 157 mutex_lock(&bus->bus_lock); 158 159 if (slave->dev_num) /* clear dev_num if assigned */ 160 clear_bit(slave->dev_num, bus->assigned); 161 162 list_del_init(&slave->node); 163 mutex_unlock(&bus->bus_lock); 164 165 device_unregister(dev); 166 return 0; 167 } 168 169 /** 170 * sdw_bus_master_delete() - delete the bus master instance 171 * @bus: bus to be deleted 172 * 173 * Remove the instance, delete the child devices. 174 */ 175 void sdw_bus_master_delete(struct sdw_bus *bus) 176 { 177 device_for_each_child(bus->dev, NULL, sdw_delete_slave); 178 sdw_master_device_del(bus); 179 180 sdw_bus_debugfs_exit(bus); 181 ida_free(&sdw_ida, bus->id); 182 } 183 EXPORT_SYMBOL(sdw_bus_master_delete); 184 185 /* 186 * SDW IO Calls 187 */ 188 189 static inline int find_response_code(enum sdw_command_response resp) 190 { 191 switch (resp) { 192 case SDW_CMD_OK: 193 return 0; 194 195 case SDW_CMD_IGNORED: 196 return -ENODATA; 197 198 case SDW_CMD_TIMEOUT: 199 return -ETIMEDOUT; 200 201 default: 202 return -EIO; 203 } 204 } 205 206 static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg) 207 { 208 int retry = bus->prop.err_threshold; 209 enum sdw_command_response resp; 210 int ret = 0, i; 211 212 for (i = 0; i <= retry; i++) { 213 resp = bus->ops->xfer_msg(bus, msg); 214 ret = find_response_code(resp); 215 216 /* if cmd is ok or ignored return */ 217 if (ret == 0 || ret == -ENODATA) 218 return ret; 219 } 220 221 return ret; 222 } 223 224 static inline int do_transfer_defer(struct sdw_bus *bus, 225 struct sdw_msg *msg, 226 struct sdw_defer *defer) 227 { 228 int retry = bus->prop.err_threshold; 229 enum sdw_command_response resp; 230 int ret = 0, i; 231 232 defer->msg = msg; 233 defer->length = msg->len; 234 init_completion(&defer->complete); 235 236 for (i = 0; i <= retry; i++) { 237 resp = bus->ops->xfer_msg_defer(bus, msg, defer); 238 ret = find_response_code(resp); 239 /* if cmd is ok or ignored return */ 240 if (ret == 0 || ret == -ENODATA) 241 return ret; 242 } 243 244 return ret; 245 } 246 247 static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num) 248 { 249 int retry = bus->prop.err_threshold; 250 enum sdw_command_response resp; 251 int ret = 0, i; 252 253 for (i = 0; i <= retry; i++) { 254 resp = bus->ops->reset_page_addr(bus, dev_num); 255 ret = find_response_code(resp); 256 /* if cmd is ok or ignored return */ 257 if (ret == 0 || ret == -ENODATA) 258 return ret; 259 } 260 261 return ret; 262 } 263 264 static int sdw_transfer_unlocked(struct sdw_bus *bus, struct sdw_msg *msg) 265 { 266 int ret; 267 268 ret = do_transfer(bus, msg); 269 if (ret != 0 && ret != -ENODATA) 270 dev_err(bus->dev, "trf on Slave %d failed:%d %s addr %x count %d\n", 271 msg->dev_num, ret, 272 (msg->flags & SDW_MSG_FLAG_WRITE) ? "write" : "read", 273 msg->addr, msg->len); 274 275 if (msg->page) 276 sdw_reset_page(bus, msg->dev_num); 277 278 return ret; 279 } 280 281 /** 282 * sdw_transfer() - Synchronous transfer message to a SDW Slave device 283 * @bus: SDW bus 284 * @msg: SDW message to be xfered 285 */ 286 int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg) 287 { 288 int ret; 289 290 mutex_lock(&bus->msg_lock); 291 292 ret = sdw_transfer_unlocked(bus, msg); 293 294 mutex_unlock(&bus->msg_lock); 295 296 return ret; 297 } 298 299 /** 300 * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device 301 * @bus: SDW bus 302 * @msg: SDW message to be xfered 303 * @defer: Defer block for signal completion 304 * 305 * Caller needs to hold the msg_lock lock while calling this 306 */ 307 int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg, 308 struct sdw_defer *defer) 309 { 310 int ret; 311 312 if (!bus->ops->xfer_msg_defer) 313 return -ENOTSUPP; 314 315 ret = do_transfer_defer(bus, msg, defer); 316 if (ret != 0 && ret != -ENODATA) 317 dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n", 318 msg->dev_num, ret); 319 320 if (msg->page) 321 sdw_reset_page(bus, msg->dev_num); 322 323 return ret; 324 } 325 326 int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave, 327 u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf) 328 { 329 memset(msg, 0, sizeof(*msg)); 330 msg->addr = addr; /* addr is 16 bit and truncated here */ 331 msg->len = count; 332 msg->dev_num = dev_num; 333 msg->flags = flags; 334 msg->buf = buf; 335 336 if (addr < SDW_REG_NO_PAGE) /* no paging area */ 337 return 0; 338 339 if (addr >= SDW_REG_MAX) { /* illegal addr */ 340 pr_err("SDW: Invalid address %x passed\n", addr); 341 return -EINVAL; 342 } 343 344 if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */ 345 if (slave && !slave->prop.paging_support) 346 return 0; 347 /* no need for else as that will fall-through to paging */ 348 } 349 350 /* paging mandatory */ 351 if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) { 352 pr_err("SDW: Invalid device for paging :%d\n", dev_num); 353 return -EINVAL; 354 } 355 356 if (!slave) { 357 pr_err("SDW: No slave for paging addr\n"); 358 return -EINVAL; 359 } 360 361 if (!slave->prop.paging_support) { 362 dev_err(&slave->dev, 363 "address %x needs paging but no support\n", addr); 364 return -EINVAL; 365 } 366 367 msg->addr_page1 = FIELD_GET(SDW_SCP_ADDRPAGE1_MASK, addr); 368 msg->addr_page2 = FIELD_GET(SDW_SCP_ADDRPAGE2_MASK, addr); 369 msg->addr |= BIT(15); 370 msg->page = true; 371 372 return 0; 373 } 374 375 /* 376 * Read/Write IO functions. 377 * no_pm versions can only be called by the bus, e.g. while enumerating or 378 * handling suspend-resume sequences. 379 * all clients need to use the pm versions 380 */ 381 382 static int 383 sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) 384 { 385 struct sdw_msg msg; 386 int ret; 387 388 ret = sdw_fill_msg(&msg, slave, addr, count, 389 slave->dev_num, SDW_MSG_FLAG_READ, val); 390 if (ret < 0) 391 return ret; 392 393 ret = sdw_transfer(slave->bus, &msg); 394 if (slave->is_mockup_device) 395 ret = 0; 396 return ret; 397 } 398 399 static int 400 sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val) 401 { 402 struct sdw_msg msg; 403 int ret; 404 405 ret = sdw_fill_msg(&msg, slave, addr, count, 406 slave->dev_num, SDW_MSG_FLAG_WRITE, (u8 *)val); 407 if (ret < 0) 408 return ret; 409 410 ret = sdw_transfer(slave->bus, &msg); 411 if (slave->is_mockup_device) 412 ret = 0; 413 return ret; 414 } 415 416 int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value) 417 { 418 return sdw_nwrite_no_pm(slave, addr, 1, &value); 419 } 420 EXPORT_SYMBOL(sdw_write_no_pm); 421 422 static int 423 sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr) 424 { 425 struct sdw_msg msg; 426 u8 buf; 427 int ret; 428 429 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, 430 SDW_MSG_FLAG_READ, &buf); 431 if (ret < 0) 432 return ret; 433 434 ret = sdw_transfer(bus, &msg); 435 if (ret < 0) 436 return ret; 437 438 return buf; 439 } 440 441 static int 442 sdw_bwrite_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value) 443 { 444 struct sdw_msg msg; 445 int ret; 446 447 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, 448 SDW_MSG_FLAG_WRITE, &value); 449 if (ret < 0) 450 return ret; 451 452 return sdw_transfer(bus, &msg); 453 } 454 455 int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr) 456 { 457 struct sdw_msg msg; 458 u8 buf; 459 int ret; 460 461 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, 462 SDW_MSG_FLAG_READ, &buf); 463 if (ret < 0) 464 return ret; 465 466 ret = sdw_transfer_unlocked(bus, &msg); 467 if (ret < 0) 468 return ret; 469 470 return buf; 471 } 472 EXPORT_SYMBOL(sdw_bread_no_pm_unlocked); 473 474 int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value) 475 { 476 struct sdw_msg msg; 477 int ret; 478 479 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, 480 SDW_MSG_FLAG_WRITE, &value); 481 if (ret < 0) 482 return ret; 483 484 return sdw_transfer_unlocked(bus, &msg); 485 } 486 EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked); 487 488 int sdw_read_no_pm(struct sdw_slave *slave, u32 addr) 489 { 490 u8 buf; 491 int ret; 492 493 ret = sdw_nread_no_pm(slave, addr, 1, &buf); 494 if (ret < 0) 495 return ret; 496 else 497 return buf; 498 } 499 EXPORT_SYMBOL(sdw_read_no_pm); 500 501 int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) 502 { 503 int tmp; 504 505 tmp = sdw_read_no_pm(slave, addr); 506 if (tmp < 0) 507 return tmp; 508 509 tmp = (tmp & ~mask) | val; 510 return sdw_write_no_pm(slave, addr, tmp); 511 } 512 EXPORT_SYMBOL(sdw_update_no_pm); 513 514 /* Read-Modify-Write Slave register */ 515 int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) 516 { 517 int tmp; 518 519 tmp = sdw_read(slave, addr); 520 if (tmp < 0) 521 return tmp; 522 523 tmp = (tmp & ~mask) | val; 524 return sdw_write(slave, addr, tmp); 525 } 526 EXPORT_SYMBOL(sdw_update); 527 528 /** 529 * sdw_nread() - Read "n" contiguous SDW Slave registers 530 * @slave: SDW Slave 531 * @addr: Register address 532 * @count: length 533 * @val: Buffer for values to be read 534 */ 535 int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) 536 { 537 int ret; 538 539 ret = pm_runtime_resume_and_get(&slave->dev); 540 if (ret < 0 && ret != -EACCES) 541 return ret; 542 543 ret = sdw_nread_no_pm(slave, addr, count, val); 544 545 pm_runtime_mark_last_busy(&slave->dev); 546 pm_runtime_put(&slave->dev); 547 548 return ret; 549 } 550 EXPORT_SYMBOL(sdw_nread); 551 552 /** 553 * sdw_nwrite() - Write "n" contiguous SDW Slave registers 554 * @slave: SDW Slave 555 * @addr: Register address 556 * @count: length 557 * @val: Buffer for values to be written 558 */ 559 int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val) 560 { 561 int ret; 562 563 ret = pm_runtime_resume_and_get(&slave->dev); 564 if (ret < 0 && ret != -EACCES) 565 return ret; 566 567 ret = sdw_nwrite_no_pm(slave, addr, count, val); 568 569 pm_runtime_mark_last_busy(&slave->dev); 570 pm_runtime_put(&slave->dev); 571 572 return ret; 573 } 574 EXPORT_SYMBOL(sdw_nwrite); 575 576 /** 577 * sdw_read() - Read a SDW Slave register 578 * @slave: SDW Slave 579 * @addr: Register address 580 */ 581 int sdw_read(struct sdw_slave *slave, u32 addr) 582 { 583 u8 buf; 584 int ret; 585 586 ret = sdw_nread(slave, addr, 1, &buf); 587 if (ret < 0) 588 return ret; 589 590 return buf; 591 } 592 EXPORT_SYMBOL(sdw_read); 593 594 /** 595 * sdw_write() - Write a SDW Slave register 596 * @slave: SDW Slave 597 * @addr: Register address 598 * @value: Register value 599 */ 600 int sdw_write(struct sdw_slave *slave, u32 addr, u8 value) 601 { 602 return sdw_nwrite(slave, addr, 1, &value); 603 } 604 EXPORT_SYMBOL(sdw_write); 605 606 /* 607 * SDW alert handling 608 */ 609 610 /* called with bus_lock held */ 611 static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i) 612 { 613 struct sdw_slave *slave; 614 615 list_for_each_entry(slave, &bus->slaves, node) { 616 if (slave->dev_num == i) 617 return slave; 618 } 619 620 return NULL; 621 } 622 623 int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id) 624 { 625 if (slave->id.mfg_id != id.mfg_id || 626 slave->id.part_id != id.part_id || 627 slave->id.class_id != id.class_id || 628 (slave->id.unique_id != SDW_IGNORED_UNIQUE_ID && 629 slave->id.unique_id != id.unique_id)) 630 return -ENODEV; 631 632 return 0; 633 } 634 EXPORT_SYMBOL(sdw_compare_devid); 635 636 /* called with bus_lock held */ 637 static int sdw_get_device_num(struct sdw_slave *slave) 638 { 639 int bit; 640 641 bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES); 642 if (bit == SDW_MAX_DEVICES) { 643 bit = -ENODEV; 644 goto err; 645 } 646 647 /* 648 * Do not update dev_num in Slave data structure here, 649 * Update once program dev_num is successful 650 */ 651 set_bit(bit, slave->bus->assigned); 652 653 err: 654 return bit; 655 } 656 657 static int sdw_assign_device_num(struct sdw_slave *slave) 658 { 659 struct sdw_bus *bus = slave->bus; 660 int ret, dev_num; 661 bool new_device = false; 662 663 /* check first if device number is assigned, if so reuse that */ 664 if (!slave->dev_num) { 665 if (!slave->dev_num_sticky) { 666 mutex_lock(&slave->bus->bus_lock); 667 dev_num = sdw_get_device_num(slave); 668 mutex_unlock(&slave->bus->bus_lock); 669 if (dev_num < 0) { 670 dev_err(bus->dev, "Get dev_num failed: %d\n", 671 dev_num); 672 return dev_num; 673 } 674 slave->dev_num = dev_num; 675 slave->dev_num_sticky = dev_num; 676 new_device = true; 677 } else { 678 slave->dev_num = slave->dev_num_sticky; 679 } 680 } 681 682 if (!new_device) 683 dev_dbg(bus->dev, 684 "Slave already registered, reusing dev_num:%d\n", 685 slave->dev_num); 686 687 /* Clear the slave->dev_num to transfer message on device 0 */ 688 dev_num = slave->dev_num; 689 slave->dev_num = 0; 690 691 ret = sdw_write_no_pm(slave, SDW_SCP_DEVNUMBER, dev_num); 692 if (ret < 0) { 693 dev_err(bus->dev, "Program device_num %d failed: %d\n", 694 dev_num, ret); 695 return ret; 696 } 697 698 /* After xfer of msg, restore dev_num */ 699 slave->dev_num = slave->dev_num_sticky; 700 701 return 0; 702 } 703 704 void sdw_extract_slave_id(struct sdw_bus *bus, 705 u64 addr, struct sdw_slave_id *id) 706 { 707 dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr); 708 709 id->sdw_version = SDW_VERSION(addr); 710 id->unique_id = SDW_UNIQUE_ID(addr); 711 id->mfg_id = SDW_MFG_ID(addr); 712 id->part_id = SDW_PART_ID(addr); 713 id->class_id = SDW_CLASS_ID(addr); 714 715 dev_dbg(bus->dev, 716 "SDW Slave class_id 0x%02x, mfg_id 0x%04x, part_id 0x%04x, unique_id 0x%x, version 0x%x\n", 717 id->class_id, id->mfg_id, id->part_id, id->unique_id, id->sdw_version); 718 } 719 EXPORT_SYMBOL(sdw_extract_slave_id); 720 721 static int sdw_program_device_num(struct sdw_bus *bus) 722 { 723 u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0}; 724 struct sdw_slave *slave, *_s; 725 struct sdw_slave_id id; 726 struct sdw_msg msg; 727 bool found; 728 int count = 0, ret; 729 u64 addr; 730 731 /* No Slave, so use raw xfer api */ 732 ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0, 733 SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf); 734 if (ret < 0) 735 return ret; 736 737 do { 738 ret = sdw_transfer(bus, &msg); 739 if (ret == -ENODATA) { /* end of device id reads */ 740 dev_dbg(bus->dev, "No more devices to enumerate\n"); 741 ret = 0; 742 break; 743 } 744 if (ret < 0) { 745 dev_err(bus->dev, "DEVID read fail:%d\n", ret); 746 break; 747 } 748 749 /* 750 * Construct the addr and extract. Cast the higher shift 751 * bits to avoid truncation due to size limit. 752 */ 753 addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) | 754 ((u64)buf[2] << 24) | ((u64)buf[1] << 32) | 755 ((u64)buf[0] << 40); 756 757 sdw_extract_slave_id(bus, addr, &id); 758 759 found = false; 760 /* Now compare with entries */ 761 list_for_each_entry_safe(slave, _s, &bus->slaves, node) { 762 if (sdw_compare_devid(slave, id) == 0) { 763 found = true; 764 765 /* 766 * Assign a new dev_num to this Slave and 767 * not mark it present. It will be marked 768 * present after it reports ATTACHED on new 769 * dev_num 770 */ 771 ret = sdw_assign_device_num(slave); 772 if (ret < 0) { 773 dev_err(bus->dev, 774 "Assign dev_num failed:%d\n", 775 ret); 776 return ret; 777 } 778 779 break; 780 } 781 } 782 783 if (!found) { 784 /* TODO: Park this device in Group 13 */ 785 786 /* 787 * add Slave device even if there is no platform 788 * firmware description. There will be no driver probe 789 * but the user/integration will be able to see the 790 * device, enumeration status and device number in sysfs 791 */ 792 sdw_slave_add(bus, &id, NULL); 793 794 dev_err(bus->dev, "Slave Entry not found\n"); 795 } 796 797 count++; 798 799 /* 800 * Check till error out or retry (count) exhausts. 801 * Device can drop off and rejoin during enumeration 802 * so count till twice the bound. 803 */ 804 805 } while (ret == 0 && count < (SDW_MAX_DEVICES * 2)); 806 807 return ret; 808 } 809 810 static void sdw_modify_slave_status(struct sdw_slave *slave, 811 enum sdw_slave_status status) 812 { 813 struct sdw_bus *bus = slave->bus; 814 815 mutex_lock(&bus->bus_lock); 816 817 dev_vdbg(bus->dev, 818 "%s: changing status slave %d status %d new status %d\n", 819 __func__, slave->dev_num, slave->status, status); 820 821 if (status == SDW_SLAVE_UNATTACHED) { 822 dev_dbg(&slave->dev, 823 "%s: initializing enumeration and init completion for Slave %d\n", 824 __func__, slave->dev_num); 825 826 init_completion(&slave->enumeration_complete); 827 init_completion(&slave->initialization_complete); 828 829 } else if ((status == SDW_SLAVE_ATTACHED) && 830 (slave->status == SDW_SLAVE_UNATTACHED)) { 831 dev_dbg(&slave->dev, 832 "%s: signaling enumeration completion for Slave %d\n", 833 __func__, slave->dev_num); 834 835 complete(&slave->enumeration_complete); 836 } 837 slave->status = status; 838 mutex_unlock(&bus->bus_lock); 839 } 840 841 static int sdw_slave_clk_stop_callback(struct sdw_slave *slave, 842 enum sdw_clk_stop_mode mode, 843 enum sdw_clk_stop_type type) 844 { 845 int ret; 846 847 if (slave->ops && slave->ops->clk_stop) { 848 ret = slave->ops->clk_stop(slave, mode, type); 849 if (ret < 0) 850 return ret; 851 } 852 853 return 0; 854 } 855 856 static int sdw_slave_clk_stop_prepare(struct sdw_slave *slave, 857 enum sdw_clk_stop_mode mode, 858 bool prepare) 859 { 860 bool wake_en; 861 u32 val = 0; 862 int ret; 863 864 wake_en = slave->prop.wake_capable; 865 866 if (prepare) { 867 val = SDW_SCP_SYSTEMCTRL_CLK_STP_PREP; 868 869 if (mode == SDW_CLK_STOP_MODE1) 870 val |= SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1; 871 872 if (wake_en) 873 val |= SDW_SCP_SYSTEMCTRL_WAKE_UP_EN; 874 } else { 875 ret = sdw_read_no_pm(slave, SDW_SCP_SYSTEMCTRL); 876 if (ret < 0) { 877 if (ret != -ENODATA) 878 dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL read failed:%d\n", ret); 879 return ret; 880 } 881 val = ret; 882 val &= ~(SDW_SCP_SYSTEMCTRL_CLK_STP_PREP); 883 } 884 885 ret = sdw_write_no_pm(slave, SDW_SCP_SYSTEMCTRL, val); 886 887 if (ret < 0 && ret != -ENODATA) 888 dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL write failed:%d\n", ret); 889 890 return ret; 891 } 892 893 static int sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus *bus, u16 dev_num) 894 { 895 int retry = bus->clk_stop_timeout; 896 int val; 897 898 do { 899 val = sdw_bread_no_pm(bus, dev_num, SDW_SCP_STAT); 900 if (val < 0) { 901 if (val != -ENODATA) 902 dev_err(bus->dev, "SDW_SCP_STAT bread failed:%d\n", val); 903 return val; 904 } 905 val &= SDW_SCP_STAT_CLK_STP_NF; 906 if (!val) { 907 dev_dbg(bus->dev, "clock stop prep/de-prep done slave:%d\n", 908 dev_num); 909 return 0; 910 } 911 912 usleep_range(1000, 1500); 913 retry--; 914 } while (retry); 915 916 dev_err(bus->dev, "clock stop prep/de-prep failed slave:%d\n", 917 dev_num); 918 919 return -ETIMEDOUT; 920 } 921 922 /** 923 * sdw_bus_prep_clk_stop: prepare Slave(s) for clock stop 924 * 925 * @bus: SDW bus instance 926 * 927 * Query Slave for clock stop mode and prepare for that mode. 928 */ 929 int sdw_bus_prep_clk_stop(struct sdw_bus *bus) 930 { 931 bool simple_clk_stop = true; 932 struct sdw_slave *slave; 933 bool is_slave = false; 934 int ret = 0; 935 936 /* 937 * In order to save on transition time, prepare 938 * each Slave and then wait for all Slave(s) to be 939 * prepared for clock stop. 940 * If one of the Slave devices has lost sync and 941 * replies with Command Ignored/-ENODATA, we continue 942 * the loop 943 */ 944 list_for_each_entry(slave, &bus->slaves, node) { 945 if (!slave->dev_num) 946 continue; 947 948 if (slave->status != SDW_SLAVE_ATTACHED && 949 slave->status != SDW_SLAVE_ALERT) 950 continue; 951 952 /* Identify if Slave(s) are available on Bus */ 953 is_slave = true; 954 955 ret = sdw_slave_clk_stop_callback(slave, 956 SDW_CLK_STOP_MODE0, 957 SDW_CLK_PRE_PREPARE); 958 if (ret < 0 && ret != -ENODATA) { 959 dev_err(&slave->dev, "clock stop pre-prepare cb failed:%d\n", ret); 960 return ret; 961 } 962 963 /* Only prepare a Slave device if needed */ 964 if (!slave->prop.simple_clk_stop_capable) { 965 simple_clk_stop = false; 966 967 ret = sdw_slave_clk_stop_prepare(slave, 968 SDW_CLK_STOP_MODE0, 969 true); 970 if (ret < 0 && ret != -ENODATA) { 971 dev_err(&slave->dev, "clock stop prepare failed:%d\n", ret); 972 return ret; 973 } 974 } 975 } 976 977 /* Skip remaining clock stop preparation if no Slave is attached */ 978 if (!is_slave) 979 return 0; 980 981 /* 982 * Don't wait for all Slaves to be ready if they follow the simple 983 * state machine 984 */ 985 if (!simple_clk_stop) { 986 ret = sdw_bus_wait_for_clk_prep_deprep(bus, 987 SDW_BROADCAST_DEV_NUM); 988 /* 989 * if there are no Slave devices present and the reply is 990 * Command_Ignored/-ENODATA, we don't need to continue with the 991 * flow and can just return here. The error code is not modified 992 * and its handling left as an exercise for the caller. 993 */ 994 if (ret < 0) 995 return ret; 996 } 997 998 /* Inform slaves that prep is done */ 999 list_for_each_entry(slave, &bus->slaves, node) { 1000 if (!slave->dev_num) 1001 continue; 1002 1003 if (slave->status != SDW_SLAVE_ATTACHED && 1004 slave->status != SDW_SLAVE_ALERT) 1005 continue; 1006 1007 ret = sdw_slave_clk_stop_callback(slave, 1008 SDW_CLK_STOP_MODE0, 1009 SDW_CLK_POST_PREPARE); 1010 1011 if (ret < 0 && ret != -ENODATA) { 1012 dev_err(&slave->dev, "clock stop post-prepare cb failed:%d\n", ret); 1013 return ret; 1014 } 1015 } 1016 1017 return 0; 1018 } 1019 EXPORT_SYMBOL(sdw_bus_prep_clk_stop); 1020 1021 /** 1022 * sdw_bus_clk_stop: stop bus clock 1023 * 1024 * @bus: SDW bus instance 1025 * 1026 * After preparing the Slaves for clock stop, stop the clock by broadcasting 1027 * write to SCP_CTRL register. 1028 */ 1029 int sdw_bus_clk_stop(struct sdw_bus *bus) 1030 { 1031 int ret; 1032 1033 /* 1034 * broadcast clock stop now, attached Slaves will ACK this, 1035 * unattached will ignore 1036 */ 1037 ret = sdw_bwrite_no_pm(bus, SDW_BROADCAST_DEV_NUM, 1038 SDW_SCP_CTRL, SDW_SCP_CTRL_CLK_STP_NOW); 1039 if (ret < 0) { 1040 if (ret != -ENODATA) 1041 dev_err(bus->dev, "ClockStopNow Broadcast msg failed %d\n", ret); 1042 return ret; 1043 } 1044 1045 return 0; 1046 } 1047 EXPORT_SYMBOL(sdw_bus_clk_stop); 1048 1049 /** 1050 * sdw_bus_exit_clk_stop: Exit clock stop mode 1051 * 1052 * @bus: SDW bus instance 1053 * 1054 * This De-prepares the Slaves by exiting Clock Stop Mode 0. For the Slaves 1055 * exiting Clock Stop Mode 1, they will be de-prepared after they enumerate 1056 * back. 1057 */ 1058 int sdw_bus_exit_clk_stop(struct sdw_bus *bus) 1059 { 1060 bool simple_clk_stop = true; 1061 struct sdw_slave *slave; 1062 bool is_slave = false; 1063 int ret; 1064 1065 /* 1066 * In order to save on transition time, de-prepare 1067 * each Slave and then wait for all Slave(s) to be 1068 * de-prepared after clock resume. 1069 */ 1070 list_for_each_entry(slave, &bus->slaves, node) { 1071 if (!slave->dev_num) 1072 continue; 1073 1074 if (slave->status != SDW_SLAVE_ATTACHED && 1075 slave->status != SDW_SLAVE_ALERT) 1076 continue; 1077 1078 /* Identify if Slave(s) are available on Bus */ 1079 is_slave = true; 1080 1081 ret = sdw_slave_clk_stop_callback(slave, SDW_CLK_STOP_MODE0, 1082 SDW_CLK_PRE_DEPREPARE); 1083 if (ret < 0) 1084 dev_warn(&slave->dev, "clock stop pre-deprepare cb failed:%d\n", ret); 1085 1086 /* Only de-prepare a Slave device if needed */ 1087 if (!slave->prop.simple_clk_stop_capable) { 1088 simple_clk_stop = false; 1089 1090 ret = sdw_slave_clk_stop_prepare(slave, SDW_CLK_STOP_MODE0, 1091 false); 1092 1093 if (ret < 0) 1094 dev_warn(&slave->dev, "clock stop deprepare failed:%d\n", ret); 1095 } 1096 } 1097 1098 /* Skip remaining clock stop de-preparation if no Slave is attached */ 1099 if (!is_slave) 1100 return 0; 1101 1102 /* 1103 * Don't wait for all Slaves to be ready if they follow the simple 1104 * state machine 1105 */ 1106 if (!simple_clk_stop) { 1107 ret = sdw_bus_wait_for_clk_prep_deprep(bus, SDW_BROADCAST_DEV_NUM); 1108 if (ret < 0) 1109 dev_warn(bus->dev, "clock stop deprepare wait failed:%d\n", ret); 1110 } 1111 1112 list_for_each_entry(slave, &bus->slaves, node) { 1113 if (!slave->dev_num) 1114 continue; 1115 1116 if (slave->status != SDW_SLAVE_ATTACHED && 1117 slave->status != SDW_SLAVE_ALERT) 1118 continue; 1119 1120 ret = sdw_slave_clk_stop_callback(slave, SDW_CLK_STOP_MODE0, 1121 SDW_CLK_POST_DEPREPARE); 1122 if (ret < 0) 1123 dev_warn(&slave->dev, "clock stop post-deprepare cb failed:%d\n", ret); 1124 } 1125 1126 return 0; 1127 } 1128 EXPORT_SYMBOL(sdw_bus_exit_clk_stop); 1129 1130 int sdw_configure_dpn_intr(struct sdw_slave *slave, 1131 int port, bool enable, int mask) 1132 { 1133 u32 addr; 1134 int ret; 1135 u8 val = 0; 1136 1137 if (slave->bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL) { 1138 dev_dbg(&slave->dev, "TEST FAIL interrupt %s\n", 1139 enable ? "on" : "off"); 1140 mask |= SDW_DPN_INT_TEST_FAIL; 1141 } 1142 1143 addr = SDW_DPN_INTMASK(port); 1144 1145 /* Set/Clear port ready interrupt mask */ 1146 if (enable) { 1147 val |= mask; 1148 val |= SDW_DPN_INT_PORT_READY; 1149 } else { 1150 val &= ~(mask); 1151 val &= ~SDW_DPN_INT_PORT_READY; 1152 } 1153 1154 ret = sdw_update(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val); 1155 if (ret < 0) 1156 dev_err(&slave->dev, 1157 "SDW_DPN_INTMASK write failed:%d\n", val); 1158 1159 return ret; 1160 } 1161 1162 static int sdw_slave_set_frequency(struct sdw_slave *slave) 1163 { 1164 u32 mclk_freq = slave->bus->prop.mclk_freq; 1165 u32 curr_freq = slave->bus->params.curr_dr_freq >> 1; 1166 unsigned int scale; 1167 u8 scale_index; 1168 u8 base; 1169 int ret; 1170 1171 /* 1172 * frequency base and scale registers are required for SDCA 1173 * devices. They may also be used for 1.2+/non-SDCA devices, 1174 * but we will need a DisCo property to cover this case 1175 */ 1176 if (!slave->id.class_id) 1177 return 0; 1178 1179 if (!mclk_freq) { 1180 dev_err(&slave->dev, 1181 "no bus MCLK, cannot set SDW_SCP_BUS_CLOCK_BASE\n"); 1182 return -EINVAL; 1183 } 1184 1185 /* 1186 * map base frequency using Table 89 of SoundWire 1.2 spec. 1187 * The order of the tests just follows the specification, this 1188 * is not a selection between possible values or a search for 1189 * the best value but just a mapping. Only one case per platform 1190 * is relevant. 1191 * Some BIOS have inconsistent values for mclk_freq but a 1192 * correct root so we force the mclk_freq to avoid variations. 1193 */ 1194 if (!(19200000 % mclk_freq)) { 1195 mclk_freq = 19200000; 1196 base = SDW_SCP_BASE_CLOCK_19200000_HZ; 1197 } else if (!(24000000 % mclk_freq)) { 1198 mclk_freq = 24000000; 1199 base = SDW_SCP_BASE_CLOCK_24000000_HZ; 1200 } else if (!(24576000 % mclk_freq)) { 1201 mclk_freq = 24576000; 1202 base = SDW_SCP_BASE_CLOCK_24576000_HZ; 1203 } else if (!(22579200 % mclk_freq)) { 1204 mclk_freq = 22579200; 1205 base = SDW_SCP_BASE_CLOCK_22579200_HZ; 1206 } else if (!(32000000 % mclk_freq)) { 1207 mclk_freq = 32000000; 1208 base = SDW_SCP_BASE_CLOCK_32000000_HZ; 1209 } else { 1210 dev_err(&slave->dev, 1211 "Unsupported clock base, mclk %d\n", 1212 mclk_freq); 1213 return -EINVAL; 1214 } 1215 1216 if (mclk_freq % curr_freq) { 1217 dev_err(&slave->dev, 1218 "mclk %d is not multiple of bus curr_freq %d\n", 1219 mclk_freq, curr_freq); 1220 return -EINVAL; 1221 } 1222 1223 scale = mclk_freq / curr_freq; 1224 1225 /* 1226 * map scale to Table 90 of SoundWire 1.2 spec - and check 1227 * that the scale is a power of two and maximum 64 1228 */ 1229 scale_index = ilog2(scale); 1230 1231 if (BIT(scale_index) != scale || scale_index > 6) { 1232 dev_err(&slave->dev, 1233 "No match found for scale %d, bus mclk %d curr_freq %d\n", 1234 scale, mclk_freq, curr_freq); 1235 return -EINVAL; 1236 } 1237 scale_index++; 1238 1239 ret = sdw_write_no_pm(slave, SDW_SCP_BUS_CLOCK_BASE, base); 1240 if (ret < 0) { 1241 dev_err(&slave->dev, 1242 "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret); 1243 return ret; 1244 } 1245 1246 /* initialize scale for both banks */ 1247 ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index); 1248 if (ret < 0) { 1249 dev_err(&slave->dev, 1250 "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret); 1251 return ret; 1252 } 1253 ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index); 1254 if (ret < 0) 1255 dev_err(&slave->dev, 1256 "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret); 1257 1258 dev_dbg(&slave->dev, 1259 "Configured bus base %d, scale %d, mclk %d, curr_freq %d\n", 1260 base, scale_index, mclk_freq, curr_freq); 1261 1262 return ret; 1263 } 1264 1265 static int sdw_initialize_slave(struct sdw_slave *slave) 1266 { 1267 struct sdw_slave_prop *prop = &slave->prop; 1268 int status; 1269 int ret; 1270 u8 val; 1271 1272 ret = sdw_slave_set_frequency(slave); 1273 if (ret < 0) 1274 return ret; 1275 1276 if (slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_CLASH) { 1277 /* Clear bus clash interrupt before enabling interrupt mask */ 1278 status = sdw_read_no_pm(slave, SDW_SCP_INT1); 1279 if (status < 0) { 1280 dev_err(&slave->dev, 1281 "SDW_SCP_INT1 (BUS_CLASH) read failed:%d\n", status); 1282 return status; 1283 } 1284 if (status & SDW_SCP_INT1_BUS_CLASH) { 1285 dev_warn(&slave->dev, "Bus clash detected before INT mask is enabled\n"); 1286 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_BUS_CLASH); 1287 if (ret < 0) { 1288 dev_err(&slave->dev, 1289 "SDW_SCP_INT1 (BUS_CLASH) write failed:%d\n", ret); 1290 return ret; 1291 } 1292 } 1293 } 1294 if ((slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_PARITY) && 1295 !(slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY)) { 1296 /* Clear parity interrupt before enabling interrupt mask */ 1297 status = sdw_read_no_pm(slave, SDW_SCP_INT1); 1298 if (status < 0) { 1299 dev_err(&slave->dev, 1300 "SDW_SCP_INT1 (PARITY) read failed:%d\n", status); 1301 return status; 1302 } 1303 if (status & SDW_SCP_INT1_PARITY) { 1304 dev_warn(&slave->dev, "PARITY error detected before INT mask is enabled\n"); 1305 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_PARITY); 1306 if (ret < 0) { 1307 dev_err(&slave->dev, 1308 "SDW_SCP_INT1 (PARITY) write failed:%d\n", ret); 1309 return ret; 1310 } 1311 } 1312 } 1313 1314 /* 1315 * Set SCP_INT1_MASK register, typically bus clash and 1316 * implementation-defined interrupt mask. The Parity detection 1317 * may not always be correct on startup so its use is 1318 * device-dependent, it might e.g. only be enabled in 1319 * steady-state after a couple of frames. 1320 */ 1321 val = slave->prop.scp_int1_mask; 1322 1323 /* Enable SCP interrupts */ 1324 ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, val, val); 1325 if (ret < 0) { 1326 dev_err(&slave->dev, 1327 "SDW_SCP_INTMASK1 write failed:%d\n", ret); 1328 return ret; 1329 } 1330 1331 /* No need to continue if DP0 is not present */ 1332 if (!slave->prop.dp0_prop) 1333 return 0; 1334 1335 /* Enable DP0 interrupts */ 1336 val = prop->dp0_prop->imp_def_interrupts; 1337 val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE; 1338 1339 ret = sdw_update_no_pm(slave, SDW_DP0_INTMASK, val, val); 1340 if (ret < 0) 1341 dev_err(&slave->dev, 1342 "SDW_DP0_INTMASK read failed:%d\n", ret); 1343 return ret; 1344 } 1345 1346 static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status) 1347 { 1348 u8 clear, impl_int_mask; 1349 int status, status2, ret, count = 0; 1350 1351 status = sdw_read_no_pm(slave, SDW_DP0_INT); 1352 if (status < 0) { 1353 dev_err(&slave->dev, 1354 "SDW_DP0_INT read failed:%d\n", status); 1355 return status; 1356 } 1357 1358 do { 1359 clear = status & ~SDW_DP0_INTERRUPTS; 1360 1361 if (status & SDW_DP0_INT_TEST_FAIL) { 1362 dev_err(&slave->dev, "Test fail for port 0\n"); 1363 clear |= SDW_DP0_INT_TEST_FAIL; 1364 } 1365 1366 /* 1367 * Assumption: PORT_READY interrupt will be received only for 1368 * ports implementing Channel Prepare state machine (CP_SM) 1369 */ 1370 1371 if (status & SDW_DP0_INT_PORT_READY) { 1372 complete(&slave->port_ready[0]); 1373 clear |= SDW_DP0_INT_PORT_READY; 1374 } 1375 1376 if (status & SDW_DP0_INT_BRA_FAILURE) { 1377 dev_err(&slave->dev, "BRA failed\n"); 1378 clear |= SDW_DP0_INT_BRA_FAILURE; 1379 } 1380 1381 impl_int_mask = SDW_DP0_INT_IMPDEF1 | 1382 SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3; 1383 1384 if (status & impl_int_mask) { 1385 clear |= impl_int_mask; 1386 *slave_status = clear; 1387 } 1388 1389 /* clear the interrupts but don't touch reserved and SDCA_CASCADE fields */ 1390 ret = sdw_write_no_pm(slave, SDW_DP0_INT, clear); 1391 if (ret < 0) { 1392 dev_err(&slave->dev, 1393 "SDW_DP0_INT write failed:%d\n", ret); 1394 return ret; 1395 } 1396 1397 /* Read DP0 interrupt again */ 1398 status2 = sdw_read_no_pm(slave, SDW_DP0_INT); 1399 if (status2 < 0) { 1400 dev_err(&slave->dev, 1401 "SDW_DP0_INT read failed:%d\n", status2); 1402 return status2; 1403 } 1404 /* filter to limit loop to interrupts identified in the first status read */ 1405 status &= status2; 1406 1407 count++; 1408 1409 /* we can get alerts while processing so keep retrying */ 1410 } while ((status & SDW_DP0_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY)); 1411 1412 if (count == SDW_READ_INTR_CLEAR_RETRY) 1413 dev_warn(&slave->dev, "Reached MAX_RETRY on DP0 read\n"); 1414 1415 return ret; 1416 } 1417 1418 static int sdw_handle_port_interrupt(struct sdw_slave *slave, 1419 int port, u8 *slave_status) 1420 { 1421 u8 clear, impl_int_mask; 1422 int status, status2, ret, count = 0; 1423 u32 addr; 1424 1425 if (port == 0) 1426 return sdw_handle_dp0_interrupt(slave, slave_status); 1427 1428 addr = SDW_DPN_INT(port); 1429 status = sdw_read_no_pm(slave, addr); 1430 if (status < 0) { 1431 dev_err(&slave->dev, 1432 "SDW_DPN_INT read failed:%d\n", status); 1433 1434 return status; 1435 } 1436 1437 do { 1438 clear = status & ~SDW_DPN_INTERRUPTS; 1439 1440 if (status & SDW_DPN_INT_TEST_FAIL) { 1441 dev_err(&slave->dev, "Test fail for port:%d\n", port); 1442 clear |= SDW_DPN_INT_TEST_FAIL; 1443 } 1444 1445 /* 1446 * Assumption: PORT_READY interrupt will be received only 1447 * for ports implementing CP_SM. 1448 */ 1449 if (status & SDW_DPN_INT_PORT_READY) { 1450 complete(&slave->port_ready[port]); 1451 clear |= SDW_DPN_INT_PORT_READY; 1452 } 1453 1454 impl_int_mask = SDW_DPN_INT_IMPDEF1 | 1455 SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3; 1456 1457 if (status & impl_int_mask) { 1458 clear |= impl_int_mask; 1459 *slave_status = clear; 1460 } 1461 1462 /* clear the interrupt but don't touch reserved fields */ 1463 ret = sdw_write_no_pm(slave, addr, clear); 1464 if (ret < 0) { 1465 dev_err(&slave->dev, 1466 "SDW_DPN_INT write failed:%d\n", ret); 1467 return ret; 1468 } 1469 1470 /* Read DPN interrupt again */ 1471 status2 = sdw_read_no_pm(slave, addr); 1472 if (status2 < 0) { 1473 dev_err(&slave->dev, 1474 "SDW_DPN_INT read failed:%d\n", status2); 1475 return status2; 1476 } 1477 /* filter to limit loop to interrupts identified in the first status read */ 1478 status &= status2; 1479 1480 count++; 1481 1482 /* we can get alerts while processing so keep retrying */ 1483 } while ((status & SDW_DPN_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY)); 1484 1485 if (count == SDW_READ_INTR_CLEAR_RETRY) 1486 dev_warn(&slave->dev, "Reached MAX_RETRY on port read"); 1487 1488 return ret; 1489 } 1490 1491 static int sdw_handle_slave_alerts(struct sdw_slave *slave) 1492 { 1493 struct sdw_slave_intr_status slave_intr; 1494 u8 clear = 0, bit, port_status[15] = {0}; 1495 int port_num, stat, ret, count = 0; 1496 unsigned long port; 1497 bool slave_notify; 1498 u8 sdca_cascade = 0; 1499 u8 buf, buf2[2], _buf, _buf2[2]; 1500 bool parity_check; 1501 bool parity_quirk; 1502 1503 sdw_modify_slave_status(slave, SDW_SLAVE_ALERT); 1504 1505 ret = pm_runtime_resume_and_get(&slave->dev); 1506 if (ret < 0 && ret != -EACCES) { 1507 dev_err(&slave->dev, "Failed to resume device: %d\n", ret); 1508 return ret; 1509 } 1510 1511 /* Read Intstat 1, Intstat 2 and Intstat 3 registers */ 1512 ret = sdw_read_no_pm(slave, SDW_SCP_INT1); 1513 if (ret < 0) { 1514 dev_err(&slave->dev, 1515 "SDW_SCP_INT1 read failed:%d\n", ret); 1516 goto io_err; 1517 } 1518 buf = ret; 1519 1520 ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, buf2); 1521 if (ret < 0) { 1522 dev_err(&slave->dev, 1523 "SDW_SCP_INT2/3 read failed:%d\n", ret); 1524 goto io_err; 1525 } 1526 1527 if (slave->prop.is_sdca) { 1528 ret = sdw_read_no_pm(slave, SDW_DP0_INT); 1529 if (ret < 0) { 1530 dev_err(&slave->dev, 1531 "SDW_DP0_INT read failed:%d\n", ret); 1532 goto io_err; 1533 } 1534 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; 1535 } 1536 1537 do { 1538 slave_notify = false; 1539 1540 /* 1541 * Check parity, bus clash and Slave (impl defined) 1542 * interrupt 1543 */ 1544 if (buf & SDW_SCP_INT1_PARITY) { 1545 parity_check = slave->prop.scp_int1_mask & SDW_SCP_INT1_PARITY; 1546 parity_quirk = !slave->first_interrupt_done && 1547 (slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY); 1548 1549 if (parity_check && !parity_quirk) 1550 dev_err(&slave->dev, "Parity error detected\n"); 1551 clear |= SDW_SCP_INT1_PARITY; 1552 } 1553 1554 if (buf & SDW_SCP_INT1_BUS_CLASH) { 1555 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_BUS_CLASH) 1556 dev_err(&slave->dev, "Bus clash detected\n"); 1557 clear |= SDW_SCP_INT1_BUS_CLASH; 1558 } 1559 1560 /* 1561 * When bus clash or parity errors are detected, such errors 1562 * are unlikely to be recoverable errors. 1563 * TODO: In such scenario, reset bus. Make this configurable 1564 * via sysfs property with bus reset being the default. 1565 */ 1566 1567 if (buf & SDW_SCP_INT1_IMPL_DEF) { 1568 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_IMPL_DEF) { 1569 dev_dbg(&slave->dev, "Slave impl defined interrupt\n"); 1570 slave_notify = true; 1571 } 1572 clear |= SDW_SCP_INT1_IMPL_DEF; 1573 } 1574 1575 /* the SDCA interrupts are cleared in the codec driver .interrupt_callback() */ 1576 if (sdca_cascade) 1577 slave_notify = true; 1578 1579 /* Check port 0 - 3 interrupts */ 1580 port = buf & SDW_SCP_INT1_PORT0_3; 1581 1582 /* To get port number corresponding to bits, shift it */ 1583 port = FIELD_GET(SDW_SCP_INT1_PORT0_3, port); 1584 for_each_set_bit(bit, &port, 8) { 1585 sdw_handle_port_interrupt(slave, bit, 1586 &port_status[bit]); 1587 } 1588 1589 /* Check if cascade 2 interrupt is present */ 1590 if (buf & SDW_SCP_INT1_SCP2_CASCADE) { 1591 port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10; 1592 for_each_set_bit(bit, &port, 8) { 1593 /* scp2 ports start from 4 */ 1594 port_num = bit + 3; 1595 sdw_handle_port_interrupt(slave, 1596 port_num, 1597 &port_status[port_num]); 1598 } 1599 } 1600 1601 /* now check last cascade */ 1602 if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) { 1603 port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14; 1604 for_each_set_bit(bit, &port, 8) { 1605 /* scp3 ports start from 11 */ 1606 port_num = bit + 10; 1607 sdw_handle_port_interrupt(slave, 1608 port_num, 1609 &port_status[port_num]); 1610 } 1611 } 1612 1613 /* Update the Slave driver */ 1614 if (slave_notify && slave->ops && 1615 slave->ops->interrupt_callback) { 1616 slave_intr.sdca_cascade = sdca_cascade; 1617 slave_intr.control_port = clear; 1618 memcpy(slave_intr.port, &port_status, 1619 sizeof(slave_intr.port)); 1620 1621 slave->ops->interrupt_callback(slave, &slave_intr); 1622 } 1623 1624 /* Ack interrupt */ 1625 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, clear); 1626 if (ret < 0) { 1627 dev_err(&slave->dev, 1628 "SDW_SCP_INT1 write failed:%d\n", ret); 1629 goto io_err; 1630 } 1631 1632 /* at this point all initial interrupt sources were handled */ 1633 slave->first_interrupt_done = true; 1634 1635 /* 1636 * Read status again to ensure no new interrupts arrived 1637 * while servicing interrupts. 1638 */ 1639 ret = sdw_read_no_pm(slave, SDW_SCP_INT1); 1640 if (ret < 0) { 1641 dev_err(&slave->dev, 1642 "SDW_SCP_INT1 recheck read failed:%d\n", ret); 1643 goto io_err; 1644 } 1645 _buf = ret; 1646 1647 ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, _buf2); 1648 if (ret < 0) { 1649 dev_err(&slave->dev, 1650 "SDW_SCP_INT2/3 recheck read failed:%d\n", ret); 1651 goto io_err; 1652 } 1653 1654 if (slave->prop.is_sdca) { 1655 ret = sdw_read_no_pm(slave, SDW_DP0_INT); 1656 if (ret < 0) { 1657 dev_err(&slave->dev, 1658 "SDW_DP0_INT recheck read failed:%d\n", ret); 1659 goto io_err; 1660 } 1661 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; 1662 } 1663 1664 /* 1665 * Make sure no interrupts are pending, but filter to limit loop 1666 * to interrupts identified in the first status read 1667 */ 1668 buf &= _buf; 1669 buf2[0] &= _buf2[0]; 1670 buf2[1] &= _buf2[1]; 1671 stat = buf || buf2[0] || buf2[1] || sdca_cascade; 1672 1673 /* 1674 * Exit loop if Slave is continuously in ALERT state even 1675 * after servicing the interrupt multiple times. 1676 */ 1677 count++; 1678 1679 /* we can get alerts while processing so keep retrying */ 1680 } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY); 1681 1682 if (count == SDW_READ_INTR_CLEAR_RETRY) 1683 dev_warn(&slave->dev, "Reached MAX_RETRY on alert read\n"); 1684 1685 io_err: 1686 pm_runtime_mark_last_busy(&slave->dev); 1687 pm_runtime_put_autosuspend(&slave->dev); 1688 1689 return ret; 1690 } 1691 1692 static int sdw_update_slave_status(struct sdw_slave *slave, 1693 enum sdw_slave_status status) 1694 { 1695 unsigned long time; 1696 1697 if (!slave->probed) { 1698 /* 1699 * the slave status update is typically handled in an 1700 * interrupt thread, which can race with the driver 1701 * probe, e.g. when a module needs to be loaded. 1702 * 1703 * make sure the probe is complete before updating 1704 * status. 1705 */ 1706 time = wait_for_completion_timeout(&slave->probe_complete, 1707 msecs_to_jiffies(DEFAULT_PROBE_TIMEOUT)); 1708 if (!time) { 1709 dev_err(&slave->dev, "Probe not complete, timed out\n"); 1710 return -ETIMEDOUT; 1711 } 1712 } 1713 1714 if (!slave->ops || !slave->ops->update_status) 1715 return 0; 1716 1717 return slave->ops->update_status(slave, status); 1718 } 1719 1720 /** 1721 * sdw_handle_slave_status() - Handle Slave status 1722 * @bus: SDW bus instance 1723 * @status: Status for all Slave(s) 1724 */ 1725 int sdw_handle_slave_status(struct sdw_bus *bus, 1726 enum sdw_slave_status status[]) 1727 { 1728 enum sdw_slave_status prev_status; 1729 struct sdw_slave *slave; 1730 bool attached_initializing; 1731 int i, ret = 0; 1732 1733 /* first check if any Slaves fell off the bus */ 1734 for (i = 1; i <= SDW_MAX_DEVICES; i++) { 1735 mutex_lock(&bus->bus_lock); 1736 if (test_bit(i, bus->assigned) == false) { 1737 mutex_unlock(&bus->bus_lock); 1738 continue; 1739 } 1740 mutex_unlock(&bus->bus_lock); 1741 1742 slave = sdw_get_slave(bus, i); 1743 if (!slave) 1744 continue; 1745 1746 if (status[i] == SDW_SLAVE_UNATTACHED && 1747 slave->status != SDW_SLAVE_UNATTACHED) { 1748 dev_warn(&slave->dev, "Slave %d state check1: UNATTACHED, status was %d\n", 1749 i, slave->status); 1750 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); 1751 } 1752 } 1753 1754 if (status[0] == SDW_SLAVE_ATTACHED) { 1755 dev_dbg(bus->dev, "Slave attached, programming device number\n"); 1756 ret = sdw_program_device_num(bus); 1757 if (ret < 0) 1758 dev_err(bus->dev, "Slave attach failed: %d\n", ret); 1759 /* 1760 * programming a device number will have side effects, 1761 * so we deal with other devices at a later time 1762 */ 1763 return ret; 1764 } 1765 1766 /* Continue to check other slave statuses */ 1767 for (i = 1; i <= SDW_MAX_DEVICES; i++) { 1768 mutex_lock(&bus->bus_lock); 1769 if (test_bit(i, bus->assigned) == false) { 1770 mutex_unlock(&bus->bus_lock); 1771 continue; 1772 } 1773 mutex_unlock(&bus->bus_lock); 1774 1775 slave = sdw_get_slave(bus, i); 1776 if (!slave) 1777 continue; 1778 1779 attached_initializing = false; 1780 1781 switch (status[i]) { 1782 case SDW_SLAVE_UNATTACHED: 1783 if (slave->status == SDW_SLAVE_UNATTACHED) 1784 break; 1785 1786 dev_warn(&slave->dev, "Slave %d state check2: UNATTACHED, status was %d\n", 1787 i, slave->status); 1788 1789 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); 1790 break; 1791 1792 case SDW_SLAVE_ALERT: 1793 ret = sdw_handle_slave_alerts(slave); 1794 if (ret < 0) 1795 dev_err(&slave->dev, 1796 "Slave %d alert handling failed: %d\n", 1797 i, ret); 1798 break; 1799 1800 case SDW_SLAVE_ATTACHED: 1801 if (slave->status == SDW_SLAVE_ATTACHED) 1802 break; 1803 1804 prev_status = slave->status; 1805 sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED); 1806 1807 if (prev_status == SDW_SLAVE_ALERT) 1808 break; 1809 1810 attached_initializing = true; 1811 1812 ret = sdw_initialize_slave(slave); 1813 if (ret < 0) 1814 dev_err(&slave->dev, 1815 "Slave %d initialization failed: %d\n", 1816 i, ret); 1817 1818 break; 1819 1820 default: 1821 dev_err(&slave->dev, "Invalid slave %d status:%d\n", 1822 i, status[i]); 1823 break; 1824 } 1825 1826 ret = sdw_update_slave_status(slave, status[i]); 1827 if (ret < 0) 1828 dev_err(&slave->dev, 1829 "Update Slave status failed:%d\n", ret); 1830 if (attached_initializing) { 1831 dev_dbg(&slave->dev, 1832 "%s: signaling initialization completion for Slave %d\n", 1833 __func__, slave->dev_num); 1834 1835 complete(&slave->initialization_complete); 1836 1837 /* 1838 * If the manager became pm_runtime active, the peripherals will be 1839 * restarted and attach, but their pm_runtime status may remain 1840 * suspended. If the 'update_slave_status' callback initiates 1841 * any sort of deferred processing, this processing would not be 1842 * cancelled on pm_runtime suspend. 1843 * To avoid such zombie states, we queue a request to resume. 1844 * This would be a no-op in case the peripheral was being resumed 1845 * by e.g. the ALSA/ASoC framework. 1846 */ 1847 pm_request_resume(&slave->dev); 1848 } 1849 } 1850 1851 return ret; 1852 } 1853 EXPORT_SYMBOL(sdw_handle_slave_status); 1854 1855 void sdw_clear_slave_status(struct sdw_bus *bus, u32 request) 1856 { 1857 struct sdw_slave *slave; 1858 int i; 1859 1860 /* Check all non-zero devices */ 1861 for (i = 1; i <= SDW_MAX_DEVICES; i++) { 1862 mutex_lock(&bus->bus_lock); 1863 if (test_bit(i, bus->assigned) == false) { 1864 mutex_unlock(&bus->bus_lock); 1865 continue; 1866 } 1867 mutex_unlock(&bus->bus_lock); 1868 1869 slave = sdw_get_slave(bus, i); 1870 if (!slave) 1871 continue; 1872 1873 if (slave->status != SDW_SLAVE_UNATTACHED) { 1874 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); 1875 slave->first_interrupt_done = false; 1876 sdw_update_slave_status(slave, SDW_SLAVE_UNATTACHED); 1877 } 1878 1879 /* keep track of request, used in pm_runtime resume */ 1880 slave->unattach_request = request; 1881 } 1882 } 1883 EXPORT_SYMBOL(sdw_clear_slave_status); 1884