1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2 // Copyright(c) 2015-17 Intel Corporation. 3 4 #include <linux/acpi.h> 5 #include <linux/delay.h> 6 #include <linux/mod_devicetable.h> 7 #include <linux/pm_runtime.h> 8 #include <linux/soundwire/sdw_registers.h> 9 #include <linux/soundwire/sdw.h> 10 #include "bus.h" 11 #include "sysfs_local.h" 12 13 static DEFINE_IDA(sdw_ida); 14 15 static int sdw_get_id(struct sdw_bus *bus) 16 { 17 int rc = ida_alloc(&sdw_ida, GFP_KERNEL); 18 19 if (rc < 0) 20 return rc; 21 22 bus->id = rc; 23 return 0; 24 } 25 26 /** 27 * sdw_bus_master_add() - add a bus Master instance 28 * @bus: bus instance 29 * @parent: parent device 30 * @fwnode: firmware node handle 31 * 32 * Initializes the bus instance, read properties and create child 33 * devices. 34 */ 35 int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent, 36 struct fwnode_handle *fwnode) 37 { 38 struct sdw_master_prop *prop = NULL; 39 int ret; 40 41 if (!parent) { 42 pr_err("SoundWire parent device is not set\n"); 43 return -ENODEV; 44 } 45 46 ret = sdw_get_id(bus); 47 if (ret < 0) { 48 dev_err(parent, "Failed to get bus id\n"); 49 return ret; 50 } 51 52 ret = sdw_master_device_add(bus, parent, fwnode); 53 if (ret < 0) { 54 dev_err(parent, "Failed to add master device at link %d\n", 55 bus->link_id); 56 return ret; 57 } 58 59 if (!bus->ops) { 60 dev_err(bus->dev, "SoundWire Bus ops are not set\n"); 61 return -EINVAL; 62 } 63 64 if (!bus->compute_params) { 65 dev_err(bus->dev, 66 "Bandwidth allocation not configured, compute_params no set\n"); 67 return -EINVAL; 68 } 69 70 mutex_init(&bus->msg_lock); 71 mutex_init(&bus->bus_lock); 72 INIT_LIST_HEAD(&bus->slaves); 73 INIT_LIST_HEAD(&bus->m_rt_list); 74 75 /* 76 * Initialize multi_link flag 77 * TODO: populate this flag by reading property from FW node 78 */ 79 bus->multi_link = false; 80 if (bus->ops->read_prop) { 81 ret = bus->ops->read_prop(bus); 82 if (ret < 0) { 83 dev_err(bus->dev, 84 "Bus read properties failed:%d\n", ret); 85 return ret; 86 } 87 } 88 89 sdw_bus_debugfs_init(bus); 90 91 /* 92 * Device numbers in SoundWire are 0 through 15. Enumeration device 93 * number (0), Broadcast device number (15), Group numbers (12 and 94 * 13) and Master device number (14) are not used for assignment so 95 * mask these and other higher bits. 96 */ 97 98 /* Set higher order bits */ 99 *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM); 100 101 /* Set enumuration device number and broadcast device number */ 102 set_bit(SDW_ENUM_DEV_NUM, bus->assigned); 103 set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned); 104 105 /* Set group device numbers and master device number */ 106 set_bit(SDW_GROUP12_DEV_NUM, bus->assigned); 107 set_bit(SDW_GROUP13_DEV_NUM, bus->assigned); 108 set_bit(SDW_MASTER_DEV_NUM, bus->assigned); 109 110 /* 111 * SDW is an enumerable bus, but devices can be powered off. So, 112 * they won't be able to report as present. 113 * 114 * Create Slave devices based on Slaves described in 115 * the respective firmware (ACPI/DT) 116 */ 117 if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev)) 118 ret = sdw_acpi_find_slaves(bus); 119 else if (IS_ENABLED(CONFIG_OF) && bus->dev->of_node) 120 ret = sdw_of_find_slaves(bus); 121 else 122 ret = -ENOTSUPP; /* No ACPI/DT so error out */ 123 124 if (ret < 0) { 125 dev_err(bus->dev, "Finding slaves failed:%d\n", ret); 126 return ret; 127 } 128 129 /* 130 * Initialize clock values based on Master properties. The max 131 * frequency is read from max_clk_freq property. Current assumption 132 * is that the bus will start at highest clock frequency when 133 * powered on. 134 * 135 * Default active bank will be 0 as out of reset the Slaves have 136 * to start with bank 0 (Table 40 of Spec) 137 */ 138 prop = &bus->prop; 139 bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR; 140 bus->params.curr_dr_freq = bus->params.max_dr_freq; 141 bus->params.curr_bank = SDW_BANK0; 142 bus->params.next_bank = SDW_BANK1; 143 144 return 0; 145 } 146 EXPORT_SYMBOL(sdw_bus_master_add); 147 148 static int sdw_delete_slave(struct device *dev, void *data) 149 { 150 struct sdw_slave *slave = dev_to_sdw_dev(dev); 151 struct sdw_bus *bus = slave->bus; 152 153 pm_runtime_disable(dev); 154 155 sdw_slave_debugfs_exit(slave); 156 157 mutex_lock(&bus->bus_lock); 158 159 if (slave->dev_num) /* clear dev_num if assigned */ 160 clear_bit(slave->dev_num, bus->assigned); 161 162 list_del_init(&slave->node); 163 mutex_unlock(&bus->bus_lock); 164 165 device_unregister(dev); 166 return 0; 167 } 168 169 /** 170 * sdw_bus_master_delete() - delete the bus master instance 171 * @bus: bus to be deleted 172 * 173 * Remove the instance, delete the child devices. 174 */ 175 void sdw_bus_master_delete(struct sdw_bus *bus) 176 { 177 device_for_each_child(bus->dev, NULL, sdw_delete_slave); 178 sdw_master_device_del(bus); 179 180 sdw_bus_debugfs_exit(bus); 181 ida_free(&sdw_ida, bus->id); 182 } 183 EXPORT_SYMBOL(sdw_bus_master_delete); 184 185 /* 186 * SDW IO Calls 187 */ 188 189 static inline int find_response_code(enum sdw_command_response resp) 190 { 191 switch (resp) { 192 case SDW_CMD_OK: 193 return 0; 194 195 case SDW_CMD_IGNORED: 196 return -ENODATA; 197 198 case SDW_CMD_TIMEOUT: 199 return -ETIMEDOUT; 200 201 default: 202 return -EIO; 203 } 204 } 205 206 static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg) 207 { 208 int retry = bus->prop.err_threshold; 209 enum sdw_command_response resp; 210 int ret = 0, i; 211 212 for (i = 0; i <= retry; i++) { 213 resp = bus->ops->xfer_msg(bus, msg); 214 ret = find_response_code(resp); 215 216 /* if cmd is ok or ignored return */ 217 if (ret == 0 || ret == -ENODATA) 218 return ret; 219 } 220 221 return ret; 222 } 223 224 static inline int do_transfer_defer(struct sdw_bus *bus, 225 struct sdw_msg *msg, 226 struct sdw_defer *defer) 227 { 228 int retry = bus->prop.err_threshold; 229 enum sdw_command_response resp; 230 int ret = 0, i; 231 232 defer->msg = msg; 233 defer->length = msg->len; 234 init_completion(&defer->complete); 235 236 for (i = 0; i <= retry; i++) { 237 resp = bus->ops->xfer_msg_defer(bus, msg, defer); 238 ret = find_response_code(resp); 239 /* if cmd is ok or ignored return */ 240 if (ret == 0 || ret == -ENODATA) 241 return ret; 242 } 243 244 return ret; 245 } 246 247 static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num) 248 { 249 int retry = bus->prop.err_threshold; 250 enum sdw_command_response resp; 251 int ret = 0, i; 252 253 for (i = 0; i <= retry; i++) { 254 resp = bus->ops->reset_page_addr(bus, dev_num); 255 ret = find_response_code(resp); 256 /* if cmd is ok or ignored return */ 257 if (ret == 0 || ret == -ENODATA) 258 return ret; 259 } 260 261 return ret; 262 } 263 264 static int sdw_transfer_unlocked(struct sdw_bus *bus, struct sdw_msg *msg) 265 { 266 int ret; 267 268 ret = do_transfer(bus, msg); 269 if (ret != 0 && ret != -ENODATA) 270 dev_err(bus->dev, "trf on Slave %d failed:%d %s addr %x count %d\n", 271 msg->dev_num, ret, 272 (msg->flags & SDW_MSG_FLAG_WRITE) ? "write" : "read", 273 msg->addr, msg->len); 274 275 if (msg->page) 276 sdw_reset_page(bus, msg->dev_num); 277 278 return ret; 279 } 280 281 /** 282 * sdw_transfer() - Synchronous transfer message to a SDW Slave device 283 * @bus: SDW bus 284 * @msg: SDW message to be xfered 285 */ 286 int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg) 287 { 288 int ret; 289 290 mutex_lock(&bus->msg_lock); 291 292 ret = sdw_transfer_unlocked(bus, msg); 293 294 mutex_unlock(&bus->msg_lock); 295 296 return ret; 297 } 298 299 /** 300 * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device 301 * @bus: SDW bus 302 * @msg: SDW message to be xfered 303 * @defer: Defer block for signal completion 304 * 305 * Caller needs to hold the msg_lock lock while calling this 306 */ 307 int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg, 308 struct sdw_defer *defer) 309 { 310 int ret; 311 312 if (!bus->ops->xfer_msg_defer) 313 return -ENOTSUPP; 314 315 ret = do_transfer_defer(bus, msg, defer); 316 if (ret != 0 && ret != -ENODATA) 317 dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n", 318 msg->dev_num, ret); 319 320 if (msg->page) 321 sdw_reset_page(bus, msg->dev_num); 322 323 return ret; 324 } 325 326 int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave, 327 u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf) 328 { 329 memset(msg, 0, sizeof(*msg)); 330 msg->addr = addr; /* addr is 16 bit and truncated here */ 331 msg->len = count; 332 msg->dev_num = dev_num; 333 msg->flags = flags; 334 msg->buf = buf; 335 336 if (addr < SDW_REG_NO_PAGE) /* no paging area */ 337 return 0; 338 339 if (addr >= SDW_REG_MAX) { /* illegal addr */ 340 pr_err("SDW: Invalid address %x passed\n", addr); 341 return -EINVAL; 342 } 343 344 if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */ 345 if (slave && !slave->prop.paging_support) 346 return 0; 347 /* no need for else as that will fall-through to paging */ 348 } 349 350 /* paging mandatory */ 351 if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) { 352 pr_err("SDW: Invalid device for paging :%d\n", dev_num); 353 return -EINVAL; 354 } 355 356 if (!slave) { 357 pr_err("SDW: No slave for paging addr\n"); 358 return -EINVAL; 359 } 360 361 if (!slave->prop.paging_support) { 362 dev_err(&slave->dev, 363 "address %x needs paging but no support\n", addr); 364 return -EINVAL; 365 } 366 367 msg->addr_page1 = FIELD_GET(SDW_SCP_ADDRPAGE1_MASK, addr); 368 msg->addr_page2 = FIELD_GET(SDW_SCP_ADDRPAGE2_MASK, addr); 369 msg->addr |= BIT(15); 370 msg->page = true; 371 372 return 0; 373 } 374 375 /* 376 * Read/Write IO functions. 377 * no_pm versions can only be called by the bus, e.g. while enumerating or 378 * handling suspend-resume sequences. 379 * all clients need to use the pm versions 380 */ 381 382 static int 383 sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) 384 { 385 struct sdw_msg msg; 386 int ret; 387 388 ret = sdw_fill_msg(&msg, slave, addr, count, 389 slave->dev_num, SDW_MSG_FLAG_READ, val); 390 if (ret < 0) 391 return ret; 392 393 return sdw_transfer(slave->bus, &msg); 394 } 395 396 static int 397 sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) 398 { 399 struct sdw_msg msg; 400 int ret; 401 402 ret = sdw_fill_msg(&msg, slave, addr, count, 403 slave->dev_num, SDW_MSG_FLAG_WRITE, val); 404 if (ret < 0) 405 return ret; 406 407 return sdw_transfer(slave->bus, &msg); 408 } 409 410 int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value) 411 { 412 return sdw_nwrite_no_pm(slave, addr, 1, &value); 413 } 414 EXPORT_SYMBOL(sdw_write_no_pm); 415 416 static int 417 sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr) 418 { 419 struct sdw_msg msg; 420 u8 buf; 421 int ret; 422 423 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, 424 SDW_MSG_FLAG_READ, &buf); 425 if (ret < 0) 426 return ret; 427 428 ret = sdw_transfer(bus, &msg); 429 if (ret < 0) 430 return ret; 431 432 return buf; 433 } 434 435 static int 436 sdw_bwrite_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value) 437 { 438 struct sdw_msg msg; 439 int ret; 440 441 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, 442 SDW_MSG_FLAG_WRITE, &value); 443 if (ret < 0) 444 return ret; 445 446 return sdw_transfer(bus, &msg); 447 } 448 449 int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr) 450 { 451 struct sdw_msg msg; 452 u8 buf; 453 int ret; 454 455 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, 456 SDW_MSG_FLAG_READ, &buf); 457 if (ret < 0) 458 return ret; 459 460 ret = sdw_transfer_unlocked(bus, &msg); 461 if (ret < 0) 462 return ret; 463 464 return buf; 465 } 466 EXPORT_SYMBOL(sdw_bread_no_pm_unlocked); 467 468 int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value) 469 { 470 struct sdw_msg msg; 471 int ret; 472 473 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, 474 SDW_MSG_FLAG_WRITE, &value); 475 if (ret < 0) 476 return ret; 477 478 return sdw_transfer_unlocked(bus, &msg); 479 } 480 EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked); 481 482 int sdw_read_no_pm(struct sdw_slave *slave, u32 addr) 483 { 484 u8 buf; 485 int ret; 486 487 ret = sdw_nread_no_pm(slave, addr, 1, &buf); 488 if (ret < 0) 489 return ret; 490 else 491 return buf; 492 } 493 EXPORT_SYMBOL(sdw_read_no_pm); 494 495 int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) 496 { 497 int tmp; 498 499 tmp = sdw_read_no_pm(slave, addr); 500 if (tmp < 0) 501 return tmp; 502 503 tmp = (tmp & ~mask) | val; 504 return sdw_write_no_pm(slave, addr, tmp); 505 } 506 EXPORT_SYMBOL(sdw_update_no_pm); 507 508 /* Read-Modify-Write Slave register */ 509 int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) 510 { 511 int tmp; 512 513 tmp = sdw_read(slave, addr); 514 if (tmp < 0) 515 return tmp; 516 517 tmp = (tmp & ~mask) | val; 518 return sdw_write(slave, addr, tmp); 519 } 520 EXPORT_SYMBOL(sdw_update); 521 522 /** 523 * sdw_nread() - Read "n" contiguous SDW Slave registers 524 * @slave: SDW Slave 525 * @addr: Register address 526 * @count: length 527 * @val: Buffer for values to be read 528 */ 529 int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) 530 { 531 int ret; 532 533 ret = pm_runtime_get_sync(&slave->dev); 534 if (ret < 0 && ret != -EACCES) { 535 pm_runtime_put_noidle(&slave->dev); 536 return ret; 537 } 538 539 ret = sdw_nread_no_pm(slave, addr, count, val); 540 541 pm_runtime_mark_last_busy(&slave->dev); 542 pm_runtime_put(&slave->dev); 543 544 return ret; 545 } 546 EXPORT_SYMBOL(sdw_nread); 547 548 /** 549 * sdw_nwrite() - Write "n" contiguous SDW Slave registers 550 * @slave: SDW Slave 551 * @addr: Register address 552 * @count: length 553 * @val: Buffer for values to be read 554 */ 555 int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) 556 { 557 int ret; 558 559 ret = pm_runtime_get_sync(&slave->dev); 560 if (ret < 0 && ret != -EACCES) { 561 pm_runtime_put_noidle(&slave->dev); 562 return ret; 563 } 564 565 ret = sdw_nwrite_no_pm(slave, addr, count, val); 566 567 pm_runtime_mark_last_busy(&slave->dev); 568 pm_runtime_put(&slave->dev); 569 570 return ret; 571 } 572 EXPORT_SYMBOL(sdw_nwrite); 573 574 /** 575 * sdw_read() - Read a SDW Slave register 576 * @slave: SDW Slave 577 * @addr: Register address 578 */ 579 int sdw_read(struct sdw_slave *slave, u32 addr) 580 { 581 u8 buf; 582 int ret; 583 584 ret = sdw_nread(slave, addr, 1, &buf); 585 if (ret < 0) 586 return ret; 587 588 return buf; 589 } 590 EXPORT_SYMBOL(sdw_read); 591 592 /** 593 * sdw_write() - Write a SDW Slave register 594 * @slave: SDW Slave 595 * @addr: Register address 596 * @value: Register value 597 */ 598 int sdw_write(struct sdw_slave *slave, u32 addr, u8 value) 599 { 600 return sdw_nwrite(slave, addr, 1, &value); 601 } 602 EXPORT_SYMBOL(sdw_write); 603 604 /* 605 * SDW alert handling 606 */ 607 608 /* called with bus_lock held */ 609 static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i) 610 { 611 struct sdw_slave *slave; 612 613 list_for_each_entry(slave, &bus->slaves, node) { 614 if (slave->dev_num == i) 615 return slave; 616 } 617 618 return NULL; 619 } 620 621 int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id) 622 { 623 if (slave->id.mfg_id != id.mfg_id || 624 slave->id.part_id != id.part_id || 625 slave->id.class_id != id.class_id || 626 (slave->id.unique_id != SDW_IGNORED_UNIQUE_ID && 627 slave->id.unique_id != id.unique_id)) 628 return -ENODEV; 629 630 return 0; 631 } 632 EXPORT_SYMBOL(sdw_compare_devid); 633 634 /* called with bus_lock held */ 635 static int sdw_get_device_num(struct sdw_slave *slave) 636 { 637 int bit; 638 639 bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES); 640 if (bit == SDW_MAX_DEVICES) { 641 bit = -ENODEV; 642 goto err; 643 } 644 645 /* 646 * Do not update dev_num in Slave data structure here, 647 * Update once program dev_num is successful 648 */ 649 set_bit(bit, slave->bus->assigned); 650 651 err: 652 return bit; 653 } 654 655 static int sdw_assign_device_num(struct sdw_slave *slave) 656 { 657 struct sdw_bus *bus = slave->bus; 658 int ret, dev_num; 659 bool new_device = false; 660 661 /* check first if device number is assigned, if so reuse that */ 662 if (!slave->dev_num) { 663 if (!slave->dev_num_sticky) { 664 mutex_lock(&slave->bus->bus_lock); 665 dev_num = sdw_get_device_num(slave); 666 mutex_unlock(&slave->bus->bus_lock); 667 if (dev_num < 0) { 668 dev_err(bus->dev, "Get dev_num failed: %d\n", 669 dev_num); 670 return dev_num; 671 } 672 slave->dev_num = dev_num; 673 slave->dev_num_sticky = dev_num; 674 new_device = true; 675 } else { 676 slave->dev_num = slave->dev_num_sticky; 677 } 678 } 679 680 if (!new_device) 681 dev_dbg(bus->dev, 682 "Slave already registered, reusing dev_num:%d\n", 683 slave->dev_num); 684 685 /* Clear the slave->dev_num to transfer message on device 0 */ 686 dev_num = slave->dev_num; 687 slave->dev_num = 0; 688 689 ret = sdw_write_no_pm(slave, SDW_SCP_DEVNUMBER, dev_num); 690 if (ret < 0) { 691 dev_err(bus->dev, "Program device_num %d failed: %d\n", 692 dev_num, ret); 693 return ret; 694 } 695 696 /* After xfer of msg, restore dev_num */ 697 slave->dev_num = slave->dev_num_sticky; 698 699 return 0; 700 } 701 702 void sdw_extract_slave_id(struct sdw_bus *bus, 703 u64 addr, struct sdw_slave_id *id) 704 { 705 dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr); 706 707 id->sdw_version = SDW_VERSION(addr); 708 id->unique_id = SDW_UNIQUE_ID(addr); 709 id->mfg_id = SDW_MFG_ID(addr); 710 id->part_id = SDW_PART_ID(addr); 711 id->class_id = SDW_CLASS_ID(addr); 712 713 dev_dbg(bus->dev, 714 "SDW Slave class_id 0x%02x, mfg_id 0x%04x, part_id 0x%04x, unique_id 0x%x, version 0x%x\n", 715 id->class_id, id->mfg_id, id->part_id, id->unique_id, id->sdw_version); 716 } 717 EXPORT_SYMBOL(sdw_extract_slave_id); 718 719 static int sdw_program_device_num(struct sdw_bus *bus) 720 { 721 u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0}; 722 struct sdw_slave *slave, *_s; 723 struct sdw_slave_id id; 724 struct sdw_msg msg; 725 bool found; 726 int count = 0, ret; 727 u64 addr; 728 729 /* No Slave, so use raw xfer api */ 730 ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0, 731 SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf); 732 if (ret < 0) 733 return ret; 734 735 do { 736 ret = sdw_transfer(bus, &msg); 737 if (ret == -ENODATA) { /* end of device id reads */ 738 dev_dbg(bus->dev, "No more devices to enumerate\n"); 739 ret = 0; 740 break; 741 } 742 if (ret < 0) { 743 dev_err(bus->dev, "DEVID read fail:%d\n", ret); 744 break; 745 } 746 747 /* 748 * Construct the addr and extract. Cast the higher shift 749 * bits to avoid truncation due to size limit. 750 */ 751 addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) | 752 ((u64)buf[2] << 24) | ((u64)buf[1] << 32) | 753 ((u64)buf[0] << 40); 754 755 sdw_extract_slave_id(bus, addr, &id); 756 757 found = false; 758 /* Now compare with entries */ 759 list_for_each_entry_safe(slave, _s, &bus->slaves, node) { 760 if (sdw_compare_devid(slave, id) == 0) { 761 found = true; 762 763 /* 764 * Assign a new dev_num to this Slave and 765 * not mark it present. It will be marked 766 * present after it reports ATTACHED on new 767 * dev_num 768 */ 769 ret = sdw_assign_device_num(slave); 770 if (ret < 0) { 771 dev_err(bus->dev, 772 "Assign dev_num failed:%d\n", 773 ret); 774 return ret; 775 } 776 777 break; 778 } 779 } 780 781 if (!found) { 782 /* TODO: Park this device in Group 13 */ 783 784 /* 785 * add Slave device even if there is no platform 786 * firmware description. There will be no driver probe 787 * but the user/integration will be able to see the 788 * device, enumeration status and device number in sysfs 789 */ 790 sdw_slave_add(bus, &id, NULL); 791 792 dev_err(bus->dev, "Slave Entry not found\n"); 793 } 794 795 count++; 796 797 /* 798 * Check till error out or retry (count) exhausts. 799 * Device can drop off and rejoin during enumeration 800 * so count till twice the bound. 801 */ 802 803 } while (ret == 0 && count < (SDW_MAX_DEVICES * 2)); 804 805 return ret; 806 } 807 808 static void sdw_modify_slave_status(struct sdw_slave *slave, 809 enum sdw_slave_status status) 810 { 811 struct sdw_bus *bus = slave->bus; 812 813 mutex_lock(&bus->bus_lock); 814 815 dev_vdbg(bus->dev, 816 "%s: changing status slave %d status %d new status %d\n", 817 __func__, slave->dev_num, slave->status, status); 818 819 if (status == SDW_SLAVE_UNATTACHED) { 820 dev_dbg(&slave->dev, 821 "%s: initializing enumeration and init completion for Slave %d\n", 822 __func__, slave->dev_num); 823 824 init_completion(&slave->enumeration_complete); 825 init_completion(&slave->initialization_complete); 826 827 } else if ((status == SDW_SLAVE_ATTACHED) && 828 (slave->status == SDW_SLAVE_UNATTACHED)) { 829 dev_dbg(&slave->dev, 830 "%s: signaling enumeration completion for Slave %d\n", 831 __func__, slave->dev_num); 832 833 complete(&slave->enumeration_complete); 834 } 835 slave->status = status; 836 mutex_unlock(&bus->bus_lock); 837 } 838 839 static enum sdw_clk_stop_mode sdw_get_clk_stop_mode(struct sdw_slave *slave) 840 { 841 enum sdw_clk_stop_mode mode; 842 843 /* 844 * Query for clock stop mode if Slave implements 845 * ops->get_clk_stop_mode, else read from property. 846 */ 847 if (slave->ops && slave->ops->get_clk_stop_mode) { 848 mode = slave->ops->get_clk_stop_mode(slave); 849 } else { 850 if (slave->prop.clk_stop_mode1) 851 mode = SDW_CLK_STOP_MODE1; 852 else 853 mode = SDW_CLK_STOP_MODE0; 854 } 855 856 return mode; 857 } 858 859 static int sdw_slave_clk_stop_callback(struct sdw_slave *slave, 860 enum sdw_clk_stop_mode mode, 861 enum sdw_clk_stop_type type) 862 { 863 int ret; 864 865 if (slave->ops && slave->ops->clk_stop) { 866 ret = slave->ops->clk_stop(slave, mode, type); 867 if (ret < 0) { 868 dev_err(&slave->dev, 869 "Clk Stop type =%d failed: %d\n", type, ret); 870 return ret; 871 } 872 } 873 874 return 0; 875 } 876 877 static int sdw_slave_clk_stop_prepare(struct sdw_slave *slave, 878 enum sdw_clk_stop_mode mode, 879 bool prepare) 880 { 881 bool wake_en; 882 u32 val = 0; 883 int ret; 884 885 wake_en = slave->prop.wake_capable; 886 887 if (prepare) { 888 val = SDW_SCP_SYSTEMCTRL_CLK_STP_PREP; 889 890 if (mode == SDW_CLK_STOP_MODE1) 891 val |= SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1; 892 893 if (wake_en) 894 val |= SDW_SCP_SYSTEMCTRL_WAKE_UP_EN; 895 } else { 896 ret = sdw_read_no_pm(slave, SDW_SCP_SYSTEMCTRL); 897 if (ret < 0) { 898 dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL read failed:%d\n", ret); 899 return ret; 900 } 901 val = ret; 902 val &= ~(SDW_SCP_SYSTEMCTRL_CLK_STP_PREP); 903 } 904 905 ret = sdw_write_no_pm(slave, SDW_SCP_SYSTEMCTRL, val); 906 907 if (ret < 0) 908 dev_err(&slave->dev, 909 "Clock Stop prepare failed for slave: %d", ret); 910 911 return ret; 912 } 913 914 static int sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus *bus, u16 dev_num) 915 { 916 int retry = bus->clk_stop_timeout; 917 int val; 918 919 do { 920 val = sdw_bread_no_pm(bus, dev_num, SDW_SCP_STAT); 921 if (val < 0) { 922 dev_err(bus->dev, "SDW_SCP_STAT bread failed:%d\n", val); 923 return val; 924 } 925 val &= SDW_SCP_STAT_CLK_STP_NF; 926 if (!val) { 927 dev_dbg(bus->dev, "clock stop prep/de-prep done slave:%d", 928 dev_num); 929 return 0; 930 } 931 932 usleep_range(1000, 1500); 933 retry--; 934 } while (retry); 935 936 dev_err(bus->dev, "clock stop prep/de-prep failed slave:%d", 937 dev_num); 938 939 return -ETIMEDOUT; 940 } 941 942 /** 943 * sdw_bus_prep_clk_stop: prepare Slave(s) for clock stop 944 * 945 * @bus: SDW bus instance 946 * 947 * Query Slave for clock stop mode and prepare for that mode. 948 */ 949 int sdw_bus_prep_clk_stop(struct sdw_bus *bus) 950 { 951 enum sdw_clk_stop_mode slave_mode; 952 bool simple_clk_stop = true; 953 struct sdw_slave *slave; 954 bool is_slave = false; 955 int ret = 0; 956 957 /* 958 * In order to save on transition time, prepare 959 * each Slave and then wait for all Slave(s) to be 960 * prepared for clock stop. 961 */ 962 list_for_each_entry(slave, &bus->slaves, node) { 963 if (!slave->dev_num) 964 continue; 965 966 if (slave->status != SDW_SLAVE_ATTACHED && 967 slave->status != SDW_SLAVE_ALERT) 968 continue; 969 970 /* Identify if Slave(s) are available on Bus */ 971 is_slave = true; 972 973 slave_mode = sdw_get_clk_stop_mode(slave); 974 slave->curr_clk_stop_mode = slave_mode; 975 976 ret = sdw_slave_clk_stop_callback(slave, slave_mode, 977 SDW_CLK_PRE_PREPARE); 978 if (ret < 0) { 979 dev_err(&slave->dev, 980 "pre-prepare failed:%d", ret); 981 return ret; 982 } 983 984 ret = sdw_slave_clk_stop_prepare(slave, 985 slave_mode, true); 986 if (ret < 0) { 987 dev_err(&slave->dev, 988 "pre-prepare failed:%d", ret); 989 return ret; 990 } 991 992 if (slave_mode == SDW_CLK_STOP_MODE1) 993 simple_clk_stop = false; 994 } 995 996 /* Skip remaining clock stop preparation if no Slave is attached */ 997 if (!is_slave) 998 return ret; 999 1000 if (!simple_clk_stop) { 1001 ret = sdw_bus_wait_for_clk_prep_deprep(bus, 1002 SDW_BROADCAST_DEV_NUM); 1003 if (ret < 0) 1004 return ret; 1005 } 1006 1007 /* Inform slaves that prep is done */ 1008 list_for_each_entry(slave, &bus->slaves, node) { 1009 if (!slave->dev_num) 1010 continue; 1011 1012 if (slave->status != SDW_SLAVE_ATTACHED && 1013 slave->status != SDW_SLAVE_ALERT) 1014 continue; 1015 1016 slave_mode = slave->curr_clk_stop_mode; 1017 1018 if (slave_mode == SDW_CLK_STOP_MODE1) { 1019 ret = sdw_slave_clk_stop_callback(slave, 1020 slave_mode, 1021 SDW_CLK_POST_PREPARE); 1022 1023 if (ret < 0) { 1024 dev_err(&slave->dev, 1025 "post-prepare failed:%d", ret); 1026 } 1027 } 1028 } 1029 1030 return ret; 1031 } 1032 EXPORT_SYMBOL(sdw_bus_prep_clk_stop); 1033 1034 /** 1035 * sdw_bus_clk_stop: stop bus clock 1036 * 1037 * @bus: SDW bus instance 1038 * 1039 * After preparing the Slaves for clock stop, stop the clock by broadcasting 1040 * write to SCP_CTRL register. 1041 */ 1042 int sdw_bus_clk_stop(struct sdw_bus *bus) 1043 { 1044 int ret; 1045 1046 /* 1047 * broadcast clock stop now, attached Slaves will ACK this, 1048 * unattached will ignore 1049 */ 1050 ret = sdw_bwrite_no_pm(bus, SDW_BROADCAST_DEV_NUM, 1051 SDW_SCP_CTRL, SDW_SCP_CTRL_CLK_STP_NOW); 1052 if (ret < 0) { 1053 if (ret == -ENODATA) 1054 dev_dbg(bus->dev, 1055 "ClockStopNow Broadcast msg ignored %d", ret); 1056 else 1057 dev_err(bus->dev, 1058 "ClockStopNow Broadcast msg failed %d", ret); 1059 return ret; 1060 } 1061 1062 return 0; 1063 } 1064 EXPORT_SYMBOL(sdw_bus_clk_stop); 1065 1066 /** 1067 * sdw_bus_exit_clk_stop: Exit clock stop mode 1068 * 1069 * @bus: SDW bus instance 1070 * 1071 * This De-prepares the Slaves by exiting Clock Stop Mode 0. For the Slaves 1072 * exiting Clock Stop Mode 1, they will be de-prepared after they enumerate 1073 * back. 1074 */ 1075 int sdw_bus_exit_clk_stop(struct sdw_bus *bus) 1076 { 1077 enum sdw_clk_stop_mode mode; 1078 bool simple_clk_stop = true; 1079 struct sdw_slave *slave; 1080 bool is_slave = false; 1081 int ret; 1082 1083 /* 1084 * In order to save on transition time, de-prepare 1085 * each Slave and then wait for all Slave(s) to be 1086 * de-prepared after clock resume. 1087 */ 1088 list_for_each_entry(slave, &bus->slaves, node) { 1089 if (!slave->dev_num) 1090 continue; 1091 1092 if (slave->status != SDW_SLAVE_ATTACHED && 1093 slave->status != SDW_SLAVE_ALERT) 1094 continue; 1095 1096 /* Identify if Slave(s) are available on Bus */ 1097 is_slave = true; 1098 1099 mode = slave->curr_clk_stop_mode; 1100 1101 if (mode == SDW_CLK_STOP_MODE1) { 1102 simple_clk_stop = false; 1103 continue; 1104 } 1105 1106 ret = sdw_slave_clk_stop_callback(slave, mode, 1107 SDW_CLK_PRE_DEPREPARE); 1108 if (ret < 0) 1109 dev_warn(&slave->dev, 1110 "clk stop deprep failed:%d", ret); 1111 1112 ret = sdw_slave_clk_stop_prepare(slave, mode, 1113 false); 1114 1115 if (ret < 0) 1116 dev_warn(&slave->dev, 1117 "clk stop deprep failed:%d", ret); 1118 } 1119 1120 /* Skip remaining clock stop de-preparation if no Slave is attached */ 1121 if (!is_slave) 1122 return 0; 1123 1124 if (!simple_clk_stop) 1125 sdw_bus_wait_for_clk_prep_deprep(bus, SDW_BROADCAST_DEV_NUM); 1126 1127 list_for_each_entry(slave, &bus->slaves, node) { 1128 if (!slave->dev_num) 1129 continue; 1130 1131 if (slave->status != SDW_SLAVE_ATTACHED && 1132 slave->status != SDW_SLAVE_ALERT) 1133 continue; 1134 1135 mode = slave->curr_clk_stop_mode; 1136 sdw_slave_clk_stop_callback(slave, mode, 1137 SDW_CLK_POST_DEPREPARE); 1138 } 1139 1140 return 0; 1141 } 1142 EXPORT_SYMBOL(sdw_bus_exit_clk_stop); 1143 1144 int sdw_configure_dpn_intr(struct sdw_slave *slave, 1145 int port, bool enable, int mask) 1146 { 1147 u32 addr; 1148 int ret; 1149 u8 val = 0; 1150 1151 if (slave->bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL) { 1152 dev_dbg(&slave->dev, "TEST FAIL interrupt %s\n", 1153 enable ? "on" : "off"); 1154 mask |= SDW_DPN_INT_TEST_FAIL; 1155 } 1156 1157 addr = SDW_DPN_INTMASK(port); 1158 1159 /* Set/Clear port ready interrupt mask */ 1160 if (enable) { 1161 val |= mask; 1162 val |= SDW_DPN_INT_PORT_READY; 1163 } else { 1164 val &= ~(mask); 1165 val &= ~SDW_DPN_INT_PORT_READY; 1166 } 1167 1168 ret = sdw_update(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val); 1169 if (ret < 0) 1170 dev_err(&slave->dev, 1171 "SDW_DPN_INTMASK write failed:%d\n", val); 1172 1173 return ret; 1174 } 1175 1176 static int sdw_slave_set_frequency(struct sdw_slave *slave) 1177 { 1178 u32 mclk_freq = slave->bus->prop.mclk_freq; 1179 u32 curr_freq = slave->bus->params.curr_dr_freq >> 1; 1180 unsigned int scale; 1181 u8 scale_index; 1182 u8 base; 1183 int ret; 1184 1185 /* 1186 * frequency base and scale registers are required for SDCA 1187 * devices. They may also be used for 1.2+/non-SDCA devices, 1188 * but we will need a DisCo property to cover this case 1189 */ 1190 if (!slave->id.class_id) 1191 return 0; 1192 1193 if (!mclk_freq) { 1194 dev_err(&slave->dev, 1195 "no bus MCLK, cannot set SDW_SCP_BUS_CLOCK_BASE\n"); 1196 return -EINVAL; 1197 } 1198 1199 /* 1200 * map base frequency using Table 89 of SoundWire 1.2 spec. 1201 * The order of the tests just follows the specification, this 1202 * is not a selection between possible values or a search for 1203 * the best value but just a mapping. Only one case per platform 1204 * is relevant. 1205 * Some BIOS have inconsistent values for mclk_freq but a 1206 * correct root so we force the mclk_freq to avoid variations. 1207 */ 1208 if (!(19200000 % mclk_freq)) { 1209 mclk_freq = 19200000; 1210 base = SDW_SCP_BASE_CLOCK_19200000_HZ; 1211 } else if (!(24000000 % mclk_freq)) { 1212 mclk_freq = 24000000; 1213 base = SDW_SCP_BASE_CLOCK_24000000_HZ; 1214 } else if (!(24576000 % mclk_freq)) { 1215 mclk_freq = 24576000; 1216 base = SDW_SCP_BASE_CLOCK_24576000_HZ; 1217 } else if (!(22579200 % mclk_freq)) { 1218 mclk_freq = 22579200; 1219 base = SDW_SCP_BASE_CLOCK_22579200_HZ; 1220 } else if (!(32000000 % mclk_freq)) { 1221 mclk_freq = 32000000; 1222 base = SDW_SCP_BASE_CLOCK_32000000_HZ; 1223 } else { 1224 dev_err(&slave->dev, 1225 "Unsupported clock base, mclk %d\n", 1226 mclk_freq); 1227 return -EINVAL; 1228 } 1229 1230 if (mclk_freq % curr_freq) { 1231 dev_err(&slave->dev, 1232 "mclk %d is not multiple of bus curr_freq %d\n", 1233 mclk_freq, curr_freq); 1234 return -EINVAL; 1235 } 1236 1237 scale = mclk_freq / curr_freq; 1238 1239 /* 1240 * map scale to Table 90 of SoundWire 1.2 spec - and check 1241 * that the scale is a power of two and maximum 64 1242 */ 1243 scale_index = ilog2(scale); 1244 1245 if (BIT(scale_index) != scale || scale_index > 6) { 1246 dev_err(&slave->dev, 1247 "No match found for scale %d, bus mclk %d curr_freq %d\n", 1248 scale, mclk_freq, curr_freq); 1249 return -EINVAL; 1250 } 1251 scale_index++; 1252 1253 ret = sdw_write_no_pm(slave, SDW_SCP_BUS_CLOCK_BASE, base); 1254 if (ret < 0) { 1255 dev_err(&slave->dev, 1256 "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret); 1257 return ret; 1258 } 1259 1260 /* initialize scale for both banks */ 1261 ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index); 1262 if (ret < 0) { 1263 dev_err(&slave->dev, 1264 "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret); 1265 return ret; 1266 } 1267 ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index); 1268 if (ret < 0) 1269 dev_err(&slave->dev, 1270 "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret); 1271 1272 dev_dbg(&slave->dev, 1273 "Configured bus base %d, scale %d, mclk %d, curr_freq %d\n", 1274 base, scale_index, mclk_freq, curr_freq); 1275 1276 return ret; 1277 } 1278 1279 static int sdw_initialize_slave(struct sdw_slave *slave) 1280 { 1281 struct sdw_slave_prop *prop = &slave->prop; 1282 int status; 1283 int ret; 1284 u8 val; 1285 1286 ret = sdw_slave_set_frequency(slave); 1287 if (ret < 0) 1288 return ret; 1289 1290 if (slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_CLASH) { 1291 /* Clear bus clash interrupt before enabling interrupt mask */ 1292 status = sdw_read_no_pm(slave, SDW_SCP_INT1); 1293 if (status < 0) { 1294 dev_err(&slave->dev, 1295 "SDW_SCP_INT1 (BUS_CLASH) read failed:%d\n", status); 1296 return status; 1297 } 1298 if (status & SDW_SCP_INT1_BUS_CLASH) { 1299 dev_warn(&slave->dev, "Bus clash detected before INT mask is enabled\n"); 1300 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_BUS_CLASH); 1301 if (ret < 0) { 1302 dev_err(&slave->dev, 1303 "SDW_SCP_INT1 (BUS_CLASH) write failed:%d\n", ret); 1304 return ret; 1305 } 1306 } 1307 } 1308 if ((slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_PARITY) && 1309 !(slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY)) { 1310 /* Clear parity interrupt before enabling interrupt mask */ 1311 status = sdw_read_no_pm(slave, SDW_SCP_INT1); 1312 if (status < 0) { 1313 dev_err(&slave->dev, 1314 "SDW_SCP_INT1 (PARITY) read failed:%d\n", status); 1315 return status; 1316 } 1317 if (status & SDW_SCP_INT1_PARITY) { 1318 dev_warn(&slave->dev, "PARITY error detected before INT mask is enabled\n"); 1319 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_PARITY); 1320 if (ret < 0) { 1321 dev_err(&slave->dev, 1322 "SDW_SCP_INT1 (PARITY) write failed:%d\n", ret); 1323 return ret; 1324 } 1325 } 1326 } 1327 1328 /* 1329 * Set SCP_INT1_MASK register, typically bus clash and 1330 * implementation-defined interrupt mask. The Parity detection 1331 * may not always be correct on startup so its use is 1332 * device-dependent, it might e.g. only be enabled in 1333 * steady-state after a couple of frames. 1334 */ 1335 val = slave->prop.scp_int1_mask; 1336 1337 /* Enable SCP interrupts */ 1338 ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, val, val); 1339 if (ret < 0) { 1340 dev_err(&slave->dev, 1341 "SDW_SCP_INTMASK1 write failed:%d\n", ret); 1342 return ret; 1343 } 1344 1345 /* No need to continue if DP0 is not present */ 1346 if (!slave->prop.dp0_prop) 1347 return 0; 1348 1349 /* Enable DP0 interrupts */ 1350 val = prop->dp0_prop->imp_def_interrupts; 1351 val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE; 1352 1353 ret = sdw_update_no_pm(slave, SDW_DP0_INTMASK, val, val); 1354 if (ret < 0) 1355 dev_err(&slave->dev, 1356 "SDW_DP0_INTMASK read failed:%d\n", ret); 1357 return ret; 1358 } 1359 1360 static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status) 1361 { 1362 u8 clear, impl_int_mask; 1363 int status, status2, ret, count = 0; 1364 1365 status = sdw_read_no_pm(slave, SDW_DP0_INT); 1366 if (status < 0) { 1367 dev_err(&slave->dev, 1368 "SDW_DP0_INT read failed:%d\n", status); 1369 return status; 1370 } 1371 1372 do { 1373 clear = status & ~SDW_DP0_INTERRUPTS; 1374 1375 if (status & SDW_DP0_INT_TEST_FAIL) { 1376 dev_err(&slave->dev, "Test fail for port 0\n"); 1377 clear |= SDW_DP0_INT_TEST_FAIL; 1378 } 1379 1380 /* 1381 * Assumption: PORT_READY interrupt will be received only for 1382 * ports implementing Channel Prepare state machine (CP_SM) 1383 */ 1384 1385 if (status & SDW_DP0_INT_PORT_READY) { 1386 complete(&slave->port_ready[0]); 1387 clear |= SDW_DP0_INT_PORT_READY; 1388 } 1389 1390 if (status & SDW_DP0_INT_BRA_FAILURE) { 1391 dev_err(&slave->dev, "BRA failed\n"); 1392 clear |= SDW_DP0_INT_BRA_FAILURE; 1393 } 1394 1395 impl_int_mask = SDW_DP0_INT_IMPDEF1 | 1396 SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3; 1397 1398 if (status & impl_int_mask) { 1399 clear |= impl_int_mask; 1400 *slave_status = clear; 1401 } 1402 1403 /* clear the interrupts but don't touch reserved and SDCA_CASCADE fields */ 1404 ret = sdw_write_no_pm(slave, SDW_DP0_INT, clear); 1405 if (ret < 0) { 1406 dev_err(&slave->dev, 1407 "SDW_DP0_INT write failed:%d\n", ret); 1408 return ret; 1409 } 1410 1411 /* Read DP0 interrupt again */ 1412 status2 = sdw_read_no_pm(slave, SDW_DP0_INT); 1413 if (status2 < 0) { 1414 dev_err(&slave->dev, 1415 "SDW_DP0_INT read failed:%d\n", status2); 1416 return status2; 1417 } 1418 /* filter to limit loop to interrupts identified in the first status read */ 1419 status &= status2; 1420 1421 count++; 1422 1423 /* we can get alerts while processing so keep retrying */ 1424 } while ((status & SDW_DP0_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY)); 1425 1426 if (count == SDW_READ_INTR_CLEAR_RETRY) 1427 dev_warn(&slave->dev, "Reached MAX_RETRY on DP0 read\n"); 1428 1429 return ret; 1430 } 1431 1432 static int sdw_handle_port_interrupt(struct sdw_slave *slave, 1433 int port, u8 *slave_status) 1434 { 1435 u8 clear, impl_int_mask; 1436 int status, status2, ret, count = 0; 1437 u32 addr; 1438 1439 if (port == 0) 1440 return sdw_handle_dp0_interrupt(slave, slave_status); 1441 1442 addr = SDW_DPN_INT(port); 1443 status = sdw_read_no_pm(slave, addr); 1444 if (status < 0) { 1445 dev_err(&slave->dev, 1446 "SDW_DPN_INT read failed:%d\n", status); 1447 1448 return status; 1449 } 1450 1451 do { 1452 clear = status & ~SDW_DPN_INTERRUPTS; 1453 1454 if (status & SDW_DPN_INT_TEST_FAIL) { 1455 dev_err(&slave->dev, "Test fail for port:%d\n", port); 1456 clear |= SDW_DPN_INT_TEST_FAIL; 1457 } 1458 1459 /* 1460 * Assumption: PORT_READY interrupt will be received only 1461 * for ports implementing CP_SM. 1462 */ 1463 if (status & SDW_DPN_INT_PORT_READY) { 1464 complete(&slave->port_ready[port]); 1465 clear |= SDW_DPN_INT_PORT_READY; 1466 } 1467 1468 impl_int_mask = SDW_DPN_INT_IMPDEF1 | 1469 SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3; 1470 1471 if (status & impl_int_mask) { 1472 clear |= impl_int_mask; 1473 *slave_status = clear; 1474 } 1475 1476 /* clear the interrupt but don't touch reserved fields */ 1477 ret = sdw_write_no_pm(slave, addr, clear); 1478 if (ret < 0) { 1479 dev_err(&slave->dev, 1480 "SDW_DPN_INT write failed:%d\n", ret); 1481 return ret; 1482 } 1483 1484 /* Read DPN interrupt again */ 1485 status2 = sdw_read_no_pm(slave, addr); 1486 if (status2 < 0) { 1487 dev_err(&slave->dev, 1488 "SDW_DPN_INT read failed:%d\n", status2); 1489 return status2; 1490 } 1491 /* filter to limit loop to interrupts identified in the first status read */ 1492 status &= status2; 1493 1494 count++; 1495 1496 /* we can get alerts while processing so keep retrying */ 1497 } while ((status & SDW_DPN_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY)); 1498 1499 if (count == SDW_READ_INTR_CLEAR_RETRY) 1500 dev_warn(&slave->dev, "Reached MAX_RETRY on port read"); 1501 1502 return ret; 1503 } 1504 1505 static int sdw_handle_slave_alerts(struct sdw_slave *slave) 1506 { 1507 struct sdw_slave_intr_status slave_intr; 1508 u8 clear = 0, bit, port_status[15] = {0}; 1509 int port_num, stat, ret, count = 0; 1510 unsigned long port; 1511 bool slave_notify; 1512 u8 sdca_cascade = 0; 1513 u8 buf, buf2[2], _buf, _buf2[2]; 1514 bool parity_check; 1515 bool parity_quirk; 1516 1517 sdw_modify_slave_status(slave, SDW_SLAVE_ALERT); 1518 1519 ret = pm_runtime_get_sync(&slave->dev); 1520 if (ret < 0 && ret != -EACCES) { 1521 dev_err(&slave->dev, "Failed to resume device: %d\n", ret); 1522 pm_runtime_put_noidle(&slave->dev); 1523 return ret; 1524 } 1525 1526 /* Read Intstat 1, Intstat 2 and Intstat 3 registers */ 1527 ret = sdw_read_no_pm(slave, SDW_SCP_INT1); 1528 if (ret < 0) { 1529 dev_err(&slave->dev, 1530 "SDW_SCP_INT1 read failed:%d\n", ret); 1531 goto io_err; 1532 } 1533 buf = ret; 1534 1535 ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, buf2); 1536 if (ret < 0) { 1537 dev_err(&slave->dev, 1538 "SDW_SCP_INT2/3 read failed:%d\n", ret); 1539 goto io_err; 1540 } 1541 1542 if (slave->prop.is_sdca) { 1543 ret = sdw_read_no_pm(slave, SDW_DP0_INT); 1544 if (ret < 0) { 1545 dev_err(&slave->dev, 1546 "SDW_DP0_INT read failed:%d\n", ret); 1547 goto io_err; 1548 } 1549 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; 1550 } 1551 1552 do { 1553 slave_notify = false; 1554 1555 /* 1556 * Check parity, bus clash and Slave (impl defined) 1557 * interrupt 1558 */ 1559 if (buf & SDW_SCP_INT1_PARITY) { 1560 parity_check = slave->prop.scp_int1_mask & SDW_SCP_INT1_PARITY; 1561 parity_quirk = !slave->first_interrupt_done && 1562 (slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY); 1563 1564 if (parity_check && !parity_quirk) 1565 dev_err(&slave->dev, "Parity error detected\n"); 1566 clear |= SDW_SCP_INT1_PARITY; 1567 } 1568 1569 if (buf & SDW_SCP_INT1_BUS_CLASH) { 1570 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_BUS_CLASH) 1571 dev_err(&slave->dev, "Bus clash detected\n"); 1572 clear |= SDW_SCP_INT1_BUS_CLASH; 1573 } 1574 1575 /* 1576 * When bus clash or parity errors are detected, such errors 1577 * are unlikely to be recoverable errors. 1578 * TODO: In such scenario, reset bus. Make this configurable 1579 * via sysfs property with bus reset being the default. 1580 */ 1581 1582 if (buf & SDW_SCP_INT1_IMPL_DEF) { 1583 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_IMPL_DEF) { 1584 dev_dbg(&slave->dev, "Slave impl defined interrupt\n"); 1585 slave_notify = true; 1586 } 1587 clear |= SDW_SCP_INT1_IMPL_DEF; 1588 } 1589 1590 /* the SDCA interrupts are cleared in the codec driver .interrupt_callback() */ 1591 if (sdca_cascade) 1592 slave_notify = true; 1593 1594 /* Check port 0 - 3 interrupts */ 1595 port = buf & SDW_SCP_INT1_PORT0_3; 1596 1597 /* To get port number corresponding to bits, shift it */ 1598 port = FIELD_GET(SDW_SCP_INT1_PORT0_3, port); 1599 for_each_set_bit(bit, &port, 8) { 1600 sdw_handle_port_interrupt(slave, bit, 1601 &port_status[bit]); 1602 } 1603 1604 /* Check if cascade 2 interrupt is present */ 1605 if (buf & SDW_SCP_INT1_SCP2_CASCADE) { 1606 port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10; 1607 for_each_set_bit(bit, &port, 8) { 1608 /* scp2 ports start from 4 */ 1609 port_num = bit + 3; 1610 sdw_handle_port_interrupt(slave, 1611 port_num, 1612 &port_status[port_num]); 1613 } 1614 } 1615 1616 /* now check last cascade */ 1617 if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) { 1618 port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14; 1619 for_each_set_bit(bit, &port, 8) { 1620 /* scp3 ports start from 11 */ 1621 port_num = bit + 10; 1622 sdw_handle_port_interrupt(slave, 1623 port_num, 1624 &port_status[port_num]); 1625 } 1626 } 1627 1628 /* Update the Slave driver */ 1629 if (slave_notify && slave->ops && 1630 slave->ops->interrupt_callback) { 1631 slave_intr.sdca_cascade = sdca_cascade; 1632 slave_intr.control_port = clear; 1633 memcpy(slave_intr.port, &port_status, 1634 sizeof(slave_intr.port)); 1635 1636 slave->ops->interrupt_callback(slave, &slave_intr); 1637 } 1638 1639 /* Ack interrupt */ 1640 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, clear); 1641 if (ret < 0) { 1642 dev_err(&slave->dev, 1643 "SDW_SCP_INT1 write failed:%d\n", ret); 1644 goto io_err; 1645 } 1646 1647 /* at this point all initial interrupt sources were handled */ 1648 slave->first_interrupt_done = true; 1649 1650 /* 1651 * Read status again to ensure no new interrupts arrived 1652 * while servicing interrupts. 1653 */ 1654 ret = sdw_read_no_pm(slave, SDW_SCP_INT1); 1655 if (ret < 0) { 1656 dev_err(&slave->dev, 1657 "SDW_SCP_INT1 recheck read failed:%d\n", ret); 1658 goto io_err; 1659 } 1660 _buf = ret; 1661 1662 ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, _buf2); 1663 if (ret < 0) { 1664 dev_err(&slave->dev, 1665 "SDW_SCP_INT2/3 recheck read failed:%d\n", ret); 1666 goto io_err; 1667 } 1668 1669 if (slave->prop.is_sdca) { 1670 ret = sdw_read_no_pm(slave, SDW_DP0_INT); 1671 if (ret < 0) { 1672 dev_err(&slave->dev, 1673 "SDW_DP0_INT recheck read failed:%d\n", ret); 1674 goto io_err; 1675 } 1676 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; 1677 } 1678 1679 /* 1680 * Make sure no interrupts are pending, but filter to limit loop 1681 * to interrupts identified in the first status read 1682 */ 1683 buf &= _buf; 1684 buf2[0] &= _buf2[0]; 1685 buf2[1] &= _buf2[1]; 1686 stat = buf || buf2[0] || buf2[1] || sdca_cascade; 1687 1688 /* 1689 * Exit loop if Slave is continuously in ALERT state even 1690 * after servicing the interrupt multiple times. 1691 */ 1692 count++; 1693 1694 /* we can get alerts while processing so keep retrying */ 1695 } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY); 1696 1697 if (count == SDW_READ_INTR_CLEAR_RETRY) 1698 dev_warn(&slave->dev, "Reached MAX_RETRY on alert read\n"); 1699 1700 io_err: 1701 pm_runtime_mark_last_busy(&slave->dev); 1702 pm_runtime_put_autosuspend(&slave->dev); 1703 1704 return ret; 1705 } 1706 1707 static int sdw_update_slave_status(struct sdw_slave *slave, 1708 enum sdw_slave_status status) 1709 { 1710 unsigned long time; 1711 1712 if (!slave->probed) { 1713 /* 1714 * the slave status update is typically handled in an 1715 * interrupt thread, which can race with the driver 1716 * probe, e.g. when a module needs to be loaded. 1717 * 1718 * make sure the probe is complete before updating 1719 * status. 1720 */ 1721 time = wait_for_completion_timeout(&slave->probe_complete, 1722 msecs_to_jiffies(DEFAULT_PROBE_TIMEOUT)); 1723 if (!time) { 1724 dev_err(&slave->dev, "Probe not complete, timed out\n"); 1725 return -ETIMEDOUT; 1726 } 1727 } 1728 1729 if (!slave->ops || !slave->ops->update_status) 1730 return 0; 1731 1732 return slave->ops->update_status(slave, status); 1733 } 1734 1735 /** 1736 * sdw_handle_slave_status() - Handle Slave status 1737 * @bus: SDW bus instance 1738 * @status: Status for all Slave(s) 1739 */ 1740 int sdw_handle_slave_status(struct sdw_bus *bus, 1741 enum sdw_slave_status status[]) 1742 { 1743 enum sdw_slave_status prev_status; 1744 struct sdw_slave *slave; 1745 bool attached_initializing; 1746 int i, ret = 0; 1747 1748 /* first check if any Slaves fell off the bus */ 1749 for (i = 1; i <= SDW_MAX_DEVICES; i++) { 1750 mutex_lock(&bus->bus_lock); 1751 if (test_bit(i, bus->assigned) == false) { 1752 mutex_unlock(&bus->bus_lock); 1753 continue; 1754 } 1755 mutex_unlock(&bus->bus_lock); 1756 1757 slave = sdw_get_slave(bus, i); 1758 if (!slave) 1759 continue; 1760 1761 if (status[i] == SDW_SLAVE_UNATTACHED && 1762 slave->status != SDW_SLAVE_UNATTACHED) 1763 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); 1764 } 1765 1766 if (status[0] == SDW_SLAVE_ATTACHED) { 1767 dev_dbg(bus->dev, "Slave attached, programming device number\n"); 1768 ret = sdw_program_device_num(bus); 1769 if (ret < 0) 1770 dev_err(bus->dev, "Slave attach failed: %d\n", ret); 1771 /* 1772 * programming a device number will have side effects, 1773 * so we deal with other devices at a later time 1774 */ 1775 return ret; 1776 } 1777 1778 /* Continue to check other slave statuses */ 1779 for (i = 1; i <= SDW_MAX_DEVICES; i++) { 1780 mutex_lock(&bus->bus_lock); 1781 if (test_bit(i, bus->assigned) == false) { 1782 mutex_unlock(&bus->bus_lock); 1783 continue; 1784 } 1785 mutex_unlock(&bus->bus_lock); 1786 1787 slave = sdw_get_slave(bus, i); 1788 if (!slave) 1789 continue; 1790 1791 attached_initializing = false; 1792 1793 switch (status[i]) { 1794 case SDW_SLAVE_UNATTACHED: 1795 if (slave->status == SDW_SLAVE_UNATTACHED) 1796 break; 1797 1798 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); 1799 break; 1800 1801 case SDW_SLAVE_ALERT: 1802 ret = sdw_handle_slave_alerts(slave); 1803 if (ret < 0) 1804 dev_err(&slave->dev, 1805 "Slave %d alert handling failed: %d\n", 1806 i, ret); 1807 break; 1808 1809 case SDW_SLAVE_ATTACHED: 1810 if (slave->status == SDW_SLAVE_ATTACHED) 1811 break; 1812 1813 prev_status = slave->status; 1814 sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED); 1815 1816 if (prev_status == SDW_SLAVE_ALERT) 1817 break; 1818 1819 attached_initializing = true; 1820 1821 ret = sdw_initialize_slave(slave); 1822 if (ret < 0) 1823 dev_err(&slave->dev, 1824 "Slave %d initialization failed: %d\n", 1825 i, ret); 1826 1827 break; 1828 1829 default: 1830 dev_err(&slave->dev, "Invalid slave %d status:%d\n", 1831 i, status[i]); 1832 break; 1833 } 1834 1835 ret = sdw_update_slave_status(slave, status[i]); 1836 if (ret < 0) 1837 dev_err(&slave->dev, 1838 "Update Slave status failed:%d\n", ret); 1839 if (attached_initializing) { 1840 dev_dbg(&slave->dev, 1841 "%s: signaling initialization completion for Slave %d\n", 1842 __func__, slave->dev_num); 1843 1844 complete(&slave->initialization_complete); 1845 } 1846 } 1847 1848 return ret; 1849 } 1850 EXPORT_SYMBOL(sdw_handle_slave_status); 1851 1852 void sdw_clear_slave_status(struct sdw_bus *bus, u32 request) 1853 { 1854 struct sdw_slave *slave; 1855 int i; 1856 1857 /* Check all non-zero devices */ 1858 for (i = 1; i <= SDW_MAX_DEVICES; i++) { 1859 mutex_lock(&bus->bus_lock); 1860 if (test_bit(i, bus->assigned) == false) { 1861 mutex_unlock(&bus->bus_lock); 1862 continue; 1863 } 1864 mutex_unlock(&bus->bus_lock); 1865 1866 slave = sdw_get_slave(bus, i); 1867 if (!slave) 1868 continue; 1869 1870 if (slave->status != SDW_SLAVE_UNATTACHED) { 1871 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); 1872 slave->first_interrupt_done = false; 1873 } 1874 1875 /* keep track of request, used in pm_runtime resume */ 1876 slave->unattach_request = request; 1877 } 1878 } 1879 EXPORT_SYMBOL(sdw_clear_slave_status); 1880